18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Renesas R-Car Gen3 PCIe PHY driver
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Copyright (C) 2018 Cogent Embedded, Inc.
68c2ecf20Sopenharmony_ci */
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_ci#include <linux/clk.h>
98c2ecf20Sopenharmony_ci#include <linux/io.h>
108c2ecf20Sopenharmony_ci#include <linux/module.h>
118c2ecf20Sopenharmony_ci#include <linux/of.h>
128c2ecf20Sopenharmony_ci#include <linux/phy/phy.h>
138c2ecf20Sopenharmony_ci#include <linux/of_device.h>
148c2ecf20Sopenharmony_ci#include <linux/platform_device.h>
158c2ecf20Sopenharmony_ci#include <linux/spinlock.h>
168c2ecf20Sopenharmony_ci
178c2ecf20Sopenharmony_ci#define PHY_CTRL		0x4000		/* R8A77980 only */
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ci/* PHY control register (PHY_CTRL) */
208c2ecf20Sopenharmony_ci#define PHY_CTRL_PHY_PWDN	BIT(2)
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_cistruct rcar_gen3_phy {
238c2ecf20Sopenharmony_ci	struct phy *phy;
248c2ecf20Sopenharmony_ci	spinlock_t lock;
258c2ecf20Sopenharmony_ci	void __iomem *base;
268c2ecf20Sopenharmony_ci};
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_cistatic void rcar_gen3_phy_pcie_modify_reg(struct phy *p, unsigned int reg,
298c2ecf20Sopenharmony_ci					  u32 clear, u32 set)
308c2ecf20Sopenharmony_ci{
318c2ecf20Sopenharmony_ci	struct rcar_gen3_phy *phy = phy_get_drvdata(p);
328c2ecf20Sopenharmony_ci	void __iomem *base = phy->base;
338c2ecf20Sopenharmony_ci	unsigned long flags;
348c2ecf20Sopenharmony_ci	u32 value;
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_ci	spin_lock_irqsave(&phy->lock, flags);
378c2ecf20Sopenharmony_ci
388c2ecf20Sopenharmony_ci	value = readl(base + reg);
398c2ecf20Sopenharmony_ci	value &= ~clear;
408c2ecf20Sopenharmony_ci	value |= set;
418c2ecf20Sopenharmony_ci	writel(value, base + reg);
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci	spin_unlock_irqrestore(&phy->lock, flags);
448c2ecf20Sopenharmony_ci}
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_cistatic int r8a77980_phy_pcie_power_on(struct phy *p)
478c2ecf20Sopenharmony_ci{
488c2ecf20Sopenharmony_ci	/* Power on the PCIe PHY */
498c2ecf20Sopenharmony_ci	rcar_gen3_phy_pcie_modify_reg(p, PHY_CTRL, PHY_CTRL_PHY_PWDN, 0);
508c2ecf20Sopenharmony_ci
518c2ecf20Sopenharmony_ci	return 0;
528c2ecf20Sopenharmony_ci}
538c2ecf20Sopenharmony_ci
548c2ecf20Sopenharmony_cistatic int r8a77980_phy_pcie_power_off(struct phy *p)
558c2ecf20Sopenharmony_ci{
568c2ecf20Sopenharmony_ci	/* Power off the PCIe PHY */
578c2ecf20Sopenharmony_ci	rcar_gen3_phy_pcie_modify_reg(p, PHY_CTRL, 0, PHY_CTRL_PHY_PWDN);
588c2ecf20Sopenharmony_ci
598c2ecf20Sopenharmony_ci	return 0;
608c2ecf20Sopenharmony_ci}
618c2ecf20Sopenharmony_ci
628c2ecf20Sopenharmony_cistatic const struct phy_ops r8a77980_phy_pcie_ops = {
638c2ecf20Sopenharmony_ci	.power_on	= r8a77980_phy_pcie_power_on,
648c2ecf20Sopenharmony_ci	.power_off	= r8a77980_phy_pcie_power_off,
658c2ecf20Sopenharmony_ci	.owner		= THIS_MODULE,
668c2ecf20Sopenharmony_ci};
678c2ecf20Sopenharmony_ci
688c2ecf20Sopenharmony_cistatic const struct of_device_id rcar_gen3_phy_pcie_match_table[] = {
698c2ecf20Sopenharmony_ci	{ .compatible = "renesas,r8a77980-pcie-phy" },
708c2ecf20Sopenharmony_ci	{ }
718c2ecf20Sopenharmony_ci};
728c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(of, rcar_gen3_phy_pcie_match_table);
738c2ecf20Sopenharmony_ci
748c2ecf20Sopenharmony_cistatic int rcar_gen3_phy_pcie_probe(struct platform_device *pdev)
758c2ecf20Sopenharmony_ci{
768c2ecf20Sopenharmony_ci	struct device *dev = &pdev->dev;
778c2ecf20Sopenharmony_ci	struct phy_provider *provider;
788c2ecf20Sopenharmony_ci	struct rcar_gen3_phy *phy;
798c2ecf20Sopenharmony_ci	struct resource *res;
808c2ecf20Sopenharmony_ci	void __iomem *base;
818c2ecf20Sopenharmony_ci	int error;
828c2ecf20Sopenharmony_ci
838c2ecf20Sopenharmony_ci	if (!dev->of_node) {
848c2ecf20Sopenharmony_ci		dev_err(dev,
858c2ecf20Sopenharmony_ci			"This driver must only be instantiated from the device tree\n");
868c2ecf20Sopenharmony_ci		return -EINVAL;
878c2ecf20Sopenharmony_ci	}
888c2ecf20Sopenharmony_ci
898c2ecf20Sopenharmony_ci	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
908c2ecf20Sopenharmony_ci	base = devm_ioremap_resource(dev, res);
918c2ecf20Sopenharmony_ci	if (IS_ERR(base))
928c2ecf20Sopenharmony_ci		return PTR_ERR(base);
938c2ecf20Sopenharmony_ci
948c2ecf20Sopenharmony_ci	phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
958c2ecf20Sopenharmony_ci	if (!phy)
968c2ecf20Sopenharmony_ci		return -ENOMEM;
978c2ecf20Sopenharmony_ci
988c2ecf20Sopenharmony_ci	spin_lock_init(&phy->lock);
998c2ecf20Sopenharmony_ci
1008c2ecf20Sopenharmony_ci	phy->base = base;
1018c2ecf20Sopenharmony_ci
1028c2ecf20Sopenharmony_ci	/*
1038c2ecf20Sopenharmony_ci	 * devm_phy_create() will call pm_runtime_enable(&phy->dev);
1048c2ecf20Sopenharmony_ci	 * And then, phy-core will manage runtime PM for this device.
1058c2ecf20Sopenharmony_ci	 */
1068c2ecf20Sopenharmony_ci	pm_runtime_enable(dev);
1078c2ecf20Sopenharmony_ci
1088c2ecf20Sopenharmony_ci	phy->phy = devm_phy_create(dev, NULL, &r8a77980_phy_pcie_ops);
1098c2ecf20Sopenharmony_ci	if (IS_ERR(phy->phy)) {
1108c2ecf20Sopenharmony_ci		dev_err(dev, "Failed to create PCIe PHY\n");
1118c2ecf20Sopenharmony_ci		error = PTR_ERR(phy->phy);
1128c2ecf20Sopenharmony_ci		goto error;
1138c2ecf20Sopenharmony_ci	}
1148c2ecf20Sopenharmony_ci	phy_set_drvdata(phy->phy, phy);
1158c2ecf20Sopenharmony_ci
1168c2ecf20Sopenharmony_ci	provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
1178c2ecf20Sopenharmony_ci	if (IS_ERR(provider)) {
1188c2ecf20Sopenharmony_ci		dev_err(dev, "Failed to register PHY provider\n");
1198c2ecf20Sopenharmony_ci		error = PTR_ERR(provider);
1208c2ecf20Sopenharmony_ci		goto error;
1218c2ecf20Sopenharmony_ci	}
1228c2ecf20Sopenharmony_ci
1238c2ecf20Sopenharmony_ci	return 0;
1248c2ecf20Sopenharmony_ci
1258c2ecf20Sopenharmony_cierror:
1268c2ecf20Sopenharmony_ci	pm_runtime_disable(dev);
1278c2ecf20Sopenharmony_ci
1288c2ecf20Sopenharmony_ci	return error;
1298c2ecf20Sopenharmony_ci}
1308c2ecf20Sopenharmony_ci
1318c2ecf20Sopenharmony_cistatic int rcar_gen3_phy_pcie_remove(struct platform_device *pdev)
1328c2ecf20Sopenharmony_ci{
1338c2ecf20Sopenharmony_ci	pm_runtime_disable(&pdev->dev);
1348c2ecf20Sopenharmony_ci
1358c2ecf20Sopenharmony_ci	return 0;
1368c2ecf20Sopenharmony_ci};
1378c2ecf20Sopenharmony_ci
1388c2ecf20Sopenharmony_cistatic struct platform_driver rcar_gen3_phy_driver = {
1398c2ecf20Sopenharmony_ci	.driver = {
1408c2ecf20Sopenharmony_ci		.name		= "phy_rcar_gen3_pcie",
1418c2ecf20Sopenharmony_ci		.of_match_table	= rcar_gen3_phy_pcie_match_table,
1428c2ecf20Sopenharmony_ci	},
1438c2ecf20Sopenharmony_ci	.probe	= rcar_gen3_phy_pcie_probe,
1448c2ecf20Sopenharmony_ci	.remove = rcar_gen3_phy_pcie_remove,
1458c2ecf20Sopenharmony_ci};
1468c2ecf20Sopenharmony_ci
1478c2ecf20Sopenharmony_cimodule_platform_driver(rcar_gen3_phy_driver);
1488c2ecf20Sopenharmony_ci
1498c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL v2");
1508c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("Renesas R-Car Gen3 PCIe PHY");
1518c2ecf20Sopenharmony_ciMODULE_AUTHOR("Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>");
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