18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * phy-mvebu-sata.c: SATA Phy driver for the Marvell mvebu SoCs. 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (C) 2013 Andrew Lunn <andrew@lunn.ch> 68c2ecf20Sopenharmony_ci */ 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci#include <linux/kernel.h> 98c2ecf20Sopenharmony_ci#include <linux/init.h> 108c2ecf20Sopenharmony_ci#include <linux/clk.h> 118c2ecf20Sopenharmony_ci#include <linux/phy/phy.h> 128c2ecf20Sopenharmony_ci#include <linux/io.h> 138c2ecf20Sopenharmony_ci#include <linux/platform_device.h> 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_cistruct priv { 168c2ecf20Sopenharmony_ci struct clk *clk; 178c2ecf20Sopenharmony_ci void __iomem *base; 188c2ecf20Sopenharmony_ci}; 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci#define SATA_PHY_MODE_2 0x0330 218c2ecf20Sopenharmony_ci#define MODE_2_FORCE_PU_TX BIT(0) 228c2ecf20Sopenharmony_ci#define MODE_2_FORCE_PU_RX BIT(1) 238c2ecf20Sopenharmony_ci#define MODE_2_PU_PLL BIT(2) 248c2ecf20Sopenharmony_ci#define MODE_2_PU_IVREF BIT(3) 258c2ecf20Sopenharmony_ci#define SATA_IF_CTRL 0x0050 268c2ecf20Sopenharmony_ci#define CTRL_PHY_SHUTDOWN BIT(9) 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_cistatic int phy_mvebu_sata_power_on(struct phy *phy) 298c2ecf20Sopenharmony_ci{ 308c2ecf20Sopenharmony_ci struct priv *priv = phy_get_drvdata(phy); 318c2ecf20Sopenharmony_ci u32 reg; 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci clk_prepare_enable(priv->clk); 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ci /* Enable PLL and IVREF */ 368c2ecf20Sopenharmony_ci reg = readl(priv->base + SATA_PHY_MODE_2); 378c2ecf20Sopenharmony_ci reg |= (MODE_2_FORCE_PU_TX | MODE_2_FORCE_PU_RX | 388c2ecf20Sopenharmony_ci MODE_2_PU_PLL | MODE_2_PU_IVREF); 398c2ecf20Sopenharmony_ci writel(reg , priv->base + SATA_PHY_MODE_2); 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci /* Enable PHY */ 428c2ecf20Sopenharmony_ci reg = readl(priv->base + SATA_IF_CTRL); 438c2ecf20Sopenharmony_ci reg &= ~CTRL_PHY_SHUTDOWN; 448c2ecf20Sopenharmony_ci writel(reg, priv->base + SATA_IF_CTRL); 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ci clk_disable_unprepare(priv->clk); 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ci return 0; 498c2ecf20Sopenharmony_ci} 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_cistatic int phy_mvebu_sata_power_off(struct phy *phy) 528c2ecf20Sopenharmony_ci{ 538c2ecf20Sopenharmony_ci struct priv *priv = phy_get_drvdata(phy); 548c2ecf20Sopenharmony_ci u32 reg; 558c2ecf20Sopenharmony_ci 568c2ecf20Sopenharmony_ci clk_prepare_enable(priv->clk); 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_ci /* Disable PLL and IVREF */ 598c2ecf20Sopenharmony_ci reg = readl(priv->base + SATA_PHY_MODE_2); 608c2ecf20Sopenharmony_ci reg &= ~(MODE_2_FORCE_PU_TX | MODE_2_FORCE_PU_RX | 618c2ecf20Sopenharmony_ci MODE_2_PU_PLL | MODE_2_PU_IVREF); 628c2ecf20Sopenharmony_ci writel(reg, priv->base + SATA_PHY_MODE_2); 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_ci /* Disable PHY */ 658c2ecf20Sopenharmony_ci reg = readl(priv->base + SATA_IF_CTRL); 668c2ecf20Sopenharmony_ci reg |= CTRL_PHY_SHUTDOWN; 678c2ecf20Sopenharmony_ci writel(reg, priv->base + SATA_IF_CTRL); 688c2ecf20Sopenharmony_ci 698c2ecf20Sopenharmony_ci clk_disable_unprepare(priv->clk); 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_ci return 0; 728c2ecf20Sopenharmony_ci} 738c2ecf20Sopenharmony_ci 748c2ecf20Sopenharmony_cistatic const struct phy_ops phy_mvebu_sata_ops = { 758c2ecf20Sopenharmony_ci .power_on = phy_mvebu_sata_power_on, 768c2ecf20Sopenharmony_ci .power_off = phy_mvebu_sata_power_off, 778c2ecf20Sopenharmony_ci .owner = THIS_MODULE, 788c2ecf20Sopenharmony_ci}; 798c2ecf20Sopenharmony_ci 808c2ecf20Sopenharmony_cistatic int phy_mvebu_sata_probe(struct platform_device *pdev) 818c2ecf20Sopenharmony_ci{ 828c2ecf20Sopenharmony_ci struct phy_provider *phy_provider; 838c2ecf20Sopenharmony_ci struct resource *res; 848c2ecf20Sopenharmony_ci struct priv *priv; 858c2ecf20Sopenharmony_ci struct phy *phy; 868c2ecf20Sopenharmony_ci 878c2ecf20Sopenharmony_ci priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); 888c2ecf20Sopenharmony_ci if (!priv) 898c2ecf20Sopenharmony_ci return -ENOMEM; 908c2ecf20Sopenharmony_ci 918c2ecf20Sopenharmony_ci res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 928c2ecf20Sopenharmony_ci priv->base = devm_ioremap_resource(&pdev->dev, res); 938c2ecf20Sopenharmony_ci if (IS_ERR(priv->base)) 948c2ecf20Sopenharmony_ci return PTR_ERR(priv->base); 958c2ecf20Sopenharmony_ci 968c2ecf20Sopenharmony_ci priv->clk = devm_clk_get(&pdev->dev, "sata"); 978c2ecf20Sopenharmony_ci if (IS_ERR(priv->clk)) 988c2ecf20Sopenharmony_ci return PTR_ERR(priv->clk); 998c2ecf20Sopenharmony_ci 1008c2ecf20Sopenharmony_ci phy = devm_phy_create(&pdev->dev, NULL, &phy_mvebu_sata_ops); 1018c2ecf20Sopenharmony_ci if (IS_ERR(phy)) 1028c2ecf20Sopenharmony_ci return PTR_ERR(phy); 1038c2ecf20Sopenharmony_ci 1048c2ecf20Sopenharmony_ci phy_set_drvdata(phy, priv); 1058c2ecf20Sopenharmony_ci 1068c2ecf20Sopenharmony_ci phy_provider = devm_of_phy_provider_register(&pdev->dev, 1078c2ecf20Sopenharmony_ci of_phy_simple_xlate); 1088c2ecf20Sopenharmony_ci if (IS_ERR(phy_provider)) 1098c2ecf20Sopenharmony_ci return PTR_ERR(phy_provider); 1108c2ecf20Sopenharmony_ci 1118c2ecf20Sopenharmony_ci /* The boot loader may of left it on. Turn it off. */ 1128c2ecf20Sopenharmony_ci phy_mvebu_sata_power_off(phy); 1138c2ecf20Sopenharmony_ci 1148c2ecf20Sopenharmony_ci return 0; 1158c2ecf20Sopenharmony_ci} 1168c2ecf20Sopenharmony_ci 1178c2ecf20Sopenharmony_cistatic const struct of_device_id phy_mvebu_sata_of_match[] = { 1188c2ecf20Sopenharmony_ci { .compatible = "marvell,mvebu-sata-phy" }, 1198c2ecf20Sopenharmony_ci { }, 1208c2ecf20Sopenharmony_ci}; 1218c2ecf20Sopenharmony_ci 1228c2ecf20Sopenharmony_cistatic struct platform_driver phy_mvebu_sata_driver = { 1238c2ecf20Sopenharmony_ci .probe = phy_mvebu_sata_probe, 1248c2ecf20Sopenharmony_ci .driver = { 1258c2ecf20Sopenharmony_ci .name = "phy-mvebu-sata", 1268c2ecf20Sopenharmony_ci .of_match_table = phy_mvebu_sata_of_match, 1278c2ecf20Sopenharmony_ci } 1288c2ecf20Sopenharmony_ci}; 1298c2ecf20Sopenharmony_cibuiltin_platform_driver(phy_mvebu_sata_driver); 130