1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * PCI Express Hot Plug Controller Driver
4 *
5 * Copyright (C) 1995,2001 Compaq Computer Corporation
6 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
7 * Copyright (C) 2001 IBM Corp.
8 * Copyright (C) 2003-2004 Intel Corporation
9 *
10 * All rights reserved.
11 *
12 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
13 *
14 */
15#ifndef _PCIEHP_H
16#define _PCIEHP_H
17
18#include <linux/types.h>
19#include <linux/pci.h>
20#include <linux/pci_hotplug.h>
21#include <linux/delay.h>
22#include <linux/mutex.h>
23#include <linux/rwsem.h>
24#include <linux/workqueue.h>
25
26#include "../pcie/portdrv.h"
27
28extern bool pciehp_poll_mode;
29extern int pciehp_poll_time;
30
31/*
32 * Set CONFIG_DYNAMIC_DEBUG=y and boot with 'dyndbg="file pciehp* +p"' to
33 * enable debug messages.
34 */
35#define ctrl_dbg(ctrl, format, arg...)					\
36	pci_dbg(ctrl->pcie->port, format, ## arg)
37#define ctrl_err(ctrl, format, arg...)					\
38	pci_err(ctrl->pcie->port, format, ## arg)
39#define ctrl_info(ctrl, format, arg...)					\
40	pci_info(ctrl->pcie->port, format, ## arg)
41#define ctrl_warn(ctrl, format, arg...)					\
42	pci_warn(ctrl->pcie->port, format, ## arg)
43
44#define SLOT_NAME_SIZE 10
45
46/**
47 * struct controller - PCIe hotplug controller
48 * @pcie: pointer to the controller's PCIe port service device
49 * @slot_cap: cached copy of the Slot Capabilities register
50 * @slot_ctrl: cached copy of the Slot Control register
51 * @ctrl_lock: serializes writes to the Slot Control register
52 * @cmd_started: jiffies when the Slot Control register was last written;
53 *	the next write is allowed 1 second later, absent a Command Completed
54 *	interrupt (PCIe r4.0, sec 6.7.3.2)
55 * @cmd_busy: flag set on Slot Control register write, cleared by IRQ handler
56 *	on reception of a Command Completed event
57 * @queue: wait queue to wake up on reception of a Command Completed event,
58 *	used for synchronous writes to the Slot Control register
59 * @pending_events: used by the IRQ handler to save events retrieved from the
60 *	Slot Status register for later consumption by the IRQ thread
61 * @notification_enabled: whether the IRQ was requested successfully
62 * @power_fault_detected: whether a power fault was detected by the hardware
63 *	that has not yet been cleared by the user
64 * @poll_thread: thread to poll for slot events if no IRQ is available,
65 *	enabled with pciehp_poll_mode module parameter
66 * @state: current state machine position
67 * @state_lock: protects reads and writes of @state;
68 *	protects scheduling, execution and cancellation of @button_work
69 * @button_work: work item to turn the slot on or off after 5 seconds
70 *	in response to an Attention Button press
71 * @hotplug_slot: structure registered with the PCI hotplug core
72 * @reset_lock: prevents access to the Data Link Layer Link Active bit in the
73 *	Link Status register and to the Presence Detect State bit in the Slot
74 *	Status register during a slot reset which may cause them to flap
75 * @depth: Number of additional hotplug ports in the path to the root bus,
76 *	used as lock subclass for @reset_lock
77 * @ist_running: flag to keep user request waiting while IRQ thread is running
78 * @request_result: result of last user request submitted to the IRQ thread
79 * @requester: wait queue to wake up on completion of user request,
80 *	used for synchronous slot enable/disable request via sysfs
81 *
82 * PCIe hotplug has a 1:1 relationship between controller and slot, hence
83 * unlike other drivers, the two aren't represented by separate structures.
84 */
85struct controller {
86	struct pcie_device *pcie;
87
88	u32 slot_cap;				/* capabilities and quirks */
89	unsigned int inband_presence_disabled:1;
90
91	u16 slot_ctrl;				/* control register access */
92	struct mutex ctrl_lock;
93	unsigned long cmd_started;
94	unsigned int cmd_busy:1;
95	wait_queue_head_t queue;
96
97	atomic_t pending_events;		/* event handling */
98	unsigned int notification_enabled:1;
99	unsigned int power_fault_detected;
100	struct task_struct *poll_thread;
101
102	u8 state;				/* state machine */
103	struct mutex state_lock;
104	struct delayed_work button_work;
105
106	struct hotplug_slot hotplug_slot;	/* hotplug core interface */
107	struct rw_semaphore reset_lock;
108	unsigned int depth;
109	unsigned int ist_running;
110	int request_result;
111	wait_queue_head_t requester;
112};
113
114/**
115 * DOC: Slot state
116 *
117 * @OFF_STATE: slot is powered off, no subordinate devices are enumerated
118 * @BLINKINGON_STATE: slot will be powered on after the 5 second delay,
119 *	Power Indicator is blinking
120 * @BLINKINGOFF_STATE: slot will be powered off after the 5 second delay,
121 *	Power Indicator is blinking
122 * @POWERON_STATE: slot is currently powering on
123 * @POWEROFF_STATE: slot is currently powering off
124 * @ON_STATE: slot is powered on, subordinate devices have been enumerated
125 */
126#define OFF_STATE			0
127#define BLINKINGON_STATE		1
128#define BLINKINGOFF_STATE		2
129#define POWERON_STATE			3
130#define POWEROFF_STATE			4
131#define ON_STATE			5
132
133/**
134 * DOC: Flags to request an action from the IRQ thread
135 *
136 * These are stored together with events read from the Slot Status register,
137 * hence must be greater than its 16-bit width.
138 *
139 * %DISABLE_SLOT: Disable the slot in response to a user request via sysfs or
140 *	an Attention Button press after the 5 second delay
141 * %RERUN_ISR: Used by the IRQ handler to inform the IRQ thread that the
142 *	hotplug port was inaccessible when the interrupt occurred, requiring
143 *	that the IRQ handler is rerun by the IRQ thread after it has made the
144 *	hotplug port accessible by runtime resuming its parents to D0
145 */
146#define DISABLE_SLOT		(1 << 16)
147#define RERUN_ISR		(1 << 17)
148
149#define ATTN_BUTTN(ctrl)	((ctrl)->slot_cap & PCI_EXP_SLTCAP_ABP)
150#define POWER_CTRL(ctrl)	((ctrl)->slot_cap & PCI_EXP_SLTCAP_PCP)
151#define MRL_SENS(ctrl)		((ctrl)->slot_cap & PCI_EXP_SLTCAP_MRLSP)
152#define ATTN_LED(ctrl)		((ctrl)->slot_cap & PCI_EXP_SLTCAP_AIP)
153#define PWR_LED(ctrl)		((ctrl)->slot_cap & PCI_EXP_SLTCAP_PIP)
154#define NO_CMD_CMPL(ctrl)	((ctrl)->slot_cap & PCI_EXP_SLTCAP_NCCS)
155#define PSN(ctrl)		(((ctrl)->slot_cap & PCI_EXP_SLTCAP_PSN) >> 19)
156
157void pciehp_request(struct controller *ctrl, int action);
158void pciehp_handle_button_press(struct controller *ctrl);
159void pciehp_handle_disable_request(struct controller *ctrl);
160void pciehp_handle_presence_or_link_change(struct controller *ctrl, u32 events);
161int pciehp_configure_device(struct controller *ctrl);
162void pciehp_unconfigure_device(struct controller *ctrl, bool presence);
163void pciehp_queue_pushbutton_work(struct work_struct *work);
164struct controller *pcie_init(struct pcie_device *dev);
165int pcie_init_notification(struct controller *ctrl);
166void pcie_shutdown_notification(struct controller *ctrl);
167void pcie_clear_hotplug_events(struct controller *ctrl);
168void pcie_enable_interrupt(struct controller *ctrl);
169void pcie_disable_interrupt(struct controller *ctrl);
170int pciehp_power_on_slot(struct controller *ctrl);
171void pciehp_power_off_slot(struct controller *ctrl);
172void pciehp_get_power_status(struct controller *ctrl, u8 *status);
173
174#define INDICATOR_NOOP -1	/* Leave indicator unchanged */
175void pciehp_set_indicators(struct controller *ctrl, int pwr, int attn);
176
177void pciehp_get_latch_status(struct controller *ctrl, u8 *status);
178int pciehp_query_power_fault(struct controller *ctrl);
179int pciehp_card_present(struct controller *ctrl);
180int pciehp_card_present_or_link_active(struct controller *ctrl);
181int pciehp_check_link_status(struct controller *ctrl);
182int pciehp_check_link_active(struct controller *ctrl);
183void pciehp_release_ctrl(struct controller *ctrl);
184
185int pciehp_sysfs_enable_slot(struct hotplug_slot *hotplug_slot);
186int pciehp_sysfs_disable_slot(struct hotplug_slot *hotplug_slot);
187int pciehp_reset_slot(struct hotplug_slot *hotplug_slot, int probe);
188int pciehp_get_attention_status(struct hotplug_slot *hotplug_slot, u8 *status);
189int pciehp_set_raw_indicator_status(struct hotplug_slot *h_slot, u8 status);
190int pciehp_get_raw_indicator_status(struct hotplug_slot *h_slot, u8 *status);
191
192static inline const char *slot_name(struct controller *ctrl)
193{
194	return hotplug_slot_name(&ctrl->hotplug_slot);
195}
196
197static inline struct controller *to_ctrl(struct hotplug_slot *hotplug_slot)
198{
199	return container_of(hotplug_slot, struct controller, hotplug_slot);
200}
201
202#endif				/* _PCIEHP_H */
203