18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Low-level parallel-support for PC-style hardware integrated in the 48c2ecf20Sopenharmony_ci * LASI-Controller (on GSC-Bus) for HP-PARISC Workstations 58c2ecf20Sopenharmony_ci * 68c2ecf20Sopenharmony_ci * (C) 1999-2001 by Helge Deller <deller@gmx.de> 78c2ecf20Sopenharmony_ci * 88c2ecf20Sopenharmony_ci * based on parport_pc.c by 98c2ecf20Sopenharmony_ci * Grant Guenther <grant@torque.net> 108c2ecf20Sopenharmony_ci * Phil Blundell <philb@gnu.org> 118c2ecf20Sopenharmony_ci * Tim Waugh <tim@cyberelk.demon.co.uk> 128c2ecf20Sopenharmony_ci * Jose Renau <renau@acm.org> 138c2ecf20Sopenharmony_ci * David Campbell 148c2ecf20Sopenharmony_ci * Andrea Arcangeli 158c2ecf20Sopenharmony_ci */ 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ci#undef DEBUG /* undef for production */ 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci#include <linux/module.h> 208c2ecf20Sopenharmony_ci#include <linux/init.h> 218c2ecf20Sopenharmony_ci#include <linux/delay.h> 228c2ecf20Sopenharmony_ci#include <linux/errno.h> 238c2ecf20Sopenharmony_ci#include <linux/interrupt.h> 248c2ecf20Sopenharmony_ci#include <linux/ioport.h> 258c2ecf20Sopenharmony_ci#include <linux/kernel.h> 268c2ecf20Sopenharmony_ci#include <linux/slab.h> 278c2ecf20Sopenharmony_ci#include <linux/pci.h> 288c2ecf20Sopenharmony_ci#include <linux/sysctl.h> 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci#include <asm/io.h> 318c2ecf20Sopenharmony_ci#include <asm/dma.h> 328c2ecf20Sopenharmony_ci#include <linux/uaccess.h> 338c2ecf20Sopenharmony_ci#include <asm/superio.h> 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ci#include <linux/parport.h> 368c2ecf20Sopenharmony_ci#include <asm/pdc.h> 378c2ecf20Sopenharmony_ci#include <asm/parisc-device.h> 388c2ecf20Sopenharmony_ci#include <asm/hardware.h> 398c2ecf20Sopenharmony_ci#include "parport_gsc.h" 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_ciMODULE_AUTHOR("Helge Deller <deller@gmx.de>"); 438c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("HP-PARISC PC-style parallel port driver"); 448c2ecf20Sopenharmony_ciMODULE_SUPPORTED_DEVICE("integrated PC-style parallel port"); 458c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL"); 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ci/* 498c2ecf20Sopenharmony_ci * Clear TIMEOUT BIT in EPP MODE 508c2ecf20Sopenharmony_ci * 518c2ecf20Sopenharmony_ci * This is also used in SPP detection. 528c2ecf20Sopenharmony_ci */ 538c2ecf20Sopenharmony_cistatic int clear_epp_timeout(struct parport *pb) 548c2ecf20Sopenharmony_ci{ 558c2ecf20Sopenharmony_ci unsigned char r; 568c2ecf20Sopenharmony_ci 578c2ecf20Sopenharmony_ci if (!(parport_gsc_read_status(pb) & 0x01)) 588c2ecf20Sopenharmony_ci return 1; 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_ci /* To clear timeout some chips require double read */ 618c2ecf20Sopenharmony_ci parport_gsc_read_status(pb); 628c2ecf20Sopenharmony_ci r = parport_gsc_read_status(pb); 638c2ecf20Sopenharmony_ci parport_writeb (r | 0x01, STATUS (pb)); /* Some reset by writing 1 */ 648c2ecf20Sopenharmony_ci parport_writeb (r & 0xfe, STATUS (pb)); /* Others by writing 0 */ 658c2ecf20Sopenharmony_ci r = parport_gsc_read_status(pb); 668c2ecf20Sopenharmony_ci 678c2ecf20Sopenharmony_ci return !(r & 0x01); 688c2ecf20Sopenharmony_ci} 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_ci/* 718c2ecf20Sopenharmony_ci * Access functions. 728c2ecf20Sopenharmony_ci * 738c2ecf20Sopenharmony_ci * Most of these aren't static because they may be used by the 748c2ecf20Sopenharmony_ci * parport_xxx_yyy macros. extern __inline__ versions of several 758c2ecf20Sopenharmony_ci * of these are in parport_gsc.h. 768c2ecf20Sopenharmony_ci */ 778c2ecf20Sopenharmony_ci 788c2ecf20Sopenharmony_civoid parport_gsc_init_state(struct pardevice *dev, struct parport_state *s) 798c2ecf20Sopenharmony_ci{ 808c2ecf20Sopenharmony_ci s->u.pc.ctr = 0xc | (dev->irq_func ? 0x10 : 0x0); 818c2ecf20Sopenharmony_ci} 828c2ecf20Sopenharmony_ci 838c2ecf20Sopenharmony_civoid parport_gsc_save_state(struct parport *p, struct parport_state *s) 848c2ecf20Sopenharmony_ci{ 858c2ecf20Sopenharmony_ci s->u.pc.ctr = parport_readb (CONTROL (p)); 868c2ecf20Sopenharmony_ci} 878c2ecf20Sopenharmony_ci 888c2ecf20Sopenharmony_civoid parport_gsc_restore_state(struct parport *p, struct parport_state *s) 898c2ecf20Sopenharmony_ci{ 908c2ecf20Sopenharmony_ci parport_writeb (s->u.pc.ctr, CONTROL (p)); 918c2ecf20Sopenharmony_ci} 928c2ecf20Sopenharmony_ci 938c2ecf20Sopenharmony_cistruct parport_operations parport_gsc_ops = 948c2ecf20Sopenharmony_ci{ 958c2ecf20Sopenharmony_ci .write_data = parport_gsc_write_data, 968c2ecf20Sopenharmony_ci .read_data = parport_gsc_read_data, 978c2ecf20Sopenharmony_ci 988c2ecf20Sopenharmony_ci .write_control = parport_gsc_write_control, 998c2ecf20Sopenharmony_ci .read_control = parport_gsc_read_control, 1008c2ecf20Sopenharmony_ci .frob_control = parport_gsc_frob_control, 1018c2ecf20Sopenharmony_ci 1028c2ecf20Sopenharmony_ci .read_status = parport_gsc_read_status, 1038c2ecf20Sopenharmony_ci 1048c2ecf20Sopenharmony_ci .enable_irq = parport_gsc_enable_irq, 1058c2ecf20Sopenharmony_ci .disable_irq = parport_gsc_disable_irq, 1068c2ecf20Sopenharmony_ci 1078c2ecf20Sopenharmony_ci .data_forward = parport_gsc_data_forward, 1088c2ecf20Sopenharmony_ci .data_reverse = parport_gsc_data_reverse, 1098c2ecf20Sopenharmony_ci 1108c2ecf20Sopenharmony_ci .init_state = parport_gsc_init_state, 1118c2ecf20Sopenharmony_ci .save_state = parport_gsc_save_state, 1128c2ecf20Sopenharmony_ci .restore_state = parport_gsc_restore_state, 1138c2ecf20Sopenharmony_ci 1148c2ecf20Sopenharmony_ci .epp_write_data = parport_ieee1284_epp_write_data, 1158c2ecf20Sopenharmony_ci .epp_read_data = parport_ieee1284_epp_read_data, 1168c2ecf20Sopenharmony_ci .epp_write_addr = parport_ieee1284_epp_write_addr, 1178c2ecf20Sopenharmony_ci .epp_read_addr = parport_ieee1284_epp_read_addr, 1188c2ecf20Sopenharmony_ci 1198c2ecf20Sopenharmony_ci .ecp_write_data = parport_ieee1284_ecp_write_data, 1208c2ecf20Sopenharmony_ci .ecp_read_data = parport_ieee1284_ecp_read_data, 1218c2ecf20Sopenharmony_ci .ecp_write_addr = parport_ieee1284_ecp_write_addr, 1228c2ecf20Sopenharmony_ci 1238c2ecf20Sopenharmony_ci .compat_write_data = parport_ieee1284_write_compat, 1248c2ecf20Sopenharmony_ci .nibble_read_data = parport_ieee1284_read_nibble, 1258c2ecf20Sopenharmony_ci .byte_read_data = parport_ieee1284_read_byte, 1268c2ecf20Sopenharmony_ci 1278c2ecf20Sopenharmony_ci .owner = THIS_MODULE, 1288c2ecf20Sopenharmony_ci}; 1298c2ecf20Sopenharmony_ci 1308c2ecf20Sopenharmony_ci/* --- Mode detection ------------------------------------- */ 1318c2ecf20Sopenharmony_ci 1328c2ecf20Sopenharmony_ci/* 1338c2ecf20Sopenharmony_ci * Checks for port existence, all ports support SPP MODE 1348c2ecf20Sopenharmony_ci */ 1358c2ecf20Sopenharmony_cistatic int parport_SPP_supported(struct parport *pb) 1368c2ecf20Sopenharmony_ci{ 1378c2ecf20Sopenharmony_ci unsigned char r, w; 1388c2ecf20Sopenharmony_ci 1398c2ecf20Sopenharmony_ci /* 1408c2ecf20Sopenharmony_ci * first clear an eventually pending EPP timeout 1418c2ecf20Sopenharmony_ci * I (sailer@ife.ee.ethz.ch) have an SMSC chipset 1428c2ecf20Sopenharmony_ci * that does not even respond to SPP cycles if an EPP 1438c2ecf20Sopenharmony_ci * timeout is pending 1448c2ecf20Sopenharmony_ci */ 1458c2ecf20Sopenharmony_ci clear_epp_timeout(pb); 1468c2ecf20Sopenharmony_ci 1478c2ecf20Sopenharmony_ci /* Do a simple read-write test to make sure the port exists. */ 1488c2ecf20Sopenharmony_ci w = 0xc; 1498c2ecf20Sopenharmony_ci parport_writeb (w, CONTROL (pb)); 1508c2ecf20Sopenharmony_ci 1518c2ecf20Sopenharmony_ci /* Is there a control register that we can read from? Some 1528c2ecf20Sopenharmony_ci * ports don't allow reads, so read_control just returns a 1538c2ecf20Sopenharmony_ci * software copy. Some ports _do_ allow reads, so bypass the 1548c2ecf20Sopenharmony_ci * software copy here. In addition, some bits aren't 1558c2ecf20Sopenharmony_ci * writable. */ 1568c2ecf20Sopenharmony_ci r = parport_readb (CONTROL (pb)); 1578c2ecf20Sopenharmony_ci if ((r & 0xf) == w) { 1588c2ecf20Sopenharmony_ci w = 0xe; 1598c2ecf20Sopenharmony_ci parport_writeb (w, CONTROL (pb)); 1608c2ecf20Sopenharmony_ci r = parport_readb (CONTROL (pb)); 1618c2ecf20Sopenharmony_ci parport_writeb (0xc, CONTROL (pb)); 1628c2ecf20Sopenharmony_ci if ((r & 0xf) == w) 1638c2ecf20Sopenharmony_ci return PARPORT_MODE_PCSPP; 1648c2ecf20Sopenharmony_ci } 1658c2ecf20Sopenharmony_ci 1668c2ecf20Sopenharmony_ci /* Try the data register. The data lines aren't tri-stated at 1678c2ecf20Sopenharmony_ci * this stage, so we expect back what we wrote. */ 1688c2ecf20Sopenharmony_ci w = 0xaa; 1698c2ecf20Sopenharmony_ci parport_gsc_write_data (pb, w); 1708c2ecf20Sopenharmony_ci r = parport_gsc_read_data (pb); 1718c2ecf20Sopenharmony_ci if (r == w) { 1728c2ecf20Sopenharmony_ci w = 0x55; 1738c2ecf20Sopenharmony_ci parport_gsc_write_data (pb, w); 1748c2ecf20Sopenharmony_ci r = parport_gsc_read_data (pb); 1758c2ecf20Sopenharmony_ci if (r == w) 1768c2ecf20Sopenharmony_ci return PARPORT_MODE_PCSPP; 1778c2ecf20Sopenharmony_ci } 1788c2ecf20Sopenharmony_ci 1798c2ecf20Sopenharmony_ci return 0; 1808c2ecf20Sopenharmony_ci} 1818c2ecf20Sopenharmony_ci 1828c2ecf20Sopenharmony_ci/* Detect PS/2 support. 1838c2ecf20Sopenharmony_ci * 1848c2ecf20Sopenharmony_ci * Bit 5 (0x20) sets the PS/2 data direction; setting this high 1858c2ecf20Sopenharmony_ci * allows us to read data from the data lines. In theory we would get back 1868c2ecf20Sopenharmony_ci * 0xff but any peripheral attached to the port may drag some or all of the 1878c2ecf20Sopenharmony_ci * lines down to zero. So if we get back anything that isn't the contents 1888c2ecf20Sopenharmony_ci * of the data register we deem PS/2 support to be present. 1898c2ecf20Sopenharmony_ci * 1908c2ecf20Sopenharmony_ci * Some SPP ports have "half PS/2" ability - you can't turn off the line 1918c2ecf20Sopenharmony_ci * drivers, but an external peripheral with sufficiently beefy drivers of 1928c2ecf20Sopenharmony_ci * its own can overpower them and assert its own levels onto the bus, from 1938c2ecf20Sopenharmony_ci * where they can then be read back as normal. Ports with this property 1948c2ecf20Sopenharmony_ci * and the right type of device attached are likely to fail the SPP test, 1958c2ecf20Sopenharmony_ci * (as they will appear to have stuck bits) and so the fact that they might 1968c2ecf20Sopenharmony_ci * be misdetected here is rather academic. 1978c2ecf20Sopenharmony_ci */ 1988c2ecf20Sopenharmony_ci 1998c2ecf20Sopenharmony_cistatic int parport_PS2_supported(struct parport *pb) 2008c2ecf20Sopenharmony_ci{ 2018c2ecf20Sopenharmony_ci int ok = 0; 2028c2ecf20Sopenharmony_ci 2038c2ecf20Sopenharmony_ci clear_epp_timeout(pb); 2048c2ecf20Sopenharmony_ci 2058c2ecf20Sopenharmony_ci /* try to tri-state the buffer */ 2068c2ecf20Sopenharmony_ci parport_gsc_data_reverse (pb); 2078c2ecf20Sopenharmony_ci 2088c2ecf20Sopenharmony_ci parport_gsc_write_data(pb, 0x55); 2098c2ecf20Sopenharmony_ci if (parport_gsc_read_data(pb) != 0x55) ok++; 2108c2ecf20Sopenharmony_ci 2118c2ecf20Sopenharmony_ci parport_gsc_write_data(pb, 0xaa); 2128c2ecf20Sopenharmony_ci if (parport_gsc_read_data(pb) != 0xaa) ok++; 2138c2ecf20Sopenharmony_ci 2148c2ecf20Sopenharmony_ci /* cancel input mode */ 2158c2ecf20Sopenharmony_ci parport_gsc_data_forward (pb); 2168c2ecf20Sopenharmony_ci 2178c2ecf20Sopenharmony_ci if (ok) { 2188c2ecf20Sopenharmony_ci pb->modes |= PARPORT_MODE_TRISTATE; 2198c2ecf20Sopenharmony_ci } else { 2208c2ecf20Sopenharmony_ci struct parport_gsc_private *priv = pb->private_data; 2218c2ecf20Sopenharmony_ci priv->ctr_writable &= ~0x20; 2228c2ecf20Sopenharmony_ci } 2238c2ecf20Sopenharmony_ci 2248c2ecf20Sopenharmony_ci return ok; 2258c2ecf20Sopenharmony_ci} 2268c2ecf20Sopenharmony_ci 2278c2ecf20Sopenharmony_ci 2288c2ecf20Sopenharmony_ci/* --- Initialisation code -------------------------------- */ 2298c2ecf20Sopenharmony_ci 2308c2ecf20Sopenharmony_cistruct parport *parport_gsc_probe_port(unsigned long base, 2318c2ecf20Sopenharmony_ci unsigned long base_hi, int irq, 2328c2ecf20Sopenharmony_ci int dma, struct parisc_device *padev) 2338c2ecf20Sopenharmony_ci{ 2348c2ecf20Sopenharmony_ci struct parport_gsc_private *priv; 2358c2ecf20Sopenharmony_ci struct parport_operations *ops; 2368c2ecf20Sopenharmony_ci struct parport tmp; 2378c2ecf20Sopenharmony_ci struct parport *p = &tmp; 2388c2ecf20Sopenharmony_ci 2398c2ecf20Sopenharmony_ci priv = kzalloc (sizeof (struct parport_gsc_private), GFP_KERNEL); 2408c2ecf20Sopenharmony_ci if (!priv) { 2418c2ecf20Sopenharmony_ci printk(KERN_DEBUG "parport (0x%lx): no memory!\n", base); 2428c2ecf20Sopenharmony_ci return NULL; 2438c2ecf20Sopenharmony_ci } 2448c2ecf20Sopenharmony_ci ops = kmemdup(&parport_gsc_ops, sizeof(struct parport_operations), 2458c2ecf20Sopenharmony_ci GFP_KERNEL); 2468c2ecf20Sopenharmony_ci if (!ops) { 2478c2ecf20Sopenharmony_ci printk(KERN_DEBUG "parport (0x%lx): no memory for ops!\n", 2488c2ecf20Sopenharmony_ci base); 2498c2ecf20Sopenharmony_ci kfree (priv); 2508c2ecf20Sopenharmony_ci return NULL; 2518c2ecf20Sopenharmony_ci } 2528c2ecf20Sopenharmony_ci priv->ctr = 0xc; 2538c2ecf20Sopenharmony_ci priv->ctr_writable = 0xff; 2548c2ecf20Sopenharmony_ci priv->dma_buf = NULL; 2558c2ecf20Sopenharmony_ci priv->dma_handle = 0; 2568c2ecf20Sopenharmony_ci p->base = base; 2578c2ecf20Sopenharmony_ci p->base_hi = base_hi; 2588c2ecf20Sopenharmony_ci p->irq = irq; 2598c2ecf20Sopenharmony_ci p->dma = dma; 2608c2ecf20Sopenharmony_ci p->modes = PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT; 2618c2ecf20Sopenharmony_ci p->ops = ops; 2628c2ecf20Sopenharmony_ci p->private_data = priv; 2638c2ecf20Sopenharmony_ci p->physport = p; 2648c2ecf20Sopenharmony_ci if (!parport_SPP_supported (p)) { 2658c2ecf20Sopenharmony_ci /* No port. */ 2668c2ecf20Sopenharmony_ci kfree (priv); 2678c2ecf20Sopenharmony_ci kfree(ops); 2688c2ecf20Sopenharmony_ci return NULL; 2698c2ecf20Sopenharmony_ci } 2708c2ecf20Sopenharmony_ci parport_PS2_supported (p); 2718c2ecf20Sopenharmony_ci 2728c2ecf20Sopenharmony_ci if (!(p = parport_register_port(base, PARPORT_IRQ_NONE, 2738c2ecf20Sopenharmony_ci PARPORT_DMA_NONE, ops))) { 2748c2ecf20Sopenharmony_ci kfree (priv); 2758c2ecf20Sopenharmony_ci kfree (ops); 2768c2ecf20Sopenharmony_ci return NULL; 2778c2ecf20Sopenharmony_ci } 2788c2ecf20Sopenharmony_ci 2798c2ecf20Sopenharmony_ci p->dev = &padev->dev; 2808c2ecf20Sopenharmony_ci p->base_hi = base_hi; 2818c2ecf20Sopenharmony_ci p->modes = tmp.modes; 2828c2ecf20Sopenharmony_ci p->size = (p->modes & PARPORT_MODE_EPP)?8:3; 2838c2ecf20Sopenharmony_ci p->private_data = priv; 2848c2ecf20Sopenharmony_ci 2858c2ecf20Sopenharmony_ci pr_info("%s: PC-style at 0x%lx", p->name, p->base); 2868c2ecf20Sopenharmony_ci p->irq = irq; 2878c2ecf20Sopenharmony_ci if (p->irq == PARPORT_IRQ_AUTO) { 2888c2ecf20Sopenharmony_ci p->irq = PARPORT_IRQ_NONE; 2898c2ecf20Sopenharmony_ci } 2908c2ecf20Sopenharmony_ci if (p->irq != PARPORT_IRQ_NONE) { 2918c2ecf20Sopenharmony_ci pr_cont(", irq %d", p->irq); 2928c2ecf20Sopenharmony_ci 2938c2ecf20Sopenharmony_ci if (p->dma == PARPORT_DMA_AUTO) { 2948c2ecf20Sopenharmony_ci p->dma = PARPORT_DMA_NONE; 2958c2ecf20Sopenharmony_ci } 2968c2ecf20Sopenharmony_ci } 2978c2ecf20Sopenharmony_ci if (p->dma == PARPORT_DMA_AUTO) /* To use DMA, giving the irq 2988c2ecf20Sopenharmony_ci is mandatory (see above) */ 2998c2ecf20Sopenharmony_ci p->dma = PARPORT_DMA_NONE; 3008c2ecf20Sopenharmony_ci 3018c2ecf20Sopenharmony_ci pr_cont(" ["); 3028c2ecf20Sopenharmony_ci#define printmode(x) \ 3038c2ecf20Sopenharmony_cido { \ 3048c2ecf20Sopenharmony_ci if (p->modes & PARPORT_MODE_##x) \ 3058c2ecf20Sopenharmony_ci pr_cont("%s%s", f++ ? "," : "", #x); \ 3068c2ecf20Sopenharmony_ci} while (0) 3078c2ecf20Sopenharmony_ci { 3088c2ecf20Sopenharmony_ci int f = 0; 3098c2ecf20Sopenharmony_ci printmode(PCSPP); 3108c2ecf20Sopenharmony_ci printmode(TRISTATE); 3118c2ecf20Sopenharmony_ci printmode(COMPAT); 3128c2ecf20Sopenharmony_ci printmode(EPP); 3138c2ecf20Sopenharmony_ci// printmode(ECP); 3148c2ecf20Sopenharmony_ci// printmode(DMA); 3158c2ecf20Sopenharmony_ci } 3168c2ecf20Sopenharmony_ci#undef printmode 3178c2ecf20Sopenharmony_ci pr_cont("]\n"); 3188c2ecf20Sopenharmony_ci 3198c2ecf20Sopenharmony_ci if (p->irq != PARPORT_IRQ_NONE) { 3208c2ecf20Sopenharmony_ci if (request_irq (p->irq, parport_irq_handler, 3218c2ecf20Sopenharmony_ci 0, p->name, p)) { 3228c2ecf20Sopenharmony_ci pr_warn("%s: irq %d in use, resorting to polled operation\n", 3238c2ecf20Sopenharmony_ci p->name, p->irq); 3248c2ecf20Sopenharmony_ci p->irq = PARPORT_IRQ_NONE; 3258c2ecf20Sopenharmony_ci p->dma = PARPORT_DMA_NONE; 3268c2ecf20Sopenharmony_ci } 3278c2ecf20Sopenharmony_ci } 3288c2ecf20Sopenharmony_ci 3298c2ecf20Sopenharmony_ci /* Done probing. Now put the port into a sensible start-up state. */ 3308c2ecf20Sopenharmony_ci 3318c2ecf20Sopenharmony_ci parport_gsc_write_data(p, 0); 3328c2ecf20Sopenharmony_ci parport_gsc_data_forward (p); 3338c2ecf20Sopenharmony_ci 3348c2ecf20Sopenharmony_ci /* Now that we've told the sharing engine about the port, and 3358c2ecf20Sopenharmony_ci found out its characteristics, let the high-level drivers 3368c2ecf20Sopenharmony_ci know about it. */ 3378c2ecf20Sopenharmony_ci parport_announce_port (p); 3388c2ecf20Sopenharmony_ci 3398c2ecf20Sopenharmony_ci return p; 3408c2ecf20Sopenharmony_ci} 3418c2ecf20Sopenharmony_ci 3428c2ecf20Sopenharmony_ci 3438c2ecf20Sopenharmony_ci#define PARPORT_GSC_OFFSET 0x800 3448c2ecf20Sopenharmony_ci 3458c2ecf20Sopenharmony_cistatic int parport_count; 3468c2ecf20Sopenharmony_ci 3478c2ecf20Sopenharmony_cistatic int __init parport_init_chip(struct parisc_device *dev) 3488c2ecf20Sopenharmony_ci{ 3498c2ecf20Sopenharmony_ci struct parport *p; 3508c2ecf20Sopenharmony_ci unsigned long port; 3518c2ecf20Sopenharmony_ci 3528c2ecf20Sopenharmony_ci if (!dev->irq) { 3538c2ecf20Sopenharmony_ci pr_warn("IRQ not found for parallel device at 0x%llx\n", 3548c2ecf20Sopenharmony_ci (unsigned long long)dev->hpa.start); 3558c2ecf20Sopenharmony_ci return -ENODEV; 3568c2ecf20Sopenharmony_ci } 3578c2ecf20Sopenharmony_ci 3588c2ecf20Sopenharmony_ci port = dev->hpa.start + PARPORT_GSC_OFFSET; 3598c2ecf20Sopenharmony_ci 3608c2ecf20Sopenharmony_ci /* some older machines with ASP-chip don't support 3618c2ecf20Sopenharmony_ci * the enhanced parport modes. 3628c2ecf20Sopenharmony_ci */ 3638c2ecf20Sopenharmony_ci if (boot_cpu_data.cpu_type > pcxt && !pdc_add_valid(port+4)) { 3648c2ecf20Sopenharmony_ci 3658c2ecf20Sopenharmony_ci /* Initialize bidirectional-mode (0x10) & data-tranfer-mode #1 (0x20) */ 3668c2ecf20Sopenharmony_ci pr_info("%s: initialize bidirectional-mode\n", __func__); 3678c2ecf20Sopenharmony_ci parport_writeb ( (0x10 + 0x20), port + 4); 3688c2ecf20Sopenharmony_ci 3698c2ecf20Sopenharmony_ci } else { 3708c2ecf20Sopenharmony_ci pr_info("%s: enhanced parport-modes not supported\n", __func__); 3718c2ecf20Sopenharmony_ci } 3728c2ecf20Sopenharmony_ci 3738c2ecf20Sopenharmony_ci p = parport_gsc_probe_port(port, 0, dev->irq, 3748c2ecf20Sopenharmony_ci /* PARPORT_IRQ_NONE */ PARPORT_DMA_NONE, dev); 3758c2ecf20Sopenharmony_ci if (p) 3768c2ecf20Sopenharmony_ci parport_count++; 3778c2ecf20Sopenharmony_ci dev_set_drvdata(&dev->dev, p); 3788c2ecf20Sopenharmony_ci 3798c2ecf20Sopenharmony_ci return 0; 3808c2ecf20Sopenharmony_ci} 3818c2ecf20Sopenharmony_ci 3828c2ecf20Sopenharmony_cistatic int __exit parport_remove_chip(struct parisc_device *dev) 3838c2ecf20Sopenharmony_ci{ 3848c2ecf20Sopenharmony_ci struct parport *p = dev_get_drvdata(&dev->dev); 3858c2ecf20Sopenharmony_ci if (p) { 3868c2ecf20Sopenharmony_ci struct parport_gsc_private *priv = p->private_data; 3878c2ecf20Sopenharmony_ci struct parport_operations *ops = p->ops; 3888c2ecf20Sopenharmony_ci parport_remove_port(p); 3898c2ecf20Sopenharmony_ci if (p->dma != PARPORT_DMA_NONE) 3908c2ecf20Sopenharmony_ci free_dma(p->dma); 3918c2ecf20Sopenharmony_ci if (p->irq != PARPORT_IRQ_NONE) 3928c2ecf20Sopenharmony_ci free_irq(p->irq, p); 3938c2ecf20Sopenharmony_ci if (priv->dma_buf) 3948c2ecf20Sopenharmony_ci pci_free_consistent(priv->dev, PAGE_SIZE, 3958c2ecf20Sopenharmony_ci priv->dma_buf, 3968c2ecf20Sopenharmony_ci priv->dma_handle); 3978c2ecf20Sopenharmony_ci kfree (p->private_data); 3988c2ecf20Sopenharmony_ci parport_put_port(p); 3998c2ecf20Sopenharmony_ci kfree (ops); /* hope no-one cached it */ 4008c2ecf20Sopenharmony_ci } 4018c2ecf20Sopenharmony_ci return 0; 4028c2ecf20Sopenharmony_ci} 4038c2ecf20Sopenharmony_ci 4048c2ecf20Sopenharmony_cistatic const struct parisc_device_id parport_tbl[] __initconst = { 4058c2ecf20Sopenharmony_ci { HPHW_FIO, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x74 }, 4068c2ecf20Sopenharmony_ci { 0, } 4078c2ecf20Sopenharmony_ci}; 4088c2ecf20Sopenharmony_ci 4098c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(parisc, parport_tbl); 4108c2ecf20Sopenharmony_ci 4118c2ecf20Sopenharmony_cistatic struct parisc_driver parport_driver __refdata = { 4128c2ecf20Sopenharmony_ci .name = "Parallel", 4138c2ecf20Sopenharmony_ci .id_table = parport_tbl, 4148c2ecf20Sopenharmony_ci .probe = parport_init_chip, 4158c2ecf20Sopenharmony_ci .remove = __exit_p(parport_remove_chip), 4168c2ecf20Sopenharmony_ci}; 4178c2ecf20Sopenharmony_ci 4188c2ecf20Sopenharmony_ciint parport_gsc_init(void) 4198c2ecf20Sopenharmony_ci{ 4208c2ecf20Sopenharmony_ci return register_parisc_driver(&parport_driver); 4218c2ecf20Sopenharmony_ci} 4228c2ecf20Sopenharmony_ci 4238c2ecf20Sopenharmony_cistatic void parport_gsc_exit(void) 4248c2ecf20Sopenharmony_ci{ 4258c2ecf20Sopenharmony_ci unregister_parisc_driver(&parport_driver); 4268c2ecf20Sopenharmony_ci} 4278c2ecf20Sopenharmony_ci 4288c2ecf20Sopenharmony_cimodule_init(parport_gsc_init); 4298c2ecf20Sopenharmony_cimodule_exit(parport_gsc_exit); 430