18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Copyright (c) 2017, 2020-2021, The Linux Foundation. All rights reserved.
48c2ecf20Sopenharmony_ci */
58c2ecf20Sopenharmony_ci
68c2ecf20Sopenharmony_ci#include <linux/device.h>
78c2ecf20Sopenharmony_ci#include <linux/module.h>
88c2ecf20Sopenharmony_ci#include <linux/of.h>
98c2ecf20Sopenharmony_ci#include <linux/of_platform.h>
108c2ecf20Sopenharmony_ci#include <linux/nvmem-provider.h>
118c2ecf20Sopenharmony_ci#include <linux/regmap.h>
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ci#define SDAM_MEM_START			0x40
148c2ecf20Sopenharmony_ci#define REGISTER_MAP_ID			0x40
158c2ecf20Sopenharmony_ci#define REGISTER_MAP_VERSION		0x41
168c2ecf20Sopenharmony_ci#define SDAM_SIZE			0x44
178c2ecf20Sopenharmony_ci#define SDAM_PBS_TRIG_SET		0xE5
188c2ecf20Sopenharmony_ci#define SDAM_PBS_TRIG_CLR		0xE6
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_cistruct sdam_chip {
218c2ecf20Sopenharmony_ci	struct regmap			*regmap;
228c2ecf20Sopenharmony_ci	struct nvmem_config		sdam_config;
238c2ecf20Sopenharmony_ci	unsigned int			base;
248c2ecf20Sopenharmony_ci	unsigned int			size;
258c2ecf20Sopenharmony_ci};
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci/* read only register offsets */
288c2ecf20Sopenharmony_cistatic const u8 sdam_ro_map[] = {
298c2ecf20Sopenharmony_ci	REGISTER_MAP_ID,
308c2ecf20Sopenharmony_ci	REGISTER_MAP_VERSION,
318c2ecf20Sopenharmony_ci	SDAM_SIZE
328c2ecf20Sopenharmony_ci};
338c2ecf20Sopenharmony_ci
348c2ecf20Sopenharmony_cistatic bool sdam_is_valid(struct sdam_chip *sdam, unsigned int offset,
358c2ecf20Sopenharmony_ci				size_t len)
368c2ecf20Sopenharmony_ci{
378c2ecf20Sopenharmony_ci	unsigned int sdam_mem_end = SDAM_MEM_START + sdam->size - 1;
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_ci	if (!len)
408c2ecf20Sopenharmony_ci		return false;
418c2ecf20Sopenharmony_ci
428c2ecf20Sopenharmony_ci	if (offset >= SDAM_MEM_START && offset <= sdam_mem_end
438c2ecf20Sopenharmony_ci				&& (offset + len - 1) <= sdam_mem_end)
448c2ecf20Sopenharmony_ci		return true;
458c2ecf20Sopenharmony_ci	else if ((offset == SDAM_PBS_TRIG_SET || offset == SDAM_PBS_TRIG_CLR)
468c2ecf20Sopenharmony_ci				&& (len == 1))
478c2ecf20Sopenharmony_ci		return true;
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ci	return false;
508c2ecf20Sopenharmony_ci}
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_cistatic bool sdam_is_ro(unsigned int offset, size_t len)
538c2ecf20Sopenharmony_ci{
548c2ecf20Sopenharmony_ci	int i;
558c2ecf20Sopenharmony_ci
568c2ecf20Sopenharmony_ci	for (i = 0; i < ARRAY_SIZE(sdam_ro_map); i++)
578c2ecf20Sopenharmony_ci		if (offset <= sdam_ro_map[i] && (offset + len) > sdam_ro_map[i])
588c2ecf20Sopenharmony_ci			return true;
598c2ecf20Sopenharmony_ci
608c2ecf20Sopenharmony_ci	return false;
618c2ecf20Sopenharmony_ci}
628c2ecf20Sopenharmony_ci
638c2ecf20Sopenharmony_cistatic int sdam_read(void *priv, unsigned int offset, void *val,
648c2ecf20Sopenharmony_ci				size_t bytes)
658c2ecf20Sopenharmony_ci{
668c2ecf20Sopenharmony_ci	struct sdam_chip *sdam = priv;
678c2ecf20Sopenharmony_ci	struct device *dev = sdam->sdam_config.dev;
688c2ecf20Sopenharmony_ci	int rc;
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_ci	if (!sdam_is_valid(sdam, offset, bytes)) {
718c2ecf20Sopenharmony_ci		dev_err(dev, "Invalid SDAM offset %#x len=%zd\n",
728c2ecf20Sopenharmony_ci			offset, bytes);
738c2ecf20Sopenharmony_ci		return -EINVAL;
748c2ecf20Sopenharmony_ci	}
758c2ecf20Sopenharmony_ci
768c2ecf20Sopenharmony_ci	rc = regmap_bulk_read(sdam->regmap, sdam->base + offset, val, bytes);
778c2ecf20Sopenharmony_ci	if (rc < 0)
788c2ecf20Sopenharmony_ci		dev_err(dev, "Failed to read SDAM offset %#x len=%zd, rc=%d\n",
798c2ecf20Sopenharmony_ci						offset, bytes, rc);
808c2ecf20Sopenharmony_ci
818c2ecf20Sopenharmony_ci	return rc;
828c2ecf20Sopenharmony_ci}
838c2ecf20Sopenharmony_ci
848c2ecf20Sopenharmony_cistatic int sdam_write(void *priv, unsigned int offset, void *val,
858c2ecf20Sopenharmony_ci				size_t bytes)
868c2ecf20Sopenharmony_ci{
878c2ecf20Sopenharmony_ci	struct sdam_chip *sdam = priv;
888c2ecf20Sopenharmony_ci	struct device *dev = sdam->sdam_config.dev;
898c2ecf20Sopenharmony_ci	int rc;
908c2ecf20Sopenharmony_ci
918c2ecf20Sopenharmony_ci	if (!sdam_is_valid(sdam, offset, bytes)) {
928c2ecf20Sopenharmony_ci		dev_err(dev, "Invalid SDAM offset %#x len=%zd\n",
938c2ecf20Sopenharmony_ci			offset, bytes);
948c2ecf20Sopenharmony_ci		return -EINVAL;
958c2ecf20Sopenharmony_ci	}
968c2ecf20Sopenharmony_ci
978c2ecf20Sopenharmony_ci	if (sdam_is_ro(offset, bytes)) {
988c2ecf20Sopenharmony_ci		dev_err(dev, "Invalid write offset %#x len=%zd\n",
998c2ecf20Sopenharmony_ci			offset, bytes);
1008c2ecf20Sopenharmony_ci		return -EINVAL;
1018c2ecf20Sopenharmony_ci	}
1028c2ecf20Sopenharmony_ci
1038c2ecf20Sopenharmony_ci	rc = regmap_bulk_write(sdam->regmap, sdam->base + offset, val, bytes);
1048c2ecf20Sopenharmony_ci	if (rc < 0)
1058c2ecf20Sopenharmony_ci		dev_err(dev, "Failed to write SDAM offset %#x len=%zd, rc=%d\n",
1068c2ecf20Sopenharmony_ci						offset, bytes, rc);
1078c2ecf20Sopenharmony_ci
1088c2ecf20Sopenharmony_ci	return rc;
1098c2ecf20Sopenharmony_ci}
1108c2ecf20Sopenharmony_ci
1118c2ecf20Sopenharmony_cistatic int sdam_probe(struct platform_device *pdev)
1128c2ecf20Sopenharmony_ci{
1138c2ecf20Sopenharmony_ci	struct sdam_chip *sdam;
1148c2ecf20Sopenharmony_ci	struct nvmem_device *nvmem;
1158c2ecf20Sopenharmony_ci	unsigned int val;
1168c2ecf20Sopenharmony_ci	int rc;
1178c2ecf20Sopenharmony_ci
1188c2ecf20Sopenharmony_ci	sdam = devm_kzalloc(&pdev->dev, sizeof(*sdam), GFP_KERNEL);
1198c2ecf20Sopenharmony_ci	if (!sdam)
1208c2ecf20Sopenharmony_ci		return -ENOMEM;
1218c2ecf20Sopenharmony_ci
1228c2ecf20Sopenharmony_ci	sdam->regmap = dev_get_regmap(pdev->dev.parent, NULL);
1238c2ecf20Sopenharmony_ci	if (!sdam->regmap) {
1248c2ecf20Sopenharmony_ci		dev_err(&pdev->dev, "Failed to get regmap handle\n");
1258c2ecf20Sopenharmony_ci		return -ENXIO;
1268c2ecf20Sopenharmony_ci	}
1278c2ecf20Sopenharmony_ci
1288c2ecf20Sopenharmony_ci	rc = of_property_read_u32(pdev->dev.of_node, "reg", &sdam->base);
1298c2ecf20Sopenharmony_ci	if (rc < 0) {
1308c2ecf20Sopenharmony_ci		dev_err(&pdev->dev, "Failed to get SDAM base, rc=%d\n", rc);
1318c2ecf20Sopenharmony_ci		return -EINVAL;
1328c2ecf20Sopenharmony_ci	}
1338c2ecf20Sopenharmony_ci
1348c2ecf20Sopenharmony_ci	rc = regmap_read(sdam->regmap, sdam->base + SDAM_SIZE, &val);
1358c2ecf20Sopenharmony_ci	if (rc < 0) {
1368c2ecf20Sopenharmony_ci		dev_err(&pdev->dev, "Failed to read SDAM_SIZE rc=%d\n", rc);
1378c2ecf20Sopenharmony_ci		return -EINVAL;
1388c2ecf20Sopenharmony_ci	}
1398c2ecf20Sopenharmony_ci	sdam->size = val * 32;
1408c2ecf20Sopenharmony_ci
1418c2ecf20Sopenharmony_ci	sdam->sdam_config.dev = &pdev->dev;
1428c2ecf20Sopenharmony_ci	sdam->sdam_config.name = "spmi_sdam";
1438c2ecf20Sopenharmony_ci	sdam->sdam_config.id = NVMEM_DEVID_AUTO;
1448c2ecf20Sopenharmony_ci	sdam->sdam_config.owner = THIS_MODULE,
1458c2ecf20Sopenharmony_ci	sdam->sdam_config.stride = 1;
1468c2ecf20Sopenharmony_ci	sdam->sdam_config.word_size = 1;
1478c2ecf20Sopenharmony_ci	sdam->sdam_config.reg_read = sdam_read;
1488c2ecf20Sopenharmony_ci	sdam->sdam_config.reg_write = sdam_write;
1498c2ecf20Sopenharmony_ci	sdam->sdam_config.priv = sdam;
1508c2ecf20Sopenharmony_ci
1518c2ecf20Sopenharmony_ci	nvmem = devm_nvmem_register(&pdev->dev, &sdam->sdam_config);
1528c2ecf20Sopenharmony_ci	if (IS_ERR(nvmem)) {
1538c2ecf20Sopenharmony_ci		dev_err(&pdev->dev,
1548c2ecf20Sopenharmony_ci			"Failed to register SDAM nvmem device rc=%ld\n",
1558c2ecf20Sopenharmony_ci			PTR_ERR(nvmem));
1568c2ecf20Sopenharmony_ci		return -ENXIO;
1578c2ecf20Sopenharmony_ci	}
1588c2ecf20Sopenharmony_ci	dev_dbg(&pdev->dev,
1598c2ecf20Sopenharmony_ci		"SDAM base=%#x size=%u registered successfully\n",
1608c2ecf20Sopenharmony_ci		sdam->base, sdam->size);
1618c2ecf20Sopenharmony_ci
1628c2ecf20Sopenharmony_ci	return 0;
1638c2ecf20Sopenharmony_ci}
1648c2ecf20Sopenharmony_ci
1658c2ecf20Sopenharmony_cistatic const struct of_device_id sdam_match_table[] = {
1668c2ecf20Sopenharmony_ci	{ .compatible = "qcom,spmi-sdam" },
1678c2ecf20Sopenharmony_ci	{},
1688c2ecf20Sopenharmony_ci};
1698c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(of, sdam_match_table);
1708c2ecf20Sopenharmony_ci
1718c2ecf20Sopenharmony_cistatic struct platform_driver sdam_driver = {
1728c2ecf20Sopenharmony_ci	.driver = {
1738c2ecf20Sopenharmony_ci		.name = "qcom,spmi-sdam",
1748c2ecf20Sopenharmony_ci		.of_match_table = sdam_match_table,
1758c2ecf20Sopenharmony_ci	},
1768c2ecf20Sopenharmony_ci	.probe		= sdam_probe,
1778c2ecf20Sopenharmony_ci};
1788c2ecf20Sopenharmony_ci
1798c2ecf20Sopenharmony_cistatic int __init sdam_init(void)
1808c2ecf20Sopenharmony_ci{
1818c2ecf20Sopenharmony_ci	return platform_driver_register(&sdam_driver);
1828c2ecf20Sopenharmony_ci}
1838c2ecf20Sopenharmony_cisubsys_initcall(sdam_init);
1848c2ecf20Sopenharmony_ci
1858c2ecf20Sopenharmony_cistatic void __exit sdam_exit(void)
1868c2ecf20Sopenharmony_ci{
1878c2ecf20Sopenharmony_ci	return platform_driver_unregister(&sdam_driver);
1888c2ecf20Sopenharmony_ci}
1898c2ecf20Sopenharmony_cimodule_exit(sdam_exit);
1908c2ecf20Sopenharmony_ci
1918c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("QCOM SPMI SDAM driver");
1928c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL v2");
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