1// SPDX-License-Identifier: ISC
2/* Copyright (C) 2020 MediaTek Inc. */
3
4#include <linux/etherdevice.h>
5#include "mt7915.h"
6#include "mac.h"
7#include "eeprom.h"
8
9static void
10mt7915_mac_init_band(struct mt7915_dev *dev, u8 band)
11{
12	u32 mask, set;
13
14	mt76_rmw_field(dev, MT_TMAC_CTCR0(band),
15		       MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
16	mt76_set(dev, MT_TMAC_CTCR0(band),
17		 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
18		 MT_TMAC_CTCR0_INS_DDLMT_EN);
19
20	mask = MT_MDP_RCFR0_MCU_RX_MGMT |
21	       MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR |
22	       MT_MDP_RCFR0_MCU_RX_CTL_BAR;
23	set = FIELD_PREP(MT_MDP_RCFR0_MCU_RX_MGMT, MT_MDP_TO_HIF) |
24	      FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR, MT_MDP_TO_HIF) |
25	      FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_BAR, MT_MDP_TO_HIF);
26	mt76_rmw(dev, MT_MDP_BNRCFR0(band), mask, set);
27
28	mask = MT_MDP_RCFR1_MCU_RX_BYPASS |
29	       MT_MDP_RCFR1_RX_DROPPED_UCAST |
30	       MT_MDP_RCFR1_RX_DROPPED_MCAST;
31	set = FIELD_PREP(MT_MDP_RCFR1_MCU_RX_BYPASS, MT_MDP_TO_HIF) |
32	      FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_UCAST, MT_MDP_TO_HIF) |
33	      FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_MCAST, MT_MDP_TO_HIF);
34	mt76_rmw(dev, MT_MDP_BNRCFR1(band), mask, set);
35
36	mt76_set(dev, MT_WF_RMAC_MIB_TIME0(band), MT_WF_RMAC_MIB_RXTIME_EN);
37	mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0(band), MT_WF_RMAC_MIB_RXTIME_EN);
38}
39
40static void mt7915_mac_init(struct mt7915_dev *dev)
41{
42	int i;
43
44	mt76_rmw_field(dev, MT_DMA_DCR0, MT_DMA_DCR0_MAX_RX_LEN, 1536);
45	mt76_rmw_field(dev, MT_MDP_DCR1, MT_MDP_DCR1_MAX_RX_LEN, 1536);
46	/* enable rx rate report */
47	mt76_set(dev, MT_DMA_DCR0, MT_DMA_DCR0_RXD_G5_EN);
48	/* disable hardware de-agg */
49	mt76_clear(dev, MT_MDP_DCR0, MT_MDP_DCR0_DAMSDU_EN);
50
51	for (i = 0; i < MT7915_WTBL_SIZE; i++)
52		mt7915_mac_wtbl_update(dev, i,
53				       MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
54
55	mt7915_mac_init_band(dev, 0);
56	mt7915_mac_init_band(dev, 1);
57	mt7915_mcu_set_rts_thresh(&dev->phy, 0x92b);
58}
59
60static int mt7915_txbf_init(struct mt7915_dev *dev)
61{
62	int ret;
63
64	/*
65	 * TODO: DBDC & check whether iBF phase calibration data has
66	 * been stored in eeprom offset 0x651~0x7b8, then write down
67	 * 0x1111 into 0x651 and 0x651 to trigger iBF.
68	 */
69
70	/* trigger sounding packets */
71	ret = mt7915_mcu_set_txbf_sounding(dev);
72	if (ret)
73		return ret;
74
75	/* enable iBF & eBF */
76	return mt7915_mcu_set_txbf_type(dev);
77}
78
79static void
80mt7915_init_txpower_band(struct mt7915_dev *dev,
81			 struct ieee80211_supported_band *sband)
82{
83	int i, n_chains = hweight8(dev->mphy.antenna_mask);
84
85	for (i = 0; i < sband->n_channels; i++) {
86		struct ieee80211_channel *chan = &sband->channels[i];
87		u32 target_power = 0;
88		int j;
89
90		for (j = 0; j < n_chains; j++) {
91			u32 val;
92
93			val = mt7915_eeprom_get_target_power(dev, chan, j);
94			target_power = max(target_power, val);
95		}
96
97		chan->max_power = min_t(int, chan->max_reg_power,
98					target_power / 2);
99		chan->orig_mpwr = target_power / 2;
100	}
101}
102
103static void mt7915_init_txpower(struct mt7915_dev *dev)
104{
105	mt7915_init_txpower_band(dev, &dev->mphy.sband_2g.sband);
106	mt7915_init_txpower_band(dev, &dev->mphy.sband_5g.sband);
107
108	mt7915_eeprom_init_sku(dev);
109}
110
111static void mt7915_init_work(struct work_struct *work)
112{
113	struct mt7915_dev *dev = container_of(work, struct mt7915_dev,
114				 init_work);
115
116	mt7915_mcu_set_eeprom(dev);
117	mt7915_mac_init(dev);
118	mt7915_init_txpower(dev);
119	mt7915_txbf_init(dev);
120}
121
122static int mt7915_init_hardware(struct mt7915_dev *dev)
123{
124	int ret, idx;
125
126	mt76_wr(dev, MT_INT_SOURCE_CSR, ~0);
127
128	INIT_WORK(&dev->init_work, mt7915_init_work);
129	spin_lock_init(&dev->token_lock);
130	idr_init(&dev->token);
131
132	ret = mt7915_dma_init(dev);
133	if (ret)
134		return ret;
135
136	set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state);
137
138	/*
139	 * force firmware operation mode into normal state,
140	 * which should be set before firmware download stage.
141	 */
142	mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE);
143
144	ret = mt7915_mcu_init(dev);
145	if (ret)
146		return ret;
147
148	ret = mt7915_eeprom_init(dev);
149	if (ret < 0)
150		return ret;
151
152	/* Beacon and mgmt frames should occupy wcid 0 */
153	idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7915_WTBL_STA - 1);
154	if (idx)
155		return -ENOSPC;
156
157	dev->mt76.global_wcid.idx = idx;
158	dev->mt76.global_wcid.hw_key_idx = -1;
159	dev->mt76.global_wcid.tx_info |= MT_WCID_TX_INFO_SET;
160	rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid);
161
162	return 0;
163}
164
165#define CCK_RATE(_idx, _rate) {						\
166	.bitrate = _rate,						\
167	.flags = IEEE80211_RATE_SHORT_PREAMBLE,				\
168	.hw_value = (MT_PHY_TYPE_CCK << 8) | (_idx),			\
169	.hw_value_short = (MT_PHY_TYPE_CCK << 8) | (4 + (_idx)),	\
170}
171
172#define OFDM_RATE(_idx, _rate) {					\
173	.bitrate = _rate,						\
174	.hw_value = (MT_PHY_TYPE_OFDM << 8) | (_idx),			\
175	.hw_value_short = (MT_PHY_TYPE_OFDM << 8) | (_idx),		\
176}
177
178static struct ieee80211_rate mt7915_rates[] = {
179	CCK_RATE(0, 10),
180	CCK_RATE(1, 20),
181	CCK_RATE(2, 55),
182	CCK_RATE(3, 110),
183	OFDM_RATE(11, 60),
184	OFDM_RATE(15, 90),
185	OFDM_RATE(10, 120),
186	OFDM_RATE(14, 180),
187	OFDM_RATE(9,  240),
188	OFDM_RATE(13, 360),
189	OFDM_RATE(8,  480),
190	OFDM_RATE(12, 540),
191};
192
193static const struct ieee80211_iface_limit if_limits[] = {
194	{
195		.max = 1,
196		.types = BIT(NL80211_IFTYPE_ADHOC)
197	}, {
198		.max = MT7915_MAX_INTERFACES,
199		.types = BIT(NL80211_IFTYPE_AP) |
200#ifdef CONFIG_MAC80211_MESH
201			 BIT(NL80211_IFTYPE_MESH_POINT) |
202#endif
203			 BIT(NL80211_IFTYPE_STATION)
204	}
205};
206
207static const struct ieee80211_iface_combination if_comb[] = {
208	{
209		.limits = if_limits,
210		.n_limits = ARRAY_SIZE(if_limits),
211		.max_interfaces = 4,
212		.num_different_channels = 1,
213		.beacon_int_infra_match = true,
214		.radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
215				       BIT(NL80211_CHAN_WIDTH_20) |
216				       BIT(NL80211_CHAN_WIDTH_40) |
217				       BIT(NL80211_CHAN_WIDTH_80) |
218				       BIT(NL80211_CHAN_WIDTH_160) |
219				       BIT(NL80211_CHAN_WIDTH_80P80),
220	}
221};
222
223static void
224mt7915_regd_notifier(struct wiphy *wiphy,
225		     struct regulatory_request *request)
226{
227	struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
228	struct mt7915_dev *dev = mt7915_hw_dev(hw);
229	struct mt76_phy *mphy = hw->priv;
230	struct mt7915_phy *phy = mphy->priv;
231	struct cfg80211_chan_def *chandef = &mphy->chandef;
232
233	dev->mt76.region = request->dfs_region;
234
235	if (!(chandef->chan->flags & IEEE80211_CHAN_RADAR))
236		return;
237
238	mt7915_dfs_init_radar_detector(phy);
239}
240
241static void
242mt7915_init_wiphy(struct ieee80211_hw *hw)
243{
244	struct mt7915_phy *phy = mt7915_hw_phy(hw);
245	struct wiphy *wiphy = hw->wiphy;
246
247	hw->queues = 4;
248	hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF;
249	hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF;
250
251	phy->slottime = 9;
252
253	hw->sta_data_size = sizeof(struct mt7915_sta);
254	hw->vif_data_size = sizeof(struct mt7915_vif);
255
256	wiphy->iface_combinations = if_comb;
257	wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
258	wiphy->reg_notifier = mt7915_regd_notifier;
259	wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH;
260
261	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
262
263	ieee80211_hw_set(hw, HAS_RATE_CONTROL);
264
265	hw->max_tx_fragments = 4;
266}
267
268void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy)
269{
270	int nss = hweight8(phy->chainmask);
271	u32 *cap = &phy->mt76->sband_5g.sband.vht_cap.cap;
272
273	*cap |= IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
274		IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
275		(3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT);
276
277	*cap &= ~(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK |
278		  IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE |
279		  IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE);
280
281	if (nss < 2)
282		return;
283
284	*cap |= IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE |
285		IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE |
286		FIELD_PREP(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
287			   nss - 1);
288}
289
290static void
291mt7915_set_stream_he_txbf_caps(struct ieee80211_sta_he_cap *he_cap,
292			       int vif, int nss)
293{
294	struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem;
295	struct ieee80211_he_mcs_nss_supp *mcs = &he_cap->he_mcs_nss_supp;
296	u8 c;
297
298#ifdef CONFIG_MAC80211_MESH
299	if (vif == NL80211_IFTYPE_MESH_POINT)
300		return;
301#endif
302
303	elem->phy_cap_info[3] &= ~IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
304	elem->phy_cap_info[4] &= ~IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
305
306	c = IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK |
307	    IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK;
308	elem->phy_cap_info[5] &= ~c;
309
310	c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMER_FB |
311	    IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMER_FB;
312	elem->phy_cap_info[6] &= ~c;
313
314	elem->phy_cap_info[7] &= ~IEEE80211_HE_PHY_CAP7_MAX_NC_MASK;
315
316	c = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US |
317	    IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO |
318	    IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO;
319	elem->phy_cap_info[2] |= c;
320
321	c = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
322	    IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4 |
323	    IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_4;
324	elem->phy_cap_info[4] |= c;
325
326	/* do not support NG16 due to spec D4.0 changes subcarrier idx */
327	c = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU |
328	    IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU;
329
330	if (vif == NL80211_IFTYPE_STATION)
331		c |= IEEE80211_HE_PHY_CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO;
332
333	elem->phy_cap_info[6] |= c;
334
335	if (nss < 2)
336		return;
337
338	/* the maximum cap is 4 x 3, (Nr, Nc) = (3, 2) */
339	elem->phy_cap_info[7] |= min_t(int, nss - 1, 2) << 3;
340
341	if (vif != NL80211_IFTYPE_AP)
342		return;
343
344	elem->phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
345	elem->phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
346
347	/* num_snd_dim */
348	c = (nss - 1) | (max_t(int, mcs->tx_mcs_160, 1) << 3);
349	elem->phy_cap_info[5] |= c;
350
351	c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMER_FB |
352	    IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMER_FB;
353	elem->phy_cap_info[6] |= c;
354}
355
356static void
357mt7915_gen_ppe_thresh(u8 *he_ppet)
358{
359	int ru, nss, max_nss = 1, max_ru = 3;
360	u8 bit = 7, ru_bit_mask = 0x7;
361	u8 ppet16_ppet8_ru3_ru0[] = {0x1c, 0xc7, 0x71};
362
363	he_ppet[0] = max_nss & IEEE80211_PPE_THRES_NSS_MASK;
364	he_ppet[0] |= (ru_bit_mask <<
365		       IEEE80211_PPE_THRES_RU_INDEX_BITMASK_POS) &
366			IEEE80211_PPE_THRES_RU_INDEX_BITMASK_MASK;
367
368	for (nss = 0; nss <= max_nss; nss++) {
369		for (ru = 0; ru < max_ru; ru++) {
370			u8 val;
371			int i;
372
373			if (!(ru_bit_mask & BIT(ru)))
374				continue;
375
376			val = (ppet16_ppet8_ru3_ru0[nss] >> (ru * 6)) &
377			       0x3f;
378			val = ((val >> 3) & 0x7) | ((val & 0x7) << 3);
379			for (i = 5; i >= 0; i--) {
380				he_ppet[bit / 8] |=
381					((val >> i) & 0x1) << ((bit % 8));
382				bit++;
383			}
384		}
385	}
386}
387
388static int
389mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band,
390		    struct ieee80211_sband_iftype_data *data)
391{
392	int i, idx = 0;
393	int nss = hweight8(phy->chainmask);
394	u16 mcs_map = 0;
395
396	for (i = 0; i < 8; i++) {
397		if (i < nss)
398			mcs_map |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2));
399		else
400			mcs_map |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2));
401	}
402
403	for (i = 0; i < NUM_NL80211_IFTYPES; i++) {
404		struct ieee80211_sta_he_cap *he_cap = &data[idx].he_cap;
405		struct ieee80211_he_cap_elem *he_cap_elem =
406				&he_cap->he_cap_elem;
407		struct ieee80211_he_mcs_nss_supp *he_mcs =
408				&he_cap->he_mcs_nss_supp;
409
410		switch (i) {
411		case NL80211_IFTYPE_STATION:
412		case NL80211_IFTYPE_AP:
413#ifdef CONFIG_MAC80211_MESH
414		case NL80211_IFTYPE_MESH_POINT:
415#endif
416			break;
417		default:
418			continue;
419		}
420
421		data[idx].types_mask = BIT(i);
422		he_cap->has_he = true;
423
424		he_cap_elem->mac_cap_info[0] =
425			IEEE80211_HE_MAC_CAP0_HTC_HE;
426		he_cap_elem->mac_cap_info[3] =
427			IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
428			IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_RESERVED;
429		he_cap_elem->mac_cap_info[4] =
430			IEEE80211_HE_MAC_CAP4_AMDSU_IN_AMPDU;
431
432		if (band == NL80211_BAND_2GHZ)
433			he_cap_elem->phy_cap_info[0] =
434				IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G;
435		else if (band == NL80211_BAND_5GHZ)
436			he_cap_elem->phy_cap_info[0] =
437				IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
438				IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G |
439				IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G;
440
441		he_cap_elem->phy_cap_info[1] =
442			IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD;
443		he_cap_elem->phy_cap_info[2] =
444			IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ |
445			IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ;
446
447		switch (i) {
448		case NL80211_IFTYPE_AP:
449			he_cap_elem->mac_cap_info[0] |=
450				IEEE80211_HE_MAC_CAP0_TWT_RES;
451			he_cap_elem->mac_cap_info[2] |=
452				IEEE80211_HE_MAC_CAP2_BSR;
453			he_cap_elem->mac_cap_info[4] |=
454				IEEE80211_HE_MAC_CAP4_BQR;
455			he_cap_elem->mac_cap_info[5] |=
456				IEEE80211_HE_MAC_CAP5_OM_CTRL_UL_MU_DATA_DIS_RX;
457			he_cap_elem->phy_cap_info[3] |=
458				IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK |
459				IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK;
460			he_cap_elem->phy_cap_info[6] |=
461				IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT;
462			break;
463		case NL80211_IFTYPE_STATION:
464			he_cap_elem->mac_cap_info[0] |=
465				IEEE80211_HE_MAC_CAP0_TWT_REQ;
466			he_cap_elem->mac_cap_info[1] |=
467				IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US;
468
469			if (band == NL80211_BAND_2GHZ)
470				he_cap_elem->phy_cap_info[0] |=
471					IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G;
472			else if (band == NL80211_BAND_5GHZ)
473				he_cap_elem->phy_cap_info[0] |=
474					IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G;
475
476			he_cap_elem->phy_cap_info[1] |=
477				IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
478				IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US;
479			he_cap_elem->phy_cap_info[3] |=
480				IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK |
481				IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK;
482			he_cap_elem->phy_cap_info[6] |=
483				IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB |
484				IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE |
485				IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT;
486			he_cap_elem->phy_cap_info[7] |=
487				IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_AR |
488				IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI;
489			he_cap_elem->phy_cap_info[8] |=
490				IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G |
491				IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
492				IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU |
493				IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_484;
494			he_cap_elem->phy_cap_info[9] |=
495				IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM |
496				IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK |
497				IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU |
498				IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU |
499				IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
500				IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB;
501			break;
502		}
503
504		he_mcs->rx_mcs_80 = cpu_to_le16(mcs_map);
505		he_mcs->tx_mcs_80 = cpu_to_le16(mcs_map);
506		he_mcs->rx_mcs_160 = cpu_to_le16(mcs_map);
507		he_mcs->tx_mcs_160 = cpu_to_le16(mcs_map);
508		he_mcs->rx_mcs_80p80 = cpu_to_le16(mcs_map);
509		he_mcs->tx_mcs_80p80 = cpu_to_le16(mcs_map);
510
511		mt7915_set_stream_he_txbf_caps(he_cap, i, nss);
512
513		memset(he_cap->ppe_thres, 0, sizeof(he_cap->ppe_thres));
514		if (he_cap_elem->phy_cap_info[6] &
515		    IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT) {
516			mt7915_gen_ppe_thresh(he_cap->ppe_thres);
517		} else {
518			he_cap_elem->phy_cap_info[9] |=
519				IEEE80211_HE_PHY_CAP9_NOMIMAL_PKT_PADDING_16US;
520		}
521		idx++;
522	}
523
524	return idx;
525}
526
527void mt7915_set_stream_he_caps(struct mt7915_phy *phy)
528{
529	struct ieee80211_sband_iftype_data *data;
530	struct ieee80211_supported_band *band;
531	int n;
532
533	if (phy->mt76->cap.has_2ghz) {
534		data = phy->iftype[NL80211_BAND_2GHZ];
535		n = mt7915_init_he_caps(phy, NL80211_BAND_2GHZ, data);
536
537		band = &phy->mt76->sband_2g.sband;
538		band->iftype_data = data;
539		band->n_iftype_data = n;
540	}
541
542	if (phy->mt76->cap.has_5ghz) {
543		data = phy->iftype[NL80211_BAND_5GHZ];
544		n = mt7915_init_he_caps(phy, NL80211_BAND_5GHZ, data);
545
546		band = &phy->mt76->sband_5g.sband;
547		band->iftype_data = data;
548		band->n_iftype_data = n;
549	}
550}
551
552static void
553mt7915_cap_dbdc_enable(struct mt7915_dev *dev)
554{
555	dev->mphy.sband_5g.sband.vht_cap.cap &=
556			~(IEEE80211_VHT_CAP_SHORT_GI_160 |
557			  IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ);
558
559	if (dev->chainmask == 0xf)
560		dev->mphy.antenna_mask = dev->chainmask >> 2;
561	else
562		dev->mphy.antenna_mask = dev->chainmask >> 1;
563
564	dev->phy.chainmask = dev->mphy.antenna_mask;
565	dev->mphy.hw->wiphy->available_antennas_rx = dev->phy.chainmask;
566	dev->mphy.hw->wiphy->available_antennas_tx = dev->phy.chainmask;
567
568	mt76_set_stream_caps(&dev->mphy, true);
569	mt7915_set_stream_vht_txbf_caps(&dev->phy);
570	mt7915_set_stream_he_caps(&dev->phy);
571}
572
573static void
574mt7915_cap_dbdc_disable(struct mt7915_dev *dev)
575{
576	dev->mphy.sband_5g.sband.vht_cap.cap |=
577			IEEE80211_VHT_CAP_SHORT_GI_160 |
578			IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ;
579
580	dev->mphy.antenna_mask = dev->chainmask;
581	dev->phy.chainmask = dev->chainmask;
582	dev->mphy.hw->wiphy->available_antennas_rx = dev->chainmask;
583	dev->mphy.hw->wiphy->available_antennas_tx = dev->chainmask;
584
585	mt76_set_stream_caps(&dev->mphy, true);
586	mt7915_set_stream_vht_txbf_caps(&dev->phy);
587	mt7915_set_stream_he_caps(&dev->phy);
588}
589
590int mt7915_register_ext_phy(struct mt7915_dev *dev)
591{
592	struct mt7915_phy *phy = mt7915_ext_phy(dev);
593	struct mt76_phy *mphy;
594	int ret;
595	bool bound;
596
597	/* TODO: enble DBDC */
598	bound = mt7915_l1_rr(dev, MT_HW_BOUND) & BIT(5);
599	if (!bound)
600		return -EINVAL;
601
602	if (test_bit(MT76_STATE_RUNNING, &dev->mphy.state))
603		return -EINVAL;
604
605	if (phy)
606		return 0;
607
608	mt7915_cap_dbdc_enable(dev);
609	mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7915_ops);
610	if (!mphy)
611		return -ENOMEM;
612
613	phy = mphy->priv;
614	phy->dev = dev;
615	phy->mt76 = mphy;
616	phy->chainmask = dev->chainmask & ~dev->phy.chainmask;
617	mphy->antenna_mask = BIT(hweight8(phy->chainmask)) - 1;
618	mt7915_init_wiphy(mphy->hw);
619
620	INIT_LIST_HEAD(&phy->stats_list);
621	INIT_DELAYED_WORK(&phy->mac_work, mt7915_mac_work);
622
623	/*
624	 * Make the secondary PHY MAC address local without overlapping with
625	 * the usual MAC address allocation scheme on multiple virtual interfaces
626	 */
627	mphy->hw->wiphy->perm_addr[0] |= 2;
628	mphy->hw->wiphy->perm_addr[0] ^= BIT(7);
629
630	/* The second interface does not get any packets unless it has a vif */
631	ieee80211_hw_set(mphy->hw, WANT_MONITOR_VIF);
632
633	ret = mt76_register_phy(mphy);
634	if (ret)
635		ieee80211_free_hw(mphy->hw);
636
637	return ret;
638}
639
640void mt7915_unregister_ext_phy(struct mt7915_dev *dev)
641{
642	struct mt7915_phy *phy = mt7915_ext_phy(dev);
643	struct mt76_phy *mphy = dev->mt76.phy2;
644
645	if (!phy)
646		return;
647
648	mt7915_cap_dbdc_disable(dev);
649	mt76_unregister_phy(mphy);
650	ieee80211_free_hw(mphy->hw);
651}
652
653int mt7915_register_device(struct mt7915_dev *dev)
654{
655	struct ieee80211_hw *hw = mt76_hw(dev);
656	int ret;
657
658	dev->phy.dev = dev;
659	dev->phy.mt76 = &dev->mt76.phy;
660	dev->mt76.phy.priv = &dev->phy;
661	INIT_LIST_HEAD(&dev->phy.stats_list);
662	INIT_WORK(&dev->rc_work, mt7915_mac_sta_rc_work);
663	INIT_DELAYED_WORK(&dev->phy.mac_work, mt7915_mac_work);
664	INIT_LIST_HEAD(&dev->sta_rc_list);
665	INIT_LIST_HEAD(&dev->sta_poll_list);
666	spin_lock_init(&dev->sta_poll_lock);
667
668	init_waitqueue_head(&dev->reset_wait);
669	INIT_WORK(&dev->reset_work, mt7915_mac_reset_work);
670
671	ret = mt7915_init_hardware(dev);
672	if (ret)
673		return ret;
674
675	mt7915_init_wiphy(hw);
676	dev->mphy.sband_2g.sband.ht_cap.cap |=
677			IEEE80211_HT_CAP_LDPC_CODING |
678			IEEE80211_HT_CAP_MAX_AMSDU;
679	dev->mphy.sband_5g.sband.ht_cap.cap |=
680			IEEE80211_HT_CAP_LDPC_CODING |
681			IEEE80211_HT_CAP_MAX_AMSDU;
682	dev->mphy.sband_5g.sband.vht_cap.cap |=
683			IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991 |
684			IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
685	mt7915_cap_dbdc_disable(dev);
686	dev->phy.dfs_state = -1;
687
688	ret = mt76_register_device(&dev->mt76, true, mt7915_rates,
689				   ARRAY_SIZE(mt7915_rates));
690	if (ret)
691		return ret;
692
693	ieee80211_queue_work(mt76_hw(dev), &dev->init_work);
694
695	return mt7915_init_debugfs(dev);
696}
697
698void mt7915_unregister_device(struct mt7915_dev *dev)
699{
700	struct mt76_txwi_cache *txwi;
701	int id;
702
703	mt7915_unregister_ext_phy(dev);
704	mt76_unregister_device(&dev->mt76);
705	mt7915_mcu_exit(dev);
706	mt7915_dma_cleanup(dev);
707
708	spin_lock_bh(&dev->token_lock);
709	idr_for_each_entry(&dev->token, txwi, id) {
710		mt7915_txp_skb_unmap(&dev->mt76, txwi);
711		if (txwi->skb) {
712			struct ieee80211_hw *hw;
713
714			hw = mt76_tx_status_get_hw(&dev->mt76, txwi->skb);
715			ieee80211_free_txskb(hw, txwi->skb);
716		}
717		mt76_put_txwi(&dev->mt76, txwi);
718	}
719	spin_unlock_bh(&dev->token_lock);
720	idr_destroy(&dev->token);
721
722	mt76_free_device(&dev->mt76);
723}
724