1/* SPDX-License-Identifier: ISC */ 2/* 3 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name> 4 */ 5 6#ifndef __MT76_H 7#define __MT76_H 8 9#include <linux/kernel.h> 10#include <linux/io.h> 11#include <linux/spinlock.h> 12#include <linux/skbuff.h> 13#include <linux/leds.h> 14#include <linux/usb.h> 15#include <linux/average.h> 16#include <net/mac80211.h> 17#include "util.h" 18#include "testmode.h" 19 20#define MT_MCU_RING_SIZE 32 21#define MT_RX_BUF_SIZE 2048 22#define MT_SKB_HEAD_LEN 128 23 24#define MT_MAX_NON_AQL_PKT 16 25#define MT_TXQ_FREE_THR 32 26 27struct mt76_dev; 28struct mt76_phy; 29struct mt76_wcid; 30 31struct mt76_reg_pair { 32 u32 reg; 33 u32 value; 34}; 35 36enum mt76_bus_type { 37 MT76_BUS_MMIO, 38 MT76_BUS_USB, 39 MT76_BUS_SDIO, 40}; 41 42struct mt76_bus_ops { 43 u32 (*rr)(struct mt76_dev *dev, u32 offset); 44 void (*wr)(struct mt76_dev *dev, u32 offset, u32 val); 45 u32 (*rmw)(struct mt76_dev *dev, u32 offset, u32 mask, u32 val); 46 void (*write_copy)(struct mt76_dev *dev, u32 offset, const void *data, 47 int len); 48 void (*read_copy)(struct mt76_dev *dev, u32 offset, void *data, 49 int len); 50 int (*wr_rp)(struct mt76_dev *dev, u32 base, 51 const struct mt76_reg_pair *rp, int len); 52 int (*rd_rp)(struct mt76_dev *dev, u32 base, 53 struct mt76_reg_pair *rp, int len); 54 enum mt76_bus_type type; 55}; 56 57#define mt76_is_usb(dev) ((dev)->bus->type == MT76_BUS_USB) 58#define mt76_is_mmio(dev) ((dev)->bus->type == MT76_BUS_MMIO) 59#define mt76_is_sdio(dev) ((dev)->bus->type == MT76_BUS_SDIO) 60 61enum mt76_txq_id { 62 MT_TXQ_VO = IEEE80211_AC_VO, 63 MT_TXQ_VI = IEEE80211_AC_VI, 64 MT_TXQ_BE = IEEE80211_AC_BE, 65 MT_TXQ_BK = IEEE80211_AC_BK, 66 MT_TXQ_PSD, 67 MT_TXQ_MCU, 68 MT_TXQ_MCU_WA, 69 MT_TXQ_BEACON, 70 MT_TXQ_CAB, 71 MT_TXQ_FWDL, 72 __MT_TXQ_MAX 73}; 74 75enum mt76_rxq_id { 76 MT_RXQ_MAIN, 77 MT_RXQ_MCU, 78 MT_RXQ_MCU_WA, 79 __MT_RXQ_MAX 80}; 81 82struct mt76_queue_buf { 83 dma_addr_t addr; 84 u16 len; 85 bool skip_unmap; 86}; 87 88struct mt76_tx_info { 89 struct mt76_queue_buf buf[32]; 90 struct sk_buff *skb; 91 int nbuf; 92 u32 info; 93}; 94 95struct mt76_queue_entry { 96 union { 97 void *buf; 98 struct sk_buff *skb; 99 }; 100 union { 101 struct mt76_txwi_cache *txwi; 102 struct urb *urb; 103 int buf_sz; 104 }; 105 u32 dma_addr[2]; 106 u16 dma_len[2]; 107 u16 wcid; 108 bool skip_buf0:1; 109 bool skip_buf1:1; 110 bool done:1; 111}; 112 113struct mt76_queue_regs { 114 u32 desc_base; 115 u32 ring_size; 116 u32 cpu_idx; 117 u32 dma_idx; 118} __packed __aligned(4); 119 120struct mt76_queue { 121 struct mt76_queue_regs __iomem *regs; 122 123 spinlock_t lock; 124 struct mt76_queue_entry *entry; 125 struct mt76_desc *desc; 126 127 u16 first; 128 u16 head; 129 u16 tail; 130 int ndesc; 131 int queued; 132 int buf_size; 133 bool stopped; 134 135 u8 buf_offset; 136 u8 hw_idx; 137 138 dma_addr_t desc_dma; 139 struct sk_buff *rx_head; 140 struct page_frag_cache rx_page; 141}; 142 143struct mt76_mcu_ops { 144 u32 headroom; 145 u32 tailroom; 146 147 int (*mcu_send_msg)(struct mt76_dev *dev, int cmd, const void *data, 148 int len, bool wait_resp); 149 int (*mcu_skb_send_msg)(struct mt76_dev *dev, struct sk_buff *skb, 150 int cmd, bool wait_resp); 151 u32 (*mcu_rr)(struct mt76_dev *dev, u32 offset); 152 void (*mcu_wr)(struct mt76_dev *dev, u32 offset, u32 val); 153 int (*mcu_wr_rp)(struct mt76_dev *dev, u32 base, 154 const struct mt76_reg_pair *rp, int len); 155 int (*mcu_rd_rp)(struct mt76_dev *dev, u32 base, 156 struct mt76_reg_pair *rp, int len); 157 int (*mcu_restart)(struct mt76_dev *dev); 158}; 159 160struct mt76_queue_ops { 161 int (*init)(struct mt76_dev *dev); 162 163 int (*alloc)(struct mt76_dev *dev, struct mt76_queue *q, 164 int idx, int n_desc, int bufsize, 165 u32 ring_base); 166 167 int (*tx_queue_skb)(struct mt76_dev *dev, enum mt76_txq_id qid, 168 struct sk_buff *skb, struct mt76_wcid *wcid, 169 struct ieee80211_sta *sta); 170 171 int (*tx_queue_skb_raw)(struct mt76_dev *dev, enum mt76_txq_id qid, 172 struct sk_buff *skb, u32 tx_info); 173 174 void *(*dequeue)(struct mt76_dev *dev, struct mt76_queue *q, bool flush, 175 int *len, u32 *info, bool *more); 176 177 void (*rx_reset)(struct mt76_dev *dev, enum mt76_rxq_id qid); 178 179 void (*tx_cleanup)(struct mt76_dev *dev, enum mt76_txq_id qid, 180 bool flush); 181 182 void (*kick)(struct mt76_dev *dev, struct mt76_queue *q); 183}; 184 185enum mt76_wcid_flags { 186 MT_WCID_FLAG_CHECK_PS, 187 MT_WCID_FLAG_PS, 188}; 189 190#define MT76_N_WCIDS 288 191 192/* stored in ieee80211_tx_info::hw_queue */ 193#define MT_TX_HW_QUEUE_EXT_PHY BIT(3) 194 195DECLARE_EWMA(signal, 10, 8); 196 197#define MT_WCID_TX_INFO_RATE GENMASK(15, 0) 198#define MT_WCID_TX_INFO_NSS GENMASK(17, 16) 199#define MT_WCID_TX_INFO_TXPWR_ADJ GENMASK(25, 18) 200#define MT_WCID_TX_INFO_SET BIT(31) 201 202struct mt76_wcid { 203 struct mt76_rx_tid __rcu *aggr[IEEE80211_NUM_TIDS]; 204 205 atomic_t non_aql_packets; 206 unsigned long flags; 207 208 struct ewma_signal rssi; 209 int inactive_count; 210 211 u16 idx; 212 u8 hw_key_idx; 213 214 u8 sta:1; 215 u8 ext_phy:1; 216 u8 amsdu:1; 217 218 u8 rx_check_pn; 219 u8 rx_key_pn[IEEE80211_NUM_TIDS][6]; 220 u16 cipher; 221 222 u32 tx_info; 223 bool sw_iv; 224 225 u8 packet_id; 226}; 227 228struct mt76_txq { 229 struct mt76_wcid *wcid; 230 231 u16 agg_ssn; 232 bool send_bar; 233 bool aggr; 234}; 235 236struct mt76_txwi_cache { 237 struct list_head list; 238 dma_addr_t dma_addr; 239 240 struct sk_buff *skb; 241}; 242 243struct mt76_rx_tid { 244 struct rcu_head rcu_head; 245 246 struct mt76_dev *dev; 247 248 spinlock_t lock; 249 struct delayed_work reorder_work; 250 251 u16 head; 252 u16 size; 253 u16 nframes; 254 255 u8 num; 256 257 u8 started:1, stopped:1, timer_pending:1; 258 259 struct sk_buff *reorder_buf[]; 260}; 261 262#define MT_TX_CB_DMA_DONE BIT(0) 263#define MT_TX_CB_TXS_DONE BIT(1) 264#define MT_TX_CB_TXS_FAILED BIT(2) 265 266#define MT_PACKET_ID_MASK GENMASK(6, 0) 267#define MT_PACKET_ID_NO_ACK 0 268#define MT_PACKET_ID_NO_SKB 1 269#define MT_PACKET_ID_FIRST 2 270#define MT_PACKET_ID_HAS_RATE BIT(7) 271 272#define MT_TX_STATUS_SKB_TIMEOUT HZ 273 274struct mt76_tx_cb { 275 unsigned long jiffies; 276 u16 wcid; 277 u8 pktid; 278 u8 flags; 279}; 280 281enum { 282 MT76_STATE_INITIALIZED, 283 MT76_STATE_RUNNING, 284 MT76_STATE_MCU_RUNNING, 285 MT76_SCANNING, 286 MT76_HW_SCANNING, 287 MT76_HW_SCHED_SCANNING, 288 MT76_RESTART, 289 MT76_RESET, 290 MT76_MCU_RESET, 291 MT76_REMOVED, 292 MT76_READING_STATS, 293 MT76_STATE_POWER_OFF, 294 MT76_STATE_SUSPEND, 295 MT76_STATE_ROC, 296 MT76_STATE_PM, 297}; 298 299struct mt76_hw_cap { 300 bool has_2ghz; 301 bool has_5ghz; 302}; 303 304#define MT_DRV_TXWI_NO_FREE BIT(0) 305#define MT_DRV_TX_ALIGNED4_SKBS BIT(1) 306#define MT_DRV_SW_RX_AIRTIME BIT(2) 307#define MT_DRV_RX_DMA_HDR BIT(3) 308#define MT_DRV_HW_MGMT_TXQ BIT(4) 309#define MT_DRV_AMSDU_OFFLOAD BIT(5) 310 311struct mt76_driver_ops { 312 u32 drv_flags; 313 u32 survey_flags; 314 u16 txwi_size; 315 316 void (*update_survey)(struct mt76_dev *dev); 317 318 int (*tx_prepare_skb)(struct mt76_dev *dev, void *txwi_ptr, 319 enum mt76_txq_id qid, struct mt76_wcid *wcid, 320 struct ieee80211_sta *sta, 321 struct mt76_tx_info *tx_info); 322 323 void (*tx_complete_skb)(struct mt76_dev *dev, 324 struct mt76_queue_entry *e); 325 326 bool (*tx_status_data)(struct mt76_dev *dev, u8 *update); 327 328 void (*rx_skb)(struct mt76_dev *dev, enum mt76_rxq_id q, 329 struct sk_buff *skb); 330 331 void (*rx_poll_complete)(struct mt76_dev *dev, enum mt76_rxq_id q); 332 333 void (*sta_ps)(struct mt76_dev *dev, struct ieee80211_sta *sta, 334 bool ps); 335 336 int (*sta_add)(struct mt76_dev *dev, struct ieee80211_vif *vif, 337 struct ieee80211_sta *sta); 338 339 void (*sta_assoc)(struct mt76_dev *dev, struct ieee80211_vif *vif, 340 struct ieee80211_sta *sta); 341 342 void (*sta_remove)(struct mt76_dev *dev, struct ieee80211_vif *vif, 343 struct ieee80211_sta *sta); 344}; 345 346struct mt76_channel_state { 347 u64 cc_active; 348 u64 cc_busy; 349 u64 cc_rx; 350 u64 cc_bss_rx; 351 u64 cc_tx; 352 353 s8 noise; 354}; 355 356struct mt76_sband { 357 struct ieee80211_supported_band sband; 358 struct mt76_channel_state *chan; 359}; 360 361struct mt76_rate_power { 362 union { 363 struct { 364 s8 cck[4]; 365 s8 ofdm[8]; 366 s8 stbc[10]; 367 s8 ht[16]; 368 s8 vht[10]; 369 }; 370 s8 all[48]; 371 }; 372}; 373 374/* addr req mask */ 375#define MT_VEND_TYPE_EEPROM BIT(31) 376#define MT_VEND_TYPE_CFG BIT(30) 377#define MT_VEND_TYPE_MASK (MT_VEND_TYPE_EEPROM | MT_VEND_TYPE_CFG) 378 379#define MT_VEND_ADDR(type, n) (MT_VEND_TYPE_##type | (n)) 380enum mt_vendor_req { 381 MT_VEND_DEV_MODE = 0x1, 382 MT_VEND_WRITE = 0x2, 383 MT_VEND_POWER_ON = 0x4, 384 MT_VEND_MULTI_WRITE = 0x6, 385 MT_VEND_MULTI_READ = 0x7, 386 MT_VEND_READ_EEPROM = 0x9, 387 MT_VEND_WRITE_FCE = 0x42, 388 MT_VEND_WRITE_CFG = 0x46, 389 MT_VEND_READ_CFG = 0x47, 390 MT_VEND_READ_EXT = 0x63, 391 MT_VEND_WRITE_EXT = 0x66, 392 MT_VEND_FEATURE_SET = 0x91, 393}; 394 395enum mt76u_in_ep { 396 MT_EP_IN_PKT_RX, 397 MT_EP_IN_CMD_RESP, 398 __MT_EP_IN_MAX, 399}; 400 401enum mt76u_out_ep { 402 MT_EP_OUT_INBAND_CMD, 403 MT_EP_OUT_AC_BE, 404 MT_EP_OUT_AC_BK, 405 MT_EP_OUT_AC_VI, 406 MT_EP_OUT_AC_VO, 407 MT_EP_OUT_HCCA, 408 __MT_EP_OUT_MAX, 409}; 410 411struct mt76_mcu { 412 struct mutex mutex; 413 u32 msg_seq; 414 415 struct sk_buff_head res_q; 416 wait_queue_head_t wait; 417}; 418 419#define MT_TX_SG_MAX_SIZE 8 420#define MT_RX_SG_MAX_SIZE 4 421#define MT_NUM_TX_ENTRIES 256 422#define MT_NUM_RX_ENTRIES 128 423#define MCU_RESP_URB_SIZE 1024 424struct mt76_usb { 425 struct mutex usb_ctrl_mtx; 426 u8 *data; 427 u16 data_len; 428 429 struct tasklet_struct rx_tasklet; 430 struct work_struct stat_work; 431 432 u8 out_ep[__MT_EP_OUT_MAX]; 433 u8 in_ep[__MT_EP_IN_MAX]; 434 bool sg_en; 435 436 struct mt76u_mcu { 437 u8 *data; 438 /* multiple reads */ 439 struct mt76_reg_pair *rp; 440 int rp_len; 441 u32 base; 442 bool burst; 443 } mcu; 444}; 445 446#define MT76S_XMIT_BUF_SZ (16 * PAGE_SIZE) 447struct mt76_sdio { 448 struct workqueue_struct *txrx_wq; 449 struct { 450 struct work_struct xmit_work; 451 struct work_struct status_work; 452 } tx; 453 struct { 454 struct work_struct recv_work; 455 struct work_struct net_work; 456 } rx; 457 458 struct work_struct stat_work; 459 460 u8 *xmit_buf[MT_TXQ_MCU_WA]; 461 462 struct sdio_func *func; 463 void *intr_data; 464 465 struct { 466 struct mutex lock; 467 int pse_data_quota; 468 int ple_data_quota; 469 int pse_mcu_quota; 470 int deficit; 471 } sched; 472}; 473 474struct mt76_mmio { 475 void __iomem *regs; 476 spinlock_t irq_lock; 477 u32 irqmask; 478}; 479 480struct mt76_rx_status { 481 union { 482 struct mt76_wcid *wcid; 483 u16 wcid_idx; 484 }; 485 486 unsigned long reorder_time; 487 488 u32 ampdu_ref; 489 490 u8 iv[6]; 491 492 u8 ext_phy:1; 493 u8 aggr:1; 494 u8 tid; 495 u16 seqno; 496 497 u16 freq; 498 u32 flag; 499 u8 enc_flags; 500 u8 encoding:2, bw:3, he_ru:3; 501 u8 he_gi:2, he_dcm:1; 502 u8 rate_idx; 503 u8 nss; 504 u8 band; 505 s8 signal; 506 u8 chains; 507 s8 chain_signal[IEEE80211_MAX_CHAINS]; 508}; 509 510struct mt76_testmode_ops { 511 int (*set_state)(struct mt76_dev *dev, enum mt76_testmode_state state); 512 int (*set_params)(struct mt76_dev *dev, struct nlattr **tb, 513 enum mt76_testmode_state new_state); 514 int (*dump_stats)(struct mt76_dev *dev, struct sk_buff *msg); 515}; 516 517struct mt76_testmode_data { 518 enum mt76_testmode_state state; 519 520 u32 param_set[DIV_ROUND_UP(NUM_MT76_TM_ATTRS, 32)]; 521 struct sk_buff *tx_skb; 522 523 u32 tx_count; 524 u16 tx_msdu_len; 525 526 u8 tx_rate_mode; 527 u8 tx_rate_idx; 528 u8 tx_rate_nss; 529 u8 tx_rate_sgi; 530 u8 tx_rate_ldpc; 531 532 u8 tx_antenna_mask; 533 534 u32 freq_offset; 535 536 u8 tx_power[4]; 537 u8 tx_power_control; 538 539 const char *mtd_name; 540 u32 mtd_offset; 541 542 u32 tx_pending; 543 u32 tx_queued; 544 u32 tx_done; 545 struct { 546 u64 packets[__MT_RXQ_MAX]; 547 u64 fcs_error[__MT_RXQ_MAX]; 548 } rx_stats; 549}; 550 551struct mt76_phy { 552 struct ieee80211_hw *hw; 553 struct mt76_dev *dev; 554 void *priv; 555 556 unsigned long state; 557 558 struct cfg80211_chan_def chandef; 559 struct ieee80211_channel *main_chan; 560 561 struct mt76_channel_state *chan_state; 562 ktime_t survey_time; 563 564 struct mt76_hw_cap cap; 565 struct mt76_sband sband_2g; 566 struct mt76_sband sband_5g; 567 568 u32 vif_mask; 569 570 int txpower_cur; 571 u8 antenna_mask; 572}; 573 574struct mt76_dev { 575 struct mt76_phy phy; /* must be first */ 576 577 struct mt76_phy *phy2; 578 579 struct ieee80211_hw *hw; 580 581 spinlock_t lock; 582 spinlock_t cc_lock; 583 584 u32 cur_cc_bss_rx; 585 586 struct mt76_rx_status rx_ampdu_status; 587 u32 rx_ampdu_len; 588 u32 rx_ampdu_ref; 589 590 struct mutex mutex; 591 592 const struct mt76_bus_ops *bus; 593 const struct mt76_driver_ops *drv; 594 const struct mt76_mcu_ops *mcu_ops; 595 struct device *dev; 596 597 struct mt76_mcu mcu; 598 599 struct net_device napi_dev; 600 spinlock_t rx_lock; 601 struct napi_struct napi[__MT_RXQ_MAX]; 602 struct sk_buff_head rx_skb[__MT_RXQ_MAX]; 603 604 struct list_head txwi_cache; 605 struct mt76_queue *q_tx[2 * __MT_TXQ_MAX]; 606 struct mt76_queue q_rx[__MT_RXQ_MAX]; 607 const struct mt76_queue_ops *queue_ops; 608 int tx_dma_idx[4]; 609 610 struct mt76_worker tx_worker; 611 struct napi_struct tx_napi; 612 struct delayed_work mac_work; 613 614 wait_queue_head_t tx_wait; 615 struct sk_buff_head status_list; 616 617 u32 wcid_mask[DIV_ROUND_UP(MT76_N_WCIDS, 32)]; 618 u32 wcid_phy_mask[DIV_ROUND_UP(MT76_N_WCIDS, 32)]; 619 620 struct mt76_wcid global_wcid; 621 struct mt76_wcid __rcu *wcid[MT76_N_WCIDS]; 622 623 u8 macaddr[ETH_ALEN]; 624 u32 rev; 625 626 u32 aggr_stats[32]; 627 628 struct tasklet_struct pre_tbtt_tasklet; 629 int beacon_int; 630 u8 beacon_mask; 631 632 struct debugfs_blob_wrapper eeprom; 633 struct debugfs_blob_wrapper otp; 634 635 struct mt76_rate_power rate_power; 636 637 enum nl80211_dfs_regions region; 638 639 u32 debugfs_reg; 640 641 struct led_classdev led_cdev; 642 char led_name[32]; 643 bool led_al; 644 u8 led_pin; 645 646 u8 csa_complete; 647 648 u32 rxfilter; 649 650#ifdef CONFIG_NL80211_TESTMODE 651 const struct mt76_testmode_ops *test_ops; 652 struct mt76_testmode_data test; 653#endif 654 655 struct workqueue_struct *wq; 656 657 union { 658 struct mt76_mmio mmio; 659 struct mt76_usb usb; 660 struct mt76_sdio sdio; 661 }; 662}; 663 664enum mt76_phy_type { 665 MT_PHY_TYPE_CCK, 666 MT_PHY_TYPE_OFDM, 667 MT_PHY_TYPE_HT, 668 MT_PHY_TYPE_HT_GF, 669 MT_PHY_TYPE_VHT, 670 MT_PHY_TYPE_HE_SU = 8, 671 MT_PHY_TYPE_HE_EXT_SU, 672 MT_PHY_TYPE_HE_TB, 673 MT_PHY_TYPE_HE_MU, 674}; 675 676#define __mt76_rr(dev, ...) (dev)->bus->rr((dev), __VA_ARGS__) 677#define __mt76_wr(dev, ...) (dev)->bus->wr((dev), __VA_ARGS__) 678#define __mt76_rmw(dev, ...) (dev)->bus->rmw((dev), __VA_ARGS__) 679#define __mt76_wr_copy(dev, ...) (dev)->bus->write_copy((dev), __VA_ARGS__) 680#define __mt76_rr_copy(dev, ...) (dev)->bus->read_copy((dev), __VA_ARGS__) 681 682#define __mt76_set(dev, offset, val) __mt76_rmw(dev, offset, 0, val) 683#define __mt76_clear(dev, offset, val) __mt76_rmw(dev, offset, val, 0) 684 685#define mt76_rr(dev, ...) (dev)->mt76.bus->rr(&((dev)->mt76), __VA_ARGS__) 686#define mt76_wr(dev, ...) (dev)->mt76.bus->wr(&((dev)->mt76), __VA_ARGS__) 687#define mt76_rmw(dev, ...) (dev)->mt76.bus->rmw(&((dev)->mt76), __VA_ARGS__) 688#define mt76_wr_copy(dev, ...) (dev)->mt76.bus->write_copy(&((dev)->mt76), __VA_ARGS__) 689#define mt76_rr_copy(dev, ...) (dev)->mt76.bus->read_copy(&((dev)->mt76), __VA_ARGS__) 690#define mt76_wr_rp(dev, ...) (dev)->mt76.bus->wr_rp(&((dev)->mt76), __VA_ARGS__) 691#define mt76_rd_rp(dev, ...) (dev)->mt76.bus->rd_rp(&((dev)->mt76), __VA_ARGS__) 692 693#define mt76_mcu_send_msg(dev, ...) (dev)->mt76.mcu_ops->mcu_send_msg(&((dev)->mt76), __VA_ARGS__) 694 695#define __mt76_mcu_send_msg(dev, ...) (dev)->mcu_ops->mcu_send_msg((dev), __VA_ARGS__) 696#define __mt76_mcu_skb_send_msg(dev, ...) (dev)->mcu_ops->mcu_skb_send_msg((dev), __VA_ARGS__) 697#define mt76_mcu_restart(dev, ...) (dev)->mt76.mcu_ops->mcu_restart(&((dev)->mt76)) 698#define __mt76_mcu_restart(dev, ...) (dev)->mcu_ops->mcu_restart((dev)) 699 700#define mt76_set(dev, offset, val) mt76_rmw(dev, offset, 0, val) 701#define mt76_clear(dev, offset, val) mt76_rmw(dev, offset, val, 0) 702 703#define mt76_get_field(_dev, _reg, _field) \ 704 FIELD_GET(_field, mt76_rr(dev, _reg)) 705 706#define mt76_rmw_field(_dev, _reg, _field, _val) \ 707 mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val)) 708 709#define __mt76_rmw_field(_dev, _reg, _field, _val) \ 710 __mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val)) 711 712#define mt76_hw(dev) (dev)->mphy.hw 713 714static inline struct ieee80211_hw * 715mt76_wcid_hw(struct mt76_dev *dev, u16 wcid) 716{ 717 if (wcid <= MT76_N_WCIDS && 718 mt76_wcid_mask_test(dev->wcid_phy_mask, wcid)) 719 return dev->phy2->hw; 720 721 return dev->phy.hw; 722} 723 724bool __mt76_poll(struct mt76_dev *dev, u32 offset, u32 mask, u32 val, 725 int timeout); 726 727#define mt76_poll(dev, ...) __mt76_poll(&((dev)->mt76), __VA_ARGS__) 728 729bool __mt76_poll_msec(struct mt76_dev *dev, u32 offset, u32 mask, u32 val, 730 int timeout); 731 732#define mt76_poll_msec(dev, ...) __mt76_poll_msec(&((dev)->mt76), __VA_ARGS__) 733 734void mt76_mmio_init(struct mt76_dev *dev, void __iomem *regs); 735void mt76_pci_disable_aspm(struct pci_dev *pdev); 736 737static inline u16 mt76_chip(struct mt76_dev *dev) 738{ 739 return dev->rev >> 16; 740} 741 742static inline u16 mt76_rev(struct mt76_dev *dev) 743{ 744 return dev->rev & 0xffff; 745} 746 747#define mt76xx_chip(dev) mt76_chip(&((dev)->mt76)) 748#define mt76xx_rev(dev) mt76_rev(&((dev)->mt76)) 749 750#define mt76_init_queues(dev) (dev)->mt76.queue_ops->init(&((dev)->mt76)) 751#define mt76_queue_alloc(dev, ...) (dev)->mt76.queue_ops->alloc(&((dev)->mt76), __VA_ARGS__) 752#define mt76_tx_queue_skb_raw(dev, ...) (dev)->mt76.queue_ops->tx_queue_skb_raw(&((dev)->mt76), __VA_ARGS__) 753#define mt76_tx_queue_skb(dev, ...) (dev)->mt76.queue_ops->tx_queue_skb(&((dev)->mt76), __VA_ARGS__) 754#define mt76_queue_rx_reset(dev, ...) (dev)->mt76.queue_ops->rx_reset(&((dev)->mt76), __VA_ARGS__) 755#define mt76_queue_tx_cleanup(dev, ...) (dev)->mt76.queue_ops->tx_cleanup(&((dev)->mt76), __VA_ARGS__) 756#define mt76_queue_kick(dev, ...) (dev)->mt76.queue_ops->kick(&((dev)->mt76), __VA_ARGS__) 757 758#define mt76_for_each_q_rx(dev, i) \ 759 for (i = 0; i < ARRAY_SIZE((dev)->q_rx) && \ 760 (dev)->q_rx[i].ndesc; i++) 761 762struct mt76_dev *mt76_alloc_device(struct device *pdev, unsigned int size, 763 const struct ieee80211_ops *ops, 764 const struct mt76_driver_ops *drv_ops); 765int mt76_register_device(struct mt76_dev *dev, bool vht, 766 struct ieee80211_rate *rates, int n_rates); 767void mt76_unregister_device(struct mt76_dev *dev); 768void mt76_free_device(struct mt76_dev *dev); 769void mt76_unregister_phy(struct mt76_phy *phy); 770 771struct mt76_phy *mt76_alloc_phy(struct mt76_dev *dev, unsigned int size, 772 const struct ieee80211_ops *ops); 773int mt76_register_phy(struct mt76_phy *phy); 774 775struct dentry *mt76_register_debugfs(struct mt76_dev *dev); 776int mt76_queues_read(struct seq_file *s, void *data); 777void mt76_seq_puts_array(struct seq_file *file, const char *str, 778 s8 *val, int len); 779 780int mt76_eeprom_init(struct mt76_dev *dev, int len); 781void mt76_eeprom_override(struct mt76_dev *dev); 782 783static inline struct mt76_phy * 784mt76_dev_phy(struct mt76_dev *dev, bool phy_ext) 785{ 786 if (phy_ext && dev->phy2) 787 return dev->phy2; 788 return &dev->phy; 789} 790 791static inline struct ieee80211_hw * 792mt76_phy_hw(struct mt76_dev *dev, bool phy_ext) 793{ 794 return mt76_dev_phy(dev, phy_ext)->hw; 795} 796 797static inline u8 * 798mt76_get_txwi_ptr(struct mt76_dev *dev, struct mt76_txwi_cache *t) 799{ 800 return (u8 *)t - dev->drv->txwi_size; 801} 802 803/* increment with wrap-around */ 804static inline int mt76_incr(int val, int size) 805{ 806 return (val + 1) & (size - 1); 807} 808 809/* decrement with wrap-around */ 810static inline int mt76_decr(int val, int size) 811{ 812 return (val - 1) & (size - 1); 813} 814 815u8 mt76_ac_to_hwq(u8 ac); 816 817static inline struct ieee80211_txq * 818mtxq_to_txq(struct mt76_txq *mtxq) 819{ 820 void *ptr = mtxq; 821 822 return container_of(ptr, struct ieee80211_txq, drv_priv); 823} 824 825static inline struct ieee80211_sta * 826wcid_to_sta(struct mt76_wcid *wcid) 827{ 828 void *ptr = wcid; 829 830 if (!wcid || !wcid->sta) 831 return NULL; 832 833 return container_of(ptr, struct ieee80211_sta, drv_priv); 834} 835 836static inline struct mt76_tx_cb *mt76_tx_skb_cb(struct sk_buff *skb) 837{ 838 BUILD_BUG_ON(sizeof(struct mt76_tx_cb) > 839 sizeof(IEEE80211_SKB_CB(skb)->status.status_driver_data)); 840 return ((void *)IEEE80211_SKB_CB(skb)->status.status_driver_data); 841} 842 843static inline void *mt76_skb_get_hdr(struct sk_buff *skb) 844{ 845 struct mt76_rx_status mstat; 846 u8 *data = skb->data; 847 848 /* Alignment concerns */ 849 BUILD_BUG_ON(sizeof(struct ieee80211_radiotap_he) % 4); 850 BUILD_BUG_ON(sizeof(struct ieee80211_radiotap_he_mu) % 4); 851 852 mstat = *((struct mt76_rx_status *)skb->cb); 853 854 if (mstat.flag & RX_FLAG_RADIOTAP_HE) 855 data += sizeof(struct ieee80211_radiotap_he); 856 if (mstat.flag & RX_FLAG_RADIOTAP_HE_MU) 857 data += sizeof(struct ieee80211_radiotap_he_mu); 858 859 return data; 860} 861 862static inline void mt76_insert_hdr_pad(struct sk_buff *skb) 863{ 864 int len = ieee80211_get_hdrlen_from_skb(skb); 865 866 if (len % 4 == 0) 867 return; 868 869 skb_push(skb, 2); 870 memmove(skb->data, skb->data + 2, len); 871 872 skb->data[len] = 0; 873 skb->data[len + 1] = 0; 874} 875 876static inline bool mt76_is_skb_pktid(u8 pktid) 877{ 878 if (pktid & MT_PACKET_ID_HAS_RATE) 879 return false; 880 881 return pktid >= MT_PACKET_ID_FIRST; 882} 883 884static inline u8 mt76_tx_power_nss_delta(u8 nss) 885{ 886 static const u8 nss_delta[4] = { 0, 6, 9, 12 }; 887 u8 idx = nss - 1; 888 889 return (idx < ARRAY_SIZE(nss_delta)) ? nss_delta[idx] : 0; 890} 891 892static inline bool mt76_testmode_enabled(struct mt76_dev *dev) 893{ 894#ifdef CONFIG_NL80211_TESTMODE 895 return dev->test.state != MT76_TM_STATE_OFF; 896#else 897 return false; 898#endif 899} 900 901void mt76_rx(struct mt76_dev *dev, enum mt76_rxq_id q, struct sk_buff *skb); 902void mt76_tx(struct mt76_phy *dev, struct ieee80211_sta *sta, 903 struct mt76_wcid *wcid, struct sk_buff *skb); 904void mt76_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq); 905void mt76_stop_tx_queues(struct mt76_dev *dev, struct ieee80211_sta *sta, 906 bool send_bar); 907void mt76_tx_check_agg_ssn(struct ieee80211_sta *sta, struct sk_buff *skb); 908void mt76_txq_schedule(struct mt76_phy *phy, enum mt76_txq_id qid); 909void mt76_txq_schedule_all(struct mt76_phy *phy); 910void mt76_tx_worker(struct mt76_worker *w); 911void mt76_release_buffered_frames(struct ieee80211_hw *hw, 912 struct ieee80211_sta *sta, 913 u16 tids, int nframes, 914 enum ieee80211_frame_release_type reason, 915 bool more_data); 916bool mt76_has_tx_pending(struct mt76_phy *phy); 917void mt76_set_channel(struct mt76_phy *phy); 918void mt76_update_survey(struct mt76_dev *dev); 919void mt76_update_survey_active_time(struct mt76_phy *phy, ktime_t time); 920int mt76_get_survey(struct ieee80211_hw *hw, int idx, 921 struct survey_info *survey); 922void mt76_set_stream_caps(struct mt76_phy *phy, bool vht); 923 924int mt76_rx_aggr_start(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid, 925 u16 ssn, u16 size); 926void mt76_rx_aggr_stop(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid); 927 928void mt76_wcid_key_setup(struct mt76_dev *dev, struct mt76_wcid *wcid, 929 struct ieee80211_key_conf *key); 930 931void mt76_tx_status_lock(struct mt76_dev *dev, struct sk_buff_head *list) 932 __acquires(&dev->status_list.lock); 933void mt76_tx_status_unlock(struct mt76_dev *dev, struct sk_buff_head *list) 934 __releases(&dev->status_list.lock); 935 936int mt76_tx_status_skb_add(struct mt76_dev *dev, struct mt76_wcid *wcid, 937 struct sk_buff *skb); 938struct sk_buff *mt76_tx_status_skb_get(struct mt76_dev *dev, 939 struct mt76_wcid *wcid, int pktid, 940 struct sk_buff_head *list); 941void mt76_tx_status_skb_done(struct mt76_dev *dev, struct sk_buff *skb, 942 struct sk_buff_head *list); 943void mt76_tx_complete_skb(struct mt76_dev *dev, u16 wcid, struct sk_buff *skb); 944void mt76_tx_status_check(struct mt76_dev *dev, struct mt76_wcid *wcid, 945 bool flush); 946int mt76_sta_state(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 947 struct ieee80211_sta *sta, 948 enum ieee80211_sta_state old_state, 949 enum ieee80211_sta_state new_state); 950void __mt76_sta_remove(struct mt76_dev *dev, struct ieee80211_vif *vif, 951 struct ieee80211_sta *sta); 952void mt76_sta_pre_rcu_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 953 struct ieee80211_sta *sta); 954 955int mt76_get_min_avg_rssi(struct mt76_dev *dev, bool ext_phy); 956 957int mt76_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 958 int *dbm); 959 960void mt76_csa_check(struct mt76_dev *dev); 961void mt76_csa_finish(struct mt76_dev *dev); 962 963int mt76_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant); 964int mt76_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set); 965void mt76_insert_ccmp_hdr(struct sk_buff *skb, u8 key_id); 966int mt76_get_rate(struct mt76_dev *dev, 967 struct ieee80211_supported_band *sband, 968 int idx, bool cck); 969void mt76_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 970 const u8 *mac); 971void mt76_sw_scan_complete(struct ieee80211_hw *hw, 972 struct ieee80211_vif *vif); 973int mt76_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 974 void *data, int len); 975int mt76_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *skb, 976 struct netlink_callback *cb, void *data, int len); 977int mt76_testmode_set_state(struct mt76_dev *dev, enum mt76_testmode_state state); 978 979static inline void mt76_testmode_reset(struct mt76_dev *dev, bool disable) 980{ 981#ifdef CONFIG_NL80211_TESTMODE 982 enum mt76_testmode_state state = MT76_TM_STATE_IDLE; 983 984 if (disable || dev->test.state == MT76_TM_STATE_OFF) 985 state = MT76_TM_STATE_OFF; 986 987 mt76_testmode_set_state(dev, state); 988#endif 989} 990 991 992/* internal */ 993static inline struct ieee80211_hw * 994mt76_tx_status_get_hw(struct mt76_dev *dev, struct sk_buff *skb) 995{ 996 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 997 struct ieee80211_hw *hw = dev->phy.hw; 998 999 if ((info->hw_queue & MT_TX_HW_QUEUE_EXT_PHY) && dev->phy2) 1000 hw = dev->phy2->hw; 1001 1002 info->hw_queue &= ~MT_TX_HW_QUEUE_EXT_PHY; 1003 1004 return hw; 1005} 1006 1007void mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t); 1008void mt76_rx_complete(struct mt76_dev *dev, struct sk_buff_head *frames, 1009 struct napi_struct *napi); 1010void mt76_rx_poll_complete(struct mt76_dev *dev, enum mt76_rxq_id q, 1011 struct napi_struct *napi); 1012void mt76_rx_aggr_reorder(struct sk_buff *skb, struct sk_buff_head *frames); 1013void mt76_testmode_tx_pending(struct mt76_dev *dev); 1014void mt76_queue_tx_complete(struct mt76_dev *dev, struct mt76_queue *q, 1015 struct mt76_queue_entry *e); 1016 1017/* usb */ 1018static inline bool mt76u_urb_error(struct urb *urb) 1019{ 1020 return urb->status && 1021 urb->status != -ECONNRESET && 1022 urb->status != -ESHUTDOWN && 1023 urb->status != -ENOENT; 1024} 1025 1026/* Map hardware queues to usb endpoints */ 1027static inline u8 q2ep(u8 qid) 1028{ 1029 /* TODO: take management packets to queue 5 */ 1030 return qid + 1; 1031} 1032 1033static inline int 1034mt76u_bulk_msg(struct mt76_dev *dev, void *data, int len, int *actual_len, 1035 int timeout, int ep) 1036{ 1037 struct usb_interface *uintf = to_usb_interface(dev->dev); 1038 struct usb_device *udev = interface_to_usbdev(uintf); 1039 struct mt76_usb *usb = &dev->usb; 1040 unsigned int pipe; 1041 1042 if (actual_len) 1043 pipe = usb_rcvbulkpipe(udev, usb->in_ep[ep]); 1044 else 1045 pipe = usb_sndbulkpipe(udev, usb->out_ep[ep]); 1046 1047 return usb_bulk_msg(udev, pipe, data, len, actual_len, timeout); 1048} 1049 1050int mt76_skb_adjust_pad(struct sk_buff *skb, int pad); 1051int mt76u_vendor_request(struct mt76_dev *dev, u8 req, 1052 u8 req_type, u16 val, u16 offset, 1053 void *buf, size_t len); 1054void mt76u_single_wr(struct mt76_dev *dev, const u8 req, 1055 const u16 offset, const u32 val); 1056int mt76u_init(struct mt76_dev *dev, struct usb_interface *intf, 1057 bool ext); 1058int mt76u_alloc_mcu_queue(struct mt76_dev *dev); 1059int mt76u_alloc_queues(struct mt76_dev *dev); 1060void mt76u_stop_tx(struct mt76_dev *dev); 1061void mt76u_stop_rx(struct mt76_dev *dev); 1062int mt76u_resume_rx(struct mt76_dev *dev); 1063void mt76u_queues_deinit(struct mt76_dev *dev); 1064 1065int mt76s_init(struct mt76_dev *dev, struct sdio_func *func, 1066 const struct mt76_bus_ops *bus_ops); 1067int mt76s_alloc_queues(struct mt76_dev *dev); 1068void mt76s_stop_txrx(struct mt76_dev *dev); 1069void mt76s_deinit(struct mt76_dev *dev); 1070 1071struct sk_buff * 1072mt76_mcu_msg_alloc(struct mt76_dev *dev, const void *data, 1073 int data_len); 1074void mt76_mcu_rx_event(struct mt76_dev *dev, struct sk_buff *skb); 1075struct sk_buff *mt76_mcu_get_response(struct mt76_dev *dev, 1076 unsigned long expires); 1077 1078void mt76_set_irq_mask(struct mt76_dev *dev, u32 addr, u32 clear, u32 set); 1079 1080#endif 1081