1/* 2 * NXP Wireless LAN device driver: PCIE specific handling 3 * 4 * Copyright 2011-2020 NXP 5 * 6 * This software file (the "File") is distributed by NXP 7 * under the terms of the GNU General Public License Version 2, June 1991 8 * (the "License"). You may use, redistribute and/or modify this File in 9 * accordance with the terms and conditions of the License, a copy of which 10 * is available by writing to the Free Software Foundation, Inc., 11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the 12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. 13 * 14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about 17 * this warranty disclaimer. 18 */ 19 20#include <linux/iopoll.h> 21#include <linux/firmware.h> 22 23#include "decl.h" 24#include "ioctl.h" 25#include "util.h" 26#include "fw.h" 27#include "main.h" 28#include "wmm.h" 29#include "11n.h" 30#include "pcie.h" 31 32#define PCIE_VERSION "1.0" 33#define DRV_NAME "Marvell mwifiex PCIe" 34 35static struct mwifiex_if_ops pcie_ops; 36 37static const struct mwifiex_pcie_card_reg mwifiex_reg_8766 = { 38 .cmd_addr_lo = PCIE_SCRATCH_0_REG, 39 .cmd_addr_hi = PCIE_SCRATCH_1_REG, 40 .cmd_size = PCIE_SCRATCH_2_REG, 41 .fw_status = PCIE_SCRATCH_3_REG, 42 .cmdrsp_addr_lo = PCIE_SCRATCH_4_REG, 43 .cmdrsp_addr_hi = PCIE_SCRATCH_5_REG, 44 .tx_rdptr = PCIE_SCRATCH_6_REG, 45 .tx_wrptr = PCIE_SCRATCH_7_REG, 46 .rx_rdptr = PCIE_SCRATCH_8_REG, 47 .rx_wrptr = PCIE_SCRATCH_9_REG, 48 .evt_rdptr = PCIE_SCRATCH_10_REG, 49 .evt_wrptr = PCIE_SCRATCH_11_REG, 50 .drv_rdy = PCIE_SCRATCH_12_REG, 51 .tx_start_ptr = 0, 52 .tx_mask = MWIFIEX_TXBD_MASK, 53 .tx_wrap_mask = 0, 54 .rx_mask = MWIFIEX_RXBD_MASK, 55 .rx_wrap_mask = 0, 56 .tx_rollover_ind = MWIFIEX_BD_FLAG_ROLLOVER_IND, 57 .rx_rollover_ind = MWIFIEX_BD_FLAG_ROLLOVER_IND, 58 .evt_rollover_ind = MWIFIEX_BD_FLAG_ROLLOVER_IND, 59 .ring_flag_sop = 0, 60 .ring_flag_eop = 0, 61 .ring_flag_xs_sop = 0, 62 .ring_flag_xs_eop = 0, 63 .ring_tx_start_ptr = 0, 64 .pfu_enabled = 0, 65 .sleep_cookie = 1, 66 .msix_support = 0, 67}; 68 69static const struct mwifiex_pcie_card_reg mwifiex_reg_8897 = { 70 .cmd_addr_lo = PCIE_SCRATCH_0_REG, 71 .cmd_addr_hi = PCIE_SCRATCH_1_REG, 72 .cmd_size = PCIE_SCRATCH_2_REG, 73 .fw_status = PCIE_SCRATCH_3_REG, 74 .cmdrsp_addr_lo = PCIE_SCRATCH_4_REG, 75 .cmdrsp_addr_hi = PCIE_SCRATCH_5_REG, 76 .tx_rdptr = PCIE_RD_DATA_PTR_Q0_Q1, 77 .tx_wrptr = PCIE_WR_DATA_PTR_Q0_Q1, 78 .rx_rdptr = PCIE_WR_DATA_PTR_Q0_Q1, 79 .rx_wrptr = PCIE_RD_DATA_PTR_Q0_Q1, 80 .evt_rdptr = PCIE_SCRATCH_10_REG, 81 .evt_wrptr = PCIE_SCRATCH_11_REG, 82 .drv_rdy = PCIE_SCRATCH_12_REG, 83 .tx_start_ptr = 16, 84 .tx_mask = 0x03FF0000, 85 .tx_wrap_mask = 0x07FF0000, 86 .rx_mask = 0x000003FF, 87 .rx_wrap_mask = 0x000007FF, 88 .tx_rollover_ind = MWIFIEX_BD_FLAG_TX_ROLLOVER_IND, 89 .rx_rollover_ind = MWIFIEX_BD_FLAG_RX_ROLLOVER_IND, 90 .evt_rollover_ind = MWIFIEX_BD_FLAG_EVT_ROLLOVER_IND, 91 .ring_flag_sop = MWIFIEX_BD_FLAG_SOP, 92 .ring_flag_eop = MWIFIEX_BD_FLAG_EOP, 93 .ring_flag_xs_sop = MWIFIEX_BD_FLAG_XS_SOP, 94 .ring_flag_xs_eop = MWIFIEX_BD_FLAG_XS_EOP, 95 .ring_tx_start_ptr = MWIFIEX_BD_FLAG_TX_START_PTR, 96 .pfu_enabled = 1, 97 .sleep_cookie = 0, 98 .fw_dump_ctrl = PCIE_SCRATCH_13_REG, 99 .fw_dump_start = PCIE_SCRATCH_14_REG, 100 .fw_dump_end = 0xcff, 101 .fw_dump_host_ready = 0xee, 102 .fw_dump_read_done = 0xfe, 103 .msix_support = 0, 104}; 105 106static const struct mwifiex_pcie_card_reg mwifiex_reg_8997 = { 107 .cmd_addr_lo = PCIE_SCRATCH_0_REG, 108 .cmd_addr_hi = PCIE_SCRATCH_1_REG, 109 .cmd_size = PCIE_SCRATCH_2_REG, 110 .fw_status = PCIE_SCRATCH_3_REG, 111 .cmdrsp_addr_lo = PCIE_SCRATCH_4_REG, 112 .cmdrsp_addr_hi = PCIE_SCRATCH_5_REG, 113 .tx_rdptr = 0xC1A4, 114 .tx_wrptr = 0xC174, 115 .rx_rdptr = 0xC174, 116 .rx_wrptr = 0xC1A4, 117 .evt_rdptr = PCIE_SCRATCH_10_REG, 118 .evt_wrptr = PCIE_SCRATCH_11_REG, 119 .drv_rdy = PCIE_SCRATCH_12_REG, 120 .tx_start_ptr = 16, 121 .tx_mask = 0x0FFF0000, 122 .tx_wrap_mask = 0x1FFF0000, 123 .rx_mask = 0x00000FFF, 124 .rx_wrap_mask = 0x00001FFF, 125 .tx_rollover_ind = BIT(28), 126 .rx_rollover_ind = BIT(12), 127 .evt_rollover_ind = MWIFIEX_BD_FLAG_EVT_ROLLOVER_IND, 128 .ring_flag_sop = MWIFIEX_BD_FLAG_SOP, 129 .ring_flag_eop = MWIFIEX_BD_FLAG_EOP, 130 .ring_flag_xs_sop = MWIFIEX_BD_FLAG_XS_SOP, 131 .ring_flag_xs_eop = MWIFIEX_BD_FLAG_XS_EOP, 132 .ring_tx_start_ptr = MWIFIEX_BD_FLAG_TX_START_PTR, 133 .pfu_enabled = 1, 134 .sleep_cookie = 0, 135 .fw_dump_ctrl = PCIE_SCRATCH_13_REG, 136 .fw_dump_start = PCIE_SCRATCH_14_REG, 137 .fw_dump_end = 0xcff, 138 .fw_dump_host_ready = 0xcc, 139 .fw_dump_read_done = 0xdd, 140 .msix_support = 0, 141}; 142 143static struct memory_type_mapping mem_type_mapping_tbl_w8897[] = { 144 {"ITCM", NULL, 0, 0xF0}, 145 {"DTCM", NULL, 0, 0xF1}, 146 {"SQRAM", NULL, 0, 0xF2}, 147 {"IRAM", NULL, 0, 0xF3}, 148 {"APU", NULL, 0, 0xF4}, 149 {"CIU", NULL, 0, 0xF5}, 150 {"ICU", NULL, 0, 0xF6}, 151 {"MAC", NULL, 0, 0xF7}, 152}; 153 154static struct memory_type_mapping mem_type_mapping_tbl_w8997[] = { 155 {"DUMP", NULL, 0, 0xDD}, 156}; 157 158static const struct mwifiex_pcie_device mwifiex_pcie8766 = { 159 .reg = &mwifiex_reg_8766, 160 .blksz_fw_dl = MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD, 161 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K, 162 .can_dump_fw = false, 163 .can_ext_scan = true, 164}; 165 166static const struct mwifiex_pcie_device mwifiex_pcie8897 = { 167 .reg = &mwifiex_reg_8897, 168 .blksz_fw_dl = MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD, 169 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K, 170 .can_dump_fw = true, 171 .mem_type_mapping_tbl = mem_type_mapping_tbl_w8897, 172 .num_mem_types = ARRAY_SIZE(mem_type_mapping_tbl_w8897), 173 .can_ext_scan = true, 174}; 175 176static const struct mwifiex_pcie_device mwifiex_pcie8997 = { 177 .reg = &mwifiex_reg_8997, 178 .blksz_fw_dl = MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD, 179 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K, 180 .can_dump_fw = true, 181 .mem_type_mapping_tbl = mem_type_mapping_tbl_w8997, 182 .num_mem_types = ARRAY_SIZE(mem_type_mapping_tbl_w8997), 183 .can_ext_scan = true, 184}; 185 186static const struct of_device_id mwifiex_pcie_of_match_table[] __maybe_unused = { 187 { .compatible = "pci11ab,2b42" }, 188 { .compatible = "pci1b4b,2b42" }, 189 { } 190}; 191 192static int mwifiex_pcie_probe_of(struct device *dev) 193{ 194 if (!of_match_node(mwifiex_pcie_of_match_table, dev->of_node)) { 195 dev_err(dev, "required compatible string missing\n"); 196 return -EINVAL; 197 } 198 199 return 0; 200} 201 202static void mwifiex_pcie_work(struct work_struct *work); 203static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter); 204static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter); 205 206static int 207mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb, 208 size_t size, int flags) 209{ 210 struct pcie_service_card *card = adapter->card; 211 struct mwifiex_dma_mapping mapping; 212 213 mapping.addr = dma_map_single(&card->dev->dev, skb->data, size, flags); 214 if (dma_mapping_error(&card->dev->dev, mapping.addr)) { 215 mwifiex_dbg(adapter, ERROR, "failed to map pci memory!\n"); 216 return -1; 217 } 218 mapping.len = size; 219 mwifiex_store_mapping(skb, &mapping); 220 return 0; 221} 222 223static void mwifiex_unmap_pci_memory(struct mwifiex_adapter *adapter, 224 struct sk_buff *skb, int flags) 225{ 226 struct pcie_service_card *card = adapter->card; 227 struct mwifiex_dma_mapping mapping; 228 229 mwifiex_get_mapping(skb, &mapping); 230 dma_unmap_single(&card->dev->dev, mapping.addr, mapping.len, flags); 231} 232 233/* 234 * This function writes data into PCIE card register. 235 */ 236static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data) 237{ 238 struct pcie_service_card *card = adapter->card; 239 240 iowrite32(data, card->pci_mmap1 + reg); 241 242 return 0; 243} 244 245/* This function reads data from PCIE card register. 246 */ 247static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data) 248{ 249 struct pcie_service_card *card = adapter->card; 250 251 *data = ioread32(card->pci_mmap1 + reg); 252 if (*data == 0xffffffff) 253 return 0xffffffff; 254 255 return 0; 256} 257 258/* This function reads u8 data from PCIE card register. */ 259static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter, 260 int reg, u8 *data) 261{ 262 struct pcie_service_card *card = adapter->card; 263 264 *data = ioread8(card->pci_mmap1 + reg); 265 266 return 0; 267} 268 269/* 270 * This function reads sleep cookie and checks if FW is ready 271 */ 272static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter) 273{ 274 u32 cookie_value; 275 struct pcie_service_card *card = adapter->card; 276 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 277 278 if (!reg->sleep_cookie) 279 return true; 280 281 if (card->sleep_cookie_vbase) { 282 cookie_value = get_unaligned_le32(card->sleep_cookie_vbase); 283 mwifiex_dbg(adapter, INFO, 284 "info: ACCESS_HW: sleep cookie=0x%x\n", 285 cookie_value); 286 if (cookie_value == FW_AWAKE_COOKIE) 287 return true; 288 } 289 290 return false; 291} 292 293#ifdef CONFIG_PM_SLEEP 294/* 295 * Kernel needs to suspend all functions separately. Therefore all 296 * registered functions must have drivers with suspend and resume 297 * methods. Failing that the kernel simply removes the whole card. 298 * 299 * If already not suspended, this function allocates and sends a host 300 * sleep activate request to the firmware and turns off the traffic. 301 */ 302static int mwifiex_pcie_suspend(struct device *dev) 303{ 304 struct mwifiex_adapter *adapter; 305 struct pcie_service_card *card = dev_get_drvdata(dev); 306 307 308 /* Might still be loading firmware */ 309 wait_for_completion(&card->fw_done); 310 311 adapter = card->adapter; 312 if (!adapter) { 313 dev_err(dev, "adapter is not valid\n"); 314 return 0; 315 } 316 317 mwifiex_enable_wake(adapter); 318 319 /* Enable the Host Sleep */ 320 if (!mwifiex_enable_hs(adapter)) { 321 mwifiex_dbg(adapter, ERROR, 322 "cmd: failed to suspend\n"); 323 clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags); 324 mwifiex_disable_wake(adapter); 325 return -EFAULT; 326 } 327 328 flush_workqueue(adapter->workqueue); 329 330 /* Indicate device suspended */ 331 set_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags); 332 clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags); 333 334 return 0; 335} 336 337/* 338 * Kernel needs to suspend all functions separately. Therefore all 339 * registered functions must have drivers with suspend and resume 340 * methods. Failing that the kernel simply removes the whole card. 341 * 342 * If already not resumed, this function turns on the traffic and 343 * sends a host sleep cancel request to the firmware. 344 */ 345static int mwifiex_pcie_resume(struct device *dev) 346{ 347 struct mwifiex_adapter *adapter; 348 struct pcie_service_card *card = dev_get_drvdata(dev); 349 350 351 if (!card->adapter) { 352 dev_err(dev, "adapter structure is not valid\n"); 353 return 0; 354 } 355 356 adapter = card->adapter; 357 358 if (!test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) { 359 mwifiex_dbg(adapter, WARN, 360 "Device already resumed\n"); 361 return 0; 362 } 363 364 clear_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags); 365 366 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA), 367 MWIFIEX_ASYNC_CMD); 368 mwifiex_disable_wake(adapter); 369 370 return 0; 371} 372#endif 373 374/* 375 * This function probes an mwifiex device and registers it. It allocates 376 * the card structure, enables PCIE function number and initiates the 377 * device registration and initialization procedure by adding a logical 378 * interface. 379 */ 380static int mwifiex_pcie_probe(struct pci_dev *pdev, 381 const struct pci_device_id *ent) 382{ 383 struct pcie_service_card *card; 384 int ret; 385 386 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n", 387 pdev->vendor, pdev->device, pdev->revision); 388 389 card = devm_kzalloc(&pdev->dev, sizeof(*card), GFP_KERNEL); 390 if (!card) 391 return -ENOMEM; 392 393 init_completion(&card->fw_done); 394 395 card->dev = pdev; 396 397 if (ent->driver_data) { 398 struct mwifiex_pcie_device *data = (void *)ent->driver_data; 399 card->pcie.reg = data->reg; 400 card->pcie.blksz_fw_dl = data->blksz_fw_dl; 401 card->pcie.tx_buf_size = data->tx_buf_size; 402 card->pcie.can_dump_fw = data->can_dump_fw; 403 card->pcie.mem_type_mapping_tbl = data->mem_type_mapping_tbl; 404 card->pcie.num_mem_types = data->num_mem_types; 405 card->pcie.can_ext_scan = data->can_ext_scan; 406 INIT_WORK(&card->work, mwifiex_pcie_work); 407 } 408 409 /* device tree node parsing and platform specific configuration*/ 410 if (pdev->dev.of_node) { 411 ret = mwifiex_pcie_probe_of(&pdev->dev); 412 if (ret) 413 return ret; 414 } 415 416 if (mwifiex_add_card(card, &card->fw_done, &pcie_ops, 417 MWIFIEX_PCIE, &pdev->dev)) { 418 pr_err("%s failed\n", __func__); 419 return -1; 420 } 421 422 return 0; 423} 424 425/* 426 * This function removes the interface and frees up the card structure. 427 */ 428static void mwifiex_pcie_remove(struct pci_dev *pdev) 429{ 430 struct pcie_service_card *card; 431 struct mwifiex_adapter *adapter; 432 struct mwifiex_private *priv; 433 const struct mwifiex_pcie_card_reg *reg; 434 u32 fw_status; 435 int ret; 436 437 card = pci_get_drvdata(pdev); 438 439 wait_for_completion(&card->fw_done); 440 441 adapter = card->adapter; 442 if (!adapter || !adapter->priv_num) 443 return; 444 445 reg = card->pcie.reg; 446 if (reg) 447 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status); 448 else 449 fw_status = -1; 450 451 if (fw_status == FIRMWARE_READY_PCIE && !adapter->mfg_mode) { 452 mwifiex_deauthenticate_all(adapter); 453 454 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); 455 456 mwifiex_disable_auto_ds(priv); 457 458 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN); 459 } 460 461 mwifiex_remove_card(adapter); 462} 463 464static void mwifiex_pcie_shutdown(struct pci_dev *pdev) 465{ 466 mwifiex_pcie_remove(pdev); 467 468 return; 469} 470 471static void mwifiex_pcie_coredump(struct device *dev) 472{ 473 struct pci_dev *pdev; 474 struct pcie_service_card *card; 475 476 pdev = container_of(dev, struct pci_dev, dev); 477 card = pci_get_drvdata(pdev); 478 479 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 480 &card->work_flags)) 481 schedule_work(&card->work); 482} 483 484static const struct pci_device_id mwifiex_ids[] = { 485 { 486 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P, 487 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 488 .driver_data = (unsigned long)&mwifiex_pcie8766, 489 }, 490 { 491 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897, 492 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 493 .driver_data = (unsigned long)&mwifiex_pcie8897, 494 }, 495 { 496 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997, 497 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 498 .driver_data = (unsigned long)&mwifiex_pcie8997, 499 }, 500 { 501 PCIE_VENDOR_ID_V2_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997, 502 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 503 .driver_data = (unsigned long)&mwifiex_pcie8997, 504 }, 505 {}, 506}; 507 508MODULE_DEVICE_TABLE(pci, mwifiex_ids); 509 510/* 511 * Cleanup all software without cleaning anything related to PCIe and HW. 512 */ 513static void mwifiex_pcie_reset_prepare(struct pci_dev *pdev) 514{ 515 struct pcie_service_card *card = pci_get_drvdata(pdev); 516 struct mwifiex_adapter *adapter = card->adapter; 517 518 if (!adapter) { 519 dev_err(&pdev->dev, "%s: adapter structure is not valid\n", 520 __func__); 521 return; 522 } 523 524 mwifiex_dbg(adapter, INFO, 525 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Pre-FLR\n", 526 __func__, pdev->vendor, pdev->device, pdev->revision); 527 528 mwifiex_shutdown_sw(adapter); 529 clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags); 530 clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags); 531 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__); 532 533 card->pci_reset_ongoing = true; 534} 535 536/* 537 * Kernel stores and restores PCIe function context before and after performing 538 * FLR respectively. Reconfigure the software and firmware including firmware 539 * redownload. 540 */ 541static void mwifiex_pcie_reset_done(struct pci_dev *pdev) 542{ 543 struct pcie_service_card *card = pci_get_drvdata(pdev); 544 struct mwifiex_adapter *adapter = card->adapter; 545 int ret; 546 547 if (!adapter) { 548 dev_err(&pdev->dev, "%s: adapter structure is not valid\n", 549 __func__); 550 return; 551 } 552 553 mwifiex_dbg(adapter, INFO, 554 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Post-FLR\n", 555 __func__, pdev->vendor, pdev->device, pdev->revision); 556 557 ret = mwifiex_reinit_sw(adapter); 558 if (ret) 559 dev_err(&pdev->dev, "reinit failed: %d\n", ret); 560 else 561 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__); 562 563 card->pci_reset_ongoing = false; 564} 565 566static const struct pci_error_handlers mwifiex_pcie_err_handler = { 567 .reset_prepare = mwifiex_pcie_reset_prepare, 568 .reset_done = mwifiex_pcie_reset_done, 569}; 570 571#ifdef CONFIG_PM_SLEEP 572/* Power Management Hooks */ 573static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend, 574 mwifiex_pcie_resume); 575#endif 576 577/* PCI Device Driver */ 578static struct pci_driver __refdata mwifiex_pcie = { 579 .name = "mwifiex_pcie", 580 .id_table = mwifiex_ids, 581 .probe = mwifiex_pcie_probe, 582 .remove = mwifiex_pcie_remove, 583 .driver = { 584 .coredump = mwifiex_pcie_coredump, 585#ifdef CONFIG_PM_SLEEP 586 .pm = &mwifiex_pcie_pm_ops, 587#endif 588 }, 589 .shutdown = mwifiex_pcie_shutdown, 590 .err_handler = &mwifiex_pcie_err_handler, 591}; 592 593/* 594 * This function adds delay loop to ensure FW is awake before proceeding. 595 */ 596static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter) 597{ 598 int i = 0; 599 600 while (mwifiex_pcie_ok_to_access_hw(adapter)) { 601 i++; 602 usleep_range(10, 20); 603 /* 50ms max wait */ 604 if (i == 5000) 605 break; 606 } 607 608 return; 609} 610 611static void mwifiex_delay_for_sleep_cookie(struct mwifiex_adapter *adapter, 612 u32 max_delay_loop_cnt) 613{ 614 struct pcie_service_card *card = adapter->card; 615 u8 *buffer; 616 u32 sleep_cookie, count; 617 struct sk_buff *cmdrsp = card->cmdrsp_buf; 618 619 for (count = 0; count < max_delay_loop_cnt; count++) { 620 dma_sync_single_for_cpu(&card->dev->dev, 621 MWIFIEX_SKB_DMA_ADDR(cmdrsp), 622 sizeof(sleep_cookie), DMA_FROM_DEVICE); 623 buffer = cmdrsp->data; 624 sleep_cookie = get_unaligned_le32(buffer); 625 626 if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) { 627 mwifiex_dbg(adapter, INFO, 628 "sleep cookie found at count %d\n", count); 629 break; 630 } 631 dma_sync_single_for_device(&card->dev->dev, 632 MWIFIEX_SKB_DMA_ADDR(cmdrsp), 633 sizeof(sleep_cookie), 634 DMA_FROM_DEVICE); 635 usleep_range(20, 30); 636 } 637 638 if (count >= max_delay_loop_cnt) 639 mwifiex_dbg(adapter, INFO, 640 "max count reached while accessing sleep cookie\n"); 641} 642 643#define N_WAKEUP_TRIES_SHORT_INTERVAL 15 644#define N_WAKEUP_TRIES_LONG_INTERVAL 35 645 646/* This function wakes up the card by reading fw_status register. */ 647static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter) 648{ 649 struct pcie_service_card *card = adapter->card; 650 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 651 int retval; 652 653 mwifiex_dbg(adapter, EVENT, 654 "event: Wakeup device...\n"); 655 656 if (reg->sleep_cookie) 657 mwifiex_pcie_dev_wakeup_delay(adapter); 658 659 /* The 88W8897 PCIe+USB firmware (latest version 15.68.19.p21) sometimes 660 * appears to ignore or miss our wakeup request, so we continue trying 661 * until we receive an interrupt from the card. 662 */ 663 if (read_poll_timeout(mwifiex_write_reg, retval, 664 READ_ONCE(adapter->int_status) != 0, 665 500, 500 * N_WAKEUP_TRIES_SHORT_INTERVAL, 666 false, 667 adapter, reg->fw_status, FIRMWARE_READY_PCIE)) { 668 if (read_poll_timeout(mwifiex_write_reg, retval, 669 READ_ONCE(adapter->int_status) != 0, 670 10000, 10000 * N_WAKEUP_TRIES_LONG_INTERVAL, 671 false, 672 adapter, reg->fw_status, FIRMWARE_READY_PCIE)) { 673 mwifiex_dbg(adapter, ERROR, 674 "Firmware didn't wake up\n"); 675 return -EIO; 676 } 677 } 678 679 if (reg->sleep_cookie) { 680 mwifiex_pcie_dev_wakeup_delay(adapter); 681 mwifiex_dbg(adapter, INFO, 682 "PCIE wakeup: Setting PS_STATE_AWAKE\n"); 683 adapter->ps_state = PS_STATE_AWAKE; 684 } 685 686 return 0; 687} 688 689/* 690 * This function is called after the card has woken up. 691 * 692 * The card configuration register is reset. 693 */ 694static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter) 695{ 696 mwifiex_dbg(adapter, CMD, 697 "cmd: Wakeup device completed\n"); 698 699 return 0; 700} 701 702/* 703 * This function disables the host interrupt. 704 * 705 * The host interrupt mask is read, the disable bit is reset and 706 * written back to the card host interrupt mask register. 707 */ 708static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter) 709{ 710 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 711 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, 712 0x00000000)) { 713 mwifiex_dbg(adapter, ERROR, 714 "Disable host interrupt failed\n"); 715 return -1; 716 } 717 } 718 719 atomic_set(&adapter->tx_hw_pending, 0); 720 return 0; 721} 722 723static void mwifiex_pcie_disable_host_int_noerr(struct mwifiex_adapter *adapter) 724{ 725 WARN_ON(mwifiex_pcie_disable_host_int(adapter)); 726} 727 728/* 729 * This function enables the host interrupt. 730 * 731 * The host interrupt enable mask is written to the card 732 * host interrupt mask register. 733 */ 734static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter) 735{ 736 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 737 /* Simply write the mask to the register */ 738 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, 739 HOST_INTR_MASK)) { 740 mwifiex_dbg(adapter, ERROR, 741 "Enable host interrupt failed\n"); 742 return -1; 743 } 744 } 745 746 return 0; 747} 748 749/* 750 * This function initializes TX buffer ring descriptors 751 */ 752static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter) 753{ 754 struct pcie_service_card *card = adapter->card; 755 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 756 struct mwifiex_pcie_buf_desc *desc; 757 struct mwifiex_pfu_buf_desc *desc2; 758 int i; 759 760 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 761 card->tx_buf_list[i] = NULL; 762 if (reg->pfu_enabled) { 763 card->txbd_ring[i] = (void *)card->txbd_ring_vbase + 764 (sizeof(*desc2) * i); 765 desc2 = card->txbd_ring[i]; 766 memset(desc2, 0, sizeof(*desc2)); 767 } else { 768 card->txbd_ring[i] = (void *)card->txbd_ring_vbase + 769 (sizeof(*desc) * i); 770 desc = card->txbd_ring[i]; 771 memset(desc, 0, sizeof(*desc)); 772 } 773 } 774 775 return 0; 776} 777 778/* This function initializes RX buffer ring descriptors. Each SKB is allocated 779 * here and after mapping PCI memory, its physical address is assigned to 780 * PCIE Rx buffer descriptor's physical address. 781 */ 782static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter) 783{ 784 struct pcie_service_card *card = adapter->card; 785 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 786 struct sk_buff *skb; 787 struct mwifiex_pcie_buf_desc *desc; 788 struct mwifiex_pfu_buf_desc *desc2; 789 dma_addr_t buf_pa; 790 int i; 791 792 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 793 /* Allocate skb here so that firmware can DMA data from it */ 794 skb = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE, 795 GFP_KERNEL); 796 if (!skb) { 797 mwifiex_dbg(adapter, ERROR, 798 "Unable to allocate skb for RX ring.\n"); 799 return -ENOMEM; 800 } 801 802 if (mwifiex_map_pci_memory(adapter, skb, 803 MWIFIEX_RX_DATA_BUF_SIZE, 804 DMA_FROM_DEVICE)) { 805 kfree_skb(skb); 806 return -ENOMEM; 807 } 808 809 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 810 811 mwifiex_dbg(adapter, INFO, 812 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", 813 skb, skb->len, skb->data, (u32)buf_pa, 814 (u32)((u64)buf_pa >> 32)); 815 816 card->rx_buf_list[i] = skb; 817 if (reg->pfu_enabled) { 818 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase + 819 (sizeof(*desc2) * i); 820 desc2 = card->rxbd_ring[i]; 821 desc2->paddr = buf_pa; 822 desc2->len = (u16)skb->len; 823 desc2->frag_len = (u16)skb->len; 824 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop; 825 desc2->offset = 0; 826 } else { 827 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase + 828 (sizeof(*desc) * i)); 829 desc = card->rxbd_ring[i]; 830 desc->paddr = buf_pa; 831 desc->len = (u16)skb->len; 832 desc->flags = 0; 833 } 834 } 835 836 return 0; 837} 838 839/* This function initializes event buffer ring descriptors. Each SKB is 840 * allocated here and after mapping PCI memory, its physical address is assigned 841 * to PCIE Rx buffer descriptor's physical address 842 */ 843static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter) 844{ 845 struct pcie_service_card *card = adapter->card; 846 struct mwifiex_evt_buf_desc *desc; 847 struct sk_buff *skb; 848 dma_addr_t buf_pa; 849 int i; 850 851 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { 852 /* Allocate skb here so that firmware can DMA data from it */ 853 skb = dev_alloc_skb(MAX_EVENT_SIZE); 854 if (!skb) { 855 mwifiex_dbg(adapter, ERROR, 856 "Unable to allocate skb for EVENT buf.\n"); 857 return -ENOMEM; 858 } 859 skb_put(skb, MAX_EVENT_SIZE); 860 861 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE, 862 DMA_FROM_DEVICE)) { 863 kfree_skb(skb); 864 return -ENOMEM; 865 } 866 867 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 868 869 mwifiex_dbg(adapter, EVENT, 870 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", 871 skb, skb->len, skb->data, (u32)buf_pa, 872 (u32)((u64)buf_pa >> 32)); 873 874 card->evt_buf_list[i] = skb; 875 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase + 876 (sizeof(*desc) * i)); 877 desc = card->evtbd_ring[i]; 878 desc->paddr = buf_pa; 879 desc->len = (u16)skb->len; 880 desc->flags = 0; 881 } 882 883 return 0; 884} 885 886/* This function cleans up TX buffer rings. If any of the buffer list has valid 887 * SKB address, associated SKB is freed. 888 */ 889static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter) 890{ 891 struct pcie_service_card *card = adapter->card; 892 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 893 struct sk_buff *skb; 894 struct mwifiex_pcie_buf_desc *desc; 895 struct mwifiex_pfu_buf_desc *desc2; 896 int i; 897 898 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 899 if (reg->pfu_enabled) { 900 desc2 = card->txbd_ring[i]; 901 if (card->tx_buf_list[i]) { 902 skb = card->tx_buf_list[i]; 903 mwifiex_unmap_pci_memory(adapter, skb, 904 DMA_TO_DEVICE); 905 dev_kfree_skb_any(skb); 906 } 907 memset(desc2, 0, sizeof(*desc2)); 908 } else { 909 desc = card->txbd_ring[i]; 910 if (card->tx_buf_list[i]) { 911 skb = card->tx_buf_list[i]; 912 mwifiex_unmap_pci_memory(adapter, skb, 913 DMA_TO_DEVICE); 914 dev_kfree_skb_any(skb); 915 } 916 memset(desc, 0, sizeof(*desc)); 917 } 918 card->tx_buf_list[i] = NULL; 919 } 920 921 atomic_set(&adapter->tx_hw_pending, 0); 922 return; 923} 924 925/* This function cleans up RX buffer rings. If any of the buffer list has valid 926 * SKB address, associated SKB is freed. 927 */ 928static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter) 929{ 930 struct pcie_service_card *card = adapter->card; 931 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 932 struct mwifiex_pcie_buf_desc *desc; 933 struct mwifiex_pfu_buf_desc *desc2; 934 struct sk_buff *skb; 935 int i; 936 937 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { 938 if (reg->pfu_enabled) { 939 desc2 = card->rxbd_ring[i]; 940 if (card->rx_buf_list[i]) { 941 skb = card->rx_buf_list[i]; 942 mwifiex_unmap_pci_memory(adapter, skb, 943 DMA_FROM_DEVICE); 944 dev_kfree_skb_any(skb); 945 } 946 memset(desc2, 0, sizeof(*desc2)); 947 } else { 948 desc = card->rxbd_ring[i]; 949 if (card->rx_buf_list[i]) { 950 skb = card->rx_buf_list[i]; 951 mwifiex_unmap_pci_memory(adapter, skb, 952 DMA_FROM_DEVICE); 953 dev_kfree_skb_any(skb); 954 } 955 memset(desc, 0, sizeof(*desc)); 956 } 957 card->rx_buf_list[i] = NULL; 958 } 959 960 return; 961} 962 963/* This function cleans up event buffer rings. If any of the buffer list has 964 * valid SKB address, associated SKB is freed. 965 */ 966static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter) 967{ 968 struct pcie_service_card *card = adapter->card; 969 struct mwifiex_evt_buf_desc *desc; 970 struct sk_buff *skb; 971 int i; 972 973 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { 974 desc = card->evtbd_ring[i]; 975 if (card->evt_buf_list[i]) { 976 skb = card->evt_buf_list[i]; 977 mwifiex_unmap_pci_memory(adapter, skb, 978 DMA_FROM_DEVICE); 979 dev_kfree_skb_any(skb); 980 } 981 card->evt_buf_list[i] = NULL; 982 memset(desc, 0, sizeof(*desc)); 983 } 984 985 return; 986} 987 988/* This function creates buffer descriptor ring for TX 989 */ 990static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter) 991{ 992 struct pcie_service_card *card = adapter->card; 993 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 994 995 /* 996 * driver maintaines the write pointer and firmware maintaines the read 997 * pointer. The write pointer starts at 0 (zero) while the read pointer 998 * starts at zero with rollover bit set 999 */ 1000 card->txbd_wrptr = 0; 1001 1002 if (reg->pfu_enabled) 1003 card->txbd_rdptr = 0; 1004 else 1005 card->txbd_rdptr |= reg->tx_rollover_ind; 1006 1007 /* allocate shared memory for the BD ring and divide the same in to 1008 several descriptors */ 1009 if (reg->pfu_enabled) 1010 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * 1011 MWIFIEX_MAX_TXRX_BD; 1012 else 1013 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * 1014 MWIFIEX_MAX_TXRX_BD; 1015 1016 mwifiex_dbg(adapter, INFO, 1017 "info: txbd_ring: Allocating %d bytes\n", 1018 card->txbd_ring_size); 1019 card->txbd_ring_vbase = dma_alloc_coherent(&card->dev->dev, 1020 card->txbd_ring_size, 1021 &card->txbd_ring_pbase, 1022 GFP_KERNEL); 1023 if (!card->txbd_ring_vbase) { 1024 mwifiex_dbg(adapter, ERROR, 1025 "allocate coherent memory (%d bytes) failed!\n", 1026 card->txbd_ring_size); 1027 return -ENOMEM; 1028 } 1029 1030 mwifiex_dbg(adapter, DATA, 1031 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %#x\n", 1032 card->txbd_ring_vbase, (u32)card->txbd_ring_pbase, 1033 (u32)((u64)card->txbd_ring_pbase >> 32), 1034 card->txbd_ring_size); 1035 1036 return mwifiex_init_txq_ring(adapter); 1037} 1038 1039static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter) 1040{ 1041 struct pcie_service_card *card = adapter->card; 1042 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1043 1044 mwifiex_cleanup_txq_ring(adapter); 1045 1046 if (card->txbd_ring_vbase) 1047 dma_free_coherent(&card->dev->dev, card->txbd_ring_size, 1048 card->txbd_ring_vbase, 1049 card->txbd_ring_pbase); 1050 card->txbd_ring_size = 0; 1051 card->txbd_wrptr = 0; 1052 card->txbd_rdptr = 0 | reg->tx_rollover_ind; 1053 card->txbd_ring_vbase = NULL; 1054 card->txbd_ring_pbase = 0; 1055 1056 return 0; 1057} 1058 1059/* 1060 * This function creates buffer descriptor ring for RX 1061 */ 1062static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter) 1063{ 1064 int ret; 1065 struct pcie_service_card *card = adapter->card; 1066 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1067 1068 /* 1069 * driver maintaines the read pointer and firmware maintaines the write 1070 * pointer. The write pointer starts at 0 (zero) while the read pointer 1071 * starts at zero with rollover bit set 1072 */ 1073 card->rxbd_wrptr = 0; 1074 card->rxbd_rdptr = reg->rx_rollover_ind; 1075 1076 if (reg->pfu_enabled) 1077 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * 1078 MWIFIEX_MAX_TXRX_BD; 1079 else 1080 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * 1081 MWIFIEX_MAX_TXRX_BD; 1082 1083 mwifiex_dbg(adapter, INFO, 1084 "info: rxbd_ring: Allocating %d bytes\n", 1085 card->rxbd_ring_size); 1086 card->rxbd_ring_vbase = dma_alloc_coherent(&card->dev->dev, 1087 card->rxbd_ring_size, 1088 &card->rxbd_ring_pbase, 1089 GFP_KERNEL); 1090 if (!card->rxbd_ring_vbase) { 1091 mwifiex_dbg(adapter, ERROR, 1092 "allocate coherent memory (%d bytes) failed!\n", 1093 card->rxbd_ring_size); 1094 return -ENOMEM; 1095 } 1096 1097 mwifiex_dbg(adapter, DATA, 1098 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n", 1099 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase, 1100 (u32)((u64)card->rxbd_ring_pbase >> 32), 1101 card->rxbd_ring_size); 1102 1103 ret = mwifiex_init_rxq_ring(adapter); 1104 if (ret) 1105 mwifiex_pcie_delete_rxbd_ring(adapter); 1106 return ret; 1107} 1108 1109/* 1110 * This function deletes Buffer descriptor ring for RX 1111 */ 1112static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter) 1113{ 1114 struct pcie_service_card *card = adapter->card; 1115 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1116 1117 mwifiex_cleanup_rxq_ring(adapter); 1118 1119 if (card->rxbd_ring_vbase) 1120 dma_free_coherent(&card->dev->dev, card->rxbd_ring_size, 1121 card->rxbd_ring_vbase, 1122 card->rxbd_ring_pbase); 1123 card->rxbd_ring_size = 0; 1124 card->rxbd_wrptr = 0; 1125 card->rxbd_rdptr = 0 | reg->rx_rollover_ind; 1126 card->rxbd_ring_vbase = NULL; 1127 card->rxbd_ring_pbase = 0; 1128 1129 return 0; 1130} 1131 1132/* 1133 * This function creates buffer descriptor ring for Events 1134 */ 1135static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter) 1136{ 1137 int ret; 1138 struct pcie_service_card *card = adapter->card; 1139 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1140 1141 /* 1142 * driver maintaines the read pointer and firmware maintaines the write 1143 * pointer. The write pointer starts at 0 (zero) while the read pointer 1144 * starts at zero with rollover bit set 1145 */ 1146 card->evtbd_wrptr = 0; 1147 card->evtbd_rdptr = reg->evt_rollover_ind; 1148 1149 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) * 1150 MWIFIEX_MAX_EVT_BD; 1151 1152 mwifiex_dbg(adapter, INFO, 1153 "info: evtbd_ring: Allocating %d bytes\n", 1154 card->evtbd_ring_size); 1155 card->evtbd_ring_vbase = dma_alloc_coherent(&card->dev->dev, 1156 card->evtbd_ring_size, 1157 &card->evtbd_ring_pbase, 1158 GFP_KERNEL); 1159 if (!card->evtbd_ring_vbase) { 1160 mwifiex_dbg(adapter, ERROR, 1161 "allocate coherent memory (%d bytes) failed!\n", 1162 card->evtbd_ring_size); 1163 return -ENOMEM; 1164 } 1165 1166 mwifiex_dbg(adapter, EVENT, 1167 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n", 1168 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase, 1169 (u32)((u64)card->evtbd_ring_pbase >> 32), 1170 card->evtbd_ring_size); 1171 1172 ret = mwifiex_pcie_init_evt_ring(adapter); 1173 if (ret) 1174 mwifiex_pcie_delete_evtbd_ring(adapter); 1175 return ret; 1176} 1177 1178/* 1179 * This function deletes Buffer descriptor ring for Events 1180 */ 1181static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter) 1182{ 1183 struct pcie_service_card *card = adapter->card; 1184 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1185 1186 mwifiex_cleanup_evt_ring(adapter); 1187 1188 if (card->evtbd_ring_vbase) 1189 dma_free_coherent(&card->dev->dev, card->evtbd_ring_size, 1190 card->evtbd_ring_vbase, 1191 card->evtbd_ring_pbase); 1192 card->evtbd_wrptr = 0; 1193 card->evtbd_rdptr = 0 | reg->evt_rollover_ind; 1194 card->evtbd_ring_size = 0; 1195 card->evtbd_ring_vbase = NULL; 1196 card->evtbd_ring_pbase = 0; 1197 1198 return 0; 1199} 1200 1201/* 1202 * This function allocates a buffer for CMDRSP 1203 */ 1204static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter) 1205{ 1206 struct pcie_service_card *card = adapter->card; 1207 struct sk_buff *skb; 1208 1209 /* Allocate memory for receiving command response data */ 1210 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); 1211 if (!skb) { 1212 mwifiex_dbg(adapter, ERROR, 1213 "Unable to allocate skb for command response data.\n"); 1214 return -ENOMEM; 1215 } 1216 skb_put(skb, MWIFIEX_UPLD_SIZE); 1217 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1218 DMA_FROM_DEVICE)) { 1219 kfree_skb(skb); 1220 return -1; 1221 } 1222 1223 card->cmdrsp_buf = skb; 1224 1225 return 0; 1226} 1227 1228/* 1229 * This function deletes a buffer for CMDRSP 1230 */ 1231static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter) 1232{ 1233 struct pcie_service_card *card; 1234 1235 if (!adapter) 1236 return 0; 1237 1238 card = adapter->card; 1239 1240 if (card && card->cmdrsp_buf) { 1241 mwifiex_unmap_pci_memory(adapter, card->cmdrsp_buf, 1242 DMA_FROM_DEVICE); 1243 dev_kfree_skb_any(card->cmdrsp_buf); 1244 card->cmdrsp_buf = NULL; 1245 } 1246 1247 if (card && card->cmd_buf) { 1248 mwifiex_unmap_pci_memory(adapter, card->cmd_buf, 1249 DMA_TO_DEVICE); 1250 dev_kfree_skb_any(card->cmd_buf); 1251 card->cmd_buf = NULL; 1252 } 1253 return 0; 1254} 1255 1256/* 1257 * This function allocates a buffer for sleep cookie 1258 */ 1259static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter) 1260{ 1261 struct pcie_service_card *card = adapter->card; 1262 u32 *cookie; 1263 1264 card->sleep_cookie_vbase = dma_alloc_coherent(&card->dev->dev, 1265 sizeof(u32), 1266 &card->sleep_cookie_pbase, 1267 GFP_KERNEL); 1268 if (!card->sleep_cookie_vbase) { 1269 mwifiex_dbg(adapter, ERROR, 1270 "dma_alloc_coherent failed!\n"); 1271 return -ENOMEM; 1272 } 1273 cookie = (u32 *)card->sleep_cookie_vbase; 1274 /* Init val of Sleep Cookie */ 1275 *cookie = FW_AWAKE_COOKIE; 1276 1277 mwifiex_dbg(adapter, INFO, "alloc_scook: sleep cookie=0x%x\n", *cookie); 1278 1279 return 0; 1280} 1281 1282/* 1283 * This function deletes buffer for sleep cookie 1284 */ 1285static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter) 1286{ 1287 struct pcie_service_card *card; 1288 1289 if (!adapter) 1290 return 0; 1291 1292 card = adapter->card; 1293 1294 if (card && card->sleep_cookie_vbase) { 1295 dma_free_coherent(&card->dev->dev, sizeof(u32), 1296 card->sleep_cookie_vbase, 1297 card->sleep_cookie_pbase); 1298 card->sleep_cookie_vbase = NULL; 1299 } 1300 1301 return 0; 1302} 1303 1304/* This function flushes the TX buffer descriptor ring 1305 * This function defined as handler is also called while cleaning TXRX 1306 * during disconnect/ bss stop. 1307 */ 1308static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter) 1309{ 1310 struct pcie_service_card *card = adapter->card; 1311 1312 if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) { 1313 card->txbd_flush = 1; 1314 /* write pointer already set at last send 1315 * send dnld-rdy intr again, wait for completion. 1316 */ 1317 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1318 CPU_INTR_DNLD_RDY)) { 1319 mwifiex_dbg(adapter, ERROR, 1320 "failed to assert dnld-rdy interrupt.\n"); 1321 return -1; 1322 } 1323 } 1324 return 0; 1325} 1326 1327/* 1328 * This function unmaps and frees downloaded data buffer 1329 */ 1330static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter) 1331{ 1332 struct sk_buff *skb; 1333 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0; 1334 struct mwifiex_pcie_buf_desc *desc; 1335 struct mwifiex_pfu_buf_desc *desc2; 1336 struct pcie_service_card *card = adapter->card; 1337 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1338 1339 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1340 mwifiex_pm_wakeup_card(adapter); 1341 1342 /* Read the TX ring read pointer set by firmware */ 1343 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) { 1344 mwifiex_dbg(adapter, ERROR, 1345 "SEND COMP: failed to read reg->tx_rdptr\n"); 1346 return -1; 1347 } 1348 1349 mwifiex_dbg(adapter, DATA, 1350 "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n", 1351 card->txbd_rdptr, rdptr); 1352 1353 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; 1354 /* free from previous txbd_rdptr to current txbd_rdptr */ 1355 while (((card->txbd_rdptr & reg->tx_mask) != 1356 (rdptr & reg->tx_mask)) || 1357 ((card->txbd_rdptr & reg->tx_rollover_ind) != 1358 (rdptr & reg->tx_rollover_ind))) { 1359 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >> 1360 reg->tx_start_ptr; 1361 1362 skb = card->tx_buf_list[wrdoneidx]; 1363 1364 if (skb) { 1365 mwifiex_dbg(adapter, DATA, 1366 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n", 1367 skb, wrdoneidx); 1368 mwifiex_unmap_pci_memory(adapter, skb, 1369 DMA_TO_DEVICE); 1370 1371 unmap_count++; 1372 1373 if (card->txbd_flush) 1374 mwifiex_write_data_complete(adapter, skb, 0, 1375 -1); 1376 else 1377 mwifiex_write_data_complete(adapter, skb, 0, 0); 1378 atomic_dec(&adapter->tx_hw_pending); 1379 } 1380 1381 card->tx_buf_list[wrdoneidx] = NULL; 1382 1383 if (reg->pfu_enabled) { 1384 desc2 = card->txbd_ring[wrdoneidx]; 1385 memset(desc2, 0, sizeof(*desc2)); 1386 } else { 1387 desc = card->txbd_ring[wrdoneidx]; 1388 memset(desc, 0, sizeof(*desc)); 1389 } 1390 switch (card->dev->device) { 1391 case PCIE_DEVICE_ID_MARVELL_88W8766P: 1392 card->txbd_rdptr++; 1393 break; 1394 case PCIE_DEVICE_ID_MARVELL_88W8897: 1395 case PCIE_DEVICE_ID_MARVELL_88W8997: 1396 card->txbd_rdptr += reg->ring_tx_start_ptr; 1397 break; 1398 } 1399 1400 1401 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs) 1402 card->txbd_rdptr = ((card->txbd_rdptr & 1403 reg->tx_rollover_ind) ^ 1404 reg->tx_rollover_ind); 1405 } 1406 1407 if (unmap_count) 1408 adapter->data_sent = false; 1409 1410 if (card->txbd_flush) { 1411 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) 1412 card->txbd_flush = 0; 1413 else 1414 mwifiex_clean_pcie_ring_buf(adapter); 1415 } 1416 1417 return 0; 1418} 1419 1420/* This function sends data buffer to device. First 4 bytes of payload 1421 * are filled with payload length and payload type. Then this payload 1422 * is mapped to PCI device memory. Tx ring pointers are advanced accordingly. 1423 * Download ready interrupt to FW is deffered if Tx ring is not full and 1424 * additional payload can be accomodated. 1425 * Caller must ensure tx_param parameter to this function is not NULL. 1426 */ 1427static int 1428mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb, 1429 struct mwifiex_tx_param *tx_param) 1430{ 1431 struct pcie_service_card *card = adapter->card; 1432 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1433 u32 wrindx, num_tx_buffs, rx_val; 1434 int ret; 1435 dma_addr_t buf_pa; 1436 struct mwifiex_pcie_buf_desc *desc = NULL; 1437 struct mwifiex_pfu_buf_desc *desc2 = NULL; 1438 1439 if (!(skb->data && skb->len)) { 1440 mwifiex_dbg(adapter, ERROR, 1441 "%s(): invalid parameter <%p, %#x>\n", 1442 __func__, skb->data, skb->len); 1443 return -1; 1444 } 1445 1446 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1447 mwifiex_pm_wakeup_card(adapter); 1448 1449 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; 1450 mwifiex_dbg(adapter, DATA, 1451 "info: SEND DATA: <Rd: %#x, Wr: %#x>\n", 1452 card->txbd_rdptr, card->txbd_wrptr); 1453 if (mwifiex_pcie_txbd_not_full(card)) { 1454 u8 *payload; 1455 1456 adapter->data_sent = true; 1457 payload = skb->data; 1458 put_unaligned_le16((u16)skb->len, payload + 0); 1459 put_unaligned_le16(MWIFIEX_TYPE_DATA, payload + 2); 1460 1461 if (mwifiex_map_pci_memory(adapter, skb, skb->len, 1462 DMA_TO_DEVICE)) 1463 return -1; 1464 1465 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr; 1466 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 1467 card->tx_buf_list[wrindx] = skb; 1468 atomic_inc(&adapter->tx_hw_pending); 1469 1470 if (reg->pfu_enabled) { 1471 desc2 = card->txbd_ring[wrindx]; 1472 desc2->paddr = buf_pa; 1473 desc2->len = (u16)skb->len; 1474 desc2->frag_len = (u16)skb->len; 1475 desc2->offset = 0; 1476 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC | 1477 MWIFIEX_BD_FLAG_LAST_DESC; 1478 } else { 1479 desc = card->txbd_ring[wrindx]; 1480 desc->paddr = buf_pa; 1481 desc->len = (u16)skb->len; 1482 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC | 1483 MWIFIEX_BD_FLAG_LAST_DESC; 1484 } 1485 1486 switch (card->dev->device) { 1487 case PCIE_DEVICE_ID_MARVELL_88W8766P: 1488 card->txbd_wrptr++; 1489 break; 1490 case PCIE_DEVICE_ID_MARVELL_88W8897: 1491 case PCIE_DEVICE_ID_MARVELL_88W8997: 1492 card->txbd_wrptr += reg->ring_tx_start_ptr; 1493 break; 1494 } 1495 1496 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs) 1497 card->txbd_wrptr = ((card->txbd_wrptr & 1498 reg->tx_rollover_ind) ^ 1499 reg->tx_rollover_ind); 1500 1501 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask; 1502 /* Write the TX ring write pointer in to reg->tx_wrptr */ 1503 if (mwifiex_write_reg(adapter, reg->tx_wrptr, 1504 card->txbd_wrptr | rx_val)) { 1505 mwifiex_dbg(adapter, ERROR, 1506 "SEND DATA: failed to write reg->tx_wrptr\n"); 1507 ret = -1; 1508 goto done_unmap; 1509 } 1510 1511 /* The firmware (latest version 15.68.19.p21) of the 88W8897 PCIe+USB card 1512 * seems to crash randomly after setting the TX ring write pointer when 1513 * ASPM powersaving is enabled. A workaround seems to be keeping the bus 1514 * busy by reading a random register afterwards. 1515 */ 1516 mwifiex_read_reg(adapter, PCI_VENDOR_ID, &rx_val); 1517 1518 if ((mwifiex_pcie_txbd_not_full(card)) && 1519 tx_param->next_pkt_len) { 1520 /* have more packets and TxBD still can hold more */ 1521 mwifiex_dbg(adapter, DATA, 1522 "SEND DATA: delay dnld-rdy interrupt.\n"); 1523 adapter->data_sent = false; 1524 } else { 1525 /* Send the TX ready interrupt */ 1526 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1527 CPU_INTR_DNLD_RDY)) { 1528 mwifiex_dbg(adapter, ERROR, 1529 "SEND DATA: failed to assert dnld-rdy interrupt.\n"); 1530 ret = -1; 1531 goto done_unmap; 1532 } 1533 } 1534 mwifiex_dbg(adapter, DATA, 1535 "info: SEND DATA: Updated <Rd: %#x, Wr:\t" 1536 "%#x> and sent packet to firmware successfully\n", 1537 card->txbd_rdptr, card->txbd_wrptr); 1538 } else { 1539 mwifiex_dbg(adapter, DATA, 1540 "info: TX Ring full, can't send packets to fw\n"); 1541 adapter->data_sent = true; 1542 /* Send the TX ready interrupt */ 1543 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1544 CPU_INTR_DNLD_RDY)) 1545 mwifiex_dbg(adapter, ERROR, 1546 "SEND DATA: failed to assert door-bell intr\n"); 1547 return -EBUSY; 1548 } 1549 1550 return -EINPROGRESS; 1551done_unmap: 1552 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE); 1553 card->tx_buf_list[wrindx] = NULL; 1554 atomic_dec(&adapter->tx_hw_pending); 1555 if (reg->pfu_enabled) 1556 memset(desc2, 0, sizeof(*desc2)); 1557 else 1558 memset(desc, 0, sizeof(*desc)); 1559 1560 return ret; 1561} 1562 1563/* 1564 * This function handles received buffer ring and 1565 * dispatches packets to upper 1566 */ 1567static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter) 1568{ 1569 struct pcie_service_card *card = adapter->card; 1570 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1571 u32 wrptr, rd_index, tx_val; 1572 dma_addr_t buf_pa; 1573 int ret = 0; 1574 struct sk_buff *skb_tmp = NULL; 1575 struct mwifiex_pcie_buf_desc *desc; 1576 struct mwifiex_pfu_buf_desc *desc2; 1577 1578 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1579 mwifiex_pm_wakeup_card(adapter); 1580 1581 /* Read the RX ring Write pointer set by firmware */ 1582 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { 1583 mwifiex_dbg(adapter, ERROR, 1584 "RECV DATA: failed to read reg->rx_wrptr\n"); 1585 ret = -1; 1586 goto done; 1587 } 1588 card->rxbd_wrptr = wrptr; 1589 1590 while (((wrptr & reg->rx_mask) != 1591 (card->rxbd_rdptr & reg->rx_mask)) || 1592 ((wrptr & reg->rx_rollover_ind) == 1593 (card->rxbd_rdptr & reg->rx_rollover_ind))) { 1594 struct sk_buff *skb_data; 1595 u16 rx_len; 1596 1597 rd_index = card->rxbd_rdptr & reg->rx_mask; 1598 skb_data = card->rx_buf_list[rd_index]; 1599 1600 /* If skb allocation was failed earlier for Rx packet, 1601 * rx_buf_list[rd_index] would have been left with a NULL. 1602 */ 1603 if (!skb_data) 1604 return -ENOMEM; 1605 1606 mwifiex_unmap_pci_memory(adapter, skb_data, DMA_FROM_DEVICE); 1607 card->rx_buf_list[rd_index] = NULL; 1608 1609 /* Get data length from interface header - 1610 * first 2 bytes for len, next 2 bytes is for type 1611 */ 1612 rx_len = get_unaligned_le16(skb_data->data); 1613 if (WARN_ON(rx_len <= adapter->intf_hdr_len || 1614 rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) { 1615 mwifiex_dbg(adapter, ERROR, 1616 "Invalid RX len %d, Rd=%#x, Wr=%#x\n", 1617 rx_len, card->rxbd_rdptr, wrptr); 1618 dev_kfree_skb_any(skb_data); 1619 } else { 1620 skb_put(skb_data, rx_len); 1621 mwifiex_dbg(adapter, DATA, 1622 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n", 1623 card->rxbd_rdptr, wrptr, rx_len); 1624 skb_pull(skb_data, adapter->intf_hdr_len); 1625 if (adapter->rx_work_enabled) { 1626 skb_queue_tail(&adapter->rx_data_q, skb_data); 1627 adapter->data_received = true; 1628 atomic_inc(&adapter->rx_pending); 1629 } else { 1630 mwifiex_handle_rx_packet(adapter, skb_data); 1631 } 1632 } 1633 1634 skb_tmp = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE, 1635 GFP_KERNEL); 1636 if (!skb_tmp) { 1637 mwifiex_dbg(adapter, ERROR, 1638 "Unable to allocate skb.\n"); 1639 return -ENOMEM; 1640 } 1641 1642 if (mwifiex_map_pci_memory(adapter, skb_tmp, 1643 MWIFIEX_RX_DATA_BUF_SIZE, 1644 DMA_FROM_DEVICE)) 1645 return -1; 1646 1647 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb_tmp); 1648 1649 mwifiex_dbg(adapter, INFO, 1650 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n", 1651 skb_tmp, rd_index); 1652 card->rx_buf_list[rd_index] = skb_tmp; 1653 1654 if (reg->pfu_enabled) { 1655 desc2 = card->rxbd_ring[rd_index]; 1656 desc2->paddr = buf_pa; 1657 desc2->len = skb_tmp->len; 1658 desc2->frag_len = skb_tmp->len; 1659 desc2->offset = 0; 1660 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop; 1661 } else { 1662 desc = card->rxbd_ring[rd_index]; 1663 desc->paddr = buf_pa; 1664 desc->len = skb_tmp->len; 1665 desc->flags = 0; 1666 } 1667 1668 if ((++card->rxbd_rdptr & reg->rx_mask) == 1669 MWIFIEX_MAX_TXRX_BD) { 1670 card->rxbd_rdptr = ((card->rxbd_rdptr & 1671 reg->rx_rollover_ind) ^ 1672 reg->rx_rollover_ind); 1673 } 1674 mwifiex_dbg(adapter, DATA, 1675 "info: RECV DATA: <Rd: %#x, Wr: %#x>\n", 1676 card->rxbd_rdptr, wrptr); 1677 1678 tx_val = card->txbd_wrptr & reg->tx_wrap_mask; 1679 /* Write the RX ring read pointer in to reg->rx_rdptr */ 1680 if (mwifiex_write_reg(adapter, reg->rx_rdptr, 1681 card->rxbd_rdptr | tx_val)) { 1682 mwifiex_dbg(adapter, DATA, 1683 "RECV DATA: failed to write reg->rx_rdptr\n"); 1684 ret = -1; 1685 goto done; 1686 } 1687 1688 /* Read the RX ring Write pointer set by firmware */ 1689 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { 1690 mwifiex_dbg(adapter, ERROR, 1691 "RECV DATA: failed to read reg->rx_wrptr\n"); 1692 ret = -1; 1693 goto done; 1694 } 1695 mwifiex_dbg(adapter, DATA, 1696 "info: RECV DATA: Rcvd packet from fw successfully\n"); 1697 card->rxbd_wrptr = wrptr; 1698 } 1699 1700done: 1701 return ret; 1702} 1703 1704/* 1705 * This function downloads the boot command to device 1706 */ 1707static int 1708mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) 1709{ 1710 dma_addr_t buf_pa; 1711 struct pcie_service_card *card = adapter->card; 1712 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1713 1714 if (!(skb->data && skb->len)) { 1715 mwifiex_dbg(adapter, ERROR, 1716 "Invalid parameter in %s <%p. len %d>\n", 1717 __func__, skb->data, skb->len); 1718 return -1; 1719 } 1720 1721 if (mwifiex_map_pci_memory(adapter, skb, skb->len, DMA_TO_DEVICE)) 1722 return -1; 1723 1724 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb); 1725 1726 /* Write the lower 32bits of the physical address to low command 1727 * address scratch register 1728 */ 1729 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) { 1730 mwifiex_dbg(adapter, ERROR, 1731 "%s: failed to write download command to boot code.\n", 1732 __func__); 1733 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE); 1734 return -1; 1735 } 1736 1737 /* Write the upper 32bits of the physical address to high command 1738 * address scratch register 1739 */ 1740 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, 1741 (u32)((u64)buf_pa >> 32))) { 1742 mwifiex_dbg(adapter, ERROR, 1743 "%s: failed to write download command to boot code.\n", 1744 __func__); 1745 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE); 1746 return -1; 1747 } 1748 1749 /* Write the command length to cmd_size scratch register */ 1750 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) { 1751 mwifiex_dbg(adapter, ERROR, 1752 "%s: failed to write command len to cmd_size scratch reg\n", 1753 __func__); 1754 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE); 1755 return -1; 1756 } 1757 1758 /* Ring the door bell */ 1759 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1760 CPU_INTR_DOOR_BELL)) { 1761 mwifiex_dbg(adapter, ERROR, 1762 "%s: failed to assert door-bell intr\n", __func__); 1763 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE); 1764 return -1; 1765 } 1766 1767 return 0; 1768} 1769 1770/* This function init rx port in firmware which in turn enables to receive data 1771 * from device before transmitting any packet. 1772 */ 1773static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter) 1774{ 1775 struct pcie_service_card *card = adapter->card; 1776 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1777 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask; 1778 1779 /* Write the RX ring read pointer in to reg->rx_rdptr */ 1780 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr | 1781 tx_wrap)) { 1782 mwifiex_dbg(adapter, ERROR, 1783 "RECV DATA: failed to write reg->rx_rdptr\n"); 1784 return -1; 1785 } 1786 return 0; 1787} 1788 1789/* This function downloads commands to the device 1790 */ 1791static int 1792mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) 1793{ 1794 struct pcie_service_card *card = adapter->card; 1795 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1796 int ret = 0; 1797 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa; 1798 u8 *payload = (u8 *)skb->data; 1799 1800 if (!(skb->data && skb->len)) { 1801 mwifiex_dbg(adapter, ERROR, 1802 "Invalid parameter in %s <%p, %#x>\n", 1803 __func__, skb->data, skb->len); 1804 return -1; 1805 } 1806 1807 /* Make sure a command response buffer is available */ 1808 if (!card->cmdrsp_buf) { 1809 mwifiex_dbg(adapter, ERROR, 1810 "No response buffer available, send command failed\n"); 1811 return -EBUSY; 1812 } 1813 1814 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 1815 mwifiex_pm_wakeup_card(adapter); 1816 1817 adapter->cmd_sent = true; 1818 1819 put_unaligned_le16((u16)skb->len, &payload[0]); 1820 put_unaligned_le16(MWIFIEX_TYPE_CMD, &payload[2]); 1821 1822 if (mwifiex_map_pci_memory(adapter, skb, skb->len, DMA_TO_DEVICE)) 1823 return -1; 1824 1825 card->cmd_buf = skb; 1826 /* 1827 * Need to keep a reference, since core driver might free up this 1828 * buffer before we've unmapped it. 1829 */ 1830 skb_get(skb); 1831 1832 /* To send a command, the driver will: 1833 1. Write the 64bit physical address of the data buffer to 1834 cmd response address low + cmd response address high 1835 2. Ring the door bell (i.e. set the door bell interrupt) 1836 1837 In response to door bell interrupt, the firmware will perform 1838 the DMA of the command packet (first header to obtain the total 1839 length and then rest of the command). 1840 */ 1841 1842 if (card->cmdrsp_buf) { 1843 cmdrsp_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmdrsp_buf); 1844 /* Write the lower 32bits of the cmdrsp buffer physical 1845 address */ 1846 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 1847 (u32)cmdrsp_buf_pa)) { 1848 mwifiex_dbg(adapter, ERROR, 1849 "Failed to write download cmd to boot code.\n"); 1850 ret = -1; 1851 goto done; 1852 } 1853 /* Write the upper 32bits of the cmdrsp buffer physical 1854 address */ 1855 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 1856 (u32)((u64)cmdrsp_buf_pa >> 32))) { 1857 mwifiex_dbg(adapter, ERROR, 1858 "Failed to write download cmd to boot code.\n"); 1859 ret = -1; 1860 goto done; 1861 } 1862 } 1863 1864 cmd_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmd_buf); 1865 /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */ 1866 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, 1867 (u32)cmd_buf_pa)) { 1868 mwifiex_dbg(adapter, ERROR, 1869 "Failed to write download cmd to boot code.\n"); 1870 ret = -1; 1871 goto done; 1872 } 1873 /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */ 1874 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, 1875 (u32)((u64)cmd_buf_pa >> 32))) { 1876 mwifiex_dbg(adapter, ERROR, 1877 "Failed to write download cmd to boot code.\n"); 1878 ret = -1; 1879 goto done; 1880 } 1881 1882 /* Write the command length to reg->cmd_size */ 1883 if (mwifiex_write_reg(adapter, reg->cmd_size, 1884 card->cmd_buf->len)) { 1885 mwifiex_dbg(adapter, ERROR, 1886 "Failed to write cmd len to reg->cmd_size\n"); 1887 ret = -1; 1888 goto done; 1889 } 1890 1891 /* Ring the door bell */ 1892 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 1893 CPU_INTR_DOOR_BELL)) { 1894 mwifiex_dbg(adapter, ERROR, 1895 "Failed to assert door-bell intr\n"); 1896 ret = -1; 1897 goto done; 1898 } 1899 1900done: 1901 if (ret) 1902 adapter->cmd_sent = false; 1903 1904 return 0; 1905} 1906 1907/* 1908 * This function handles command complete interrupt 1909 */ 1910static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter) 1911{ 1912 struct pcie_service_card *card = adapter->card; 1913 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 1914 struct sk_buff *skb = card->cmdrsp_buf; 1915 int count = 0; 1916 u16 rx_len; 1917 1918 mwifiex_dbg(adapter, CMD, 1919 "info: Rx CMD Response\n"); 1920 1921 if (adapter->curr_cmd) 1922 mwifiex_unmap_pci_memory(adapter, skb, DMA_FROM_DEVICE); 1923 else 1924 dma_sync_single_for_cpu(&card->dev->dev, 1925 MWIFIEX_SKB_DMA_ADDR(skb), 1926 MWIFIEX_UPLD_SIZE, DMA_FROM_DEVICE); 1927 1928 /* Unmap the command as a response has been received. */ 1929 if (card->cmd_buf) { 1930 mwifiex_unmap_pci_memory(adapter, card->cmd_buf, 1931 DMA_TO_DEVICE); 1932 dev_kfree_skb_any(card->cmd_buf); 1933 card->cmd_buf = NULL; 1934 } 1935 1936 rx_len = get_unaligned_le16(skb->data); 1937 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); 1938 skb_trim(skb, rx_len); 1939 1940 if (!adapter->curr_cmd) { 1941 if (adapter->ps_state == PS_STATE_SLEEP_CFM) { 1942 dma_sync_single_for_device(&card->dev->dev, 1943 MWIFIEX_SKB_DMA_ADDR(skb), 1944 MWIFIEX_SLEEP_COOKIE_SIZE, 1945 DMA_FROM_DEVICE); 1946 if (mwifiex_write_reg(adapter, 1947 PCIE_CPU_INT_EVENT, 1948 CPU_INTR_SLEEP_CFM_DONE)) { 1949 mwifiex_dbg(adapter, ERROR, 1950 "Write register failed\n"); 1951 return -1; 1952 } 1953 mwifiex_delay_for_sleep_cookie(adapter, 1954 MWIFIEX_MAX_DELAY_COUNT); 1955 mwifiex_unmap_pci_memory(adapter, skb, 1956 DMA_FROM_DEVICE); 1957 skb_pull(skb, adapter->intf_hdr_len); 1958 while (reg->sleep_cookie && (count++ < 10) && 1959 mwifiex_pcie_ok_to_access_hw(adapter)) 1960 usleep_range(50, 60); 1961 mwifiex_pcie_enable_host_int(adapter); 1962 mwifiex_process_sleep_confirm_resp(adapter, skb->data, 1963 skb->len); 1964 } else { 1965 mwifiex_dbg(adapter, ERROR, 1966 "There is no command but got cmdrsp\n"); 1967 } 1968 memcpy(adapter->upld_buf, skb->data, 1969 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len)); 1970 skb_push(skb, adapter->intf_hdr_len); 1971 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 1972 DMA_FROM_DEVICE)) 1973 return -1; 1974 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) { 1975 skb_pull(skb, adapter->intf_hdr_len); 1976 adapter->curr_cmd->resp_skb = skb; 1977 adapter->cmd_resp_received = true; 1978 /* Take the pointer and set it to CMD node and will 1979 return in the response complete callback */ 1980 card->cmdrsp_buf = NULL; 1981 1982 /* Clear the cmd-rsp buffer address in scratch registers. This 1983 will prevent firmware from writing to the same response 1984 buffer again. */ 1985 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) { 1986 mwifiex_dbg(adapter, ERROR, 1987 "cmd_done: failed to clear cmd_rsp_addr_lo\n"); 1988 return -1; 1989 } 1990 /* Write the upper 32bits of the cmdrsp buffer physical 1991 address */ 1992 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) { 1993 mwifiex_dbg(adapter, ERROR, 1994 "cmd_done: failed to clear cmd_rsp_addr_hi\n"); 1995 return -1; 1996 } 1997 } 1998 1999 return 0; 2000} 2001 2002/* 2003 * Command Response processing complete handler 2004 */ 2005static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter, 2006 struct sk_buff *skb) 2007{ 2008 struct pcie_service_card *card = adapter->card; 2009 2010 if (skb) { 2011 card->cmdrsp_buf = skb; 2012 skb_push(card->cmdrsp_buf, adapter->intf_hdr_len); 2013 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, 2014 DMA_FROM_DEVICE)) 2015 return -1; 2016 } 2017 2018 return 0; 2019} 2020 2021/* 2022 * This function handles firmware event ready interrupt 2023 */ 2024static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter) 2025{ 2026 struct pcie_service_card *card = adapter->card; 2027 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2028 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; 2029 u32 wrptr, event; 2030 struct mwifiex_evt_buf_desc *desc; 2031 2032 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 2033 mwifiex_pm_wakeup_card(adapter); 2034 2035 if (adapter->event_received) { 2036 mwifiex_dbg(adapter, EVENT, 2037 "info: Event being processed,\t" 2038 "do not process this interrupt just yet\n"); 2039 return 0; 2040 } 2041 2042 if (rdptr >= MWIFIEX_MAX_EVT_BD) { 2043 mwifiex_dbg(adapter, ERROR, 2044 "info: Invalid read pointer...\n"); 2045 return -1; 2046 } 2047 2048 /* Read the event ring write pointer set by firmware */ 2049 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { 2050 mwifiex_dbg(adapter, ERROR, 2051 "EventReady: failed to read reg->evt_wrptr\n"); 2052 return -1; 2053 } 2054 2055 mwifiex_dbg(adapter, EVENT, 2056 "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>", 2057 card->evtbd_rdptr, wrptr); 2058 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr 2059 & MWIFIEX_EVTBD_MASK)) || 2060 ((wrptr & reg->evt_rollover_ind) == 2061 (card->evtbd_rdptr & reg->evt_rollover_ind))) { 2062 struct sk_buff *skb_cmd; 2063 __le16 data_len = 0; 2064 u16 evt_len; 2065 2066 mwifiex_dbg(adapter, INFO, 2067 "info: Read Index: %d\n", rdptr); 2068 skb_cmd = card->evt_buf_list[rdptr]; 2069 mwifiex_unmap_pci_memory(adapter, skb_cmd, DMA_FROM_DEVICE); 2070 2071 /* Take the pointer and set it to event pointer in adapter 2072 and will return back after event handling callback */ 2073 card->evt_buf_list[rdptr] = NULL; 2074 desc = card->evtbd_ring[rdptr]; 2075 memset(desc, 0, sizeof(*desc)); 2076 2077 event = get_unaligned_le32( 2078 &skb_cmd->data[adapter->intf_hdr_len]); 2079 adapter->event_cause = event; 2080 /* The first 4bytes will be the event transfer header 2081 len is 2 bytes followed by type which is 2 bytes */ 2082 memcpy(&data_len, skb_cmd->data, sizeof(__le16)); 2083 evt_len = le16_to_cpu(data_len); 2084 skb_trim(skb_cmd, evt_len); 2085 skb_pull(skb_cmd, adapter->intf_hdr_len); 2086 mwifiex_dbg(adapter, EVENT, 2087 "info: Event length: %d\n", evt_len); 2088 2089 if (evt_len > MWIFIEX_EVENT_HEADER_LEN && 2090 evt_len < MAX_EVENT_SIZE) 2091 memcpy(adapter->event_body, skb_cmd->data + 2092 MWIFIEX_EVENT_HEADER_LEN, evt_len - 2093 MWIFIEX_EVENT_HEADER_LEN); 2094 2095 adapter->event_received = true; 2096 adapter->event_skb = skb_cmd; 2097 2098 /* Do not update the event read pointer here, wait till the 2099 buffer is released. This is just to make things simpler, 2100 we need to find a better method of managing these buffers. 2101 */ 2102 } else { 2103 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, 2104 CPU_INTR_EVENT_DONE)) { 2105 mwifiex_dbg(adapter, ERROR, 2106 "Write register failed\n"); 2107 return -1; 2108 } 2109 } 2110 2111 return 0; 2112} 2113 2114/* 2115 * Event processing complete handler 2116 */ 2117static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter, 2118 struct sk_buff *skb) 2119{ 2120 struct pcie_service_card *card = adapter->card; 2121 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2122 int ret = 0; 2123 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; 2124 u32 wrptr; 2125 struct mwifiex_evt_buf_desc *desc; 2126 2127 if (!skb) 2128 return 0; 2129 2130 if (rdptr >= MWIFIEX_MAX_EVT_BD) { 2131 mwifiex_dbg(adapter, ERROR, 2132 "event_complete: Invalid rdptr 0x%x\n", 2133 rdptr); 2134 return -EINVAL; 2135 } 2136 2137 /* Read the event ring write pointer set by firmware */ 2138 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { 2139 mwifiex_dbg(adapter, ERROR, 2140 "event_complete: failed to read reg->evt_wrptr\n"); 2141 return -1; 2142 } 2143 2144 if (!card->evt_buf_list[rdptr]) { 2145 skb_push(skb, adapter->intf_hdr_len); 2146 skb_put(skb, MAX_EVENT_SIZE - skb->len); 2147 if (mwifiex_map_pci_memory(adapter, skb, 2148 MAX_EVENT_SIZE, 2149 DMA_FROM_DEVICE)) 2150 return -1; 2151 card->evt_buf_list[rdptr] = skb; 2152 desc = card->evtbd_ring[rdptr]; 2153 desc->paddr = MWIFIEX_SKB_DMA_ADDR(skb); 2154 desc->len = (u16)skb->len; 2155 desc->flags = 0; 2156 skb = NULL; 2157 } else { 2158 mwifiex_dbg(adapter, ERROR, 2159 "info: ERROR: buf still valid at index %d, <%p, %p>\n", 2160 rdptr, card->evt_buf_list[rdptr], skb); 2161 } 2162 2163 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) { 2164 card->evtbd_rdptr = ((card->evtbd_rdptr & 2165 reg->evt_rollover_ind) ^ 2166 reg->evt_rollover_ind); 2167 } 2168 2169 mwifiex_dbg(adapter, EVENT, 2170 "info: Updated <Rd: 0x%x, Wr: 0x%x>", 2171 card->evtbd_rdptr, wrptr); 2172 2173 /* Write the event ring read pointer in to reg->evt_rdptr */ 2174 if (mwifiex_write_reg(adapter, reg->evt_rdptr, 2175 card->evtbd_rdptr)) { 2176 mwifiex_dbg(adapter, ERROR, 2177 "event_complete: failed to read reg->evt_rdptr\n"); 2178 return -1; 2179 } 2180 2181 mwifiex_dbg(adapter, EVENT, 2182 "info: Check Events Again\n"); 2183 ret = mwifiex_pcie_process_event_ready(adapter); 2184 2185 return ret; 2186} 2187 2188/* Combo firmware image is a combination of 2189 * (1) combo crc heaer, start with CMD5 2190 * (2) bluetooth image, start with CMD7, end with CMD6, data wrapped in CMD1. 2191 * (3) wifi image. 2192 * 2193 * This function bypass the header and bluetooth part, return 2194 * the offset of tail wifi-only part. If the image is already wifi-only, 2195 * that is start with CMD1, return 0. 2196 */ 2197 2198static int mwifiex_extract_wifi_fw(struct mwifiex_adapter *adapter, 2199 const void *firmware, u32 firmware_len) { 2200 const struct mwifiex_fw_data *fwdata; 2201 u32 offset = 0, data_len, dnld_cmd; 2202 int ret = 0; 2203 bool cmd7_before = false, first_cmd = false; 2204 2205 while (1) { 2206 /* Check for integer and buffer overflow */ 2207 if (offset + sizeof(fwdata->header) < sizeof(fwdata->header) || 2208 offset + sizeof(fwdata->header) >= firmware_len) { 2209 mwifiex_dbg(adapter, ERROR, 2210 "extract wifi-only fw failure!\n"); 2211 ret = -1; 2212 goto done; 2213 } 2214 2215 fwdata = firmware + offset; 2216 dnld_cmd = le32_to_cpu(fwdata->header.dnld_cmd); 2217 data_len = le32_to_cpu(fwdata->header.data_length); 2218 2219 /* Skip past header */ 2220 offset += sizeof(fwdata->header); 2221 2222 switch (dnld_cmd) { 2223 case MWIFIEX_FW_DNLD_CMD_1: 2224 if (offset + data_len < data_len) { 2225 mwifiex_dbg(adapter, ERROR, "bad FW parse\n"); 2226 ret = -1; 2227 goto done; 2228 } 2229 2230 /* Image start with cmd1, already wifi-only firmware */ 2231 if (!first_cmd) { 2232 mwifiex_dbg(adapter, MSG, 2233 "input wifi-only firmware\n"); 2234 return 0; 2235 } 2236 2237 if (!cmd7_before) { 2238 mwifiex_dbg(adapter, ERROR, 2239 "no cmd7 before cmd1!\n"); 2240 ret = -1; 2241 goto done; 2242 } 2243 offset += data_len; 2244 break; 2245 case MWIFIEX_FW_DNLD_CMD_5: 2246 first_cmd = true; 2247 /* Check for integer overflow */ 2248 if (offset + data_len < data_len) { 2249 mwifiex_dbg(adapter, ERROR, "bad FW parse\n"); 2250 ret = -1; 2251 goto done; 2252 } 2253 offset += data_len; 2254 break; 2255 case MWIFIEX_FW_DNLD_CMD_6: 2256 first_cmd = true; 2257 /* Check for integer overflow */ 2258 if (offset + data_len < data_len) { 2259 mwifiex_dbg(adapter, ERROR, "bad FW parse\n"); 2260 ret = -1; 2261 goto done; 2262 } 2263 offset += data_len; 2264 if (offset >= firmware_len) { 2265 mwifiex_dbg(adapter, ERROR, 2266 "extract wifi-only fw failure!\n"); 2267 ret = -1; 2268 } else { 2269 ret = offset; 2270 } 2271 goto done; 2272 case MWIFIEX_FW_DNLD_CMD_7: 2273 first_cmd = true; 2274 cmd7_before = true; 2275 break; 2276 default: 2277 mwifiex_dbg(adapter, ERROR, "unknown dnld_cmd %d\n", 2278 dnld_cmd); 2279 ret = -1; 2280 goto done; 2281 } 2282 } 2283 2284done: 2285 return ret; 2286} 2287 2288/* 2289 * This function downloads the firmware to the card. 2290 * 2291 * Firmware is downloaded to the card in blocks. Every block download 2292 * is tested for CRC errors, and retried a number of times before 2293 * returning failure. 2294 */ 2295static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter, 2296 struct mwifiex_fw_image *fw) 2297{ 2298 int ret; 2299 u8 *firmware = fw->fw_buf; 2300 u32 firmware_len = fw->fw_len; 2301 u32 offset = 0; 2302 struct sk_buff *skb; 2303 u32 txlen, tx_blocks = 0, tries, len, val; 2304 u32 block_retry_cnt = 0; 2305 struct pcie_service_card *card = adapter->card; 2306 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2307 2308 if (!firmware || !firmware_len) { 2309 mwifiex_dbg(adapter, ERROR, 2310 "No firmware image found! Terminating download\n"); 2311 return -1; 2312 } 2313 2314 mwifiex_dbg(adapter, INFO, 2315 "info: Downloading FW image (%d bytes)\n", 2316 firmware_len); 2317 2318 if (mwifiex_pcie_disable_host_int(adapter)) { 2319 mwifiex_dbg(adapter, ERROR, 2320 "%s: Disabling interrupts failed.\n", __func__); 2321 return -1; 2322 } 2323 2324 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); 2325 if (!skb) { 2326 ret = -ENOMEM; 2327 goto done; 2328 } 2329 2330 ret = mwifiex_read_reg(adapter, PCIE_SCRATCH_13_REG, &val); 2331 if (ret) { 2332 mwifiex_dbg(adapter, FATAL, "Failed to read scratch register 13\n"); 2333 goto done; 2334 } 2335 2336 /* PCIE FLR case: extract wifi part from combo firmware*/ 2337 if (val == MWIFIEX_PCIE_FLR_HAPPENS) { 2338 ret = mwifiex_extract_wifi_fw(adapter, firmware, firmware_len); 2339 if (ret < 0) { 2340 mwifiex_dbg(adapter, ERROR, "Failed to extract wifi fw\n"); 2341 goto done; 2342 } 2343 offset = ret; 2344 mwifiex_dbg(adapter, MSG, 2345 "info: dnld wifi firmware from %d bytes\n", offset); 2346 } 2347 2348 /* Perform firmware data transfer */ 2349 do { 2350 u32 ireg_intr = 0; 2351 2352 /* More data? */ 2353 if (offset >= firmware_len) 2354 break; 2355 2356 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2357 ret = mwifiex_read_reg(adapter, reg->cmd_size, 2358 &len); 2359 if (ret) { 2360 mwifiex_dbg(adapter, FATAL, 2361 "Failed reading len from boot code\n"); 2362 goto done; 2363 } 2364 if (len) 2365 break; 2366 usleep_range(10, 20); 2367 } 2368 2369 if (!len) { 2370 break; 2371 } else if (len > MWIFIEX_UPLD_SIZE) { 2372 mwifiex_dbg(adapter, ERROR, 2373 "FW download failure @ %d, invalid length %d\n", 2374 offset, len); 2375 ret = -1; 2376 goto done; 2377 } 2378 2379 txlen = len; 2380 2381 if (len & BIT(0)) { 2382 block_retry_cnt++; 2383 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) { 2384 mwifiex_dbg(adapter, ERROR, 2385 "FW download failure @ %d, over max\t" 2386 "retry count\n", offset); 2387 ret = -1; 2388 goto done; 2389 } 2390 mwifiex_dbg(adapter, ERROR, 2391 "FW CRC error indicated by the\t" 2392 "helper: len = 0x%04X, txlen = %d\n", 2393 len, txlen); 2394 len &= ~BIT(0); 2395 /* Setting this to 0 to resend from same offset */ 2396 txlen = 0; 2397 } else { 2398 block_retry_cnt = 0; 2399 /* Set blocksize to transfer - checking for 2400 last block */ 2401 if (firmware_len - offset < txlen) 2402 txlen = firmware_len - offset; 2403 2404 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) / 2405 card->pcie.blksz_fw_dl; 2406 2407 /* Copy payload to buffer */ 2408 memmove(skb->data, &firmware[offset], txlen); 2409 } 2410 2411 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); 2412 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl); 2413 2414 /* Send the boot command to device */ 2415 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) { 2416 mwifiex_dbg(adapter, ERROR, 2417 "Failed to send firmware download command\n"); 2418 ret = -1; 2419 goto done; 2420 } 2421 2422 /* Wait for the command done interrupt */ 2423 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2424 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS, 2425 &ireg_intr)) { 2426 mwifiex_dbg(adapter, ERROR, 2427 "%s: Failed to read\t" 2428 "interrupt status during fw dnld.\n", 2429 __func__); 2430 mwifiex_unmap_pci_memory(adapter, skb, 2431 DMA_TO_DEVICE); 2432 ret = -1; 2433 goto done; 2434 } 2435 if (!(ireg_intr & CPU_INTR_DOOR_BELL)) 2436 break; 2437 usleep_range(10, 20); 2438 } 2439 if (ireg_intr & CPU_INTR_DOOR_BELL) { 2440 mwifiex_dbg(adapter, ERROR, "%s: Card failed to ACK download\n", 2441 __func__); 2442 mwifiex_unmap_pci_memory(adapter, skb, 2443 DMA_TO_DEVICE); 2444 ret = -1; 2445 goto done; 2446 } 2447 2448 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE); 2449 2450 offset += txlen; 2451 } while (true); 2452 2453 mwifiex_dbg(adapter, MSG, 2454 "info: FW download over, size %d bytes\n", offset); 2455 2456 ret = 0; 2457 2458done: 2459 dev_kfree_skb_any(skb); 2460 return ret; 2461} 2462 2463/* 2464 * This function checks the firmware status in card. 2465 */ 2466static int 2467mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num) 2468{ 2469 int ret = 0; 2470 u32 firmware_stat; 2471 struct pcie_service_card *card = adapter->card; 2472 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2473 u32 tries; 2474 2475 /* Mask spurios interrupts */ 2476 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK, 2477 HOST_INTR_MASK)) { 2478 mwifiex_dbg(adapter, ERROR, 2479 "Write register failed\n"); 2480 return -1; 2481 } 2482 2483 mwifiex_dbg(adapter, INFO, 2484 "Setting driver ready signature\n"); 2485 if (mwifiex_write_reg(adapter, reg->drv_rdy, 2486 FIRMWARE_READY_PCIE)) { 2487 mwifiex_dbg(adapter, ERROR, 2488 "Failed to write driver ready signature\n"); 2489 return -1; 2490 } 2491 2492 /* Wait for firmware initialization event */ 2493 for (tries = 0; tries < poll_num; tries++) { 2494 if (mwifiex_read_reg(adapter, reg->fw_status, 2495 &firmware_stat)) 2496 ret = -1; 2497 else 2498 ret = 0; 2499 2500 mwifiex_dbg(adapter, INFO, "Try %d if FW is ready <%d,%#x>", 2501 tries, ret, firmware_stat); 2502 2503 if (ret) 2504 continue; 2505 if (firmware_stat == FIRMWARE_READY_PCIE) { 2506 ret = 0; 2507 break; 2508 } else { 2509 msleep(100); 2510 ret = -1; 2511 } 2512 } 2513 2514 return ret; 2515} 2516 2517/* This function checks if WLAN is the winner. 2518 */ 2519static int 2520mwifiex_check_winner_status(struct mwifiex_adapter *adapter) 2521{ 2522 u32 winner = 0; 2523 int ret = 0; 2524 struct pcie_service_card *card = adapter->card; 2525 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2526 2527 if (mwifiex_read_reg(adapter, reg->fw_status, &winner)) { 2528 ret = -1; 2529 } else if (!winner) { 2530 mwifiex_dbg(adapter, INFO, "PCI-E is the winner\n"); 2531 adapter->winner = 1; 2532 } else { 2533 mwifiex_dbg(adapter, ERROR, 2534 "PCI-E is not the winner <%#x>", winner); 2535 } 2536 2537 return ret; 2538} 2539 2540/* 2541 * This function reads the interrupt status from card. 2542 */ 2543static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter, 2544 int msg_id) 2545{ 2546 u32 pcie_ireg; 2547 unsigned long flags; 2548 struct pcie_service_card *card = adapter->card; 2549 2550 if (card->msi_enable) { 2551 spin_lock_irqsave(&adapter->int_lock, flags); 2552 adapter->int_status = 1; 2553 spin_unlock_irqrestore(&adapter->int_lock, flags); 2554 return; 2555 } 2556 2557 if (!mwifiex_pcie_ok_to_access_hw(adapter)) 2558 return; 2559 2560 if (card->msix_enable && msg_id >= 0) { 2561 pcie_ireg = BIT(msg_id); 2562 } else { 2563 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2564 &pcie_ireg)) { 2565 mwifiex_dbg(adapter, ERROR, "Read register failed\n"); 2566 return; 2567 } 2568 2569 if ((pcie_ireg == 0xFFFFFFFF) || !pcie_ireg) 2570 return; 2571 2572 2573 mwifiex_pcie_disable_host_int(adapter); 2574 2575 /* Clear the pending interrupts */ 2576 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS, 2577 ~pcie_ireg)) { 2578 mwifiex_dbg(adapter, ERROR, 2579 "Write register failed\n"); 2580 return; 2581 } 2582 } 2583 2584 if (!adapter->pps_uapsd_mode && 2585 adapter->ps_state == PS_STATE_SLEEP && 2586 mwifiex_pcie_ok_to_access_hw(adapter)) { 2587 /* Potentially for PCIe we could get other 2588 * interrupts like shared. Don't change power 2589 * state until cookie is set 2590 */ 2591 adapter->ps_state = PS_STATE_AWAKE; 2592 adapter->pm_wakeup_fw_try = false; 2593 del_timer(&adapter->wakeup_timer); 2594 } 2595 2596 spin_lock_irqsave(&adapter->int_lock, flags); 2597 adapter->int_status |= pcie_ireg; 2598 spin_unlock_irqrestore(&adapter->int_lock, flags); 2599 mwifiex_dbg(adapter, INTR, "ireg: 0x%08x\n", pcie_ireg); 2600} 2601 2602/* 2603 * Interrupt handler for PCIe root port 2604 * 2605 * This function reads the interrupt status from firmware and assigns 2606 * the main process in workqueue which will handle the interrupt. 2607 */ 2608static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context) 2609{ 2610 struct mwifiex_msix_context *ctx = context; 2611 struct pci_dev *pdev = ctx->dev; 2612 struct pcie_service_card *card; 2613 struct mwifiex_adapter *adapter; 2614 2615 card = pci_get_drvdata(pdev); 2616 2617 if (!card->adapter) { 2618 pr_err("info: %s: card=%p adapter=%p\n", __func__, card, 2619 card ? card->adapter : NULL); 2620 goto exit; 2621 } 2622 adapter = card->adapter; 2623 2624 if (test_bit(MWIFIEX_SURPRISE_REMOVED, &adapter->work_flags)) 2625 goto exit; 2626 2627 if (card->msix_enable) 2628 mwifiex_interrupt_status(adapter, ctx->msg_id); 2629 else 2630 mwifiex_interrupt_status(adapter, -1); 2631 2632 mwifiex_queue_main_work(adapter); 2633 2634exit: 2635 return IRQ_HANDLED; 2636} 2637 2638/* 2639 * This function checks the current interrupt status. 2640 * 2641 * The following interrupts are checked and handled by this function - 2642 * - Data sent 2643 * - Command sent 2644 * - Command received 2645 * - Packets received 2646 * - Events received 2647 * 2648 * In case of Rx packets received, the packets are uploaded from card to 2649 * host and processed accordingly. 2650 */ 2651static int mwifiex_process_int_status(struct mwifiex_adapter *adapter) 2652{ 2653 int ret; 2654 u32 pcie_ireg = 0; 2655 unsigned long flags; 2656 struct pcie_service_card *card = adapter->card; 2657 2658 spin_lock_irqsave(&adapter->int_lock, flags); 2659 if (!card->msi_enable) { 2660 /* Clear out unused interrupts */ 2661 pcie_ireg = adapter->int_status; 2662 } 2663 adapter->int_status = 0; 2664 spin_unlock_irqrestore(&adapter->int_lock, flags); 2665 2666 if (card->msi_enable) { 2667 if (mwifiex_pcie_ok_to_access_hw(adapter)) { 2668 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, 2669 &pcie_ireg)) { 2670 mwifiex_dbg(adapter, ERROR, 2671 "Read register failed\n"); 2672 return -1; 2673 } 2674 2675 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) { 2676 if (mwifiex_write_reg(adapter, 2677 PCIE_HOST_INT_STATUS, 2678 ~pcie_ireg)) { 2679 mwifiex_dbg(adapter, ERROR, 2680 "Write register failed\n"); 2681 return -1; 2682 } 2683 if (!adapter->pps_uapsd_mode && 2684 adapter->ps_state == PS_STATE_SLEEP) { 2685 adapter->ps_state = PS_STATE_AWAKE; 2686 adapter->pm_wakeup_fw_try = false; 2687 del_timer(&adapter->wakeup_timer); 2688 } 2689 } 2690 } 2691 } 2692 2693 if (pcie_ireg & HOST_INTR_DNLD_DONE) { 2694 mwifiex_dbg(adapter, INTR, "info: TX DNLD Done\n"); 2695 ret = mwifiex_pcie_send_data_complete(adapter); 2696 if (ret) 2697 return ret; 2698 } 2699 if (pcie_ireg & HOST_INTR_UPLD_RDY) { 2700 mwifiex_dbg(adapter, INTR, "info: Rx DATA\n"); 2701 ret = mwifiex_pcie_process_recv_data(adapter); 2702 if (ret) 2703 return ret; 2704 } 2705 if (pcie_ireg & HOST_INTR_EVENT_RDY) { 2706 mwifiex_dbg(adapter, INTR, "info: Rx EVENT\n"); 2707 ret = mwifiex_pcie_process_event_ready(adapter); 2708 if (ret) 2709 return ret; 2710 } 2711 if (pcie_ireg & HOST_INTR_CMD_DONE) { 2712 if (adapter->cmd_sent) { 2713 mwifiex_dbg(adapter, INTR, 2714 "info: CMD sent Interrupt\n"); 2715 adapter->cmd_sent = false; 2716 } 2717 /* Handle command response */ 2718 ret = mwifiex_pcie_process_cmd_complete(adapter); 2719 if (ret) 2720 return ret; 2721 } 2722 2723 mwifiex_dbg(adapter, INTR, 2724 "info: cmd_sent=%d data_sent=%d\n", 2725 adapter->cmd_sent, adapter->data_sent); 2726 if (!card->msi_enable && !card->msix_enable && 2727 adapter->ps_state != PS_STATE_SLEEP) 2728 mwifiex_pcie_enable_host_int(adapter); 2729 2730 return 0; 2731} 2732 2733/* 2734 * This function downloads data from driver to card. 2735 * 2736 * Both commands and data packets are transferred to the card by this 2737 * function. 2738 * 2739 * This function adds the PCIE specific header to the front of the buffer 2740 * before transferring. The header contains the length of the packet and 2741 * the type. The firmware handles the packets based upon this set type. 2742 */ 2743static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type, 2744 struct sk_buff *skb, 2745 struct mwifiex_tx_param *tx_param) 2746{ 2747 if (!skb) { 2748 mwifiex_dbg(adapter, ERROR, 2749 "Passed NULL skb to %s\n", __func__); 2750 return -1; 2751 } 2752 2753 if (type == MWIFIEX_TYPE_DATA) 2754 return mwifiex_pcie_send_data(adapter, skb, tx_param); 2755 else if (type == MWIFIEX_TYPE_CMD) 2756 return mwifiex_pcie_send_cmd(adapter, skb); 2757 2758 return 0; 2759} 2760 2761/* Function to dump PCIE scratch registers in case of FW crash 2762 */ 2763static int 2764mwifiex_pcie_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf) 2765{ 2766 char *p = drv_buf; 2767 char buf[256], *ptr; 2768 int i; 2769 u32 value; 2770 struct pcie_service_card *card = adapter->card; 2771 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2772 int pcie_scratch_reg[] = {PCIE_SCRATCH_12_REG, 2773 PCIE_SCRATCH_14_REG, 2774 PCIE_SCRATCH_15_REG}; 2775 2776 if (!p) 2777 return 0; 2778 2779 mwifiex_dbg(adapter, MSG, "PCIE register dump start\n"); 2780 2781 if (mwifiex_read_reg(adapter, reg->fw_status, &value)) { 2782 mwifiex_dbg(adapter, ERROR, "failed to read firmware status"); 2783 return 0; 2784 } 2785 2786 ptr = buf; 2787 mwifiex_dbg(adapter, MSG, "pcie scratch register:"); 2788 for (i = 0; i < ARRAY_SIZE(pcie_scratch_reg); i++) { 2789 mwifiex_read_reg(adapter, pcie_scratch_reg[i], &value); 2790 ptr += sprintf(ptr, "reg:0x%x, value=0x%x\n", 2791 pcie_scratch_reg[i], value); 2792 } 2793 2794 mwifiex_dbg(adapter, MSG, "%s\n", buf); 2795 p += sprintf(p, "%s\n", buf); 2796 2797 mwifiex_dbg(adapter, MSG, "PCIE register dump end\n"); 2798 2799 return p - drv_buf; 2800} 2801 2802/* This function read/write firmware */ 2803static enum rdwr_status 2804mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag) 2805{ 2806 int ret, tries; 2807 u8 ctrl_data; 2808 u32 fw_status; 2809 struct pcie_service_card *card = adapter->card; 2810 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 2811 2812 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status)) 2813 return RDWR_STATUS_FAILURE; 2814 2815 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, 2816 reg->fw_dump_host_ready); 2817 if (ret) { 2818 mwifiex_dbg(adapter, ERROR, 2819 "PCIE write err\n"); 2820 return RDWR_STATUS_FAILURE; 2821 } 2822 2823 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2824 mwifiex_read_reg_byte(adapter, reg->fw_dump_ctrl, &ctrl_data); 2825 if (ctrl_data == FW_DUMP_DONE) 2826 return RDWR_STATUS_SUCCESS; 2827 if (doneflag && ctrl_data == doneflag) 2828 return RDWR_STATUS_DONE; 2829 if (ctrl_data != reg->fw_dump_host_ready) { 2830 mwifiex_dbg(adapter, WARN, 2831 "The ctrl reg was changed, re-try again!\n"); 2832 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, 2833 reg->fw_dump_host_ready); 2834 if (ret) { 2835 mwifiex_dbg(adapter, ERROR, 2836 "PCIE write err\n"); 2837 return RDWR_STATUS_FAILURE; 2838 } 2839 } 2840 usleep_range(100, 200); 2841 } 2842 2843 mwifiex_dbg(adapter, ERROR, "Fail to pull ctrl_data\n"); 2844 return RDWR_STATUS_FAILURE; 2845} 2846 2847/* This function dump firmware memory to file */ 2848static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter) 2849{ 2850 struct pcie_service_card *card = adapter->card; 2851 const struct mwifiex_pcie_card_reg *creg = card->pcie.reg; 2852 unsigned int reg, reg_start, reg_end; 2853 u8 *dbg_ptr, *end_ptr, *tmp_ptr, fw_dump_num, dump_num; 2854 u8 idx, i, read_reg, doneflag = 0; 2855 enum rdwr_status stat; 2856 u32 memory_size; 2857 int ret; 2858 2859 if (!card->pcie.can_dump_fw) 2860 return; 2861 2862 for (idx = 0; idx < adapter->num_mem_types; idx++) { 2863 struct memory_type_mapping *entry = 2864 &adapter->mem_type_mapping_tbl[idx]; 2865 2866 if (entry->mem_ptr) { 2867 vfree(entry->mem_ptr); 2868 entry->mem_ptr = NULL; 2869 } 2870 entry->mem_size = 0; 2871 } 2872 2873 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n"); 2874 2875 /* Read the number of the memories which will dump */ 2876 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2877 if (stat == RDWR_STATUS_FAILURE) 2878 return; 2879 2880 reg = creg->fw_dump_start; 2881 mwifiex_read_reg_byte(adapter, reg, &fw_dump_num); 2882 2883 /* W8997 chipset firmware dump will be restore in single region*/ 2884 if (fw_dump_num == 0) 2885 dump_num = 1; 2886 else 2887 dump_num = fw_dump_num; 2888 2889 /* Read the length of every memory which will dump */ 2890 for (idx = 0; idx < dump_num; idx++) { 2891 struct memory_type_mapping *entry = 2892 &adapter->mem_type_mapping_tbl[idx]; 2893 memory_size = 0; 2894 if (fw_dump_num != 0) { 2895 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2896 if (stat == RDWR_STATUS_FAILURE) 2897 return; 2898 2899 reg = creg->fw_dump_start; 2900 for (i = 0; i < 4; i++) { 2901 mwifiex_read_reg_byte(adapter, reg, &read_reg); 2902 memory_size |= (read_reg << (i * 8)); 2903 reg++; 2904 } 2905 } else { 2906 memory_size = MWIFIEX_FW_DUMP_MAX_MEMSIZE; 2907 } 2908 2909 if (memory_size == 0) { 2910 mwifiex_dbg(adapter, MSG, "Firmware dump Finished!\n"); 2911 ret = mwifiex_write_reg(adapter, creg->fw_dump_ctrl, 2912 creg->fw_dump_read_done); 2913 if (ret) { 2914 mwifiex_dbg(adapter, ERROR, "PCIE write err\n"); 2915 return; 2916 } 2917 break; 2918 } 2919 2920 mwifiex_dbg(adapter, DUMP, 2921 "%s_SIZE=0x%x\n", entry->mem_name, memory_size); 2922 entry->mem_ptr = vmalloc(memory_size + 1); 2923 entry->mem_size = memory_size; 2924 if (!entry->mem_ptr) { 2925 mwifiex_dbg(adapter, ERROR, 2926 "Vmalloc %s failed\n", entry->mem_name); 2927 return; 2928 } 2929 dbg_ptr = entry->mem_ptr; 2930 end_ptr = dbg_ptr + memory_size; 2931 2932 doneflag = entry->done_flag; 2933 mwifiex_dbg(adapter, DUMP, "Start %s output, please wait...\n", 2934 entry->mem_name); 2935 2936 do { 2937 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag); 2938 if (RDWR_STATUS_FAILURE == stat) 2939 return; 2940 2941 reg_start = creg->fw_dump_start; 2942 reg_end = creg->fw_dump_end; 2943 for (reg = reg_start; reg <= reg_end; reg++) { 2944 mwifiex_read_reg_byte(adapter, reg, dbg_ptr); 2945 if (dbg_ptr < end_ptr) { 2946 dbg_ptr++; 2947 continue; 2948 } 2949 mwifiex_dbg(adapter, ERROR, 2950 "pre-allocated buf not enough\n"); 2951 tmp_ptr = 2952 vzalloc(memory_size + MWIFIEX_SIZE_4K); 2953 if (!tmp_ptr) 2954 return; 2955 memcpy(tmp_ptr, entry->mem_ptr, memory_size); 2956 vfree(entry->mem_ptr); 2957 entry->mem_ptr = tmp_ptr; 2958 tmp_ptr = NULL; 2959 dbg_ptr = entry->mem_ptr + memory_size; 2960 memory_size += MWIFIEX_SIZE_4K; 2961 end_ptr = entry->mem_ptr + memory_size; 2962 } 2963 2964 if (stat != RDWR_STATUS_DONE) 2965 continue; 2966 2967 mwifiex_dbg(adapter, DUMP, 2968 "%s done: size=0x%tx\n", 2969 entry->mem_name, dbg_ptr - entry->mem_ptr); 2970 break; 2971 } while (true); 2972 } 2973 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n"); 2974} 2975 2976static void mwifiex_pcie_device_dump_work(struct mwifiex_adapter *adapter) 2977{ 2978 adapter->devdump_data = vzalloc(MWIFIEX_FW_DUMP_SIZE); 2979 if (!adapter->devdump_data) { 2980 mwifiex_dbg(adapter, ERROR, 2981 "vzalloc devdump data failure!\n"); 2982 return; 2983 } 2984 2985 mwifiex_drv_info_dump(adapter); 2986 mwifiex_pcie_fw_dump(adapter); 2987 mwifiex_prepare_fw_dump_info(adapter); 2988 mwifiex_upload_device_dump(adapter); 2989} 2990 2991static void mwifiex_pcie_card_reset_work(struct mwifiex_adapter *adapter) 2992{ 2993 struct pcie_service_card *card = adapter->card; 2994 2995 /* We can't afford to wait here; remove() might be waiting on us. If we 2996 * can't grab the device lock, maybe we'll get another chance later. 2997 */ 2998 pci_try_reset_function(card->dev); 2999} 3000 3001static void mwifiex_pcie_work(struct work_struct *work) 3002{ 3003 struct pcie_service_card *card = 3004 container_of(work, struct pcie_service_card, work); 3005 3006 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 3007 &card->work_flags)) 3008 mwifiex_pcie_device_dump_work(card->adapter); 3009 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, 3010 &card->work_flags)) 3011 mwifiex_pcie_card_reset_work(card->adapter); 3012} 3013 3014/* This function dumps FW information */ 3015static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter) 3016{ 3017 struct pcie_service_card *card = adapter->card; 3018 3019 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 3020 &card->work_flags)) 3021 schedule_work(&card->work); 3022} 3023 3024static void mwifiex_pcie_card_reset(struct mwifiex_adapter *adapter) 3025{ 3026 struct pcie_service_card *card = adapter->card; 3027 3028 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags)) 3029 schedule_work(&card->work); 3030} 3031 3032static int mwifiex_pcie_alloc_buffers(struct mwifiex_adapter *adapter) 3033{ 3034 struct pcie_service_card *card = adapter->card; 3035 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 3036 int ret; 3037 3038 card->cmdrsp_buf = NULL; 3039 ret = mwifiex_pcie_create_txbd_ring(adapter); 3040 if (ret) { 3041 mwifiex_dbg(adapter, ERROR, "Failed to create txbd ring\n"); 3042 goto err_cre_txbd; 3043 } 3044 3045 ret = mwifiex_pcie_create_rxbd_ring(adapter); 3046 if (ret) { 3047 mwifiex_dbg(adapter, ERROR, "Failed to create rxbd ring\n"); 3048 goto err_cre_rxbd; 3049 } 3050 3051 ret = mwifiex_pcie_create_evtbd_ring(adapter); 3052 if (ret) { 3053 mwifiex_dbg(adapter, ERROR, "Failed to create evtbd ring\n"); 3054 goto err_cre_evtbd; 3055 } 3056 3057 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter); 3058 if (ret) { 3059 mwifiex_dbg(adapter, ERROR, "Failed to allocate cmdbuf buffer\n"); 3060 goto err_alloc_cmdbuf; 3061 } 3062 3063 if (reg->sleep_cookie) { 3064 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter); 3065 if (ret) { 3066 mwifiex_dbg(adapter, ERROR, "Failed to allocate sleep_cookie buffer\n"); 3067 goto err_alloc_cookie; 3068 } 3069 } else { 3070 card->sleep_cookie_vbase = NULL; 3071 } 3072 3073 return 0; 3074 3075err_alloc_cookie: 3076 mwifiex_pcie_delete_cmdrsp_buf(adapter); 3077err_alloc_cmdbuf: 3078 mwifiex_pcie_delete_evtbd_ring(adapter); 3079err_cre_evtbd: 3080 mwifiex_pcie_delete_rxbd_ring(adapter); 3081err_cre_rxbd: 3082 mwifiex_pcie_delete_txbd_ring(adapter); 3083err_cre_txbd: 3084 return ret; 3085} 3086 3087static void mwifiex_pcie_free_buffers(struct mwifiex_adapter *adapter) 3088{ 3089 struct pcie_service_card *card = adapter->card; 3090 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 3091 3092 if (reg->sleep_cookie) 3093 mwifiex_pcie_delete_sleep_cookie_buf(adapter); 3094 3095 mwifiex_pcie_delete_cmdrsp_buf(adapter); 3096 mwifiex_pcie_delete_evtbd_ring(adapter); 3097 mwifiex_pcie_delete_rxbd_ring(adapter); 3098 mwifiex_pcie_delete_txbd_ring(adapter); 3099} 3100 3101/* 3102 * This function initializes the PCI-E host memory space, WCB rings, etc. 3103 */ 3104static int mwifiex_init_pcie(struct mwifiex_adapter *adapter) 3105{ 3106 struct pcie_service_card *card = adapter->card; 3107 int ret; 3108 struct pci_dev *pdev = card->dev; 3109 3110 pci_set_drvdata(pdev, card); 3111 3112 ret = pci_enable_device(pdev); 3113 if (ret) 3114 goto err_enable_dev; 3115 3116 pci_set_master(pdev); 3117 3118 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 3119 if (ret) { 3120 pr_err("dma_set_mask(32) failed: %d\n", ret); 3121 goto err_set_dma_mask; 3122 } 3123 3124 ret = pci_request_region(pdev, 0, DRV_NAME); 3125 if (ret) { 3126 pr_err("req_reg(0) error\n"); 3127 goto err_req_region0; 3128 } 3129 card->pci_mmap = pci_iomap(pdev, 0, 0); 3130 if (!card->pci_mmap) { 3131 pr_err("iomap(0) error\n"); 3132 ret = -EIO; 3133 goto err_iomap0; 3134 } 3135 ret = pci_request_region(pdev, 2, DRV_NAME); 3136 if (ret) { 3137 pr_err("req_reg(2) error\n"); 3138 goto err_req_region2; 3139 } 3140 card->pci_mmap1 = pci_iomap(pdev, 2, 0); 3141 if (!card->pci_mmap1) { 3142 pr_err("iomap(2) error\n"); 3143 ret = -EIO; 3144 goto err_iomap2; 3145 } 3146 3147 pr_notice("PCI memory map Virt0: %pK PCI memory map Virt2: %pK\n", 3148 card->pci_mmap, card->pci_mmap1); 3149 3150 ret = mwifiex_pcie_alloc_buffers(adapter); 3151 if (ret) 3152 goto err_alloc_buffers; 3153 3154 if (pdev->device == PCIE_DEVICE_ID_MARVELL_88W8897) 3155 adapter->ignore_btcoex_events = true; 3156 3157 return 0; 3158 3159err_alloc_buffers: 3160 pci_iounmap(pdev, card->pci_mmap1); 3161err_iomap2: 3162 pci_release_region(pdev, 2); 3163err_req_region2: 3164 pci_iounmap(pdev, card->pci_mmap); 3165err_iomap0: 3166 pci_release_region(pdev, 0); 3167err_req_region0: 3168err_set_dma_mask: 3169 pci_disable_device(pdev); 3170err_enable_dev: 3171 return ret; 3172} 3173 3174/* 3175 * This function cleans up the allocated card buffers. 3176 */ 3177static void mwifiex_cleanup_pcie(struct mwifiex_adapter *adapter) 3178{ 3179 struct pcie_service_card *card = adapter->card; 3180 struct pci_dev *pdev = card->dev; 3181 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 3182 int ret; 3183 u32 fw_status; 3184 3185 /* Perform the cancel_work_sync() only when we're not resetting 3186 * the card. It's because that function never returns if we're 3187 * in reset path. If we're here when resetting the card, it means 3188 * that we failed to reset the card (reset failure path). 3189 */ 3190 if (!card->pci_reset_ongoing) { 3191 mwifiex_dbg(adapter, MSG, "performing cancel_work_sync()...\n"); 3192 cancel_work_sync(&card->work); 3193 mwifiex_dbg(adapter, MSG, "cancel_work_sync() done\n"); 3194 } else { 3195 mwifiex_dbg(adapter, MSG, 3196 "skipped cancel_work_sync() because we're in card reset failure path\n"); 3197 } 3198 3199 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status); 3200 if (fw_status == FIRMWARE_READY_PCIE) { 3201 mwifiex_dbg(adapter, INFO, 3202 "Clearing driver ready signature\n"); 3203 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000)) 3204 mwifiex_dbg(adapter, ERROR, 3205 "Failed to write driver not-ready signature\n"); 3206 } 3207 3208 pci_disable_device(pdev); 3209 3210 pci_iounmap(pdev, card->pci_mmap); 3211 pci_iounmap(pdev, card->pci_mmap1); 3212 pci_release_region(pdev, 2); 3213 pci_release_region(pdev, 0); 3214 3215 mwifiex_pcie_free_buffers(adapter); 3216} 3217 3218static int mwifiex_pcie_request_irq(struct mwifiex_adapter *adapter) 3219{ 3220 int ret, i, j; 3221 struct pcie_service_card *card = adapter->card; 3222 struct pci_dev *pdev = card->dev; 3223 3224 if (card->pcie.reg->msix_support) { 3225 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3226 card->msix_entries[i].entry = i; 3227 ret = pci_enable_msix_exact(pdev, card->msix_entries, 3228 MWIFIEX_NUM_MSIX_VECTORS); 3229 if (!ret) { 3230 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) { 3231 card->msix_ctx[i].dev = pdev; 3232 card->msix_ctx[i].msg_id = i; 3233 3234 ret = request_irq(card->msix_entries[i].vector, 3235 mwifiex_pcie_interrupt, 0, 3236 "MWIFIEX_PCIE_MSIX", 3237 &card->msix_ctx[i]); 3238 if (ret) 3239 break; 3240 } 3241 3242 if (ret) { 3243 mwifiex_dbg(adapter, INFO, "request_irq fail: %d\n", 3244 ret); 3245 for (j = 0; j < i; j++) 3246 free_irq(card->msix_entries[j].vector, 3247 &card->msix_ctx[i]); 3248 pci_disable_msix(pdev); 3249 } else { 3250 mwifiex_dbg(adapter, MSG, "MSIx enabled!"); 3251 card->msix_enable = 1; 3252 return 0; 3253 } 3254 } 3255 } 3256 3257 if (pci_enable_msi(pdev) != 0) 3258 pci_disable_msi(pdev); 3259 else 3260 card->msi_enable = 1; 3261 3262 mwifiex_dbg(adapter, INFO, "msi_enable = %d\n", card->msi_enable); 3263 3264 card->share_irq_ctx.dev = pdev; 3265 card->share_irq_ctx.msg_id = -1; 3266 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED, 3267 "MRVL_PCIE", &card->share_irq_ctx); 3268 if (ret) { 3269 pr_err("request_irq failed: ret=%d\n", ret); 3270 return -1; 3271 } 3272 3273 return 0; 3274} 3275 3276/* 3277 * This function gets the firmware name for downloading by revision id 3278 * 3279 * Read revision id register to get revision id 3280 */ 3281static void mwifiex_pcie_get_fw_name(struct mwifiex_adapter *adapter) 3282{ 3283 int revision_id = 0; 3284 int version, magic; 3285 struct pcie_service_card *card = adapter->card; 3286 3287 switch (card->dev->device) { 3288 case PCIE_DEVICE_ID_MARVELL_88W8766P: 3289 strcpy(adapter->fw_name, PCIE8766_DEFAULT_FW_NAME); 3290 break; 3291 case PCIE_DEVICE_ID_MARVELL_88W8897: 3292 mwifiex_write_reg(adapter, 0x0c58, 0x80c00000); 3293 mwifiex_read_reg(adapter, 0x0c58, &revision_id); 3294 revision_id &= 0xff00; 3295 switch (revision_id) { 3296 case PCIE8897_A0: 3297 strcpy(adapter->fw_name, PCIE8897_A0_FW_NAME); 3298 break; 3299 case PCIE8897_B0: 3300 strcpy(adapter->fw_name, PCIE8897_B0_FW_NAME); 3301 break; 3302 default: 3303 strcpy(adapter->fw_name, PCIE8897_DEFAULT_FW_NAME); 3304 3305 break; 3306 } 3307 break; 3308 case PCIE_DEVICE_ID_MARVELL_88W8997: 3309 mwifiex_read_reg(adapter, 0x8, &revision_id); 3310 mwifiex_read_reg(adapter, 0x0cd0, &version); 3311 mwifiex_read_reg(adapter, 0x0cd4, &magic); 3312 revision_id &= 0xff; 3313 version &= 0x7; 3314 magic &= 0xff; 3315 if (revision_id == PCIE8997_A1 && 3316 magic == CHIP_MAGIC_VALUE && 3317 version == CHIP_VER_PCIEUART) 3318 strcpy(adapter->fw_name, PCIEUART8997_FW_NAME_V4); 3319 else 3320 strcpy(adapter->fw_name, PCIEUSB8997_FW_NAME_V4); 3321 break; 3322 default: 3323 break; 3324 } 3325} 3326 3327/* 3328 * This function registers the PCIE device. 3329 * 3330 * PCIE IRQ is claimed, block size is set and driver data is initialized. 3331 */ 3332static int mwifiex_register_dev(struct mwifiex_adapter *adapter) 3333{ 3334 struct pcie_service_card *card = adapter->card; 3335 3336 /* save adapter pointer in card */ 3337 card->adapter = adapter; 3338 3339 if (mwifiex_pcie_request_irq(adapter)) 3340 return -1; 3341 3342 adapter->tx_buf_size = card->pcie.tx_buf_size; 3343 adapter->mem_type_mapping_tbl = card->pcie.mem_type_mapping_tbl; 3344 adapter->num_mem_types = card->pcie.num_mem_types; 3345 adapter->ext_scan = card->pcie.can_ext_scan; 3346 mwifiex_pcie_get_fw_name(adapter); 3347 3348 return 0; 3349} 3350 3351/* 3352 * This function unregisters the PCIE device. 3353 * 3354 * The PCIE IRQ is released, the function is disabled and driver 3355 * data is set to null. 3356 */ 3357static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter) 3358{ 3359 struct pcie_service_card *card = adapter->card; 3360 struct pci_dev *pdev = card->dev; 3361 int i; 3362 3363 if (card->msix_enable) { 3364 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3365 synchronize_irq(card->msix_entries[i].vector); 3366 3367 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) 3368 free_irq(card->msix_entries[i].vector, 3369 &card->msix_ctx[i]); 3370 3371 card->msix_enable = 0; 3372 pci_disable_msix(pdev); 3373 } else { 3374 mwifiex_dbg(adapter, INFO, 3375 "%s(): calling free_irq()\n", __func__); 3376 free_irq(card->dev->irq, &card->share_irq_ctx); 3377 3378 if (card->msi_enable) 3379 pci_disable_msi(pdev); 3380 } 3381 card->adapter = NULL; 3382} 3383 3384/* 3385 * This function initializes the PCI-E host memory space, WCB rings, etc., 3386 * similar to mwifiex_init_pcie(), but without resetting PCI-E state. 3387 */ 3388static void mwifiex_pcie_up_dev(struct mwifiex_adapter *adapter) 3389{ 3390 struct pcie_service_card *card = adapter->card; 3391 struct pci_dev *pdev = card->dev; 3392 3393 /* tx_buf_size might be changed to 3584 by firmware during 3394 * data transfer, we should reset it to default size. 3395 */ 3396 adapter->tx_buf_size = card->pcie.tx_buf_size; 3397 3398 mwifiex_pcie_alloc_buffers(adapter); 3399 3400 pci_set_master(pdev); 3401} 3402 3403/* This function cleans up the PCI-E host memory space. */ 3404static void mwifiex_pcie_down_dev(struct mwifiex_adapter *adapter) 3405{ 3406 struct pcie_service_card *card = adapter->card; 3407 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; 3408 struct pci_dev *pdev = card->dev; 3409 3410 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000)) 3411 mwifiex_dbg(adapter, ERROR, "Failed to write driver not-ready signature\n"); 3412 3413 pci_clear_master(pdev); 3414 3415 adapter->seq_num = 0; 3416 3417 mwifiex_pcie_free_buffers(adapter); 3418} 3419 3420static struct mwifiex_if_ops pcie_ops = { 3421 .init_if = mwifiex_init_pcie, 3422 .cleanup_if = mwifiex_cleanup_pcie, 3423 .check_fw_status = mwifiex_check_fw_status, 3424 .check_winner_status = mwifiex_check_winner_status, 3425 .prog_fw = mwifiex_prog_fw_w_helper, 3426 .register_dev = mwifiex_register_dev, 3427 .unregister_dev = mwifiex_unregister_dev, 3428 .enable_int = mwifiex_pcie_enable_host_int, 3429 .disable_int = mwifiex_pcie_disable_host_int_noerr, 3430 .process_int_status = mwifiex_process_int_status, 3431 .host_to_card = mwifiex_pcie_host_to_card, 3432 .wakeup = mwifiex_pm_wakeup_card, 3433 .wakeup_complete = mwifiex_pm_wakeup_card_complete, 3434 3435 /* PCIE specific */ 3436 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete, 3437 .event_complete = mwifiex_pcie_event_complete, 3438 .update_mp_end_port = NULL, 3439 .cleanup_mpa_buf = NULL, 3440 .init_fw_port = mwifiex_pcie_init_fw_port, 3441 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf, 3442 .card_reset = mwifiex_pcie_card_reset, 3443 .reg_dump = mwifiex_pcie_reg_dump, 3444 .device_dump = mwifiex_pcie_device_dump, 3445 .down_dev = mwifiex_pcie_down_dev, 3446 .up_dev = mwifiex_pcie_up_dev, 3447}; 3448 3449module_pci_driver(mwifiex_pcie); 3450 3451MODULE_AUTHOR("Marvell International Ltd."); 3452MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION); 3453MODULE_VERSION(PCIE_VERSION); 3454MODULE_LICENSE("GPL v2"); 3455