1/*
2 * NXP Wireless LAN device driver: ioctl data structures & APIs
3 *
4 * Copyright 2011-2020 NXP
5 *
6 * This software file (the "File") is distributed by NXP
7 * under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License").  You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13 *
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16 * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
17 * this warranty disclaimer.
18 */
19
20#ifndef _MWIFIEX_IOCTL_H_
21#define _MWIFIEX_IOCTL_H_
22
23#include <net/lib80211.h>
24
25enum {
26	MWIFIEX_SCAN_TYPE_UNCHANGED = 0,
27	MWIFIEX_SCAN_TYPE_ACTIVE,
28	MWIFIEX_SCAN_TYPE_PASSIVE
29};
30
31struct mwifiex_user_scan {
32	u32 scan_cfg_len;
33	u8 scan_cfg_buf[1];
34};
35
36#define MWIFIEX_PROMISC_MODE            1
37#define MWIFIEX_MULTICAST_MODE		2
38#define	MWIFIEX_ALL_MULTI_MODE		4
39#define MWIFIEX_MAX_MULTICAST_LIST_SIZE	32
40
41struct mwifiex_multicast_list {
42	u32 mode;
43	u32 num_multicast_addr;
44	u8 mac_list[MWIFIEX_MAX_MULTICAST_LIST_SIZE][ETH_ALEN];
45};
46
47struct mwifiex_chan_freq {
48	u32 channel;
49	u32 freq;
50};
51
52struct mwifiex_ssid_bssid {
53	struct cfg80211_ssid ssid;
54	u8 bssid[ETH_ALEN];
55};
56
57enum {
58	BAND_B = 1,
59	BAND_G = 2,
60	BAND_A = 4,
61	BAND_GN = 8,
62	BAND_AN = 16,
63	BAND_AAC = 32,
64};
65
66#define MWIFIEX_WPA_PASSHPHRASE_LEN 64
67struct wpa_param {
68	u8 pairwise_cipher_wpa;
69	u8 pairwise_cipher_wpa2;
70	u8 group_cipher;
71	u32 length;
72	u8 passphrase[MWIFIEX_WPA_PASSHPHRASE_LEN];
73};
74
75struct wep_key {
76	u8 key_index;
77	u8 is_default;
78	u16 length;
79	u8 key[WLAN_KEY_LEN_WEP104];
80};
81
82#define KEY_MGMT_ON_HOST        0x03
83#define MWIFIEX_AUTH_MODE_AUTO  0xFF
84#define BAND_CONFIG_BG          0x00
85#define BAND_CONFIG_A           0x01
86#define MWIFIEX_SEC_CHAN_BELOW	0x30
87#define MWIFIEX_SEC_CHAN_ABOVE	0x10
88#define MWIFIEX_SUPPORTED_RATES                 14
89#define MWIFIEX_SUPPORTED_RATES_EXT             32
90#define MWIFIEX_TDLS_SUPPORTED_RATES		8
91#define MWIFIEX_TDLS_DEF_QOS_CAPAB		0xf
92#define MWIFIEX_PRIO_BK				2
93#define MWIFIEX_PRIO_VI				5
94#define MWIFIEX_SUPPORTED_CHANNELS		2
95#define MWIFIEX_OPERATING_CLASSES		16
96
97struct mwifiex_uap_bss_param {
98	u8 channel;
99	u8 band_cfg;
100	u16 rts_threshold;
101	u16 frag_threshold;
102	u8 retry_limit;
103	struct mwifiex_802_11_ssid ssid;
104	u8 bcast_ssid_ctl;
105	u8 radio_ctl;
106	u8 dtim_period;
107	u16 beacon_period;
108	u16 auth_mode;
109	u16 protocol;
110	u16 key_mgmt;
111	u16 key_mgmt_operation;
112	struct wpa_param wpa_cfg;
113	struct wep_key wep_cfg[NUM_WEP_KEYS];
114	struct ieee80211_ht_cap ht_cap;
115	struct ieee80211_vht_cap vht_cap;
116	u8 rates[MWIFIEX_SUPPORTED_RATES];
117	u32 sta_ao_timer;
118	u32 ps_sta_ao_timer;
119	u8 qos_info;
120	u8 power_constraint;
121	struct mwifiex_types_wmm_info wmm_info;
122	u8 mac_addr[ETH_ALEN];
123};
124
125enum {
126	ADHOC_IDLE,
127	ADHOC_STARTED,
128	ADHOC_JOINED,
129	ADHOC_COALESCED
130};
131
132struct mwifiex_ds_get_stats {
133	u32 mcast_tx_frame;
134	u32 failed;
135	u32 retry;
136	u32 multi_retry;
137	u32 frame_dup;
138	u32 rts_success;
139	u32 rts_failure;
140	u32 ack_failure;
141	u32 rx_frag;
142	u32 mcast_rx_frame;
143	u32 fcs_error;
144	u32 tx_frame;
145	u32 wep_icv_error[4];
146	u32 bcn_rcv_cnt;
147	u32 bcn_miss_cnt;
148};
149
150#define MWIFIEX_MAX_VER_STR_LEN    128
151
152struct mwifiex_ver_ext {
153	u32 version_str_sel;
154	char version_str[MWIFIEX_MAX_VER_STR_LEN];
155};
156
157struct mwifiex_bss_info {
158	u32 bss_mode;
159	struct cfg80211_ssid ssid;
160	u32 bss_chan;
161	u8 country_code[3];
162	u32 media_connected;
163	u32 max_power_level;
164	u32 min_power_level;
165	u32 adhoc_state;
166	signed int bcn_nf_last;
167	u32 wep_status;
168	u32 is_hs_configured;
169	u32 is_deep_sleep;
170	u8 bssid[ETH_ALEN];
171};
172
173#define MAX_NUM_TID     8
174
175#define MAX_RX_WINSIZE  64
176
177struct mwifiex_ds_rx_reorder_tbl {
178	u16 tid;
179	u8 ta[ETH_ALEN];
180	u32 start_win;
181	u32 win_size;
182	u32 buffer[MAX_RX_WINSIZE];
183};
184
185struct mwifiex_ds_tx_ba_stream_tbl {
186	u16 tid;
187	u8 ra[ETH_ALEN];
188	u8 amsdu;
189};
190
191#define DBG_CMD_NUM    5
192#define MWIFIEX_DBG_SDIO_MP_NUM    10
193
194struct tdls_peer_info {
195	u8 peer_addr[ETH_ALEN];
196};
197
198struct mwifiex_debug_info {
199	unsigned int debug_mask;
200	u32 int_counter;
201	u32 packets_out[MAX_NUM_TID];
202	u32 tx_buf_size;
203	u32 curr_tx_buf_size;
204	u32 tx_tbl_num;
205	struct mwifiex_ds_tx_ba_stream_tbl
206		tx_tbl[MWIFIEX_MAX_TX_BASTREAM_SUPPORTED];
207	u32 rx_tbl_num;
208	struct mwifiex_ds_rx_reorder_tbl rx_tbl
209		[MWIFIEX_MAX_RX_BASTREAM_SUPPORTED];
210	u32 tdls_peer_num;
211	struct tdls_peer_info tdls_list
212		[MWIFIEX_MAX_TDLS_PEER_SUPPORTED];
213	u16 ps_mode;
214	u32 ps_state;
215	u8 is_deep_sleep;
216	u8 pm_wakeup_card_req;
217	u32 pm_wakeup_fw_try;
218	u8 is_hs_configured;
219	u8 hs_activated;
220	u32 num_cmd_host_to_card_failure;
221	u32 num_cmd_sleep_cfm_host_to_card_failure;
222	u32 num_tx_host_to_card_failure;
223	u32 num_event_deauth;
224	u32 num_event_disassoc;
225	u32 num_event_link_lost;
226	u32 num_cmd_deauth;
227	u32 num_cmd_assoc_success;
228	u32 num_cmd_assoc_failure;
229	u32 num_tx_timeout;
230	u8 is_cmd_timedout;
231	u16 timeout_cmd_id;
232	u16 timeout_cmd_act;
233	u16 last_cmd_id[DBG_CMD_NUM];
234	u16 last_cmd_act[DBG_CMD_NUM];
235	u16 last_cmd_index;
236	u16 last_cmd_resp_id[DBG_CMD_NUM];
237	u16 last_cmd_resp_index;
238	u16 last_event[DBG_CMD_NUM];
239	u16 last_event_index;
240	u8 data_sent;
241	u8 cmd_sent;
242	u8 cmd_resp_received;
243	u8 event_received;
244	u32 last_mp_wr_bitmap[MWIFIEX_DBG_SDIO_MP_NUM];
245	u32 last_mp_wr_ports[MWIFIEX_DBG_SDIO_MP_NUM];
246	u32 last_mp_wr_len[MWIFIEX_DBG_SDIO_MP_NUM];
247	u32 last_mp_curr_wr_port[MWIFIEX_DBG_SDIO_MP_NUM];
248	u8 last_sdio_mp_index;
249};
250
251#define MWIFIEX_KEY_INDEX_UNICAST	0x40000000
252#define PN_LEN				16
253
254struct mwifiex_ds_encrypt_key {
255	u32 key_disable;
256	u32 key_index;
257	u32 key_len;
258	u8 key_material[WLAN_MAX_KEY_LEN];
259	u8 mac_addr[ETH_ALEN];
260	u32 is_wapi_key;
261	u8 pn[PN_LEN];		/* packet number */
262	u8 pn_len;
263	u8 is_igtk_key;
264	u8 is_current_wep_key;
265	u8 is_rx_seq_valid;
266	u8 is_igtk_def_key;
267};
268
269struct mwifiex_power_cfg {
270	u32 is_power_auto;
271	u32 is_power_fixed;
272	u32 power_level;
273};
274
275struct mwifiex_ds_hs_cfg {
276	u32 is_invoke_hostcmd;
277	/*  Bit0: non-unicast data
278	 *  Bit1: unicast data
279	 *  Bit2: mac events
280	 *  Bit3: magic packet
281	 */
282	u32 conditions;
283	u32 gpio;
284	u32 gap;
285};
286
287struct mwifiex_ds_wakeup_reason {
288	u16  hs_wakeup_reason;
289};
290
291#define DEEP_SLEEP_ON  1
292#define DEEP_SLEEP_OFF 0
293#define DEEP_SLEEP_IDLE_TIME	100
294#define PS_MODE_AUTO		1
295
296struct mwifiex_ds_auto_ds {
297	u16 auto_ds;
298	u16 idle_time;
299};
300
301struct mwifiex_ds_pm_cfg {
302	union {
303		u32 ps_mode;
304		struct mwifiex_ds_hs_cfg hs_cfg;
305		struct mwifiex_ds_auto_ds auto_deep_sleep;
306		u32 sleep_period;
307	} param;
308};
309
310struct mwifiex_11ac_vht_cfg {
311	u8 band_config;
312	u8 misc_config;
313	u32 cap_info;
314	u32 mcs_tx_set;
315	u32 mcs_rx_set;
316};
317
318struct mwifiex_ds_11n_tx_cfg {
319	u16 tx_htcap;
320	u16 tx_htinfo;
321	u16 misc_config; /* Needed for 802.11AC cards only */
322};
323
324struct mwifiex_ds_11n_amsdu_aggr_ctrl {
325	u16 enable;
326	u16 curr_buf_size;
327};
328
329struct mwifiex_ds_ant_cfg {
330	u32 tx_ant;
331	u32 rx_ant;
332};
333
334#define MWIFIEX_NUM_OF_CMD_BUFFER	50
335#define MWIFIEX_SIZE_OF_CMD_BUFFER	2048
336
337enum {
338	MWIFIEX_IE_TYPE_GEN_IE = 0,
339	MWIFIEX_IE_TYPE_ARP_FILTER,
340};
341
342enum {
343	MWIFIEX_REG_MAC = 1,
344	MWIFIEX_REG_BBP,
345	MWIFIEX_REG_RF,
346	MWIFIEX_REG_PMIC,
347	MWIFIEX_REG_CAU,
348};
349
350struct mwifiex_ds_reg_rw {
351	u32 type;
352	u32 offset;
353	u32 value;
354};
355
356#define MAX_EEPROM_DATA 256
357
358struct mwifiex_ds_read_eeprom {
359	u16 offset;
360	u16 byte_count;
361	u8 value[MAX_EEPROM_DATA];
362};
363
364struct mwifiex_ds_mem_rw {
365	u32 addr;
366	u32 value;
367};
368
369#define IEEE_MAX_IE_SIZE		256
370
371#define MWIFIEX_IE_HDR_SIZE	(sizeof(struct mwifiex_ie) - IEEE_MAX_IE_SIZE)
372
373struct mwifiex_ds_misc_gen_ie {
374	u32 type;
375	u32 len;
376	u8 ie_data[IEEE_MAX_IE_SIZE];
377};
378
379struct mwifiex_ds_misc_cmd {
380	u32 len;
381	u8 cmd[MWIFIEX_SIZE_OF_CMD_BUFFER];
382};
383
384#define BITMASK_BCN_RSSI_LOW	BIT(0)
385#define BITMASK_BCN_RSSI_HIGH	BIT(4)
386
387enum subsc_evt_rssi_state {
388	EVENT_HANDLED,
389	RSSI_LOW_RECVD,
390	RSSI_HIGH_RECVD
391};
392
393struct subsc_evt_cfg {
394	u8 abs_value;
395	u8 evt_freq;
396};
397
398struct mwifiex_ds_misc_subsc_evt {
399	u16 action;
400	u16 events;
401	struct subsc_evt_cfg bcn_l_rssi_cfg;
402	struct subsc_evt_cfg bcn_h_rssi_cfg;
403};
404
405#define MWIFIEX_MEF_MAX_BYTESEQ		6	/* non-adjustable */
406#define MWIFIEX_MEF_MAX_FILTERS		10
407
408struct mwifiex_mef_filter {
409	u16 repeat;
410	u16 offset;
411	s8 byte_seq[MWIFIEX_MEF_MAX_BYTESEQ + 1];
412	u8 filt_type;
413	u8 filt_action;
414};
415
416struct mwifiex_mef_entry {
417	u8 mode;
418	u8 action;
419	struct mwifiex_mef_filter filter[MWIFIEX_MEF_MAX_FILTERS];
420};
421
422struct mwifiex_ds_mef_cfg {
423	u32 criteria;
424	u16 num_entries;
425	struct mwifiex_mef_entry *mef_entry;
426};
427
428#define MWIFIEX_MAX_VSIE_LEN       (256)
429#define MWIFIEX_MAX_VSIE_NUM       (8)
430#define MWIFIEX_VSIE_MASK_CLEAR    0x00
431#define MWIFIEX_VSIE_MASK_SCAN     0x01
432#define MWIFIEX_VSIE_MASK_ASSOC    0x02
433#define MWIFIEX_VSIE_MASK_ADHOC    0x04
434#define MWIFIEX_VSIE_MASK_BGSCAN   0x08
435
436enum {
437	MWIFIEX_FUNC_INIT = 1,
438	MWIFIEX_FUNC_SHUTDOWN,
439};
440
441enum COALESCE_OPERATION {
442	RECV_FILTER_MATCH_TYPE_EQ = 0x80,
443	RECV_FILTER_MATCH_TYPE_NE,
444};
445
446enum COALESCE_PACKET_TYPE {
447	PACKET_TYPE_UNICAST = 1,
448	PACKET_TYPE_MULTICAST = 2,
449	PACKET_TYPE_BROADCAST = 3
450};
451
452#define MWIFIEX_COALESCE_MAX_RULES	8
453#define MWIFIEX_COALESCE_MAX_BYTESEQ	4	/* non-adjustable */
454#define MWIFIEX_COALESCE_MAX_FILTERS	4
455#define MWIFIEX_MAX_COALESCING_DELAY	100     /* in msecs */
456
457struct filt_field_param {
458	u8 operation;
459	u8 operand_len;
460	u16 offset;
461	u8 operand_byte_stream[MWIFIEX_COALESCE_MAX_BYTESEQ];
462};
463
464struct mwifiex_coalesce_rule {
465	u16 max_coalescing_delay;
466	u8 num_of_fields;
467	u8 pkt_type;
468	struct filt_field_param params[MWIFIEX_COALESCE_MAX_FILTERS];
469};
470
471struct mwifiex_ds_coalesce_cfg {
472	u16 num_of_rules;
473	struct mwifiex_coalesce_rule rule[MWIFIEX_COALESCE_MAX_RULES];
474};
475
476struct mwifiex_ds_tdls_oper {
477	u16 tdls_action;
478	u8 peer_mac[ETH_ALEN];
479	u16 capability;
480	u8 qos_info;
481	u8 *ext_capab;
482	u8 ext_capab_len;
483	u8 *supp_rates;
484	u8 supp_rates_len;
485	u8 *ht_capab;
486};
487
488#endif /* !_MWIFIEX_IOCTL_H_ */
489