1/* SPDX-License-Identifier: GPL-2.0 */ 2#ifndef HOSTAP_WLAN_H 3#define HOSTAP_WLAN_H 4 5#include <linux/interrupt.h> 6#include <linux/wireless.h> 7#include <linux/netdevice.h> 8#include <linux/etherdevice.h> 9#include <linux/mutex.h> 10#include <linux/refcount.h> 11#include <net/iw_handler.h> 12#include <net/ieee80211_radiotap.h> 13#include <net/lib80211.h> 14 15#include "hostap_config.h" 16#include "hostap_common.h" 17 18#define MAX_PARM_DEVICES 8 19#define PARM_MIN_MAX "1-" __MODULE_STRING(MAX_PARM_DEVICES) 20#define DEF_INTS -1, -1, -1, -1, -1, -1, -1 21#define GET_INT_PARM(var,idx) var[var[idx] < 0 ? 0 : idx] 22 23 24/* Specific skb->protocol value that indicates that the packet already contains 25 * txdesc header. 26 * FIX: This might need own value that would be allocated especially for Prism2 27 * txdesc; ETH_P_CONTROL is commented as "Card specific control frames". 28 * However, these skb's should have only minimal path in the kernel side since 29 * prism2_send_mgmt() sends these with dev_queue_xmit() to prism2_tx(). */ 30#define ETH_P_HOSTAP ETH_P_CONTROL 31 32/* ARPHRD_IEEE80211_PRISM uses a bloated version of Prism2 RX frame header 33 * (from linux-wlan-ng) */ 34struct linux_wlan_ng_val { 35 u32 did; 36 u16 status, len; 37 u32 data; 38} __packed; 39 40struct linux_wlan_ng_prism_hdr { 41 u32 msgcode, msglen; 42 char devname[16]; 43 struct linux_wlan_ng_val hosttime, mactime, channel, rssi, sq, signal, 44 noise, rate, istx, frmlen; 45} __packed; 46 47struct linux_wlan_ng_cap_hdr { 48 __be32 version; 49 __be32 length; 50 __be64 mactime; 51 __be64 hosttime; 52 __be32 phytype; 53 __be32 channel; 54 __be32 datarate; 55 __be32 antenna; 56 __be32 priority; 57 __be32 ssi_type; 58 __be32 ssi_signal; 59 __be32 ssi_noise; 60 __be32 preamble; 61 __be32 encoding; 62} __packed; 63 64struct hostap_radiotap_rx { 65 struct ieee80211_radiotap_header hdr; 66 __le64 tsft; 67 u8 rate; 68 u8 padding; 69 __le16 chan_freq; 70 __le16 chan_flags; 71 s8 dbm_antsignal; 72 s8 dbm_antnoise; 73} __packed; 74 75#define LWNG_CAP_DID_BASE (4 | (1 << 6)) /* section 4, group 1 */ 76#define LWNG_CAPHDR_VERSION 0x80211001 77 78struct hfa384x_rx_frame { 79 /* HFA384X RX frame descriptor */ 80 __le16 status; /* HFA384X_RX_STATUS_ flags */ 81 __le32 time; /* timestamp, 1 microsecond resolution */ 82 u8 silence; /* 27 .. 154; seems to be 0 */ 83 u8 signal; /* 27 .. 154 */ 84 u8 rate; /* 10, 20, 55, or 110 */ 85 u8 rxflow; 86 __le32 reserved; 87 88 /* 802.11 */ 89 __le16 frame_control; 90 __le16 duration_id; 91 u8 addr1[ETH_ALEN]; 92 u8 addr2[ETH_ALEN]; 93 u8 addr3[ETH_ALEN]; 94 __le16 seq_ctrl; 95 u8 addr4[ETH_ALEN]; 96 __le16 data_len; 97 98 /* 802.3 */ 99 u8 dst_addr[ETH_ALEN]; 100 u8 src_addr[ETH_ALEN]; 101 __be16 len; 102 103 /* followed by frame data; max 2304 bytes */ 104} __packed; 105 106 107struct hfa384x_tx_frame { 108 /* HFA384X TX frame descriptor */ 109 __le16 status; /* HFA384X_TX_STATUS_ flags */ 110 __le16 reserved1; 111 __le16 reserved2; 112 __le32 sw_support; 113 u8 retry_count; /* not yet implemented */ 114 u8 tx_rate; /* Host AP only; 0 = firmware, or 10, 20, 55, 110 */ 115 __le16 tx_control; /* HFA384X_TX_CTRL_ flags */ 116 117 /* 802.11 */ 118 __le16 frame_control; /* parts not used */ 119 __le16 duration_id; 120 u8 addr1[ETH_ALEN]; 121 u8 addr2[ETH_ALEN]; /* filled by firmware */ 122 u8 addr3[ETH_ALEN]; 123 __le16 seq_ctrl; /* filled by firmware */ 124 u8 addr4[ETH_ALEN]; 125 __le16 data_len; 126 127 /* 802.3 */ 128 u8 dst_addr[ETH_ALEN]; 129 u8 src_addr[ETH_ALEN]; 130 __be16 len; 131 132 /* followed by frame data; max 2304 bytes */ 133} __packed; 134 135 136struct hfa384x_rid_hdr 137{ 138 __le16 len; 139 __le16 rid; 140} __packed; 141 142 143/* Macro for converting signal levels (range 27 .. 154) to wireless ext 144 * dBm value with some accuracy */ 145#define HFA384X_LEVEL_TO_dBm(v) 0x100 + (v) * 100 / 255 - 100 146 147#define HFA384X_LEVEL_TO_dBm_sign(v) (v) * 100 / 255 - 100 148 149struct hfa384x_scan_request { 150 __le16 channel_list; 151 __le16 txrate; /* HFA384X_RATES_* */ 152} __packed; 153 154struct hfa384x_hostscan_request { 155 __le16 channel_list; 156 __le16 txrate; 157 __le16 target_ssid_len; 158 u8 target_ssid[32]; 159} __packed; 160 161struct hfa384x_join_request { 162 u8 bssid[ETH_ALEN]; 163 __le16 channel; 164} __packed; 165 166struct hfa384x_info_frame { 167 __le16 len; 168 __le16 type; 169} __packed; 170 171struct hfa384x_comm_tallies { 172 __le16 tx_unicast_frames; 173 __le16 tx_multicast_frames; 174 __le16 tx_fragments; 175 __le16 tx_unicast_octets; 176 __le16 tx_multicast_octets; 177 __le16 tx_deferred_transmissions; 178 __le16 tx_single_retry_frames; 179 __le16 tx_multiple_retry_frames; 180 __le16 tx_retry_limit_exceeded; 181 __le16 tx_discards; 182 __le16 rx_unicast_frames; 183 __le16 rx_multicast_frames; 184 __le16 rx_fragments; 185 __le16 rx_unicast_octets; 186 __le16 rx_multicast_octets; 187 __le16 rx_fcs_errors; 188 __le16 rx_discards_no_buffer; 189 __le16 tx_discards_wrong_sa; 190 __le16 rx_discards_wep_undecryptable; 191 __le16 rx_message_in_msg_fragments; 192 __le16 rx_message_in_bad_msg_fragments; 193} __packed; 194 195struct hfa384x_comm_tallies32 { 196 __le32 tx_unicast_frames; 197 __le32 tx_multicast_frames; 198 __le32 tx_fragments; 199 __le32 tx_unicast_octets; 200 __le32 tx_multicast_octets; 201 __le32 tx_deferred_transmissions; 202 __le32 tx_single_retry_frames; 203 __le32 tx_multiple_retry_frames; 204 __le32 tx_retry_limit_exceeded; 205 __le32 tx_discards; 206 __le32 rx_unicast_frames; 207 __le32 rx_multicast_frames; 208 __le32 rx_fragments; 209 __le32 rx_unicast_octets; 210 __le32 rx_multicast_octets; 211 __le32 rx_fcs_errors; 212 __le32 rx_discards_no_buffer; 213 __le32 tx_discards_wrong_sa; 214 __le32 rx_discards_wep_undecryptable; 215 __le32 rx_message_in_msg_fragments; 216 __le32 rx_message_in_bad_msg_fragments; 217} __packed; 218 219struct hfa384x_scan_result_hdr { 220 __le16 reserved; 221 __le16 scan_reason; 222#define HFA384X_SCAN_IN_PROGRESS 0 /* no results available yet */ 223#define HFA384X_SCAN_HOST_INITIATED 1 224#define HFA384X_SCAN_FIRMWARE_INITIATED 2 225#define HFA384X_SCAN_INQUIRY_FROM_HOST 3 226} __packed; 227 228#define HFA384X_SCAN_MAX_RESULTS 32 229 230struct hfa384x_scan_result { 231 __le16 chid; 232 __le16 anl; 233 __le16 sl; 234 u8 bssid[ETH_ALEN]; 235 __le16 beacon_interval; 236 __le16 capability; 237 __le16 ssid_len; 238 u8 ssid[32]; 239 u8 sup_rates[10]; 240 __le16 rate; 241} __packed; 242 243struct hfa384x_hostscan_result { 244 __le16 chid; 245 __le16 anl; 246 __le16 sl; 247 u8 bssid[ETH_ALEN]; 248 __le16 beacon_interval; 249 __le16 capability; 250 __le16 ssid_len; 251 u8 ssid[32]; 252 u8 sup_rates[10]; 253 __le16 rate; 254 __le16 atim; 255} __packed; 256 257struct comm_tallies_sums { 258 unsigned int tx_unicast_frames; 259 unsigned int tx_multicast_frames; 260 unsigned int tx_fragments; 261 unsigned int tx_unicast_octets; 262 unsigned int tx_multicast_octets; 263 unsigned int tx_deferred_transmissions; 264 unsigned int tx_single_retry_frames; 265 unsigned int tx_multiple_retry_frames; 266 unsigned int tx_retry_limit_exceeded; 267 unsigned int tx_discards; 268 unsigned int rx_unicast_frames; 269 unsigned int rx_multicast_frames; 270 unsigned int rx_fragments; 271 unsigned int rx_unicast_octets; 272 unsigned int rx_multicast_octets; 273 unsigned int rx_fcs_errors; 274 unsigned int rx_discards_no_buffer; 275 unsigned int tx_discards_wrong_sa; 276 unsigned int rx_discards_wep_undecryptable; 277 unsigned int rx_message_in_msg_fragments; 278 unsigned int rx_message_in_bad_msg_fragments; 279}; 280 281 282struct hfa384x_regs { 283 u16 cmd; 284 u16 evstat; 285 u16 offset0; 286 u16 offset1; 287 u16 swsupport0; 288}; 289 290 291#if defined(PRISM2_PCCARD) || defined(PRISM2_PLX) 292/* I/O ports for HFA384X Controller access */ 293#define HFA384X_CMD_OFF 0x00 294#define HFA384X_PARAM0_OFF 0x02 295#define HFA384X_PARAM1_OFF 0x04 296#define HFA384X_PARAM2_OFF 0x06 297#define HFA384X_STATUS_OFF 0x08 298#define HFA384X_RESP0_OFF 0x0A 299#define HFA384X_RESP1_OFF 0x0C 300#define HFA384X_RESP2_OFF 0x0E 301#define HFA384X_INFOFID_OFF 0x10 302#define HFA384X_CONTROL_OFF 0x14 303#define HFA384X_SELECT0_OFF 0x18 304#define HFA384X_SELECT1_OFF 0x1A 305#define HFA384X_OFFSET0_OFF 0x1C 306#define HFA384X_OFFSET1_OFF 0x1E 307#define HFA384X_RXFID_OFF 0x20 308#define HFA384X_ALLOCFID_OFF 0x22 309#define HFA384X_TXCOMPLFID_OFF 0x24 310#define HFA384X_SWSUPPORT0_OFF 0x28 311#define HFA384X_SWSUPPORT1_OFF 0x2A 312#define HFA384X_SWSUPPORT2_OFF 0x2C 313#define HFA384X_EVSTAT_OFF 0x30 314#define HFA384X_INTEN_OFF 0x32 315#define HFA384X_EVACK_OFF 0x34 316#define HFA384X_DATA0_OFF 0x36 317#define HFA384X_DATA1_OFF 0x38 318#define HFA384X_AUXPAGE_OFF 0x3A 319#define HFA384X_AUXOFFSET_OFF 0x3C 320#define HFA384X_AUXDATA_OFF 0x3E 321#endif /* PRISM2_PCCARD || PRISM2_PLX */ 322 323#ifdef PRISM2_PCI 324/* Memory addresses for ISL3874 controller access */ 325#define HFA384X_CMD_OFF 0x00 326#define HFA384X_PARAM0_OFF 0x04 327#define HFA384X_PARAM1_OFF 0x08 328#define HFA384X_PARAM2_OFF 0x0C 329#define HFA384X_STATUS_OFF 0x10 330#define HFA384X_RESP0_OFF 0x14 331#define HFA384X_RESP1_OFF 0x18 332#define HFA384X_RESP2_OFF 0x1C 333#define HFA384X_INFOFID_OFF 0x20 334#define HFA384X_CONTROL_OFF 0x28 335#define HFA384X_SELECT0_OFF 0x30 336#define HFA384X_SELECT1_OFF 0x34 337#define HFA384X_OFFSET0_OFF 0x38 338#define HFA384X_OFFSET1_OFF 0x3C 339#define HFA384X_RXFID_OFF 0x40 340#define HFA384X_ALLOCFID_OFF 0x44 341#define HFA384X_TXCOMPLFID_OFF 0x48 342#define HFA384X_PCICOR_OFF 0x4C 343#define HFA384X_SWSUPPORT0_OFF 0x50 344#define HFA384X_SWSUPPORT1_OFF 0x54 345#define HFA384X_SWSUPPORT2_OFF 0x58 346#define HFA384X_PCIHCR_OFF 0x5C 347#define HFA384X_EVSTAT_OFF 0x60 348#define HFA384X_INTEN_OFF 0x64 349#define HFA384X_EVACK_OFF 0x68 350#define HFA384X_DATA0_OFF 0x6C 351#define HFA384X_DATA1_OFF 0x70 352#define HFA384X_AUXPAGE_OFF 0x74 353#define HFA384X_AUXOFFSET_OFF 0x78 354#define HFA384X_AUXDATA_OFF 0x7C 355#define HFA384X_PCI_M0_ADDRH_OFF 0x80 356#define HFA384X_PCI_M0_ADDRL_OFF 0x84 357#define HFA384X_PCI_M0_LEN_OFF 0x88 358#define HFA384X_PCI_M0_CTL_OFF 0x8C 359#define HFA384X_PCI_STATUS_OFF 0x98 360#define HFA384X_PCI_M1_ADDRH_OFF 0xA0 361#define HFA384X_PCI_M1_ADDRL_OFF 0xA4 362#define HFA384X_PCI_M1_LEN_OFF 0xA8 363#define HFA384X_PCI_M1_CTL_OFF 0xAC 364 365/* PCI bus master control bits (these are undocumented; based on guessing and 366 * experimenting..) */ 367#define HFA384X_PCI_CTL_FROM_BAP (BIT(5) | BIT(1) | BIT(0)) 368#define HFA384X_PCI_CTL_TO_BAP (BIT(5) | BIT(0)) 369 370#endif /* PRISM2_PCI */ 371 372 373/* Command codes for CMD reg. */ 374#define HFA384X_CMDCODE_INIT 0x00 375#define HFA384X_CMDCODE_ENABLE 0x01 376#define HFA384X_CMDCODE_DISABLE 0x02 377#define HFA384X_CMDCODE_ALLOC 0x0A 378#define HFA384X_CMDCODE_TRANSMIT 0x0B 379#define HFA384X_CMDCODE_INQUIRE 0x11 380#define HFA384X_CMDCODE_ACCESS 0x21 381#define HFA384X_CMDCODE_ACCESS_WRITE (0x21 | BIT(8)) 382#define HFA384X_CMDCODE_DOWNLOAD 0x22 383#define HFA384X_CMDCODE_READMIF 0x30 384#define HFA384X_CMDCODE_WRITEMIF 0x31 385#define HFA384X_CMDCODE_TEST 0x38 386 387#define HFA384X_CMDCODE_MASK 0x3F 388 389/* Test mode operations */ 390#define HFA384X_TEST_CHANGE_CHANNEL 0x08 391#define HFA384X_TEST_MONITOR 0x0B 392#define HFA384X_TEST_STOP 0x0F 393#define HFA384X_TEST_CFG_BITS 0x15 394#define HFA384X_TEST_CFG_BIT_ALC BIT(3) 395 396#define HFA384X_CMD_BUSY BIT(15) 397 398#define HFA384X_CMD_TX_RECLAIM BIT(8) 399 400#define HFA384X_OFFSET_ERR BIT(14) 401#define HFA384X_OFFSET_BUSY BIT(15) 402 403 404/* ProgMode for download command */ 405#define HFA384X_PROGMODE_DISABLE 0 406#define HFA384X_PROGMODE_ENABLE_VOLATILE 1 407#define HFA384X_PROGMODE_ENABLE_NON_VOLATILE 2 408#define HFA384X_PROGMODE_PROGRAM_NON_VOLATILE 3 409 410#define HFA384X_AUX_MAGIC0 0xfe01 411#define HFA384X_AUX_MAGIC1 0xdc23 412#define HFA384X_AUX_MAGIC2 0xba45 413 414#define HFA384X_AUX_PORT_DISABLED 0 415#define HFA384X_AUX_PORT_DISABLE BIT(14) 416#define HFA384X_AUX_PORT_ENABLE BIT(15) 417#define HFA384X_AUX_PORT_ENABLED (BIT(14) | BIT(15)) 418#define HFA384X_AUX_PORT_MASK (BIT(14) | BIT(15)) 419 420#define PRISM2_PDA_SIZE 1024 421 422 423/* Events; EvStat, Interrupt mask (IntEn), and acknowledge bits (EvAck) */ 424#define HFA384X_EV_TICK BIT(15) 425#define HFA384X_EV_WTERR BIT(14) 426#define HFA384X_EV_INFDROP BIT(13) 427#ifdef PRISM2_PCI 428#define HFA384X_EV_PCI_M1 BIT(9) 429#define HFA384X_EV_PCI_M0 BIT(8) 430#endif /* PRISM2_PCI */ 431#define HFA384X_EV_INFO BIT(7) 432#define HFA384X_EV_DTIM BIT(5) 433#define HFA384X_EV_CMD BIT(4) 434#define HFA384X_EV_ALLOC BIT(3) 435#define HFA384X_EV_TXEXC BIT(2) 436#define HFA384X_EV_TX BIT(1) 437#define HFA384X_EV_RX BIT(0) 438 439 440/* HFA384X Information frames */ 441#define HFA384X_INFO_HANDOVERADDR 0xF000 /* AP f/w ? */ 442#define HFA384X_INFO_HANDOVERDEAUTHADDR 0xF001 /* AP f/w 1.3.7 */ 443#define HFA384X_INFO_COMMTALLIES 0xF100 444#define HFA384X_INFO_SCANRESULTS 0xF101 445#define HFA384X_INFO_CHANNELINFORESULTS 0xF102 /* AP f/w only */ 446#define HFA384X_INFO_HOSTSCANRESULTS 0xF103 447#define HFA384X_INFO_LINKSTATUS 0xF200 448#define HFA384X_INFO_ASSOCSTATUS 0xF201 /* ? */ 449#define HFA384X_INFO_AUTHREQ 0xF202 /* ? */ 450#define HFA384X_INFO_PSUSERCNT 0xF203 /* ? */ 451#define HFA384X_INFO_KEYIDCHANGED 0xF204 /* ? */ 452 453enum { HFA384X_LINKSTATUS_CONNECTED = 1, 454 HFA384X_LINKSTATUS_DISCONNECTED = 2, 455 HFA384X_LINKSTATUS_AP_CHANGE = 3, 456 HFA384X_LINKSTATUS_AP_OUT_OF_RANGE = 4, 457 HFA384X_LINKSTATUS_AP_IN_RANGE = 5, 458 HFA384X_LINKSTATUS_ASSOC_FAILED = 6 }; 459 460enum { HFA384X_PORTTYPE_BSS = 1, HFA384X_PORTTYPE_WDS = 2, 461 HFA384X_PORTTYPE_PSEUDO_IBSS = 3, HFA384X_PORTTYPE_IBSS = 0, 462 HFA384X_PORTTYPE_HOSTAP = 6 }; 463 464#define HFA384X_RATES_1MBPS BIT(0) 465#define HFA384X_RATES_2MBPS BIT(1) 466#define HFA384X_RATES_5MBPS BIT(2) 467#define HFA384X_RATES_11MBPS BIT(3) 468 469#define HFA384X_ROAMING_FIRMWARE 1 470#define HFA384X_ROAMING_HOST 2 471#define HFA384X_ROAMING_DISABLED 3 472 473#define HFA384X_WEPFLAGS_PRIVACYINVOKED BIT(0) 474#define HFA384X_WEPFLAGS_EXCLUDEUNENCRYPTED BIT(1) 475#define HFA384X_WEPFLAGS_HOSTENCRYPT BIT(4) 476#define HFA384X_WEPFLAGS_HOSTDECRYPT BIT(7) 477 478#define HFA384X_RX_STATUS_MSGTYPE (BIT(15) | BIT(14) | BIT(13)) 479#define HFA384X_RX_STATUS_PCF BIT(12) 480#define HFA384X_RX_STATUS_MACPORT (BIT(10) | BIT(9) | BIT(8)) 481#define HFA384X_RX_STATUS_UNDECR BIT(1) 482#define HFA384X_RX_STATUS_FCSERR BIT(0) 483 484#define HFA384X_RX_STATUS_GET_MSGTYPE(s) \ 485(((s) & HFA384X_RX_STATUS_MSGTYPE) >> 13) 486#define HFA384X_RX_STATUS_GET_MACPORT(s) \ 487(((s) & HFA384X_RX_STATUS_MACPORT) >> 8) 488 489enum { HFA384X_RX_MSGTYPE_NORMAL = 0, HFA384X_RX_MSGTYPE_RFC1042 = 1, 490 HFA384X_RX_MSGTYPE_BRIDGETUNNEL = 2, HFA384X_RX_MSGTYPE_MGMT = 4 }; 491 492 493#define HFA384X_TX_CTRL_ALT_RTRY BIT(5) 494#define HFA384X_TX_CTRL_802_11 BIT(3) 495#define HFA384X_TX_CTRL_802_3 0 496#define HFA384X_TX_CTRL_TX_EX BIT(2) 497#define HFA384X_TX_CTRL_TX_OK BIT(1) 498 499#define HFA384X_TX_STATUS_RETRYERR BIT(0) 500#define HFA384X_TX_STATUS_AGEDERR BIT(1) 501#define HFA384X_TX_STATUS_DISCON BIT(2) 502#define HFA384X_TX_STATUS_FORMERR BIT(3) 503 504/* HFA3861/3863 (BBP) Control Registers */ 505#define HFA386X_CR_TX_CONFIGURE 0x12 /* CR9 */ 506#define HFA386X_CR_RX_CONFIGURE 0x14 /* CR10 */ 507#define HFA386X_CR_A_D_TEST_MODES2 0x1A /* CR13 */ 508#define HFA386X_CR_MANUAL_TX_POWER 0x3E /* CR31 */ 509#define HFA386X_CR_MEASURED_TX_POWER 0x74 /* CR58 */ 510 511 512#ifdef __KERNEL__ 513 514#define PRISM2_TXFID_COUNT 8 515#define PRISM2_DATA_MAXLEN 2304 516#define PRISM2_TXFID_LEN (PRISM2_DATA_MAXLEN + sizeof(struct hfa384x_tx_frame)) 517#define PRISM2_TXFID_EMPTY 0xffff 518#define PRISM2_TXFID_RESERVED 0xfffe 519#define PRISM2_DUMMY_FID 0xffff 520#define MAX_SSID_LEN 32 521#define MAX_NAME_LEN 32 /* this is assumed to be equal to MAX_SSID_LEN */ 522 523#define PRISM2_DUMP_RX_HDR BIT(0) 524#define PRISM2_DUMP_TX_HDR BIT(1) 525#define PRISM2_DUMP_TXEXC_HDR BIT(2) 526 527struct hostap_tx_callback_info { 528 u16 idx; 529 void (*func)(struct sk_buff *, int ok, void *); 530 void *data; 531 struct hostap_tx_callback_info *next; 532}; 533 534 535/* IEEE 802.11 requires that STA supports concurrent reception of at least 536 * three fragmented frames. This define can be increased to support more 537 * concurrent frames, but it should be noted that each entry can consume about 538 * 2 kB of RAM and increasing cache size will slow down frame reassembly. */ 539#define PRISM2_FRAG_CACHE_LEN 4 540 541struct prism2_frag_entry { 542 unsigned long first_frag_time; 543 unsigned int seq; 544 unsigned int last_frag; 545 struct sk_buff *skb; 546 u8 src_addr[ETH_ALEN]; 547 u8 dst_addr[ETH_ALEN]; 548}; 549 550 551struct hostap_cmd_queue { 552 struct list_head list; 553 wait_queue_head_t compl; 554 volatile enum { CMD_SLEEP, CMD_CALLBACK, CMD_COMPLETED } type; 555 void (*callback)(struct net_device *dev, long context, u16 resp0, 556 u16 res); 557 long context; 558 u16 cmd, param0, param1; 559 u16 resp0, res; 560 volatile int issued, issuing; 561 562 refcount_t usecnt; 563 int del_req; 564}; 565 566/* options for hw_shutdown */ 567#define HOSTAP_HW_NO_DISABLE BIT(0) 568#define HOSTAP_HW_ENABLE_CMDCOMPL BIT(1) 569 570typedef struct local_info local_info_t; 571 572struct prism2_helper_functions { 573 /* these functions are defined in hardware model specific files 574 * (hostap_{cs,plx,pci}.c */ 575 int (*card_present)(local_info_t *local); 576 void (*cor_sreset)(local_info_t *local); 577 void (*genesis_reset)(local_info_t *local, int hcr); 578 579 /* the following functions are from hostap_hw.c, but they may have some 580 * hardware model specific code */ 581 582 /* FIX: low-level commands like cmd might disappear at some point to 583 * make it easier to change them if needed (e.g., cmd would be replaced 584 * with write_mif/read_mif/testcmd/inquire); at least get_rid and 585 * set_rid might move to hostap_{cs,plx,pci}.c */ 586 int (*cmd)(struct net_device *dev, u16 cmd, u16 param0, u16 *param1, 587 u16 *resp0); 588 void (*read_regs)(struct net_device *dev, struct hfa384x_regs *regs); 589 int (*get_rid)(struct net_device *dev, u16 rid, void *buf, int len, 590 int exact_len); 591 int (*set_rid)(struct net_device *dev, u16 rid, void *buf, int len); 592 int (*hw_enable)(struct net_device *dev, int initial); 593 int (*hw_config)(struct net_device *dev, int initial); 594 void (*hw_reset)(struct net_device *dev); 595 void (*hw_shutdown)(struct net_device *dev, int no_disable); 596 int (*reset_port)(struct net_device *dev); 597 void (*schedule_reset)(local_info_t *local); 598 int (*download)(local_info_t *local, 599 struct prism2_download_param *param); 600 int (*tx)(struct sk_buff *skb, struct net_device *dev); 601 int (*set_tim)(struct net_device *dev, int aid, int set); 602 const struct proc_ops *read_aux_proc_ops; 603 604 int need_tx_headroom; /* number of bytes of headroom needed before 605 * IEEE 802.11 header */ 606 enum { HOSTAP_HW_PCCARD, HOSTAP_HW_PLX, HOSTAP_HW_PCI } hw_type; 607}; 608 609 610struct prism2_download_data { 611 u32 dl_cmd; 612 u32 start_addr; 613 u32 num_areas; 614 struct prism2_download_data_area { 615 u32 addr; /* wlan card address */ 616 u32 len; 617 u8 *data; /* allocated data */ 618 } data[]; 619}; 620 621 622#define HOSTAP_MAX_BSS_COUNT 64 623#define MAX_WPA_IE_LEN 64 624 625struct hostap_bss_info { 626 struct list_head list; 627 unsigned long last_update; 628 unsigned int count; 629 u8 bssid[ETH_ALEN]; 630 u16 capab_info; 631 u8 ssid[32]; 632 size_t ssid_len; 633 u8 wpa_ie[MAX_WPA_IE_LEN]; 634 size_t wpa_ie_len; 635 u8 rsn_ie[MAX_WPA_IE_LEN]; 636 size_t rsn_ie_len; 637 int chan; 638 int included; 639}; 640 641 642/* Per radio private Host AP data - shared by all net devices interfaces used 643 * by each radio (wlan#, wlan#ap, wlan#sta, WDS). 644 * ((struct hostap_interface *) netdev_priv(dev))->local points to this 645 * structure. */ 646struct local_info { 647 struct module *hw_module; 648 int card_idx; 649 int dev_enabled; 650 int master_dev_auto_open; /* was master device opened automatically */ 651 int num_dev_open; /* number of open devices */ 652 struct net_device *dev; /* master radio device */ 653 struct net_device *ddev; /* main data device */ 654 struct list_head hostap_interfaces; /* Host AP interface list (contains 655 * struct hostap_interface entries) 656 */ 657 rwlock_t iface_lock; /* hostap_interfaces read lock; use write lock 658 * when removing entries from the list. 659 * TX and RX paths can use read lock. */ 660 spinlock_t cmdlock, baplock, lock, irq_init_lock; 661 struct mutex rid_bap_mtx; 662 u16 infofid; /* MAC buffer id for info frame */ 663 /* txfid, intransmitfid, next_txtid, and next_alloc are protected by 664 * txfidlock */ 665 spinlock_t txfidlock; 666 int txfid_len; /* length of allocated TX buffers */ 667 u16 txfid[PRISM2_TXFID_COUNT]; /* buffer IDs for TX frames */ 668 /* buffer IDs for intransmit frames or PRISM2_TXFID_EMPTY if 669 * corresponding txfid is free for next TX frame */ 670 u16 intransmitfid[PRISM2_TXFID_COUNT]; 671 int next_txfid; /* index to the next txfid to be checked for 672 * availability */ 673 int next_alloc; /* index to the next intransmitfid to be checked for 674 * allocation events */ 675 676 /* bitfield for atomic bitops */ 677#define HOSTAP_BITS_TRANSMIT 0 678#define HOSTAP_BITS_BAP_TASKLET 1 679#define HOSTAP_BITS_BAP_TASKLET2 2 680 unsigned long bits; 681 682 struct ap_data *ap; 683 684 char essid[MAX_SSID_LEN + 1]; 685 char name[MAX_NAME_LEN + 1]; 686 int name_set; 687 u16 channel_mask; /* mask of allowed channels */ 688 u16 scan_channel_mask; /* mask of channels to be scanned */ 689 struct comm_tallies_sums comm_tallies; 690 struct proc_dir_entry *proc; 691 int iw_mode; /* operating mode (IW_MODE_*) */ 692 int pseudo_adhoc; /* 0: IW_MODE_ADHOC is real 802.11 compliant IBSS 693 * 1: IW_MODE_ADHOC is "pseudo IBSS" */ 694 char bssid[ETH_ALEN]; 695 int channel; 696 int beacon_int; 697 int dtim_period; 698 int mtu; 699 int frame_dump; /* dump RX/TX frame headers, PRISM2_DUMP_ flags */ 700 int fw_tx_rate_control; 701 u16 tx_rate_control; 702 u16 basic_rates; 703 int hw_resetting; 704 int hw_ready; 705 int hw_reset_tries; /* how many times reset has been tried */ 706 int hw_downloading; 707 int shutdown; 708 int pri_only; 709 int no_pri; /* no PRI f/w present */ 710 int sram_type; /* 8 = x8 SRAM, 16 = x16 SRAM, -1 = unknown */ 711 712 enum { 713 PRISM2_TXPOWER_AUTO = 0, PRISM2_TXPOWER_OFF, 714 PRISM2_TXPOWER_FIXED, PRISM2_TXPOWER_UNKNOWN 715 } txpower_type; 716 int txpower; /* if txpower_type == PRISM2_TXPOWER_FIXED */ 717 718 /* command queue for hfa384x_cmd(); protected with cmdlock */ 719 struct list_head cmd_queue; 720 /* max_len for cmd_queue; in addition, cmd_callback can use two 721 * additional entries to prevent sleeping commands from stopping 722 * transmits */ 723#define HOSTAP_CMD_QUEUE_MAX_LEN 16 724 int cmd_queue_len; /* number of entries in cmd_queue */ 725 726 /* if card timeout is detected in interrupt context, reset_queue is 727 * used to schedule card reseting to be done in user context */ 728 struct work_struct reset_queue; 729 730 /* For scheduling a change of the promiscuous mode RID */ 731 int is_promisc; 732 struct work_struct set_multicast_list_queue; 733 734 struct work_struct set_tim_queue; 735 struct list_head set_tim_list; 736 spinlock_t set_tim_lock; 737 738 int wds_max_connections; 739 int wds_connections; 740#define HOSTAP_WDS_BROADCAST_RA BIT(0) 741#define HOSTAP_WDS_AP_CLIENT BIT(1) 742#define HOSTAP_WDS_STANDARD_FRAME BIT(2) 743 u32 wds_type; 744 u16 tx_control; /* flags to be used in TX description */ 745 int manual_retry_count; /* -1 = use f/w default; otherwise retry count 746 * to be used with all frames */ 747 748 struct iw_statistics wstats; 749 unsigned long scan_timestamp; /* Time started to scan */ 750 enum { 751 PRISM2_MONITOR_80211 = 0, PRISM2_MONITOR_PRISM = 1, 752 PRISM2_MONITOR_CAPHDR = 2, PRISM2_MONITOR_RADIOTAP = 3 753 } monitor_type; 754 int monitor_allow_fcserr; 755 756 int hostapd; /* whether user space daemon, hostapd, is used for AP 757 * management */ 758 int hostapd_sta; /* whether hostapd is used with an extra STA interface 759 */ 760 struct net_device *apdev; 761 struct net_device_stats apdevstats; 762 763 char assoc_ap_addr[ETH_ALEN]; 764 struct net_device *stadev; 765 struct net_device_stats stadevstats; 766 767#define WEP_KEYS 4 768#define WEP_KEY_LEN 13 769 struct lib80211_crypt_info crypt_info; 770 771 int open_wep; /* allow unencrypted frames */ 772 int host_encrypt; 773 int host_decrypt; 774 int privacy_invoked; /* force privacy invoked flag even if no keys are 775 * configured */ 776 int fw_encrypt_ok; /* whether firmware-based WEP encrypt is working 777 * in Host AP mode (STA f/w 1.4.9 or newer) */ 778 int bcrx_sta_key; /* use individual keys to override default keys even 779 * with RX of broad/multicast frames */ 780 781 struct prism2_frag_entry frag_cache[PRISM2_FRAG_CACHE_LEN]; 782 unsigned int frag_next_idx; 783 784 int ieee_802_1x; /* is IEEE 802.1X used */ 785 786 int antsel_tx, antsel_rx; 787 int rts_threshold; /* dot11RTSThreshold */ 788 int fragm_threshold; /* dot11FragmentationThreshold */ 789 int auth_algs; /* PRISM2_AUTH_ flags */ 790 791 int enh_sec; /* cnfEnhSecurity options (broadcast SSID hide/ignore) */ 792 int tallies32; /* 32-bit tallies in use */ 793 794 struct prism2_helper_functions *func; 795 796 u8 *pda; 797 int fw_ap; 798#define PRISM2_FW_VER(major, minor, variant) \ 799(((major) << 16) | ((minor) << 8) | variant) 800 u32 sta_fw_ver; 801 802 /* Tasklets for handling hardware IRQ related operations outside hw IRQ 803 * handler */ 804 struct tasklet_struct bap_tasklet; 805 806 struct tasklet_struct info_tasklet; 807 struct sk_buff_head info_list; /* info frames as skb's for 808 * info_tasklet */ 809 810 struct hostap_tx_callback_info *tx_callback; /* registered TX callbacks 811 */ 812 813 struct tasklet_struct rx_tasklet; 814 struct sk_buff_head rx_list; 815 816 struct tasklet_struct sta_tx_exc_tasklet; 817 struct sk_buff_head sta_tx_exc_list; 818 819 int host_roaming; 820 unsigned long last_join_time; /* time of last JoinRequest */ 821 struct hfa384x_hostscan_result *last_scan_results; 822 int last_scan_results_count; 823 enum { PRISM2_SCAN, PRISM2_HOSTSCAN } last_scan_type; 824 struct work_struct info_queue; 825 unsigned long pending_info; /* bit field of pending info_queue items */ 826#define PRISM2_INFO_PENDING_LINKSTATUS 0 827#define PRISM2_INFO_PENDING_SCANRESULTS 1 828 int prev_link_status; /* previous received LinkStatus info */ 829 int prev_linkstatus_connected; 830 u8 preferred_ap[ETH_ALEN]; /* use this AP if possible */ 831 832#ifdef PRISM2_CALLBACK 833 void *callback_data; /* Can be used in callbacks; e.g., allocate 834 * on enable event and free on disable event. 835 * Host AP driver code does not touch this. */ 836#endif /* PRISM2_CALLBACK */ 837 838 wait_queue_head_t hostscan_wq; 839 840 /* Passive scan in Host AP mode */ 841 struct timer_list passive_scan_timer; 842 int passive_scan_interval; /* in seconds, 0 = disabled */ 843 int passive_scan_channel; 844 enum { PASSIVE_SCAN_WAIT, PASSIVE_SCAN_LISTEN } passive_scan_state; 845 846 struct timer_list tick_timer; 847 unsigned long last_tick_timer; 848 unsigned int sw_tick_stuck; 849 850 /* commsQuality / dBmCommsQuality data from periodic polling; only 851 * valid for Managed and Ad-hoc modes */ 852 unsigned long last_comms_qual_update; 853 int comms_qual; /* in some odd unit.. */ 854 int avg_signal; /* in dB (note: negative) */ 855 int avg_noise; /* in dB (note: negative) */ 856 struct work_struct comms_qual_update; 857 858 /* RSSI to dBm adjustment (for RX descriptor fields) */ 859 int rssi_to_dBm; /* subtract from RSSI to get approximate dBm value */ 860 861 /* BSS list / protected by local->lock */ 862 struct list_head bss_list; 863 int num_bss_info; 864 int wpa; /* WPA support enabled */ 865 int tkip_countermeasures; 866 int drop_unencrypted; 867 /* Generic IEEE 802.11 info element to be added to 868 * ProbeResp/Beacon/(Re)AssocReq */ 869 u8 *generic_elem; 870 size_t generic_elem_len; 871 872#ifdef PRISM2_DOWNLOAD_SUPPORT 873 /* Persistent volatile download data */ 874 struct prism2_download_data *dl_pri; 875 struct prism2_download_data *dl_sec; 876#endif /* PRISM2_DOWNLOAD_SUPPORT */ 877 878#ifdef PRISM2_IO_DEBUG 879#define PRISM2_IO_DEBUG_SIZE 10000 880 u32 io_debug[PRISM2_IO_DEBUG_SIZE]; 881 int io_debug_head; 882 int io_debug_enabled; 883#endif /* PRISM2_IO_DEBUG */ 884 885 /* Pointer to hardware model specific (cs,pci,plx) private data. */ 886 void *hw_priv; 887}; 888 889 890/* Per interface private Host AP data 891 * Allocated for each net device that Host AP uses (wlan#, wlan#ap, wlan#sta, 892 * WDS) and netdev_priv(dev) points to this structure. */ 893struct hostap_interface { 894 struct list_head list; /* list entry in Host AP interface list */ 895 struct net_device *dev; /* pointer to this device */ 896 struct local_info *local; /* pointer to shared private data */ 897 struct net_device_stats stats; 898 struct iw_spy_data spy_data; /* iwspy support */ 899 struct iw_public_data wireless_data; 900 901 enum { 902 HOSTAP_INTERFACE_MASTER, 903 HOSTAP_INTERFACE_MAIN, 904 HOSTAP_INTERFACE_AP, 905 HOSTAP_INTERFACE_STA, 906 HOSTAP_INTERFACE_WDS, 907 } type; 908 909 union { 910 struct hostap_interface_wds { 911 u8 remote_addr[ETH_ALEN]; 912 } wds; 913 } u; 914}; 915 916 917#define HOSTAP_SKB_TX_DATA_MAGIC 0xf08a36a2 918 919/* 920 * TX meta data - stored in skb->cb buffer, so this must not be increased over 921 * the 48-byte limit. 922 * THE PADDING THIS STARTS WITH IS A HORRIBLE HACK THAT SHOULD NOT LIVE 923 * TO SEE THE DAY. 924 */ 925struct hostap_skb_tx_data { 926 unsigned int __padding_for_default_qdiscs; 927 u32 magic; /* HOSTAP_SKB_TX_DATA_MAGIC */ 928 u8 rate; /* transmit rate */ 929#define HOSTAP_TX_FLAGS_WDS BIT(0) 930#define HOSTAP_TX_FLAGS_BUFFERED_FRAME BIT(1) 931#define HOSTAP_TX_FLAGS_ADD_MOREDATA BIT(2) 932 u8 flags; /* HOSTAP_TX_FLAGS_* */ 933 u16 tx_cb_idx; 934 struct hostap_interface *iface; 935 unsigned long jiffies; /* queueing timestamp */ 936 unsigned short ethertype; 937}; 938 939 940#ifndef PRISM2_NO_DEBUG 941 942#define DEBUG_FID BIT(0) 943#define DEBUG_PS BIT(1) 944#define DEBUG_FLOW BIT(2) 945#define DEBUG_AP BIT(3) 946#define DEBUG_HW BIT(4) 947#define DEBUG_EXTRA BIT(5) 948#define DEBUG_EXTRA2 BIT(6) 949#define DEBUG_PS2 BIT(7) 950#define DEBUG_MASK (DEBUG_PS | DEBUG_AP | DEBUG_HW | DEBUG_EXTRA) 951#define PDEBUG(n, args...) \ 952do { if ((n) & DEBUG_MASK) printk(KERN_DEBUG args); } while (0) 953#define PDEBUG2(n, args...) \ 954do { if ((n) & DEBUG_MASK) printk(args); } while (0) 955 956#else /* PRISM2_NO_DEBUG */ 957 958#define PDEBUG(n, args...) 959#define PDEBUG2(n, args...) 960 961#endif /* PRISM2_NO_DEBUG */ 962 963enum { BAP0 = 0, BAP1 = 1 }; 964 965#define PRISM2_IO_DEBUG_CMD_INB 0 966#define PRISM2_IO_DEBUG_CMD_INW 1 967#define PRISM2_IO_DEBUG_CMD_INSW 2 968#define PRISM2_IO_DEBUG_CMD_OUTB 3 969#define PRISM2_IO_DEBUG_CMD_OUTW 4 970#define PRISM2_IO_DEBUG_CMD_OUTSW 5 971#define PRISM2_IO_DEBUG_CMD_ERROR 6 972#define PRISM2_IO_DEBUG_CMD_INTERRUPT 7 973 974#ifdef PRISM2_IO_DEBUG 975 976#define PRISM2_IO_DEBUG_ENTRY(cmd, reg, value) \ 977(((cmd) << 24) | ((reg) << 16) | value) 978 979static inline void prism2_io_debug_add(struct net_device *dev, int cmd, 980 int reg, int value) 981{ 982 struct hostap_interface *iface = netdev_priv(dev); 983 local_info_t *local = iface->local; 984 985 if (!local->io_debug_enabled) 986 return; 987 988 local->io_debug[local->io_debug_head] = jiffies & 0xffffffff; 989 if (++local->io_debug_head >= PRISM2_IO_DEBUG_SIZE) 990 local->io_debug_head = 0; 991 local->io_debug[local->io_debug_head] = 992 PRISM2_IO_DEBUG_ENTRY(cmd, reg, value); 993 if (++local->io_debug_head >= PRISM2_IO_DEBUG_SIZE) 994 local->io_debug_head = 0; 995} 996 997 998static inline void prism2_io_debug_error(struct net_device *dev, int err) 999{ 1000 struct hostap_interface *iface = netdev_priv(dev); 1001 local_info_t *local = iface->local; 1002 unsigned long flags; 1003 1004 if (!local->io_debug_enabled) 1005 return; 1006 1007 spin_lock_irqsave(&local->lock, flags); 1008 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_ERROR, 0, err); 1009 if (local->io_debug_enabled == 1) { 1010 local->io_debug_enabled = 0; 1011 printk(KERN_DEBUG "%s: I/O debug stopped\n", dev->name); 1012 } 1013 spin_unlock_irqrestore(&local->lock, flags); 1014} 1015 1016#else /* PRISM2_IO_DEBUG */ 1017 1018static inline void prism2_io_debug_add(struct net_device *dev, int cmd, 1019 int reg, int value) 1020{ 1021} 1022 1023static inline void prism2_io_debug_error(struct net_device *dev, int err) 1024{ 1025} 1026 1027#endif /* PRISM2_IO_DEBUG */ 1028 1029 1030#ifdef PRISM2_CALLBACK 1031enum { 1032 /* Called when card is enabled */ 1033 PRISM2_CALLBACK_ENABLE, 1034 1035 /* Called when card is disabled */ 1036 PRISM2_CALLBACK_DISABLE, 1037 1038 /* Called when RX/TX starts/ends */ 1039 PRISM2_CALLBACK_RX_START, PRISM2_CALLBACK_RX_END, 1040 PRISM2_CALLBACK_TX_START, PRISM2_CALLBACK_TX_END 1041}; 1042void prism2_callback(local_info_t *local, int event); 1043#else /* PRISM2_CALLBACK */ 1044#define prism2_callback(d, e) do { } while (0) 1045#endif /* PRISM2_CALLBACK */ 1046 1047#endif /* __KERNEL__ */ 1048 1049#endif /* HOSTAP_WLAN_H */ 1050