1/****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2015-2017 Intel Deutschland GmbH 9 * Copyright (C) 2018-2020 Intel Corporation 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of version 2 of the GNU General Public License as 13 * published by the Free Software Foundation. 14 * 15 * This program is distributed in the hope that it will be useful, but 16 * WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18 * General Public License for more details. 19 * 20 * BSD LICENSE 21 * 22 * Copyright(c) 2015-2017 Intel Deutschland GmbH 23 * Copyright (C) 2018-2020 Intel Corporation 24 * All rights reserved. 25 * 26 * Redistribution and use in source and binary forms, with or without 27 * modification, are permitted provided that the following conditions 28 * are met: 29 * 30 * * Redistributions of source code must retain the above copyright 31 * notice, this list of conditions and the following disclaimer. 32 * * Redistributions in binary form must reproduce the above copyright 33 * notice, this list of conditions and the following disclaimer in 34 * the documentation and/or other materials provided with the 35 * distribution. 36 * * Neither the name Intel Corporation nor the names of its 37 * contributors may be used to endorse or promote products derived 38 * from this software without specific prior written permission. 39 * 40 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 41 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 42 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 43 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 44 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 45 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 46 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 47 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 48 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 49 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 50 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 51 * 52 *****************************************************************************/ 53 54#include <linux/module.h> 55#include <linux/stringify.h> 56#include "iwl-config.h" 57#include "iwl-prph.h" 58 59/* Highest firmware API version supported */ 60#define IWL_22000_UCODE_API_MAX 59 61 62/* Lowest firmware API version supported */ 63#define IWL_22000_UCODE_API_MIN 39 64 65/* NVM versions */ 66#define IWL_22000_NVM_VERSION 0x0a1d 67 68/* Memory offsets and lengths */ 69#define IWL_22000_DCCM_OFFSET 0x800000 /* LMAC1 */ 70#define IWL_22000_DCCM_LEN 0x10000 /* LMAC1 */ 71#define IWL_22000_DCCM2_OFFSET 0x880000 72#define IWL_22000_DCCM2_LEN 0x8000 73#define IWL_22000_SMEM_OFFSET 0x400000 74#define IWL_22000_SMEM_LEN 0xD0000 75 76#define IWL_QU_B_HR_B_FW_PRE "iwlwifi-Qu-b0-hr-b0-" 77#define IWL_QNJ_B_HR_B_FW_PRE "iwlwifi-QuQnj-b0-hr-b0-" 78#define IWL_QU_C_HR_B_FW_PRE "iwlwifi-Qu-c0-hr-b0-" 79#define IWL_QU_B_JF_B_FW_PRE "iwlwifi-Qu-b0-jf-b0-" 80#define IWL_QU_C_JF_B_FW_PRE "iwlwifi-Qu-c0-jf-b0-" 81#define IWL_QUZ_A_HR_B_FW_PRE "iwlwifi-QuZ-a0-hr-b0-" 82#define IWL_QUZ_A_JF_B_FW_PRE "iwlwifi-QuZ-a0-jf-b0-" 83#define IWL_QNJ_B_JF_B_FW_PRE "iwlwifi-QuQnj-b0-jf-b0-" 84#define IWL_CC_A_FW_PRE "iwlwifi-cc-a0-" 85#define IWL_SO_A_JF_B_FW_PRE "iwlwifi-so-a0-jf-b0-" 86#define IWL_SO_A_HR_B_FW_PRE "iwlwifi-so-a0-hr-b0-" 87#define IWL_SO_A_GF_A_FW_PRE "iwlwifi-so-a0-gf-a0-" 88#define IWL_TY_A_GF_A_FW_PRE "iwlwifi-ty-a0-gf-a0-" 89#define IWL_SO_A_GF4_A_FW_PRE "iwlwifi-so-a0-gf4-a0-" 90#define IWL_SNJ_A_GF4_A_FW_PRE "iwlwifi-SoSnj-a0-gf4-a0-" 91#define IWL_SNJ_A_GF_A_FW_PRE "iwlwifi-SoSnj-a0-gf-a0-" 92#define IWL_SNJ_A_HR_B_FW_PRE "iwlwifi-SoSnj-a0-hr-b0-" 93#define IWL_MA_A_GF_A_FW_PRE "iwlwifi-ma-a0-gf-a0-" 94#define IWL_MA_A_MR_A_FW_PRE "iwlwifi-ma-a0-mr-a0-" 95#define IWL_SNJ_A_MR_A_FW_PRE "iwlwifi-SoSnj-a0-mr-a0-" 96 97#define IWL_QU_B_HR_B_MODULE_FIRMWARE(api) \ 98 IWL_QU_B_HR_B_FW_PRE __stringify(api) ".ucode" 99#define IWL_QNJ_B_HR_B_MODULE_FIRMWARE(api) \ 100 IWL_QNJ_B_HR_B_FW_PRE __stringify(api) ".ucode" 101#define IWL_QUZ_A_HR_B_MODULE_FIRMWARE(api) \ 102 IWL_QUZ_A_HR_B_FW_PRE __stringify(api) ".ucode" 103#define IWL_QUZ_A_JF_B_MODULE_FIRMWARE(api) \ 104 IWL_QUZ_A_JF_B_FW_PRE __stringify(api) ".ucode" 105#define IWL_QU_C_HR_B_MODULE_FIRMWARE(api) \ 106 IWL_QU_C_HR_B_FW_PRE __stringify(api) ".ucode" 107#define IWL_QU_B_JF_B_MODULE_FIRMWARE(api) \ 108 IWL_QU_B_JF_B_FW_PRE __stringify(api) ".ucode" 109#define IWL_QNJ_B_JF_B_MODULE_FIRMWARE(api) \ 110 IWL_QNJ_B_JF_B_FW_PRE __stringify(api) ".ucode" 111#define IWL_CC_A_MODULE_FIRMWARE(api) \ 112 IWL_CC_A_FW_PRE __stringify(api) ".ucode" 113#define IWL_SO_A_JF_B_MODULE_FIRMWARE(api) \ 114 IWL_SO_A_JF_B_FW_PRE __stringify(api) ".ucode" 115#define IWL_SO_A_HR_B_MODULE_FIRMWARE(api) \ 116 IWL_SO_A_HR_B_FW_PRE __stringify(api) ".ucode" 117#define IWL_SO_A_GF_A_MODULE_FIRMWARE(api) \ 118 IWL_SO_A_GF_A_FW_PRE __stringify(api) ".ucode" 119#define IWL_TY_A_GF_A_MODULE_FIRMWARE(api) \ 120 IWL_TY_A_GF_A_FW_PRE __stringify(api) ".ucode" 121#define IWL_SNJ_A_GF4_A_MODULE_FIRMWARE(api) \ 122 IWL_SNJ_A_GF4_A_FW_PRE __stringify(api) ".ucode" 123#define IWL_SNJ_A_GF_A_MODULE_FIRMWARE(api) \ 124 IWL_SNJ_A_GF_A_FW_PRE __stringify(api) ".ucode" 125#define IWL_SNJ_A_HR_B_MODULE_FIRMWARE(api) \ 126 IWL_SNJ_A_HR_B_FW_PRE __stringify(api) ".ucode" 127#define IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(api) \ 128 IWL_MA_A_GF_A_FW_PRE __stringify(api) ".ucode" 129#define IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(api) \ 130 IWL_MA_A_MR_A_FW_PRE __stringify(api) ".ucode" 131#define IWL_SNJ_A_MR_A_MODULE_FIRMWARE(api) \ 132 IWL_SNJ_A_MR_A_FW_PRE __stringify(api) ".ucode" 133 134static const struct iwl_base_params iwl_22000_base_params = { 135 .eeprom_size = OTP_LOW_IMAGE_SIZE_32K, 136 .num_of_queues = 512, 137 .max_tfd_queue_size = 256, 138 .shadow_ram_support = true, 139 .led_compensation = 57, 140 .wd_timeout = IWL_LONG_WD_TIMEOUT, 141 .max_event_log_size = 512, 142 .shadow_reg_enable = true, 143 .pcie_l1_allowed = true, 144}; 145 146static const struct iwl_base_params iwl_ax210_base_params = { 147 .eeprom_size = OTP_LOW_IMAGE_SIZE_32K, 148 .num_of_queues = 512, 149 .max_tfd_queue_size = 65536, 150 .shadow_ram_support = true, 151 .led_compensation = 57, 152 .wd_timeout = IWL_LONG_WD_TIMEOUT, 153 .max_event_log_size = 512, 154 .shadow_reg_enable = true, 155 .pcie_l1_allowed = true, 156}; 157 158static const struct iwl_ht_params iwl_22000_ht_params = { 159 .stbc = true, 160 .ldpc = true, 161 .ht40_bands = BIT(NL80211_BAND_2GHZ) | BIT(NL80211_BAND_5GHZ), 162}; 163 164#define IWL_DEVICE_22000_COMMON \ 165 .ucode_api_max = IWL_22000_UCODE_API_MAX, \ 166 .ucode_api_min = IWL_22000_UCODE_API_MIN, \ 167 .led_mode = IWL_LED_RF_STATE, \ 168 .nvm_hw_section_num = 10, \ 169 .non_shared_ant = ANT_B, \ 170 .dccm_offset = IWL_22000_DCCM_OFFSET, \ 171 .dccm_len = IWL_22000_DCCM_LEN, \ 172 .dccm2_offset = IWL_22000_DCCM2_OFFSET, \ 173 .dccm2_len = IWL_22000_DCCM2_LEN, \ 174 .smem_offset = IWL_22000_SMEM_OFFSET, \ 175 .smem_len = IWL_22000_SMEM_LEN, \ 176 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM, \ 177 .apmg_not_supported = true, \ 178 .trans.mq_rx_supported = true, \ 179 .vht_mu_mimo_supported = true, \ 180 .mac_addr_from_csr = true, \ 181 .ht_params = &iwl_22000_ht_params, \ 182 .nvm_ver = IWL_22000_NVM_VERSION, \ 183 .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \ 184 .trans.use_tfh = true, \ 185 .trans.rf_id = true, \ 186 .trans.gen2 = true, \ 187 .nvm_type = IWL_NVM_EXT, \ 188 .dbgc_supported = true, \ 189 .min_umac_error_event_table = 0x400000, \ 190 .d3_debug_data_base_addr = 0x401000, \ 191 .d3_debug_data_length = 60 * 1024, \ 192 .mon_smem_regs = { \ 193 .write_ptr = { \ 194 .addr = LDBG_M2S_BUF_WPTR, \ 195 .mask = LDBG_M2S_BUF_WPTR_VAL_MSK, \ 196 }, \ 197 .cycle_cnt = { \ 198 .addr = LDBG_M2S_BUF_WRAP_CNT, \ 199 .mask = LDBG_M2S_BUF_WRAP_CNT_VAL_MSK, \ 200 }, \ 201 } 202 203#define IWL_DEVICE_22500 \ 204 IWL_DEVICE_22000_COMMON, \ 205 .trans.device_family = IWL_DEVICE_FAMILY_22000, \ 206 .trans.base_params = &iwl_22000_base_params, \ 207 .gp2_reg_addr = 0xa02c68, \ 208 .mon_dram_regs = { \ 209 .write_ptr = { \ 210 .addr = MON_BUFF_WRPTR_VER2, \ 211 .mask = 0xffffffff, \ 212 }, \ 213 .cycle_cnt = { \ 214 .addr = MON_BUFF_CYCLE_CNT_VER2, \ 215 .mask = 0xffffffff, \ 216 }, \ 217 } 218 219#define IWL_DEVICE_AX210 \ 220 IWL_DEVICE_22000_COMMON, \ 221 .trans.umac_prph_offset = 0x300000, \ 222 .trans.device_family = IWL_DEVICE_FAMILY_AX210, \ 223 .trans.base_params = &iwl_ax210_base_params, \ 224 .min_txq_size = 128, \ 225 .gp2_reg_addr = 0xd02c68, \ 226 .min_256_ba_txq_size = 1024, \ 227 .mon_dram_regs = { \ 228 .write_ptr = { \ 229 .addr = DBGC_CUR_DBGBUF_STATUS, \ 230 .mask = DBGC_CUR_DBGBUF_STATUS_OFFSET_MSK, \ 231 }, \ 232 .cycle_cnt = { \ 233 .addr = DBGC_DBGBUF_WRAP_AROUND, \ 234 .mask = 0xffffffff, \ 235 }, \ 236 .cur_frag = { \ 237 .addr = DBGC_CUR_DBGBUF_STATUS, \ 238 .mask = DBGC_CUR_DBGBUF_STATUS_IDX_MSK, \ 239 }, \ 240 } 241 242const struct iwl_cfg_trans_params iwl_qnj_trans_cfg = { 243 .mq_rx_supported = true, 244 .use_tfh = true, 245 .rf_id = true, 246 .gen2 = true, 247 .device_family = IWL_DEVICE_FAMILY_22000, 248 .base_params = &iwl_22000_base_params, 249}; 250 251const struct iwl_cfg_trans_params iwl_qu_trans_cfg = { 252 .mq_rx_supported = true, 253 .use_tfh = true, 254 .rf_id = true, 255 .gen2 = true, 256 .device_family = IWL_DEVICE_FAMILY_22000, 257 .base_params = &iwl_22000_base_params, 258 .integrated = true, 259 .xtal_latency = 500, 260 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_200US, 261}; 262 263const struct iwl_cfg_trans_params iwl_qu_medium_latency_trans_cfg = { 264 .mq_rx_supported = true, 265 .use_tfh = true, 266 .rf_id = true, 267 .gen2 = true, 268 .device_family = IWL_DEVICE_FAMILY_22000, 269 .base_params = &iwl_22000_base_params, 270 .integrated = true, 271 .xtal_latency = 1820, 272 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_1820US, 273}; 274 275const struct iwl_cfg_trans_params iwl_qu_long_latency_trans_cfg = { 276 .mq_rx_supported = true, 277 .use_tfh = true, 278 .rf_id = true, 279 .gen2 = true, 280 .device_family = IWL_DEVICE_FAMILY_22000, 281 .base_params = &iwl_22000_base_params, 282 .integrated = true, 283 .xtal_latency = 12000, 284 .low_latency_xtal = true, 285 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US, 286}; 287 288/* 289 * If the device doesn't support HE, no need to have that many buffers. 290 * 22000 devices can split multiple frames into a single RB, so fewer are 291 * needed; AX210 cannot (but use smaller RBs by default) - these sizes 292 * were picked according to 8 MSDUs inside 256 A-MSDUs in an A-MPDU, with 293 * additional overhead to account for processing time. 294 */ 295#define IWL_NUM_RBDS_NON_HE 512 296#define IWL_NUM_RBDS_22000_HE 2048 297#define IWL_NUM_RBDS_AX210_HE 4096 298 299/* 300 * All JF radio modules are part of the 9000 series, but the MAC part 301 * looks more like 22000. That's why this device is here, but called 302 * 9560 nevertheless. 303 */ 304const struct iwl_cfg iwl9560_qu_b0_jf_b0_cfg = { 305 .fw_name_pre = IWL_QU_B_JF_B_FW_PRE, 306 IWL_DEVICE_22500, 307 .num_rbds = IWL_NUM_RBDS_NON_HE, 308}; 309 310const struct iwl_cfg iwl9560_qu_c0_jf_b0_cfg = { 311 .fw_name_pre = IWL_QU_C_JF_B_FW_PRE, 312 IWL_DEVICE_22500, 313 .num_rbds = IWL_NUM_RBDS_NON_HE, 314}; 315 316const struct iwl_cfg iwl9560_quz_a0_jf_b0_cfg = { 317 .fw_name_pre = IWL_QUZ_A_JF_B_FW_PRE, 318 IWL_DEVICE_22500, 319 /* 320 * This device doesn't support receiving BlockAck with a large bitmap 321 * so we need to restrict the size of transmitted aggregation to the 322 * HT size; mac80211 would otherwise pick the HE max (256) by default. 323 */ 324 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 325 .num_rbds = IWL_NUM_RBDS_NON_HE, 326}; 327 328const struct iwl_cfg iwl9560_qnj_b0_jf_b0_cfg = { 329 .fw_name_pre = IWL_QNJ_B_JF_B_FW_PRE, 330 IWL_DEVICE_22500, 331 /* 332 * This device doesn't support receiving BlockAck with a large bitmap 333 * so we need to restrict the size of transmitted aggregation to the 334 * HT size; mac80211 would otherwise pick the HE max (256) by default. 335 */ 336 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 337 .num_rbds = IWL_NUM_RBDS_NON_HE, 338}; 339 340const struct iwl_cfg_trans_params iwl_ax200_trans_cfg = { 341 .device_family = IWL_DEVICE_FAMILY_22000, 342 .base_params = &iwl_22000_base_params, 343 .mq_rx_supported = true, 344 .use_tfh = true, 345 .rf_id = true, 346 .gen2 = true, 347 .bisr_workaround = 1, 348}; 349 350const struct iwl_cfg_trans_params iwl_ma_trans_cfg = { 351 .device_family = IWL_DEVICE_FAMILY_AX210, 352 .base_params = &iwl_ax210_base_params, 353 .mq_rx_supported = true, 354 .use_tfh = true, 355 .rf_id = true, 356 .gen2 = true, 357 .integrated = true, 358 .umac_prph_offset = 0x300000 359}; 360 361const char iwl_ax101_name[] = "Intel(R) Wi-Fi 6 AX101"; 362const char iwl_ax200_name[] = "Intel(R) Wi-Fi 6 AX200 160MHz"; 363const char iwl_ax201_name[] = "Intel(R) Wi-Fi 6 AX201 160MHz"; 364const char iwl_ax203_name[] = "Intel(R) Wi-Fi 6 AX203"; 365const char iwl_ax211_name[] = "Intel(R) Wi-Fi 6 AX211 160MHz"; 366const char iwl_ax411_name[] = "Intel(R) Wi-Fi 6 AX411 160MHz"; 367const char iwl_ma_name[] = "Intel(R) Wi-Fi 6"; 368 369const char iwl_ax200_killer_1650w_name[] = 370 "Killer(R) Wi-Fi 6 AX1650w 160MHz Wireless Network Adapter (200D2W)"; 371const char iwl_ax200_killer_1650x_name[] = 372 "Killer(R) Wi-Fi 6 AX1650x 160MHz Wireless Network Adapter (200NGW)"; 373const char iwl_ax201_killer_1650s_name[] = 374 "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)"; 375const char iwl_ax201_killer_1650i_name[] = 376 "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)"; 377 378const struct iwl_cfg iwl_qu_b0_hr1_b0 = { 379 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 380 IWL_DEVICE_22500, 381 /* 382 * This device doesn't support receiving BlockAck with a large bitmap 383 * so we need to restrict the size of transmitted aggregation to the 384 * HT size; mac80211 would otherwise pick the HE max (256) by default. 385 */ 386 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 387 .tx_with_siso_diversity = true, 388 .num_rbds = IWL_NUM_RBDS_22000_HE, 389}; 390 391const struct iwl_cfg iwl_qu_b0_hr_b0 = { 392 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 393 IWL_DEVICE_22500, 394 /* 395 * This device doesn't support receiving BlockAck with a large bitmap 396 * so we need to restrict the size of transmitted aggregation to the 397 * HT size; mac80211 would otherwise pick the HE max (256) by default. 398 */ 399 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 400 .num_rbds = IWL_NUM_RBDS_22000_HE, 401}; 402 403const struct iwl_cfg iwl_ax201_cfg_qu_hr = { 404 .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 405 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 406 IWL_DEVICE_22500, 407 /* 408 * This device doesn't support receiving BlockAck with a large bitmap 409 * so we need to restrict the size of transmitted aggregation to the 410 * HT size; mac80211 would otherwise pick the HE max (256) by default. 411 */ 412 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 413 .num_rbds = IWL_NUM_RBDS_22000_HE, 414}; 415 416const struct iwl_cfg iwl_qu_c0_hr1_b0 = { 417 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 418 IWL_DEVICE_22500, 419 /* 420 * This device doesn't support receiving BlockAck with a large bitmap 421 * so we need to restrict the size of transmitted aggregation to the 422 * HT size; mac80211 would otherwise pick the HE max (256) by default. 423 */ 424 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 425 .tx_with_siso_diversity = true, 426 .num_rbds = IWL_NUM_RBDS_22000_HE, 427}; 428 429const struct iwl_cfg iwl_qu_c0_hr_b0 = { 430 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 431 IWL_DEVICE_22500, 432 /* 433 * This device doesn't support receiving BlockAck with a large bitmap 434 * so we need to restrict the size of transmitted aggregation to the 435 * HT size; mac80211 would otherwise pick the HE max (256) by default. 436 */ 437 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 438 .num_rbds = IWL_NUM_RBDS_22000_HE, 439}; 440 441const struct iwl_cfg iwl_ax201_cfg_qu_c0_hr_b0 = { 442 .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 443 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 444 IWL_DEVICE_22500, 445 /* 446 * This device doesn't support receiving BlockAck with a large bitmap 447 * so we need to restrict the size of transmitted aggregation to the 448 * HT size; mac80211 would otherwise pick the HE max (256) by default. 449 */ 450 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 451 .num_rbds = IWL_NUM_RBDS_22000_HE, 452}; 453 454const struct iwl_cfg iwl_quz_a0_hr1_b0 = { 455 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 456 IWL_DEVICE_22500, 457 /* 458 * This device doesn't support receiving BlockAck with a large bitmap 459 * so we need to restrict the size of transmitted aggregation to the 460 * HT size; mac80211 would otherwise pick the HE max (256) by default. 461 */ 462 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 463 .tx_with_siso_diversity = true, 464 .num_rbds = IWL_NUM_RBDS_22000_HE, 465}; 466 467const struct iwl_cfg iwl_ax201_cfg_quz_hr = { 468 .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 469 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 470 IWL_DEVICE_22500, 471 /* 472 * This device doesn't support receiving BlockAck with a large bitmap 473 * so we need to restrict the size of transmitted aggregation to the 474 * HT size; mac80211 would otherwise pick the HE max (256) by default. 475 */ 476 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 477 .num_rbds = IWL_NUM_RBDS_22000_HE, 478}; 479 480const struct iwl_cfg iwl_ax1650s_cfg_quz_hr = { 481 .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 482 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 483 IWL_DEVICE_22500, 484 /* 485 * This device doesn't support receiving BlockAck with a large bitmap 486 * so we need to restrict the size of transmitted aggregation to the 487 * HT size; mac80211 would otherwise pick the HE max (256) by default. 488 */ 489 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 490 .num_rbds = IWL_NUM_RBDS_22000_HE, 491}; 492 493const struct iwl_cfg iwl_ax1650i_cfg_quz_hr = { 494 .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 495 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 496 IWL_DEVICE_22500, 497 /* 498 * This device doesn't support receiving BlockAck with a large bitmap 499 * so we need to restrict the size of transmitted aggregation to the 500 * HT size; mac80211 would otherwise pick the HE max (256) by default. 501 */ 502 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 503 .num_rbds = IWL_NUM_RBDS_22000_HE, 504}; 505 506const struct iwl_cfg iwl_ax200_cfg_cc = { 507 .fw_name_pre = IWL_CC_A_FW_PRE, 508 IWL_DEVICE_22500, 509 /* 510 * This device doesn't support receiving BlockAck with a large bitmap 511 * so we need to restrict the size of transmitted aggregation to the 512 * HT size; mac80211 would otherwise pick the HE max (256) by default. 513 */ 514 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 515 .num_rbds = IWL_NUM_RBDS_22000_HE, 516}; 517 518const struct iwl_cfg killer1650s_2ax_cfg_qu_b0_hr_b0 = { 519 .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 520 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 521 IWL_DEVICE_22500, 522 /* 523 * This device doesn't support receiving BlockAck with a large bitmap 524 * so we need to restrict the size of transmitted aggregation to the 525 * HT size; mac80211 would otherwise pick the HE max (256) by default. 526 */ 527 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 528 .num_rbds = IWL_NUM_RBDS_22000_HE, 529}; 530 531const struct iwl_cfg killer1650i_2ax_cfg_qu_b0_hr_b0 = { 532 .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 533 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 534 IWL_DEVICE_22500, 535 /* 536 * This device doesn't support receiving BlockAck with a large bitmap 537 * so we need to restrict the size of transmitted aggregation to the 538 * HT size; mac80211 would otherwise pick the HE max (256) by default. 539 */ 540 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 541 .num_rbds = IWL_NUM_RBDS_22000_HE, 542}; 543 544const struct iwl_cfg killer1650s_2ax_cfg_qu_c0_hr_b0 = { 545 .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 546 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 547 IWL_DEVICE_22500, 548 /* 549 * This device doesn't support receiving BlockAck with a large bitmap 550 * so we need to restrict the size of transmitted aggregation to the 551 * HT size; mac80211 would otherwise pick the HE max (256) by default. 552 */ 553 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 554 .num_rbds = IWL_NUM_RBDS_22000_HE, 555}; 556 557const struct iwl_cfg killer1650i_2ax_cfg_qu_c0_hr_b0 = { 558 .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 559 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 560 IWL_DEVICE_22500, 561 /* 562 * This device doesn't support receiving BlockAck with a large bitmap 563 * so we need to restrict the size of transmitted aggregation to the 564 * HT size; mac80211 would otherwise pick the HE max (256) by default. 565 */ 566 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 567 .num_rbds = IWL_NUM_RBDS_22000_HE, 568}; 569 570const struct iwl_cfg iwl_qnj_b0_hr_b0_cfg = { 571 .fw_name_pre = IWL_QNJ_B_HR_B_FW_PRE, 572 IWL_DEVICE_22500, 573 /* 574 * This device doesn't support receiving BlockAck with a large bitmap 575 * so we need to restrict the size of transmitted aggregation to the 576 * HT size; mac80211 would otherwise pick the HE max (256) by default. 577 */ 578 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 579 .num_rbds = IWL_NUM_RBDS_22000_HE, 580}; 581 582const struct iwl_cfg iwlax210_2ax_cfg_so_jf_a0 = { 583 .name = "Intel(R) Wireless-AC 9560 160MHz", 584 .fw_name_pre = IWL_SO_A_JF_B_FW_PRE, 585 IWL_DEVICE_AX210, 586 .num_rbds = IWL_NUM_RBDS_NON_HE, 587}; 588 589const struct iwl_cfg iwlax210_2ax_cfg_so_hr_a0 = { 590 .name = "Intel(R) Wi-Fi 6 AX210 160MHz", 591 .fw_name_pre = IWL_SO_A_HR_B_FW_PRE, 592 IWL_DEVICE_AX210, 593 .num_rbds = IWL_NUM_RBDS_AX210_HE, 594}; 595 596const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0 = { 597 .name = iwl_ax211_name, 598 .fw_name_pre = IWL_SO_A_GF_A_FW_PRE, 599 .uhb_supported = true, 600 IWL_DEVICE_AX210, 601 .num_rbds = IWL_NUM_RBDS_AX210_HE, 602}; 603 604const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0_long = { 605 .name = iwl_ax211_name, 606 .fw_name_pre = IWL_SO_A_GF_A_FW_PRE, 607 .uhb_supported = true, 608 IWL_DEVICE_AX210, 609 .num_rbds = IWL_NUM_RBDS_AX210_HE, 610 .trans.xtal_latency = 12000, 611 .trans.low_latency_xtal = true, 612}; 613 614const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0 = { 615 .name = "Intel(R) Wi-Fi 6 AX210 160MHz", 616 .fw_name_pre = IWL_TY_A_GF_A_FW_PRE, 617 .uhb_supported = true, 618 IWL_DEVICE_AX210, 619 .num_rbds = IWL_NUM_RBDS_AX210_HE, 620}; 621 622const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0 = { 623 .name = iwl_ax411_name, 624 .fw_name_pre = IWL_SO_A_GF4_A_FW_PRE, 625 .uhb_supported = true, 626 IWL_DEVICE_AX210, 627 .num_rbds = IWL_NUM_RBDS_AX210_HE, 628}; 629 630const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0_long = { 631 .name = iwl_ax411_name, 632 .fw_name_pre = IWL_SO_A_GF4_A_FW_PRE, 633 .uhb_supported = true, 634 IWL_DEVICE_AX210, 635 .num_rbds = IWL_NUM_RBDS_AX210_HE, 636 .trans.xtal_latency = 12000, 637 .trans.low_latency_xtal = true, 638}; 639 640const struct iwl_cfg iwlax411_2ax_cfg_sosnj_gf4_a0 = { 641 .name = iwl_ax411_name, 642 .fw_name_pre = IWL_SNJ_A_GF4_A_FW_PRE, 643 .uhb_supported = true, 644 IWL_DEVICE_AX210, 645 .num_rbds = IWL_NUM_RBDS_AX210_HE, 646}; 647 648const struct iwl_cfg iwlax211_cfg_snj_gf_a0 = { 649 .name = iwl_ax211_name, 650 .fw_name_pre = IWL_SNJ_A_GF_A_FW_PRE, 651 .uhb_supported = true, 652 IWL_DEVICE_AX210, 653 .num_rbds = IWL_NUM_RBDS_AX210_HE, 654}; 655 656const struct iwl_cfg iwlax201_cfg_snj_hr_b0 = { 657 .name = iwl_ax201_name, 658 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 659 .uhb_supported = true, 660 IWL_DEVICE_AX210, 661 .num_rbds = IWL_NUM_RBDS_AX210_HE, 662}; 663 664const struct iwl_cfg iwl_cfg_ma_a0_gf_a0 = { 665 .fw_name_pre = IWL_MA_A_GF_A_FW_PRE, 666 .uhb_supported = true, 667 IWL_DEVICE_AX210, 668 .num_rbds = IWL_NUM_RBDS_AX210_HE, 669}; 670 671const struct iwl_cfg iwl_cfg_ma_a0_mr_a0 = { 672 .fw_name_pre = IWL_MA_A_MR_A_FW_PRE, 673 .uhb_supported = true, 674 IWL_DEVICE_AX210, 675 .num_rbds = IWL_NUM_RBDS_AX210_HE, 676}; 677 678const struct iwl_cfg iwl_cfg_snj_a0_mr_a0 = { 679 .fw_name_pre = IWL_SNJ_A_MR_A_FW_PRE, 680 .uhb_supported = true, 681 IWL_DEVICE_AX210, 682 .num_rbds = IWL_NUM_RBDS_AX210_HE, 683}; 684 685MODULE_FIRMWARE(IWL_QU_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 686MODULE_FIRMWARE(IWL_QNJ_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 687MODULE_FIRMWARE(IWL_QU_C_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 688MODULE_FIRMWARE(IWL_QU_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 689MODULE_FIRMWARE(IWL_QUZ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 690MODULE_FIRMWARE(IWL_QUZ_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 691MODULE_FIRMWARE(IWL_QNJ_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 692MODULE_FIRMWARE(IWL_CC_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 693MODULE_FIRMWARE(IWL_SO_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 694MODULE_FIRMWARE(IWL_SO_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 695MODULE_FIRMWARE(IWL_SO_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 696MODULE_FIRMWARE(IWL_TY_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 697MODULE_FIRMWARE(IWL_SNJ_A_GF4_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 698MODULE_FIRMWARE(IWL_SNJ_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 699MODULE_FIRMWARE(IWL_SNJ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 700MODULE_FIRMWARE(IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 701MODULE_FIRMWARE(IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 702MODULE_FIRMWARE(IWL_SNJ_A_MR_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 703