1// SPDX-License-Identifier: ISC
2/*
3 * Copyright (c) 2014 Broadcom Corporation
4 */
5#ifndef BRCMF_CHIP_H
6#define BRCMF_CHIP_H
7
8#include <linux/types.h>
9
10#define CORE_CC_REG(base, field) \
11		(base + offsetof(struct chipcregs, field))
12
13/**
14 * struct brcmf_chip - chip level information.
15 *
16 * @chip: chip identifier.
17 * @chiprev: chip revision.
18 * @cc_caps: chipcommon core capabilities.
19 * @cc_caps_ext: chipcommon core extended capabilities.
20 * @pmucaps: PMU capabilities.
21 * @pmurev: PMU revision.
22 * @rambase: RAM base address (only applicable for ARM CR4 chips).
23 * @ramsize: amount of RAM on chip including retention.
24 * @srsize: amount of retention RAM on chip.
25 * @name: string representation of the chip identifier.
26 */
27struct brcmf_chip {
28	u32 chip;
29	u32 chiprev;
30	u32 cc_caps;
31	u32 cc_caps_ext;
32	u32 pmucaps;
33	u32 pmurev;
34	u32 rambase;
35	u32 ramsize;
36	u32 srsize;
37	char name[12];
38};
39
40/**
41 * struct brcmf_core - core related information.
42 *
43 * @id: core identifier.
44 * @rev: core revision.
45 * @base: base address of core register space.
46 */
47struct brcmf_core {
48	u16 id;
49	u16 rev;
50	u32 base;
51};
52
53/**
54 * struct brcmf_buscore_ops - buscore specific callbacks.
55 *
56 * @read32: read 32-bit value over bus.
57 * @write32: write 32-bit value over bus.
58 * @prepare: prepare bus for core configuration.
59 * @setup: bus-specific core setup.
60 * @active: chip becomes active.
61 *	The callback should use the provided @rstvec when non-zero.
62 */
63struct brcmf_buscore_ops {
64	u32 (*read32)(void *ctx, u32 addr);
65	void (*write32)(void *ctx, u32 addr, u32 value);
66	int (*prepare)(void *ctx);
67	int (*reset)(void *ctx, struct brcmf_chip *chip);
68	int (*setup)(void *ctx, struct brcmf_chip *chip);
69	void (*activate)(void *ctx, struct brcmf_chip *chip, u32 rstvec);
70};
71
72int brcmf_chip_get_raminfo(struct brcmf_chip *pub);
73struct brcmf_chip *brcmf_chip_attach(void *ctx,
74				     const struct brcmf_buscore_ops *ops);
75void brcmf_chip_detach(struct brcmf_chip *chip);
76struct brcmf_core *brcmf_chip_get_core(struct brcmf_chip *chip, u16 coreid);
77struct brcmf_core *brcmf_chip_get_d11core(struct brcmf_chip *pub, u8 unit);
78struct brcmf_core *brcmf_chip_get_chipcommon(struct brcmf_chip *chip);
79struct brcmf_core *brcmf_chip_get_pmu(struct brcmf_chip *pub);
80bool brcmf_chip_iscoreup(struct brcmf_core *core);
81void brcmf_chip_coredisable(struct brcmf_core *core, u32 prereset, u32 reset);
82void brcmf_chip_resetcore(struct brcmf_core *core, u32 prereset, u32 reset,
83			  u32 postreset);
84void brcmf_chip_set_passive(struct brcmf_chip *ci);
85bool brcmf_chip_set_active(struct brcmf_chip *ci, u32 rstvec);
86bool brcmf_chip_sr_capable(struct brcmf_chip *pub);
87char *brcmf_chip_name(u32 chipid, u32 chiprev, char *buf, uint len);
88
89#endif /* BRCMF_AXIDMP_H */
90