1/*
2 * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18
19#include "txrx.h"
20
21static inline int get_rssi0(struct wcn36xx_rx_bd *bd)
22{
23	return 100 - ((bd->phy_stat0 >> 24) & 0xff);
24}
25
26struct wcn36xx_rate {
27	u16 bitrate;
28	u16 mcs_or_legacy_index;
29	enum mac80211_rx_encoding encoding;
30	enum mac80211_rx_encoding_flags encoding_flags;
31	enum rate_info_bw bw;
32};
33
34/* Buffer descriptor rx_ch field is limited to 5-bit (4+1), a mapping is used
35 * for 11A Channels.
36 */
37static const u8 ab_rx_ch_map[] = { 36, 40, 44, 48, 52, 56, 60, 64, 100, 104,
38				   108, 112, 116, 120, 124, 128, 132, 136, 140,
39				   149, 153, 157, 161, 165, 144 };
40
41static const struct wcn36xx_rate wcn36xx_rate_table[] = {
42	/* 11b rates */
43	{  10, 0, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
44	{  20, 1, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
45	{  55, 2, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
46	{ 110, 3, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
47
48	/* 11b SP (short preamble) */
49	{  10, 0, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
50	{  20, 1, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
51	{  55, 2, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
52	{ 110, 3, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
53
54	/* 11ag */
55	{  60, 4, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
56	{  90, 5, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
57	{ 120, 6, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
58	{ 180, 7, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
59	{ 240, 8, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
60	{ 360, 9, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
61	{ 480, 10, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
62	{ 540, 11, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
63
64	/* 11n */
65	{  65, 0, RX_ENC_HT, 0, RATE_INFO_BW_20 },
66	{ 130, 1, RX_ENC_HT, 0, RATE_INFO_BW_20 },
67	{ 195, 2, RX_ENC_HT, 0, RATE_INFO_BW_20 },
68	{ 260, 3, RX_ENC_HT, 0, RATE_INFO_BW_20 },
69	{ 390, 4, RX_ENC_HT, 0, RATE_INFO_BW_20 },
70	{ 520, 5, RX_ENC_HT, 0, RATE_INFO_BW_20 },
71	{ 585, 6, RX_ENC_HT, 0, RATE_INFO_BW_20 },
72	{ 650, 7, RX_ENC_HT, 0, RATE_INFO_BW_20 },
73
74	/* 11n SGI */
75	{  72, 0, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
76	{ 144, 1, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
77	{ 217, 2, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
78	{ 289, 3, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
79	{ 434, 4, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
80	{ 578, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
81	{ 650, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
82	{ 722, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
83
84	/* 11n GF (greenfield) */
85	{  65, 0, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
86	{ 130, 1, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
87	{ 195, 2, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
88	{ 260, 3, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
89	{ 390, 4, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
90	{ 520, 5, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
91	{ 585, 6, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
92	{ 650, 7, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
93
94	/* 11n CB (channel bonding) */
95	{ 135, 0, RX_ENC_HT, 0, RATE_INFO_BW_40 },
96	{ 270, 1, RX_ENC_HT, 0, RATE_INFO_BW_40 },
97	{ 405, 2, RX_ENC_HT, 0, RATE_INFO_BW_40 },
98	{ 540, 3, RX_ENC_HT, 0, RATE_INFO_BW_40 },
99	{ 810, 4, RX_ENC_HT, 0, RATE_INFO_BW_40 },
100	{ 1080, 5, RX_ENC_HT, 0, RATE_INFO_BW_40 },
101	{ 1215, 6, RX_ENC_HT, 0, RATE_INFO_BW_40 },
102	{ 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 },
103
104	/* 11n CB + SGI */
105	{ 150, 0, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
106	{ 300, 1, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
107	{ 450, 2, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
108	{ 600, 3, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
109	{ 900, 4, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
110	{ 1200, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
111	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
112	{ 1500, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
113
114	/* 11n GF + CB */
115	{ 135, 0, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
116	{ 270, 1, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
117	{ 405, 2, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
118	{ 540, 3, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
119	{ 810, 4, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
120	{ 1080, 5, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
121	{ 1215, 6, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
122	{ 1350, 7, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
123
124	/* 11ac reserved indices */
125	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
126	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
127
128	/* 11ac 20 MHz 800ns GI MCS 0-8 */
129	{   65, 0, RX_ENC_HT, 0, RATE_INFO_BW_20 },
130	{  130, 1, RX_ENC_HT, 0, RATE_INFO_BW_20 },
131	{  195, 2, RX_ENC_HT, 0, RATE_INFO_BW_20 },
132	{  260, 3, RX_ENC_HT, 0, RATE_INFO_BW_20 },
133	{  390, 4, RX_ENC_HT, 0, RATE_INFO_BW_20 },
134	{  520, 5, RX_ENC_HT, 0, RATE_INFO_BW_20 },
135	{  585, 6, RX_ENC_HT, 0, RATE_INFO_BW_20 },
136	{  650, 7, RX_ENC_HT, 0, RATE_INFO_BW_20 },
137	{  780, 8, RX_ENC_HT, 0, RATE_INFO_BW_20 },
138
139	/* 11ac reserved indices */
140	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
141	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
142	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
143	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
144	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
145	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
146	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
147	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
148	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
149
150	/* 11ac 20 MHz 400ns SGI MCS 6-8 */
151	{  655, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
152	{  722, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
153	{  866, 8, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
154
155	/* 11ac reserved indices */
156	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
157	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
158	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
159
160	/* 11ac 40 MHz 800ns GI MCS 0-9 */
161	{  135, 0, RX_ENC_HT, 0, RATE_INFO_BW_40 },
162	{  270, 1, RX_ENC_HT, 0, RATE_INFO_BW_40 },
163	{  405, 2, RX_ENC_HT, 0, RATE_INFO_BW_40 },
164	{  540, 3, RX_ENC_HT, 0, RATE_INFO_BW_40 },
165	{  810, 4, RX_ENC_HT, 0, RATE_INFO_BW_40 },
166	{ 1080, 5, RX_ENC_HT, 0, RATE_INFO_BW_40 },
167	{ 1215, 6, RX_ENC_HT, 0, RATE_INFO_BW_40 },
168	{ 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 },
169	{ 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 },
170	{ 1620, 8, RX_ENC_HT, 0, RATE_INFO_BW_40 },
171	{ 1800, 9, RX_ENC_HT, 0, RATE_INFO_BW_40 },
172
173	/* 11ac reserved indices */
174	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
175	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
176	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
177	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
178	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
179	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
180
181	/* 11ac 40 MHz 400ns SGI MCS 5-7 */
182	{ 1200, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
183	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
184	{ 1500, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
185
186	/* 11ac reserved index */
187	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
188
189	/* 11ac 40 MHz 400ns SGI MCS 5-7 */
190	{ 1800, 8, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
191	{ 2000, 9, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
192
193	/* 11ac reserved index */
194	{ 1350, 6, RX_ENC_HT,  RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
195
196	/* 11ac 80 MHz 800ns GI MCS 0-7 */
197	{  292, 0, RX_ENC_HT, 0, RATE_INFO_BW_80},
198	{  585, 1, RX_ENC_HT, 0, RATE_INFO_BW_80},
199	{  877, 2, RX_ENC_HT, 0, RATE_INFO_BW_80},
200	{ 1170, 3, RX_ENC_HT, 0, RATE_INFO_BW_80},
201	{ 1755, 4, RX_ENC_HT, 0, RATE_INFO_BW_80},
202	{ 2340, 5, RX_ENC_HT, 0, RATE_INFO_BW_80},
203	{ 2632, 6, RX_ENC_HT, 0, RATE_INFO_BW_80},
204	{ 2925, 7, RX_ENC_HT, 0, RATE_INFO_BW_80},
205
206	/* 11 ac reserved index */
207	{ 1350, 6, RX_ENC_HT,  RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
208
209	/* 11ac 80 MHz 800 ns GI MCS 8-9 */
210	{ 3510, 8, RX_ENC_HT, 0, RATE_INFO_BW_80},
211	{ 3900, 9, RX_ENC_HT, 0, RATE_INFO_BW_80},
212
213	/* 11 ac reserved indices */
214	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
215	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
216	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
217	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
218	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
219	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
220	{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
221
222	/* 11ac 80 MHz 400 ns SGI MCS 6-7 */
223	{ 2925, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 },
224	{ 3250, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 },
225
226	/* 11ac reserved index */
227	{ 1350, 6, RX_ENC_HT,  RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
228
229	/* 11ac 80 MHz 400ns SGI MCS 8-9 */
230	{ 3900, 8, RX_ENC_VHT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 },
231	{ 4333, 9, RX_ENC_VHT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 },
232};
233
234int wcn36xx_rx_skb(struct wcn36xx *wcn, struct sk_buff *skb)
235{
236	struct ieee80211_rx_status status;
237	const struct wcn36xx_rate *rate;
238	struct ieee80211_hdr *hdr;
239	struct wcn36xx_rx_bd *bd;
240	u16 fc, sn;
241
242	/*
243	 * All fields must be 0, otherwise it can lead to
244	 * unexpected consequences.
245	 */
246	memset(&status, 0, sizeof(status));
247
248	bd = (struct wcn36xx_rx_bd *)skb->data;
249	buff_to_be((u32 *)bd, sizeof(*bd)/sizeof(u32));
250	wcn36xx_dbg_dump(WCN36XX_DBG_RX_DUMP,
251			 "BD   <<< ", (char *)bd,
252			 sizeof(struct wcn36xx_rx_bd));
253
254	skb_put(skb, bd->pdu.mpdu_header_off + bd->pdu.mpdu_len);
255	skb_pull(skb, bd->pdu.mpdu_header_off);
256
257	hdr = (struct ieee80211_hdr *) skb->data;
258	fc = __le16_to_cpu(hdr->frame_control);
259	sn = IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl));
260
261	status.mactime = 10;
262	status.signal = -get_rssi0(bd);
263	status.antenna = 1;
264	status.flag = 0;
265	status.rx_flags = 0;
266	status.flag |= RX_FLAG_IV_STRIPPED |
267		       RX_FLAG_MMIC_STRIPPED |
268		       RX_FLAG_DECRYPTED;
269
270	wcn36xx_dbg(WCN36XX_DBG_RX, "status.flags=%x\n", status.flag);
271
272	if (bd->scan_learn) {
273		/* If packet originate from hardware scanning, extract the
274		 * band/channel from bd descriptor.
275		 */
276		u8 hwch = (bd->reserved0 << 4) + bd->rx_ch;
277
278		if (bd->rf_band != 1 && hwch <= sizeof(ab_rx_ch_map) && hwch >= 1) {
279			status.band = NL80211_BAND_5GHZ;
280			status.freq = ieee80211_channel_to_frequency(ab_rx_ch_map[hwch - 1],
281								     status.band);
282		} else {
283			status.band = NL80211_BAND_2GHZ;
284			status.freq = ieee80211_channel_to_frequency(hwch, status.band);
285		}
286	} else {
287		status.band = WCN36XX_BAND(wcn);
288		status.freq = WCN36XX_CENTER_FREQ(wcn);
289	}
290
291	if (bd->rate_id < ARRAY_SIZE(wcn36xx_rate_table)) {
292		rate = &wcn36xx_rate_table[bd->rate_id];
293		status.encoding = rate->encoding;
294		status.enc_flags = rate->encoding_flags;
295		status.bw = rate->bw;
296		status.rate_idx = rate->mcs_or_legacy_index;
297		status.nss = 1;
298
299		if (status.band == NL80211_BAND_5GHZ &&
300		    status.encoding == RX_ENC_LEGACY &&
301		    status.rate_idx >= 4) {
302			/* no dsss rates in 5Ghz rates table */
303			status.rate_idx -= 4;
304		}
305	} else {
306		status.encoding = 0;
307		status.bw = 0;
308		status.enc_flags = 0;
309		status.rate_idx = 0;
310	}
311
312	if (ieee80211_is_beacon(hdr->frame_control) ||
313	    ieee80211_is_probe_resp(hdr->frame_control))
314		status.boottime_ns = ktime_get_boottime_ns();
315
316	memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
317
318	if (ieee80211_is_beacon(hdr->frame_control)) {
319		wcn36xx_dbg(WCN36XX_DBG_BEACON, "beacon skb %p len %d fc %04x sn %d\n",
320			    skb, skb->len, fc, sn);
321		wcn36xx_dbg_dump(WCN36XX_DBG_BEACON_DUMP, "SKB <<< ",
322				 (char *)skb->data, skb->len);
323	} else {
324		wcn36xx_dbg(WCN36XX_DBG_RX, "rx skb %p len %d fc %04x sn %d\n",
325			    skb, skb->len, fc, sn);
326		wcn36xx_dbg_dump(WCN36XX_DBG_RX_DUMP, "SKB <<< ",
327				 (char *)skb->data, skb->len);
328	}
329
330	ieee80211_rx_irqsafe(wcn->hw, skb);
331
332	return 0;
333}
334
335static void wcn36xx_set_tx_pdu(struct wcn36xx_tx_bd *bd,
336			       u32 mpdu_header_len,
337			       u32 len,
338			       u16 tid)
339{
340	bd->pdu.mpdu_header_len = mpdu_header_len;
341	bd->pdu.mpdu_header_off = sizeof(*bd);
342	bd->pdu.mpdu_data_off = bd->pdu.mpdu_header_len +
343		bd->pdu.mpdu_header_off;
344	bd->pdu.mpdu_len = len;
345	bd->pdu.tid = tid;
346}
347
348static inline struct wcn36xx_vif *get_vif_by_addr(struct wcn36xx *wcn,
349						  u8 *addr)
350{
351	struct wcn36xx_vif *vif_priv = NULL;
352	struct ieee80211_vif *vif = NULL;
353	list_for_each_entry(vif_priv, &wcn->vif_list, list) {
354			vif = wcn36xx_priv_to_vif(vif_priv);
355			if (memcmp(vif->addr, addr, ETH_ALEN) == 0)
356				return vif_priv;
357	}
358	wcn36xx_warn("vif %pM not found\n", addr);
359	return NULL;
360}
361
362static void wcn36xx_tx_start_ampdu(struct wcn36xx *wcn,
363				   struct wcn36xx_sta *sta_priv,
364				   struct sk_buff *skb)
365{
366	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
367	struct ieee80211_sta *sta;
368	u8 *qc, tid;
369
370	if (!conf_is_ht(&wcn->hw->conf))
371		return;
372
373	sta = wcn36xx_priv_to_sta(sta_priv);
374
375	if (WARN_ON(!ieee80211_is_data_qos(hdr->frame_control)))
376		return;
377
378	if (skb_get_queue_mapping(skb) == IEEE80211_AC_VO)
379		return;
380
381	qc = ieee80211_get_qos_ctl(hdr);
382	tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
383
384	spin_lock(&sta_priv->ampdu_lock);
385	if (sta_priv->ampdu_state[tid] != WCN36XX_AMPDU_NONE)
386		goto out_unlock;
387
388	if (sta_priv->non_agg_frame_ct++ >= WCN36XX_AMPDU_START_THRESH) {
389		sta_priv->ampdu_state[tid] = WCN36XX_AMPDU_START;
390		sta_priv->non_agg_frame_ct = 0;
391		ieee80211_start_tx_ba_session(sta, tid, 0);
392	}
393out_unlock:
394	spin_unlock(&sta_priv->ampdu_lock);
395}
396
397static void wcn36xx_set_tx_data(struct wcn36xx_tx_bd *bd,
398				struct wcn36xx *wcn,
399				struct wcn36xx_vif **vif_priv,
400				struct wcn36xx_sta *sta_priv,
401				struct sk_buff *skb,
402				bool bcast)
403{
404	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
405	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
406	struct ieee80211_vif *vif = NULL;
407	struct wcn36xx_vif *__vif_priv = NULL;
408	bool is_data_qos = ieee80211_is_data_qos(hdr->frame_control);
409	u16 tid = 0;
410
411	bd->bd_rate = WCN36XX_BD_RATE_DATA;
412
413	/*
414	 * For not unicast frames mac80211 will not set sta pointer so use
415	 * self_sta_index instead.
416	 */
417	if (sta_priv) {
418		__vif_priv = sta_priv->vif;
419		vif = wcn36xx_priv_to_vif(__vif_priv);
420
421		bd->dpu_sign = sta_priv->ucast_dpu_sign;
422		if (vif->type == NL80211_IFTYPE_STATION) {
423			bd->sta_index = sta_priv->bss_sta_index;
424			bd->dpu_desc_idx = sta_priv->bss_dpu_desc_index;
425		} else if (vif->type == NL80211_IFTYPE_AP ||
426			   vif->type == NL80211_IFTYPE_ADHOC ||
427			   vif->type == NL80211_IFTYPE_MESH_POINT) {
428			bd->sta_index = sta_priv->sta_index;
429			bd->dpu_desc_idx = sta_priv->dpu_desc_index;
430		}
431	} else {
432		__vif_priv = get_vif_by_addr(wcn, hdr->addr2);
433		bd->sta_index = __vif_priv->self_sta_index;
434		bd->dpu_desc_idx = __vif_priv->self_dpu_desc_index;
435		bd->dpu_sign = __vif_priv->self_ucast_dpu_sign;
436	}
437
438	if (is_data_qos) {
439		tid = ieee80211_get_tid(hdr);
440		/* TID->QID is one-to-one mapping */
441		bd->queue_id = tid;
442		bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_DPU_QOS;
443	} else {
444		bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_DPU_NON_QOS;
445	}
446
447	if (info->flags & IEEE80211_TX_INTFL_DONT_ENCRYPT ||
448	    (sta_priv && !sta_priv->is_data_encrypted)) {
449		bd->dpu_ne = 1;
450	}
451
452	if (ieee80211_is_any_nullfunc(hdr->frame_control)) {
453		/* Don't use a regular queue for null packet (no ampdu) */
454		bd->queue_id = WCN36XX_TX_U_WQ_ID;
455		bd->bd_rate = WCN36XX_BD_RATE_CTRL;
456		if (ieee80211_is_qos_nullfunc(hdr->frame_control))
457			bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_HOST;
458	}
459
460	if (bcast) {
461		bd->ub = 1;
462		bd->ack_policy = 1;
463	}
464	*vif_priv = __vif_priv;
465
466	wcn36xx_set_tx_pdu(bd,
467			   is_data_qos ?
468			   sizeof(struct ieee80211_qos_hdr) :
469			   sizeof(struct ieee80211_hdr_3addr),
470			   skb->len, tid);
471
472	if (sta_priv && is_data_qos)
473		wcn36xx_tx_start_ampdu(wcn, sta_priv, skb);
474}
475
476static void wcn36xx_set_tx_mgmt(struct wcn36xx_tx_bd *bd,
477				struct wcn36xx *wcn,
478				struct wcn36xx_vif **vif_priv,
479				struct sk_buff *skb,
480				bool bcast)
481{
482	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
483	struct wcn36xx_vif *__vif_priv =
484		get_vif_by_addr(wcn, hdr->addr2);
485	bd->sta_index = __vif_priv->self_sta_index;
486	bd->dpu_desc_idx = __vif_priv->self_dpu_desc_index;
487	bd->dpu_ne = 1;
488
489	/* default rate for unicast */
490	if (ieee80211_is_mgmt(hdr->frame_control))
491		bd->bd_rate = (WCN36XX_BAND(wcn) == NL80211_BAND_5GHZ) ?
492			WCN36XX_BD_RATE_CTRL :
493			WCN36XX_BD_RATE_MGMT;
494	else if (ieee80211_is_ctl(hdr->frame_control))
495		bd->bd_rate = WCN36XX_BD_RATE_CTRL;
496	else
497		wcn36xx_warn("frame control type unknown\n");
498
499	/*
500	 * In joining state trick hardware that probe is sent as
501	 * unicast even if address is broadcast.
502	 */
503	if (__vif_priv->is_joining &&
504	    ieee80211_is_probe_req(hdr->frame_control))
505		bcast = false;
506
507	if (bcast) {
508		/* broadcast */
509		bd->ub = 1;
510		/* No ack needed not unicast */
511		bd->ack_policy = 1;
512		bd->queue_id = WCN36XX_TX_B_WQ_ID;
513	} else
514		bd->queue_id = WCN36XX_TX_U_WQ_ID;
515	*vif_priv = __vif_priv;
516
517	bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_DPU_NON_QOS;
518
519	wcn36xx_set_tx_pdu(bd,
520			   ieee80211_is_data_qos(hdr->frame_control) ?
521			   sizeof(struct ieee80211_qos_hdr) :
522			   sizeof(struct ieee80211_hdr_3addr),
523			   skb->len, WCN36XX_TID);
524}
525
526int wcn36xx_start_tx(struct wcn36xx *wcn,
527		     struct wcn36xx_sta *sta_priv,
528		     struct sk_buff *skb)
529{
530	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
531	struct wcn36xx_vif *vif_priv = NULL;
532	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
533	bool is_low = ieee80211_is_data(hdr->frame_control);
534	bool bcast = is_broadcast_ether_addr(hdr->addr1) ||
535		is_multicast_ether_addr(hdr->addr1);
536	bool ack_ind = (info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS) &&
537					!(info->flags & IEEE80211_TX_CTL_NO_ACK);
538	struct wcn36xx_tx_bd bd;
539	int ret;
540
541	memset(&bd, 0, sizeof(bd));
542
543	wcn36xx_dbg(WCN36XX_DBG_TX,
544		    "tx skb %p len %d fc %04x sn %d %s %s\n",
545		    skb, skb->len, __le16_to_cpu(hdr->frame_control),
546		    IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl)),
547		    is_low ? "low" : "high", bcast ? "bcast" : "ucast");
548
549	wcn36xx_dbg_dump(WCN36XX_DBG_TX_DUMP, "", skb->data, skb->len);
550
551	bd.dpu_rf = WCN36XX_BMU_WQ_TX;
552
553	if (unlikely(ack_ind)) {
554		wcn36xx_dbg(WCN36XX_DBG_DXE, "TX_ACK status requested\n");
555
556		/* Only one at a time is supported by fw. Stop the TX queues
557		 * until the ack status gets back.
558		 */
559		ieee80211_stop_queues(wcn->hw);
560
561		/* Request ack indication from the firmware */
562		bd.tx_comp = 1;
563	}
564
565	/* Data frames served first*/
566	if (is_low)
567		wcn36xx_set_tx_data(&bd, wcn, &vif_priv, sta_priv, skb, bcast);
568	else
569		/* MGMT and CTRL frames are handeld here*/
570		wcn36xx_set_tx_mgmt(&bd, wcn, &vif_priv, skb, bcast);
571
572	buff_to_be((u32 *)&bd, sizeof(bd)/sizeof(u32));
573	bd.tx_bd_sign = 0xbdbdbdbd;
574
575	ret = wcn36xx_dxe_tx_frame(wcn, vif_priv, &bd, skb, is_low);
576	if (unlikely(ret && ack_ind)) {
577		/* If the skb has not been transmitted, resume TX queue */
578		ieee80211_wake_queues(wcn->hw);
579	}
580
581	return ret;
582}
583