18c2ecf20Sopenharmony_ci/* 28c2ecf20Sopenharmony_ci * Copyright (c) 2009 Atheros Communications Inc. 38c2ecf20Sopenharmony_ci * 48c2ecf20Sopenharmony_ci * Permission to use, copy, modify, and/or distribute this software for any 58c2ecf20Sopenharmony_ci * purpose with or without fee is hereby granted, provided that the above 68c2ecf20Sopenharmony_ci * copyright notice and this permission notice appear in all copies. 78c2ecf20Sopenharmony_ci * 88c2ecf20Sopenharmony_ci * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 98c2ecf20Sopenharmony_ci * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 108c2ecf20Sopenharmony_ci * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 118c2ecf20Sopenharmony_ci * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 128c2ecf20Sopenharmony_ci * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 138c2ecf20Sopenharmony_ci * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 148c2ecf20Sopenharmony_ci * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 158c2ecf20Sopenharmony_ci */ 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ci#include <linux/export.h> 188c2ecf20Sopenharmony_ci#include <asm/unaligned.h> 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci#include "ath.h" 218c2ecf20Sopenharmony_ci#include "reg.h" 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ci#define REG_READ (common->ops->read) 248c2ecf20Sopenharmony_ci#define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg) 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci/** 278c2ecf20Sopenharmony_ci * ath_hw_set_bssid_mask - filter out bssids we listen 288c2ecf20Sopenharmony_ci * 298c2ecf20Sopenharmony_ci * @common: the ath_common struct for the device. 308c2ecf20Sopenharmony_ci * 318c2ecf20Sopenharmony_ci * BSSID masking is a method used by AR5212 and newer hardware to inform PCU 328c2ecf20Sopenharmony_ci * which bits of the interface's MAC address should be looked at when trying 338c2ecf20Sopenharmony_ci * to decide which packets to ACK. In station mode and AP mode with a single 348c2ecf20Sopenharmony_ci * BSS every bit matters since we lock to only one BSS. In AP mode with 358c2ecf20Sopenharmony_ci * multiple BSSes (virtual interfaces) not every bit matters because hw must 368c2ecf20Sopenharmony_ci * accept frames for all BSSes and so we tweak some bits of our mac address 378c2ecf20Sopenharmony_ci * in order to have multiple BSSes. 388c2ecf20Sopenharmony_ci * 398c2ecf20Sopenharmony_ci * NOTE: This is a simple filter and does *not* filter out all 408c2ecf20Sopenharmony_ci * relevant frames. Some frames that are not for us might get ACKed from us 418c2ecf20Sopenharmony_ci * by PCU because they just match the mask. 428c2ecf20Sopenharmony_ci * 438c2ecf20Sopenharmony_ci * When handling multiple BSSes you can get the BSSID mask by computing the 448c2ecf20Sopenharmony_ci * set of ~ ( MAC XOR BSSID ) for all bssids we handle. 458c2ecf20Sopenharmony_ci * 468c2ecf20Sopenharmony_ci * When you do this you are essentially computing the common bits of all your 478c2ecf20Sopenharmony_ci * BSSes. Later it is assumed the hardware will "and" (&) the BSSID mask with 488c2ecf20Sopenharmony_ci * the MAC address to obtain the relevant bits and compare the result with 498c2ecf20Sopenharmony_ci * (frame's BSSID & mask) to see if they match. 508c2ecf20Sopenharmony_ci * 518c2ecf20Sopenharmony_ci * Simple example: on your card you have have two BSSes you have created with 528c2ecf20Sopenharmony_ci * BSSID-01 and BSSID-02. Lets assume BSSID-01 will not use the MAC address. 538c2ecf20Sopenharmony_ci * There is another BSSID-03 but you are not part of it. For simplicity's sake, 548c2ecf20Sopenharmony_ci * assuming only 4 bits for a mac address and for BSSIDs you can then have: 558c2ecf20Sopenharmony_ci * 568c2ecf20Sopenharmony_ci * \ 578c2ecf20Sopenharmony_ci * MAC: 0001 | 588c2ecf20Sopenharmony_ci * BSSID-01: 0100 | --> Belongs to us 598c2ecf20Sopenharmony_ci * BSSID-02: 1001 | 608c2ecf20Sopenharmony_ci * / 618c2ecf20Sopenharmony_ci * ------------------- 628c2ecf20Sopenharmony_ci * BSSID-03: 0110 | --> External 638c2ecf20Sopenharmony_ci * ------------------- 648c2ecf20Sopenharmony_ci * 658c2ecf20Sopenharmony_ci * Our bssid_mask would then be: 668c2ecf20Sopenharmony_ci * 678c2ecf20Sopenharmony_ci * On loop iteration for BSSID-01: 688c2ecf20Sopenharmony_ci * ~(0001 ^ 0100) -> ~(0101) 698c2ecf20Sopenharmony_ci * -> 1010 708c2ecf20Sopenharmony_ci * bssid_mask = 1010 718c2ecf20Sopenharmony_ci * 728c2ecf20Sopenharmony_ci * On loop iteration for BSSID-02: 738c2ecf20Sopenharmony_ci * bssid_mask &= ~(0001 ^ 1001) 748c2ecf20Sopenharmony_ci * bssid_mask = (1010) & ~(0001 ^ 1001) 758c2ecf20Sopenharmony_ci * bssid_mask = (1010) & ~(1000) 768c2ecf20Sopenharmony_ci * bssid_mask = (1010) & (0111) 778c2ecf20Sopenharmony_ci * bssid_mask = 0010 788c2ecf20Sopenharmony_ci * 798c2ecf20Sopenharmony_ci * A bssid_mask of 0010 means "only pay attention to the second least 808c2ecf20Sopenharmony_ci * significant bit". This is because its the only bit common 818c2ecf20Sopenharmony_ci * amongst the MAC and all BSSIDs we support. To findout what the real 828c2ecf20Sopenharmony_ci * common bit is we can simply "&" the bssid_mask now with any BSSID we have 838c2ecf20Sopenharmony_ci * or our MAC address (we assume the hardware uses the MAC address). 848c2ecf20Sopenharmony_ci * 858c2ecf20Sopenharmony_ci * Now, suppose there's an incoming frame for BSSID-03: 868c2ecf20Sopenharmony_ci * 878c2ecf20Sopenharmony_ci * IFRAME-01: 0110 888c2ecf20Sopenharmony_ci * 898c2ecf20Sopenharmony_ci * An easy eye-inspeciton of this already should tell you that this frame 908c2ecf20Sopenharmony_ci * will not pass our check. This is because the bssid_mask tells the 918c2ecf20Sopenharmony_ci * hardware to only look at the second least significant bit and the 928c2ecf20Sopenharmony_ci * common bit amongst the MAC and BSSIDs is 0, this frame has the 2nd LSB 938c2ecf20Sopenharmony_ci * as 1, which does not match 0. 948c2ecf20Sopenharmony_ci * 958c2ecf20Sopenharmony_ci * So with IFRAME-01 we *assume* the hardware will do: 968c2ecf20Sopenharmony_ci * 978c2ecf20Sopenharmony_ci * allow = (IFRAME-01 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0; 988c2ecf20Sopenharmony_ci * --> allow = (0110 & 0010) == (0010 & 0001) ? 1 : 0; 998c2ecf20Sopenharmony_ci * --> allow = (0010) == 0000 ? 1 : 0; 1008c2ecf20Sopenharmony_ci * --> allow = 0 1018c2ecf20Sopenharmony_ci * 1028c2ecf20Sopenharmony_ci * Lets now test a frame that should work: 1038c2ecf20Sopenharmony_ci * 1048c2ecf20Sopenharmony_ci * IFRAME-02: 0001 (we should allow) 1058c2ecf20Sopenharmony_ci * 1068c2ecf20Sopenharmony_ci * allow = (IFRAME-02 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0; 1078c2ecf20Sopenharmony_ci * --> allow = (0001 & 0010) == (0010 & 0001) ? 1 :0; 1088c2ecf20Sopenharmony_ci * --> allow = (0000) == (0000) 1098c2ecf20Sopenharmony_ci * --> allow = 1 1108c2ecf20Sopenharmony_ci * 1118c2ecf20Sopenharmony_ci * Other examples: 1128c2ecf20Sopenharmony_ci * 1138c2ecf20Sopenharmony_ci * IFRAME-03: 0100 --> allowed 1148c2ecf20Sopenharmony_ci * IFRAME-04: 1001 --> allowed 1158c2ecf20Sopenharmony_ci * IFRAME-05: 1101 --> allowed but its not for us!!! 1168c2ecf20Sopenharmony_ci * 1178c2ecf20Sopenharmony_ci */ 1188c2ecf20Sopenharmony_civoid ath_hw_setbssidmask(struct ath_common *common) 1198c2ecf20Sopenharmony_ci{ 1208c2ecf20Sopenharmony_ci void *ah = common->ah; 1218c2ecf20Sopenharmony_ci u32 id1; 1228c2ecf20Sopenharmony_ci 1238c2ecf20Sopenharmony_ci REG_WRITE(ah, AR_STA_ID0, get_unaligned_le32(common->macaddr)); 1248c2ecf20Sopenharmony_ci id1 = REG_READ(ah, AR_STA_ID1) & ~AR_STA_ID1_SADH_MASK; 1258c2ecf20Sopenharmony_ci id1 |= get_unaligned_le16(common->macaddr + 4); 1268c2ecf20Sopenharmony_ci REG_WRITE(ah, AR_STA_ID1, id1); 1278c2ecf20Sopenharmony_ci 1288c2ecf20Sopenharmony_ci REG_WRITE(ah, AR_BSSMSKL, get_unaligned_le32(common->bssidmask)); 1298c2ecf20Sopenharmony_ci REG_WRITE(ah, AR_BSSMSKU, get_unaligned_le16(common->bssidmask + 4)); 1308c2ecf20Sopenharmony_ci} 1318c2ecf20Sopenharmony_ciEXPORT_SYMBOL(ath_hw_setbssidmask); 1328c2ecf20Sopenharmony_ci 1338c2ecf20Sopenharmony_ci 1348c2ecf20Sopenharmony_ci/** 1358c2ecf20Sopenharmony_ci * ath_hw_cycle_counters_update - common function to update cycle counters 1368c2ecf20Sopenharmony_ci * 1378c2ecf20Sopenharmony_ci * @common: the ath_common struct for the device. 1388c2ecf20Sopenharmony_ci * 1398c2ecf20Sopenharmony_ci * This function is used to update all cycle counters in one place. 1408c2ecf20Sopenharmony_ci * It has to be called while holding common->cc_lock! 1418c2ecf20Sopenharmony_ci */ 1428c2ecf20Sopenharmony_civoid ath_hw_cycle_counters_update(struct ath_common *common) 1438c2ecf20Sopenharmony_ci{ 1448c2ecf20Sopenharmony_ci u32 cycles, busy, rx, tx; 1458c2ecf20Sopenharmony_ci void *ah = common->ah; 1468c2ecf20Sopenharmony_ci 1478c2ecf20Sopenharmony_ci /* freeze */ 1488c2ecf20Sopenharmony_ci REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC); 1498c2ecf20Sopenharmony_ci 1508c2ecf20Sopenharmony_ci /* read */ 1518c2ecf20Sopenharmony_ci cycles = REG_READ(ah, AR_CCCNT); 1528c2ecf20Sopenharmony_ci busy = REG_READ(ah, AR_RCCNT); 1538c2ecf20Sopenharmony_ci rx = REG_READ(ah, AR_RFCNT); 1548c2ecf20Sopenharmony_ci tx = REG_READ(ah, AR_TFCNT); 1558c2ecf20Sopenharmony_ci 1568c2ecf20Sopenharmony_ci /* clear */ 1578c2ecf20Sopenharmony_ci REG_WRITE(ah, AR_CCCNT, 0); 1588c2ecf20Sopenharmony_ci REG_WRITE(ah, AR_RFCNT, 0); 1598c2ecf20Sopenharmony_ci REG_WRITE(ah, AR_RCCNT, 0); 1608c2ecf20Sopenharmony_ci REG_WRITE(ah, AR_TFCNT, 0); 1618c2ecf20Sopenharmony_ci 1628c2ecf20Sopenharmony_ci /* unfreeze */ 1638c2ecf20Sopenharmony_ci REG_WRITE(ah, AR_MIBC, 0); 1648c2ecf20Sopenharmony_ci 1658c2ecf20Sopenharmony_ci /* update all cycle counters here */ 1668c2ecf20Sopenharmony_ci common->cc_ani.cycles += cycles; 1678c2ecf20Sopenharmony_ci common->cc_ani.rx_busy += busy; 1688c2ecf20Sopenharmony_ci common->cc_ani.rx_frame += rx; 1698c2ecf20Sopenharmony_ci common->cc_ani.tx_frame += tx; 1708c2ecf20Sopenharmony_ci 1718c2ecf20Sopenharmony_ci common->cc_survey.cycles += cycles; 1728c2ecf20Sopenharmony_ci common->cc_survey.rx_busy += busy; 1738c2ecf20Sopenharmony_ci common->cc_survey.rx_frame += rx; 1748c2ecf20Sopenharmony_ci common->cc_survey.tx_frame += tx; 1758c2ecf20Sopenharmony_ci} 1768c2ecf20Sopenharmony_ciEXPORT_SYMBOL(ath_hw_cycle_counters_update); 1778c2ecf20Sopenharmony_ci 1788c2ecf20Sopenharmony_ciint32_t ath_hw_get_listen_time(struct ath_common *common) 1798c2ecf20Sopenharmony_ci{ 1808c2ecf20Sopenharmony_ci struct ath_cycle_counters *cc = &common->cc_ani; 1818c2ecf20Sopenharmony_ci int32_t listen_time; 1828c2ecf20Sopenharmony_ci 1838c2ecf20Sopenharmony_ci listen_time = (cc->cycles - cc->rx_frame - cc->tx_frame) / 1848c2ecf20Sopenharmony_ci (common->clockrate * 1000); 1858c2ecf20Sopenharmony_ci 1868c2ecf20Sopenharmony_ci memset(cc, 0, sizeof(*cc)); 1878c2ecf20Sopenharmony_ci 1888c2ecf20Sopenharmony_ci return listen_time; 1898c2ecf20Sopenharmony_ci} 1908c2ecf20Sopenharmony_ciEXPORT_SYMBOL(ath_hw_get_listen_time); 191