18c2ecf20Sopenharmony_ci/* 28c2ecf20Sopenharmony_ci * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org> 38c2ecf20Sopenharmony_ci * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com> 48c2ecf20Sopenharmony_ci * Copyright (c) 2007-2008 Jiri Slaby <jirislaby@gmail.com> 58c2ecf20Sopenharmony_ci * 68c2ecf20Sopenharmony_ci * Permission to use, copy, modify, and distribute this software for any 78c2ecf20Sopenharmony_ci * purpose with or without fee is hereby granted, provided that the above 88c2ecf20Sopenharmony_ci * copyright notice and this permission notice appear in all copies. 98c2ecf20Sopenharmony_ci * 108c2ecf20Sopenharmony_ci * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 118c2ecf20Sopenharmony_ci * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 128c2ecf20Sopenharmony_ci * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 138c2ecf20Sopenharmony_ci * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 148c2ecf20Sopenharmony_ci * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 158c2ecf20Sopenharmony_ci * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 168c2ecf20Sopenharmony_ci * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 178c2ecf20Sopenharmony_ci * 188c2ecf20Sopenharmony_ci */ 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci/**************\ 218c2ecf20Sopenharmony_ci* Capabilities * 228c2ecf20Sopenharmony_ci\**************/ 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci#include "ath5k.h" 258c2ecf20Sopenharmony_ci#include "reg.h" 268c2ecf20Sopenharmony_ci#include "debug.h" 278c2ecf20Sopenharmony_ci#include "../regd.h" 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ci/* 308c2ecf20Sopenharmony_ci * Fill the capabilities struct 318c2ecf20Sopenharmony_ci * TODO: Merge this with EEPROM code when we are done with it 328c2ecf20Sopenharmony_ci */ 338c2ecf20Sopenharmony_ciint ath5k_hw_set_capabilities(struct ath5k_hw *ah) 348c2ecf20Sopenharmony_ci{ 358c2ecf20Sopenharmony_ci struct ath5k_capabilities *caps = &ah->ah_capabilities; 368c2ecf20Sopenharmony_ci u16 ee_header; 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_ci /* Capabilities stored in the EEPROM */ 398c2ecf20Sopenharmony_ci ee_header = caps->cap_eeprom.ee_header; 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci if (ah->ah_version == AR5K_AR5210) { 428c2ecf20Sopenharmony_ci /* 438c2ecf20Sopenharmony_ci * Set radio capabilities 448c2ecf20Sopenharmony_ci * (The AR5110 only supports the middle 5GHz band) 458c2ecf20Sopenharmony_ci */ 468c2ecf20Sopenharmony_ci caps->cap_range.range_5ghz_min = 5120; 478c2ecf20Sopenharmony_ci caps->cap_range.range_5ghz_max = 5430; 488c2ecf20Sopenharmony_ci caps->cap_range.range_2ghz_min = 0; 498c2ecf20Sopenharmony_ci caps->cap_range.range_2ghz_max = 0; 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_ci /* Set supported modes */ 528c2ecf20Sopenharmony_ci __set_bit(AR5K_MODE_11A, caps->cap_mode); 538c2ecf20Sopenharmony_ci } else { 548c2ecf20Sopenharmony_ci /* 558c2ecf20Sopenharmony_ci * XXX The transceiver supports frequencies from 4920 to 6100MHz 568c2ecf20Sopenharmony_ci * XXX and from 2312 to 2732MHz. There are problems with the 578c2ecf20Sopenharmony_ci * XXX current ieee80211 implementation because the IEEE 588c2ecf20Sopenharmony_ci * XXX channel mapping does not support negative channel 598c2ecf20Sopenharmony_ci * XXX numbers (2312MHz is channel -19). Of course, this 608c2ecf20Sopenharmony_ci * XXX doesn't matter because these channels are out of the 618c2ecf20Sopenharmony_ci * XXX legal range. 628c2ecf20Sopenharmony_ci */ 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_ci /* 658c2ecf20Sopenharmony_ci * Set radio capabilities 668c2ecf20Sopenharmony_ci */ 678c2ecf20Sopenharmony_ci 688c2ecf20Sopenharmony_ci if (AR5K_EEPROM_HDR_11A(ee_header)) { 698c2ecf20Sopenharmony_ci if (ath_is_49ghz_allowed(caps->cap_eeprom.ee_regdomain)) 708c2ecf20Sopenharmony_ci caps->cap_range.range_5ghz_min = 4920; 718c2ecf20Sopenharmony_ci else 728c2ecf20Sopenharmony_ci caps->cap_range.range_5ghz_min = 5005; 738c2ecf20Sopenharmony_ci caps->cap_range.range_5ghz_max = 6100; 748c2ecf20Sopenharmony_ci 758c2ecf20Sopenharmony_ci /* Set supported modes */ 768c2ecf20Sopenharmony_ci __set_bit(AR5K_MODE_11A, caps->cap_mode); 778c2ecf20Sopenharmony_ci } 788c2ecf20Sopenharmony_ci 798c2ecf20Sopenharmony_ci /* Enable 802.11b if a 2GHz capable radio (2111/5112) is 808c2ecf20Sopenharmony_ci * connected */ 818c2ecf20Sopenharmony_ci if (AR5K_EEPROM_HDR_11B(ee_header) || 828c2ecf20Sopenharmony_ci (AR5K_EEPROM_HDR_11G(ee_header) && 838c2ecf20Sopenharmony_ci ah->ah_version != AR5K_AR5211)) { 848c2ecf20Sopenharmony_ci /* 2312 */ 858c2ecf20Sopenharmony_ci caps->cap_range.range_2ghz_min = 2412; 868c2ecf20Sopenharmony_ci caps->cap_range.range_2ghz_max = 2732; 878c2ecf20Sopenharmony_ci 888c2ecf20Sopenharmony_ci /* Override 2GHz modes on SoCs that need it 898c2ecf20Sopenharmony_ci * NOTE: cap_needs_2GHz_ovr gets set from 908c2ecf20Sopenharmony_ci * ath_ahb_probe */ 918c2ecf20Sopenharmony_ci if (!caps->cap_needs_2GHz_ovr) { 928c2ecf20Sopenharmony_ci if (AR5K_EEPROM_HDR_11B(ee_header)) 938c2ecf20Sopenharmony_ci __set_bit(AR5K_MODE_11B, 948c2ecf20Sopenharmony_ci caps->cap_mode); 958c2ecf20Sopenharmony_ci 968c2ecf20Sopenharmony_ci if (AR5K_EEPROM_HDR_11G(ee_header) && 978c2ecf20Sopenharmony_ci ah->ah_version != AR5K_AR5211) 988c2ecf20Sopenharmony_ci __set_bit(AR5K_MODE_11G, 998c2ecf20Sopenharmony_ci caps->cap_mode); 1008c2ecf20Sopenharmony_ci } 1018c2ecf20Sopenharmony_ci } 1028c2ecf20Sopenharmony_ci } 1038c2ecf20Sopenharmony_ci 1048c2ecf20Sopenharmony_ci if ((ah->ah_radio_5ghz_revision & 0xf0) == AR5K_SREV_RAD_2112) 1058c2ecf20Sopenharmony_ci __clear_bit(AR5K_MODE_11A, caps->cap_mode); 1068c2ecf20Sopenharmony_ci 1078c2ecf20Sopenharmony_ci /* Set number of supported TX queues */ 1088c2ecf20Sopenharmony_ci if (ah->ah_version == AR5K_AR5210) 1098c2ecf20Sopenharmony_ci caps->cap_queues.q_tx_num = AR5K_NUM_TX_QUEUES_NOQCU; 1108c2ecf20Sopenharmony_ci else 1118c2ecf20Sopenharmony_ci caps->cap_queues.q_tx_num = AR5K_NUM_TX_QUEUES; 1128c2ecf20Sopenharmony_ci 1138c2ecf20Sopenharmony_ci /* Newer hardware has PHY error counters */ 1148c2ecf20Sopenharmony_ci if (ah->ah_mac_srev >= AR5K_SREV_AR5213A) 1158c2ecf20Sopenharmony_ci caps->cap_has_phyerr_counters = true; 1168c2ecf20Sopenharmony_ci else 1178c2ecf20Sopenharmony_ci caps->cap_has_phyerr_counters = false; 1188c2ecf20Sopenharmony_ci 1198c2ecf20Sopenharmony_ci /* MACs since AR5212 have MRR support */ 1208c2ecf20Sopenharmony_ci if (ah->ah_version == AR5K_AR5212) 1218c2ecf20Sopenharmony_ci caps->cap_has_mrr_support = true; 1228c2ecf20Sopenharmony_ci else 1238c2ecf20Sopenharmony_ci caps->cap_has_mrr_support = false; 1248c2ecf20Sopenharmony_ci 1258c2ecf20Sopenharmony_ci return 0; 1268c2ecf20Sopenharmony_ci} 1278c2ecf20Sopenharmony_ci 1288c2ecf20Sopenharmony_ci/* 1298c2ecf20Sopenharmony_ci * TODO: Following functions should be part of a new function 1308c2ecf20Sopenharmony_ci * set_capability 1318c2ecf20Sopenharmony_ci */ 1328c2ecf20Sopenharmony_ci 1338c2ecf20Sopenharmony_ciint ath5k_hw_enable_pspoll(struct ath5k_hw *ah, u8 *bssid, 1348c2ecf20Sopenharmony_ci u16 assoc_id) 1358c2ecf20Sopenharmony_ci{ 1368c2ecf20Sopenharmony_ci if (ah->ah_version == AR5K_AR5210) { 1378c2ecf20Sopenharmony_ci AR5K_REG_DISABLE_BITS(ah, AR5K_STA_ID1, 1388c2ecf20Sopenharmony_ci AR5K_STA_ID1_NO_PSPOLL | AR5K_STA_ID1_DEFAULT_ANTENNA); 1398c2ecf20Sopenharmony_ci return 0; 1408c2ecf20Sopenharmony_ci } 1418c2ecf20Sopenharmony_ci 1428c2ecf20Sopenharmony_ci return -EIO; 1438c2ecf20Sopenharmony_ci} 1448c2ecf20Sopenharmony_ci 1458c2ecf20Sopenharmony_ciint ath5k_hw_disable_pspoll(struct ath5k_hw *ah) 1468c2ecf20Sopenharmony_ci{ 1478c2ecf20Sopenharmony_ci if (ah->ah_version == AR5K_AR5210) { 1488c2ecf20Sopenharmony_ci AR5K_REG_ENABLE_BITS(ah, AR5K_STA_ID1, 1498c2ecf20Sopenharmony_ci AR5K_STA_ID1_NO_PSPOLL | AR5K_STA_ID1_DEFAULT_ANTENNA); 1508c2ecf20Sopenharmony_ci return 0; 1518c2ecf20Sopenharmony_ci } 1528c2ecf20Sopenharmony_ci 1538c2ecf20Sopenharmony_ci return -EIO; 1548c2ecf20Sopenharmony_ci} 155