1/* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2/* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 */ 5 6#ifndef ATH11K_QMI_H 7#define ATH11K_QMI_H 8 9#include <linux/mutex.h> 10#include <linux/soc/qcom/qmi.h> 11 12#define ATH11K_HOST_VERSION_STRING "WIN" 13#define ATH11K_QMI_WLANFW_TIMEOUT_MS 5000 14#define ATH11K_QMI_MAX_BDF_FILE_NAME_SIZE 64 15#define ATH11K_QMI_BDF_MAX_SIZE (256 * 1024) 16#define ATH11K_QMI_CALDATA_OFFSET (128 * 1024) 17#define ATH11K_QMI_WLANFW_MAX_BUILD_ID_LEN_V01 128 18#define ATH11K_QMI_WLFW_SERVICE_ID_V01 0x45 19#define ATH11K_QMI_WLFW_SERVICE_VERS_V01 0x01 20#define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01 0x02 21#define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390 0x01 22#define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074 0x02 23#define ATH11K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 32 24#define ATH11K_QMI_RESP_LEN_MAX 8192 25#define ATH11K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01 32 26#define ATH11K_QMI_CALDB_SIZE 0x480000 27 28#define QMI_WLFW_REQUEST_MEM_IND_V01 0x0035 29#define QMI_WLFW_FW_MEM_READY_IND_V01 0x0037 30#define QMI_WLFW_COLD_BOOT_CAL_DONE_IND_V01 0x0021 31#define QMI_WLFW_FW_READY_IND_V01 0x0038 32 33#define QMI_WLANFW_MAX_DATA_SIZE_V01 6144 34#define ATH11K_FIRMWARE_MODE_OFF 4 35#define ATH11K_QMI_TARGET_MEM_MODE_DEFAULT 0 36 37struct ath11k_base; 38 39enum ath11k_qmi_file_type { 40 ATH11K_QMI_FILE_TYPE_BDF_GOLDEN, 41 ATH11K_QMI_FILE_TYPE_CALDATA, 42 ATH11K_QMI_MAX_FILE_TYPE, 43}; 44 45enum ath11k_qmi_bdf_type { 46 ATH11K_QMI_BDF_TYPE_BIN = 0, 47 ATH11K_QMI_BDF_TYPE_ELF = 1, 48}; 49 50enum ath11k_qmi_event_type { 51 ATH11K_QMI_EVENT_SERVER_ARRIVE, 52 ATH11K_QMI_EVENT_SERVER_EXIT, 53 ATH11K_QMI_EVENT_REQUEST_MEM, 54 ATH11K_QMI_EVENT_FW_MEM_READY, 55 ATH11K_QMI_EVENT_FW_READY, 56 ATH11K_QMI_EVENT_COLD_BOOT_CAL_START, 57 ATH11K_QMI_EVENT_COLD_BOOT_CAL_DONE, 58 ATH11K_QMI_EVENT_REGISTER_DRIVER, 59 ATH11K_QMI_EVENT_UNREGISTER_DRIVER, 60 ATH11K_QMI_EVENT_RECOVERY, 61 ATH11K_QMI_EVENT_FORCE_FW_ASSERT, 62 ATH11K_QMI_EVENT_POWER_UP, 63 ATH11K_QMI_EVENT_POWER_DOWN, 64 ATH11K_QMI_EVENT_MAX, 65}; 66 67struct ath11k_qmi_driver_event { 68 struct list_head list; 69 enum ath11k_qmi_event_type type; 70 void *data; 71}; 72 73struct ath11k_qmi_ce_cfg { 74 const struct ce_pipe_config *tgt_ce; 75 int tgt_ce_len; 76 const struct service_to_pipe *svc_to_ce_map; 77 int svc_to_ce_map_len; 78 const u8 *shadow_reg; 79 int shadow_reg_len; 80 u32 *shadow_reg_v2; 81 int shadow_reg_v2_len; 82}; 83 84struct ath11k_qmi_event_msg { 85 struct list_head list; 86 enum ath11k_qmi_event_type type; 87}; 88 89struct target_mem_chunk { 90 u32 size; 91 u32 type; 92 dma_addr_t paddr; 93 u32 *vaddr; 94}; 95 96struct target_info { 97 u32 chip_id; 98 u32 chip_family; 99 u32 board_id; 100 u32 soc_id; 101 u32 fw_version; 102 char fw_build_timestamp[ATH11K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 + 1]; 103 char fw_build_id[ATH11K_QMI_WLANFW_MAX_BUILD_ID_LEN_V01 + 1]; 104}; 105 106struct m3_mem_region { 107 u32 size; 108 dma_addr_t paddr; 109 void *vaddr; 110}; 111 112struct ath11k_qmi { 113 struct ath11k_base *ab; 114 struct qmi_handle handle; 115 struct sockaddr_qrtr sq; 116 struct work_struct event_work; 117 struct workqueue_struct *event_wq; 118 struct list_head event_list; 119 spinlock_t event_lock; /* spinlock for qmi event list */ 120 struct ath11k_qmi_ce_cfg ce_cfg; 121 struct target_mem_chunk target_mem[ATH11K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01]; 122 u32 mem_seg_count; 123 u32 target_mem_mode; 124 bool target_mem_delayed; 125 u8 cal_done; 126 struct target_info target; 127 struct m3_mem_region m3_mem; 128 unsigned int service_ins_id; 129}; 130 131#define QMI_WLANFW_HOST_CAP_REQ_MSG_V01_MAX_LEN 189 132#define QMI_WLANFW_HOST_CAP_REQ_V01 0x0034 133#define QMI_WLANFW_HOST_CAP_RESP_MSG_V01_MAX_LEN 7 134#define QMI_WLFW_HOST_CAP_RESP_V01 0x0034 135#define QMI_WLFW_MAX_NUM_GPIO_V01 32 136#define QMI_IPQ8074_FW_MEM_MODE 0xFF 137#define HOST_DDR_REGION_TYPE 0x1 138#define BDF_MEM_REGION_TYPE 0x2 139#define CALDB_MEM_REGION_TYPE 0x4 140 141struct qmi_wlanfw_host_cap_req_msg_v01 { 142 u8 num_clients_valid; 143 u32 num_clients; 144 u8 wake_msi_valid; 145 u32 wake_msi; 146 u8 gpios_valid; 147 u32 gpios_len; 148 u32 gpios[QMI_WLFW_MAX_NUM_GPIO_V01]; 149 u8 nm_modem_valid; 150 u8 nm_modem; 151 u8 bdf_support_valid; 152 u8 bdf_support; 153 u8 bdf_cache_support_valid; 154 u8 bdf_cache_support; 155 u8 m3_support_valid; 156 u8 m3_support; 157 u8 m3_cache_support_valid; 158 u8 m3_cache_support; 159 u8 cal_filesys_support_valid; 160 u8 cal_filesys_support; 161 u8 cal_cache_support_valid; 162 u8 cal_cache_support; 163 u8 cal_done_valid; 164 u8 cal_done; 165 u8 mem_bucket_valid; 166 u32 mem_bucket; 167 u8 mem_cfg_mode_valid; 168 u8 mem_cfg_mode; 169}; 170 171struct qmi_wlanfw_host_cap_resp_msg_v01 { 172 struct qmi_response_type_v01 resp; 173}; 174 175#define QMI_WLANFW_IND_REGISTER_REQ_MSG_V01_MAX_LEN 54 176#define QMI_WLANFW_IND_REGISTER_REQ_V01 0x0020 177#define QMI_WLANFW_IND_REGISTER_RESP_MSG_V01_MAX_LEN 18 178#define QMI_WLANFW_IND_REGISTER_RESP_V01 0x0020 179#define QMI_WLANFW_CLIENT_ID 0x4b4e454c 180 181struct qmi_wlanfw_ind_register_req_msg_v01 { 182 u8 fw_ready_enable_valid; 183 u8 fw_ready_enable; 184 u8 initiate_cal_download_enable_valid; 185 u8 initiate_cal_download_enable; 186 u8 initiate_cal_update_enable_valid; 187 u8 initiate_cal_update_enable; 188 u8 msa_ready_enable_valid; 189 u8 msa_ready_enable; 190 u8 pin_connect_result_enable_valid; 191 u8 pin_connect_result_enable; 192 u8 client_id_valid; 193 u32 client_id; 194 u8 request_mem_enable_valid; 195 u8 request_mem_enable; 196 u8 fw_mem_ready_enable_valid; 197 u8 fw_mem_ready_enable; 198 u8 fw_init_done_enable_valid; 199 u8 fw_init_done_enable; 200 u8 rejuvenate_enable_valid; 201 u32 rejuvenate_enable; 202 u8 xo_cal_enable_valid; 203 u8 xo_cal_enable; 204 u8 cal_done_enable_valid; 205 u8 cal_done_enable; 206}; 207 208struct qmi_wlanfw_ind_register_resp_msg_v01 { 209 struct qmi_response_type_v01 resp; 210 u8 fw_status_valid; 211 u64 fw_status; 212}; 213 214#define QMI_WLANFW_REQUEST_MEM_IND_MSG_V01_MAX_LEN 1124 215#define QMI_WLANFW_RESPOND_MEM_REQ_MSG_V01_MAX_LEN 548 216#define QMI_WLANFW_RESPOND_MEM_RESP_MSG_V01_MAX_LEN 7 217#define QMI_WLANFW_REQUEST_MEM_IND_V01 0x0035 218#define QMI_WLANFW_RESPOND_MEM_REQ_V01 0x0036 219#define QMI_WLANFW_RESPOND_MEM_RESP_V01 0x0036 220#define QMI_WLANFW_MAX_NUM_MEM_CFG_V01 2 221 222struct qmi_wlanfw_mem_cfg_s_v01 { 223 u64 offset; 224 u32 size; 225 u8 secure_flag; 226}; 227 228enum qmi_wlanfw_mem_type_enum_v01 { 229 WLANFW_MEM_TYPE_ENUM_MIN_VAL_V01 = INT_MIN, 230 QMI_WLANFW_MEM_TYPE_MSA_V01 = 0, 231 QMI_WLANFW_MEM_TYPE_DDR_V01 = 1, 232 QMI_WLANFW_MEM_BDF_V01 = 2, 233 QMI_WLANFW_MEM_M3_V01 = 3, 234 QMI_WLANFW_MEM_CAL_V01 = 4, 235 QMI_WLANFW_MEM_DPD_V01 = 5, 236 WLANFW_MEM_TYPE_ENUM_MAX_VAL_V01 = INT_MAX, 237}; 238 239struct qmi_wlanfw_mem_seg_s_v01 { 240 u32 size; 241 enum qmi_wlanfw_mem_type_enum_v01 type; 242 u32 mem_cfg_len; 243 struct qmi_wlanfw_mem_cfg_s_v01 mem_cfg[QMI_WLANFW_MAX_NUM_MEM_CFG_V01]; 244}; 245 246struct qmi_wlanfw_request_mem_ind_msg_v01 { 247 u32 mem_seg_len; 248 struct qmi_wlanfw_mem_seg_s_v01 mem_seg[ATH11K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01]; 249}; 250 251struct qmi_wlanfw_mem_seg_resp_s_v01 { 252 u64 addr; 253 u32 size; 254 enum qmi_wlanfw_mem_type_enum_v01 type; 255 u8 restore; 256}; 257 258struct qmi_wlanfw_respond_mem_req_msg_v01 { 259 u32 mem_seg_len; 260 struct qmi_wlanfw_mem_seg_resp_s_v01 mem_seg[ATH11K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01]; 261}; 262 263struct qmi_wlanfw_respond_mem_resp_msg_v01 { 264 struct qmi_response_type_v01 resp; 265}; 266 267struct qmi_wlanfw_fw_mem_ready_ind_msg_v01 { 268 char placeholder; 269}; 270 271struct qmi_wlanfw_fw_ready_ind_msg_v01 { 272 char placeholder; 273}; 274 275struct qmi_wlanfw_fw_cold_cal_done_ind_msg_v01 { 276 char placeholder; 277}; 278 279#define QMI_WLANFW_CAP_REQ_MSG_V01_MAX_LEN 0 280#define QMI_WLANFW_CAP_RESP_MSG_V01_MAX_LEN 207 281#define QMI_WLANFW_CAP_REQ_V01 0x0024 282#define QMI_WLANFW_CAP_RESP_V01 0x0024 283 284enum qmi_wlanfw_pipedir_enum_v01 { 285 QMI_WLFW_PIPEDIR_NONE_V01 = 0, 286 QMI_WLFW_PIPEDIR_IN_V01 = 1, 287 QMI_WLFW_PIPEDIR_OUT_V01 = 2, 288 QMI_WLFW_PIPEDIR_INOUT_V01 = 3, 289}; 290 291struct qmi_wlanfw_ce_tgt_pipe_cfg_s_v01 { 292 __le32 pipe_num; 293 __le32 pipe_dir; 294 __le32 nentries; 295 __le32 nbytes_max; 296 __le32 flags; 297}; 298 299struct qmi_wlanfw_ce_svc_pipe_cfg_s_v01 { 300 __le32 service_id; 301 __le32 pipe_dir; 302 __le32 pipe_num; 303}; 304 305struct qmi_wlanfw_shadow_reg_cfg_s_v01 { 306 u16 id; 307 u16 offset; 308}; 309 310struct qmi_wlanfw_shadow_reg_v2_cfg_s_v01 { 311 u32 addr; 312}; 313 314struct qmi_wlanfw_memory_region_info_s_v01 { 315 u64 region_addr; 316 u32 size; 317 u8 secure_flag; 318}; 319 320struct qmi_wlanfw_rf_chip_info_s_v01 { 321 u32 chip_id; 322 u32 chip_family; 323}; 324 325struct qmi_wlanfw_rf_board_info_s_v01 { 326 u32 board_id; 327}; 328 329struct qmi_wlanfw_soc_info_s_v01 { 330 u32 soc_id; 331}; 332 333struct qmi_wlanfw_fw_version_info_s_v01 { 334 u32 fw_version; 335 char fw_build_timestamp[ATH11K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 + 1]; 336}; 337 338enum qmi_wlanfw_cal_temp_id_enum_v01 { 339 QMI_WLANFW_CAL_TEMP_IDX_0_V01 = 0, 340 QMI_WLANFW_CAL_TEMP_IDX_1_V01 = 1, 341 QMI_WLANFW_CAL_TEMP_IDX_2_V01 = 2, 342 QMI_WLANFW_CAL_TEMP_IDX_3_V01 = 3, 343 QMI_WLANFW_CAL_TEMP_IDX_4_V01 = 4, 344 QMI_WLANFW_CAL_TEMP_ID_MAX_V01 = 0xFF, 345}; 346 347struct qmi_wlanfw_cap_resp_msg_v01 { 348 struct qmi_response_type_v01 resp; 349 u8 chip_info_valid; 350 struct qmi_wlanfw_rf_chip_info_s_v01 chip_info; 351 u8 board_info_valid; 352 struct qmi_wlanfw_rf_board_info_s_v01 board_info; 353 u8 soc_info_valid; 354 struct qmi_wlanfw_soc_info_s_v01 soc_info; 355 u8 fw_version_info_valid; 356 struct qmi_wlanfw_fw_version_info_s_v01 fw_version_info; 357 u8 fw_build_id_valid; 358 char fw_build_id[ATH11K_QMI_WLANFW_MAX_BUILD_ID_LEN_V01 + 1]; 359 u8 num_macs_valid; 360 u8 num_macs; 361}; 362 363struct qmi_wlanfw_cap_req_msg_v01 { 364 char placeholder; 365}; 366 367#define QMI_WLANFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_LEN 6182 368#define QMI_WLANFW_BDF_DOWNLOAD_RESP_MSG_V01_MAX_LEN 7 369#define QMI_WLANFW_BDF_DOWNLOAD_RESP_V01 0x0025 370#define QMI_WLANFW_BDF_DOWNLOAD_REQ_V01 0x0025 371/* TODO: Need to check with MCL and FW team that data can be pointer and 372 * can be last element in structure 373 */ 374struct qmi_wlanfw_bdf_download_req_msg_v01 { 375 u8 valid; 376 u8 file_id_valid; 377 enum qmi_wlanfw_cal_temp_id_enum_v01 file_id; 378 u8 total_size_valid; 379 u32 total_size; 380 u8 seg_id_valid; 381 u32 seg_id; 382 u8 data_valid; 383 u32 data_len; 384 u8 data[QMI_WLANFW_MAX_DATA_SIZE_V01]; 385 u8 end_valid; 386 u8 end; 387 u8 bdf_type_valid; 388 u8 bdf_type; 389 390}; 391 392struct qmi_wlanfw_bdf_download_resp_msg_v01 { 393 struct qmi_response_type_v01 resp; 394}; 395 396#define QMI_WLANFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN 18 397#define QMI_WLANFW_M3_INFO_RESP_MSG_V01_MAX_MSG_LEN 7 398#define QMI_WLANFW_M3_INFO_RESP_V01 0x003C 399#define QMI_WLANFW_M3_INFO_REQ_V01 0x003C 400 401struct qmi_wlanfw_m3_info_req_msg_v01 { 402 u64 addr; 403 u32 size; 404}; 405 406struct qmi_wlanfw_m3_info_resp_msg_v01 { 407 struct qmi_response_type_v01 resp; 408}; 409 410#define QMI_WLANFW_WLAN_MODE_REQ_MSG_V01_MAX_LEN 11 411#define QMI_WLANFW_WLAN_MODE_RESP_MSG_V01_MAX_LEN 7 412#define QMI_WLANFW_WLAN_CFG_REQ_MSG_V01_MAX_LEN 803 413#define QMI_WLANFW_WLAN_CFG_RESP_MSG_V01_MAX_LEN 7 414#define QMI_WLANFW_WLAN_MODE_REQ_V01 0x0022 415#define QMI_WLANFW_WLAN_MODE_RESP_V01 0x0022 416#define QMI_WLANFW_WLAN_CFG_REQ_V01 0x0023 417#define QMI_WLANFW_WLAN_CFG_RESP_V01 0x0023 418#define QMI_WLANFW_MAX_STR_LEN_V01 16 419#define QMI_WLANFW_MAX_NUM_CE_V01 12 420#define QMI_WLANFW_MAX_NUM_SVC_V01 24 421#define QMI_WLANFW_MAX_NUM_SHADOW_REG_V01 24 422#define QMI_WLANFW_MAX_NUM_SHADOW_REG_V2_V01 36 423 424struct qmi_wlanfw_wlan_mode_req_msg_v01 { 425 u32 mode; 426 u8 hw_debug_valid; 427 u8 hw_debug; 428}; 429 430struct qmi_wlanfw_wlan_mode_resp_msg_v01 { 431 struct qmi_response_type_v01 resp; 432}; 433 434struct qmi_wlanfw_wlan_cfg_req_msg_v01 { 435 u8 host_version_valid; 436 char host_version[QMI_WLANFW_MAX_STR_LEN_V01 + 1]; 437 u8 tgt_cfg_valid; 438 u32 tgt_cfg_len; 439 struct qmi_wlanfw_ce_tgt_pipe_cfg_s_v01 440 tgt_cfg[QMI_WLANFW_MAX_NUM_CE_V01]; 441 u8 svc_cfg_valid; 442 u32 svc_cfg_len; 443 struct qmi_wlanfw_ce_svc_pipe_cfg_s_v01 444 svc_cfg[QMI_WLANFW_MAX_NUM_SVC_V01]; 445 u8 shadow_reg_valid; 446 u32 shadow_reg_len; 447 struct qmi_wlanfw_shadow_reg_cfg_s_v01 448 shadow_reg[QMI_WLANFW_MAX_NUM_SHADOW_REG_V01]; 449 u8 shadow_reg_v2_valid; 450 u32 shadow_reg_v2_len; 451 struct qmi_wlanfw_shadow_reg_v2_cfg_s_v01 452 shadow_reg_v2[QMI_WLANFW_MAX_NUM_SHADOW_REG_V2_V01]; 453}; 454 455struct qmi_wlanfw_wlan_cfg_resp_msg_v01 { 456 struct qmi_response_type_v01 resp; 457}; 458 459int ath11k_qmi_firmware_start(struct ath11k_base *ab, 460 u32 mode); 461void ath11k_qmi_firmware_stop(struct ath11k_base *ab); 462void ath11k_qmi_event_work(struct work_struct *work); 463void ath11k_qmi_msg_recv_work(struct work_struct *work); 464void ath11k_qmi_deinit_service(struct ath11k_base *ab); 465int ath11k_qmi_init_service(struct ath11k_base *ab); 466 467#endif 468