18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: ISC */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Copyright (c) 2016 Qualcomm Atheros, Inc. All rights reserved. 48c2ecf20Sopenharmony_ci * Copyright (c) 2015 The Linux Foundation. All rights reserved. 58c2ecf20Sopenharmony_ci */ 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci#ifndef _AHB_H_ 88c2ecf20Sopenharmony_ci#define _AHB_H_ 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci#include <linux/platform_device.h> 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_cistruct ath10k_ahb { 138c2ecf20Sopenharmony_ci struct platform_device *pdev; 148c2ecf20Sopenharmony_ci void __iomem *mem; 158c2ecf20Sopenharmony_ci unsigned long mem_len; 168c2ecf20Sopenharmony_ci void __iomem *gcc_mem; 178c2ecf20Sopenharmony_ci void __iomem *tcsr_mem; 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci int irq; 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci struct clk *cmd_clk; 228c2ecf20Sopenharmony_ci struct clk *ref_clk; 238c2ecf20Sopenharmony_ci struct clk *rtc_clk; 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci struct reset_control *core_cold_rst; 268c2ecf20Sopenharmony_ci struct reset_control *radio_cold_rst; 278c2ecf20Sopenharmony_ci struct reset_control *radio_warm_rst; 288c2ecf20Sopenharmony_ci struct reset_control *radio_srif_rst; 298c2ecf20Sopenharmony_ci struct reset_control *cpu_init_rst; 308c2ecf20Sopenharmony_ci}; 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_ci#ifdef CONFIG_ATH10K_AHB 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_ci#define ATH10K_GCC_REG_BASE 0x1800000 358c2ecf20Sopenharmony_ci#define ATH10K_GCC_REG_SIZE 0x60000 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ci#define ATH10K_TCSR_REG_BASE 0x1900000 388c2ecf20Sopenharmony_ci#define ATH10K_TCSR_REG_SIZE 0x80000 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_ci#define ATH10K_AHB_GCC_FEPLL_PLL_DIV 0x2f020 418c2ecf20Sopenharmony_ci#define ATH10K_AHB_WIFI_SCRATCH_5_REG 0x4f014 428c2ecf20Sopenharmony_ci 438c2ecf20Sopenharmony_ci#define ATH10K_AHB_WLAN_CORE_ID_REG 0x82030 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci#define ATH10K_AHB_TCSR_WIFI0_GLB_CFG 0x49000 468c2ecf20Sopenharmony_ci#define ATH10K_AHB_TCSR_WIFI1_GLB_CFG 0x49004 478c2ecf20Sopenharmony_ci#define TCSR_WIFIX_GLB_CFG_DISABLE_CORE_CLK BIT(25) 488c2ecf20Sopenharmony_ci 498c2ecf20Sopenharmony_ci#define ATH10K_AHB_TCSR_WCSS0_HALTREQ 0x52000 508c2ecf20Sopenharmony_ci#define ATH10K_AHB_TCSR_WCSS1_HALTREQ 0x52010 518c2ecf20Sopenharmony_ci#define ATH10K_AHB_TCSR_WCSS0_HALTACK 0x52004 528c2ecf20Sopenharmony_ci#define ATH10K_AHB_TCSR_WCSS1_HALTACK 0x52014 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ci#define ATH10K_AHB_AXI_BUS_HALT_TIMEOUT 10 /* msec */ 558c2ecf20Sopenharmony_ci#define AHB_AXI_BUS_HALT_REQ 1 568c2ecf20Sopenharmony_ci#define AHB_AXI_BUS_HALT_ACK 1 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_ci#define ATH10K_AHB_CORE_CTRL_CPU_INTR_MASK 1 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_ciint ath10k_ahb_init(void); 618c2ecf20Sopenharmony_civoid ath10k_ahb_exit(void); 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci#else /* CONFIG_ATH10K_AHB */ 648c2ecf20Sopenharmony_ci 658c2ecf20Sopenharmony_cistatic inline int ath10k_ahb_init(void) 668c2ecf20Sopenharmony_ci{ 678c2ecf20Sopenharmony_ci return 0; 688c2ecf20Sopenharmony_ci} 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_cistatic inline void ath10k_ahb_exit(void) 718c2ecf20Sopenharmony_ci{ 728c2ecf20Sopenharmony_ci} 738c2ecf20Sopenharmony_ci 748c2ecf20Sopenharmony_ci#endif /* CONFIG_ATH10K_AHB */ 758c2ecf20Sopenharmony_ci 768c2ecf20Sopenharmony_ci#endif /* _AHB_H_ */ 77