1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 *	Sealevel Systems 4021 driver.
4 *
5 *	(c) Copyright 1999, 2001 Alan Cox
6 *	(c) Copyright 2001 Red Hat Inc.
7 *	Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl>
8 */
9
10#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
11
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/mm.h>
15#include <linux/net.h>
16#include <linux/skbuff.h>
17#include <linux/netdevice.h>
18#include <linux/if_arp.h>
19#include <linux/delay.h>
20#include <linux/hdlc.h>
21#include <linux/ioport.h>
22#include <linux/init.h>
23#include <linux/slab.h>
24#include <net/arp.h>
25
26#include <asm/irq.h>
27#include <asm/io.h>
28#include <asm/dma.h>
29#include <asm/byteorder.h>
30#include "z85230.h"
31
32
33struct slvl_device
34{
35	struct z8530_channel *chan;
36	int channel;
37};
38
39
40struct slvl_board
41{
42	struct slvl_device dev[2];
43	struct z8530_dev board;
44	int iobase;
45};
46
47/*
48 *	Network driver support routines
49 */
50
51static inline struct slvl_device* dev_to_chan(struct net_device *dev)
52{
53	return (struct slvl_device *)dev_to_hdlc(dev)->priv;
54}
55
56/*
57 *	Frame receive. Simple for our card as we do HDLC and there
58 *	is no funny garbage involved
59 */
60
61static void sealevel_input(struct z8530_channel *c, struct sk_buff *skb)
62{
63	/* Drop the CRC - it's not a good idea to try and negotiate it ;) */
64	skb_trim(skb, skb->len - 2);
65	skb->protocol = hdlc_type_trans(skb, c->netdevice);
66	skb_reset_mac_header(skb);
67	skb->dev = c->netdevice;
68	netif_rx(skb);
69}
70
71/*
72 *	We've been placed in the UP state
73 */
74
75static int sealevel_open(struct net_device *d)
76{
77	struct slvl_device *slvl = dev_to_chan(d);
78	int err = -1;
79	int unit = slvl->channel;
80
81	/*
82	 *	Link layer up.
83	 */
84
85	switch (unit) {
86		case 0:
87			err = z8530_sync_dma_open(d, slvl->chan);
88			break;
89		case 1:
90			err = z8530_sync_open(d, slvl->chan);
91			break;
92	}
93
94	if (err)
95		return err;
96
97	err = hdlc_open(d);
98	if (err) {
99		switch (unit) {
100			case 0:
101				z8530_sync_dma_close(d, slvl->chan);
102				break;
103			case 1:
104				z8530_sync_close(d, slvl->chan);
105				break;
106		}
107		return err;
108	}
109
110	slvl->chan->rx_function = sealevel_input;
111
112	/*
113	 *	Go go go
114	 */
115	netif_start_queue(d);
116	return 0;
117}
118
119static int sealevel_close(struct net_device *d)
120{
121	struct slvl_device *slvl = dev_to_chan(d);
122	int unit = slvl->channel;
123
124	/*
125	 *	Discard new frames
126	 */
127
128	slvl->chan->rx_function = z8530_null_rx;
129
130	hdlc_close(d);
131	netif_stop_queue(d);
132
133	switch (unit) {
134		case 0:
135			z8530_sync_dma_close(d, slvl->chan);
136			break;
137		case 1:
138			z8530_sync_close(d, slvl->chan);
139			break;
140	}
141	return 0;
142}
143
144static int sealevel_ioctl(struct net_device *d, struct ifreq *ifr, int cmd)
145{
146	/* struct slvl_device *slvl=dev_to_chan(d);
147	   z8530_ioctl(d,&slvl->sync.chanA,ifr,cmd) */
148	return hdlc_ioctl(d, ifr, cmd);
149}
150
151/*
152 *	Passed network frames, fire them downwind.
153 */
154
155static netdev_tx_t sealevel_queue_xmit(struct sk_buff *skb,
156					     struct net_device *d)
157{
158	return z8530_queue_xmit(dev_to_chan(d)->chan, skb);
159}
160
161static int sealevel_attach(struct net_device *dev, unsigned short encoding,
162			   unsigned short parity)
163{
164	if (encoding == ENCODING_NRZ && parity == PARITY_CRC16_PR1_CCITT)
165		return 0;
166	return -EINVAL;
167}
168
169static const struct net_device_ops sealevel_ops = {
170	.ndo_open       = sealevel_open,
171	.ndo_stop       = sealevel_close,
172	.ndo_start_xmit = hdlc_start_xmit,
173	.ndo_do_ioctl   = sealevel_ioctl,
174};
175
176static int slvl_setup(struct slvl_device *sv, int iobase, int irq)
177{
178	struct net_device *dev = alloc_hdlcdev(sv);
179	if (!dev)
180		return -1;
181
182	dev_to_hdlc(dev)->attach = sealevel_attach;
183	dev_to_hdlc(dev)->xmit = sealevel_queue_xmit;
184	dev->netdev_ops = &sealevel_ops;
185	dev->base_addr = iobase;
186	dev->irq = irq;
187
188	if (register_hdlc_device(dev)) {
189		pr_err("unable to register HDLC device\n");
190		free_netdev(dev);
191		return -1;
192	}
193
194	sv->chan->netdevice = dev;
195	return 0;
196}
197
198
199/*
200 *	Allocate and setup Sealevel board.
201 */
202
203static __init struct slvl_board *slvl_init(int iobase, int irq,
204					   int txdma, int rxdma, int slow)
205{
206	struct z8530_dev *dev;
207	struct slvl_board *b;
208
209	/*
210	 *	Get the needed I/O space
211	 */
212
213	if (!request_region(iobase, 8, "Sealevel 4021")) {
214		pr_warn("I/O 0x%X already in use\n", iobase);
215		return NULL;
216	}
217
218	b = kzalloc(sizeof(struct slvl_board), GFP_KERNEL);
219	if (!b)
220		goto err_kzalloc;
221
222	b->dev[0].chan = &b->board.chanA;
223	b->dev[0].channel = 0;
224
225	b->dev[1].chan = &b->board.chanB;
226	b->dev[1].channel = 1;
227
228	dev = &b->board;
229
230	/*
231	 *	Stuff in the I/O addressing
232	 */
233
234	dev->active = 0;
235
236	b->iobase = iobase;
237
238	/*
239	 *	Select 8530 delays for the old board
240	 */
241
242	if (slow)
243		iobase |= Z8530_PORT_SLEEP;
244
245	dev->chanA.ctrlio = iobase + 1;
246	dev->chanA.dataio = iobase;
247	dev->chanB.ctrlio = iobase + 3;
248	dev->chanB.dataio = iobase + 2;
249
250	dev->chanA.irqs = &z8530_nop;
251	dev->chanB.irqs = &z8530_nop;
252
253	/*
254	 *	Assert DTR enable DMA
255	 */
256
257	outb(3 | (1 << 7), b->iobase + 4);
258
259
260	/* We want a fast IRQ for this device. Actually we'd like an even faster
261	   IRQ ;) - This is one driver RtLinux is made for */
262
263	if (request_irq(irq, z8530_interrupt, 0,
264			"SeaLevel", dev) < 0) {
265		pr_warn("IRQ %d already in use\n", irq);
266		goto err_request_irq;
267	}
268
269	dev->irq = irq;
270	dev->chanA.private = &b->dev[0];
271	dev->chanB.private = &b->dev[1];
272	dev->chanA.dev = dev;
273	dev->chanB.dev = dev;
274
275	dev->chanA.txdma = 3;
276	dev->chanA.rxdma = 1;
277	if (request_dma(dev->chanA.txdma, "SeaLevel (TX)"))
278		goto err_dma_tx;
279
280	if (request_dma(dev->chanA.rxdma, "SeaLevel (RX)"))
281		goto err_dma_rx;
282
283	disable_irq(irq);
284
285	/*
286	 *	Begin normal initialise
287	 */
288
289	if (z8530_init(dev) != 0) {
290		pr_err("Z8530 series device not found\n");
291		enable_irq(irq);
292		goto free_hw;
293	}
294	if (dev->type == Z85C30) {
295		z8530_channel_load(&dev->chanA, z8530_hdlc_kilostream);
296		z8530_channel_load(&dev->chanB, z8530_hdlc_kilostream);
297	} else {
298		z8530_channel_load(&dev->chanA, z8530_hdlc_kilostream_85230);
299		z8530_channel_load(&dev->chanB, z8530_hdlc_kilostream_85230);
300	}
301
302	/*
303	 *	Now we can take the IRQ
304	 */
305
306	enable_irq(irq);
307
308	if (slvl_setup(&b->dev[0], iobase, irq))
309		goto free_hw;
310	if (slvl_setup(&b->dev[1], iobase, irq))
311		goto free_netdev0;
312
313	z8530_describe(dev, "I/O", iobase);
314	dev->active = 1;
315	return b;
316
317free_netdev0:
318	unregister_hdlc_device(b->dev[0].chan->netdevice);
319	free_netdev(b->dev[0].chan->netdevice);
320free_hw:
321	free_dma(dev->chanA.rxdma);
322err_dma_rx:
323	free_dma(dev->chanA.txdma);
324err_dma_tx:
325	free_irq(irq, dev);
326err_request_irq:
327	kfree(b);
328err_kzalloc:
329	release_region(iobase, 8);
330	return NULL;
331}
332
333static void __exit slvl_shutdown(struct slvl_board *b)
334{
335	int u;
336
337	z8530_shutdown(&b->board);
338
339	for (u = 0; u < 2; u++) {
340		struct net_device *d = b->dev[u].chan->netdevice;
341		unregister_hdlc_device(d);
342		free_netdev(d);
343	}
344
345	free_irq(b->board.irq, &b->board);
346	free_dma(b->board.chanA.rxdma);
347	free_dma(b->board.chanA.txdma);
348	/* DMA off on the card, drop DTR */
349	outb(0, b->iobase);
350	release_region(b->iobase, 8);
351	kfree(b);
352}
353
354
355static int io=0x238;
356static int txdma=1;
357static int rxdma=3;
358static int irq=5;
359static bool slow=false;
360
361module_param_hw(io, int, ioport, 0);
362MODULE_PARM_DESC(io, "The I/O base of the Sealevel card");
363module_param_hw(txdma, int, dma, 0);
364MODULE_PARM_DESC(txdma, "Transmit DMA channel");
365module_param_hw(rxdma, int, dma, 0);
366MODULE_PARM_DESC(rxdma, "Receive DMA channel");
367module_param_hw(irq, int, irq, 0);
368MODULE_PARM_DESC(irq, "The interrupt line setting for the SeaLevel card");
369module_param(slow, bool, 0);
370MODULE_PARM_DESC(slow, "Set this for an older Sealevel card such as the 4012");
371
372MODULE_AUTHOR("Alan Cox");
373MODULE_LICENSE("GPL");
374MODULE_DESCRIPTION("Modular driver for the SeaLevel 4021");
375
376static struct slvl_board *slvl_unit;
377
378static int __init slvl_init_module(void)
379{
380	slvl_unit = slvl_init(io, irq, txdma, rxdma, slow);
381
382	return slvl_unit ? 0 : -ENODEV;
383}
384
385static void __exit slvl_cleanup_module(void)
386{
387	if (slvl_unit)
388		slvl_shutdown(slvl_unit);
389}
390
391module_init(slvl_init_module);
392module_exit(slvl_cleanup_module);
393