1// SPDX-License-Identifier: GPL-2.0-only 2/* $Id: lmc_media.c,v 1.13 2000/04/11 05:25:26 asj Exp $ */ 3 4#include <linux/kernel.h> 5#include <linux/string.h> 6#include <linux/timer.h> 7#include <linux/ptrace.h> 8#include <linux/errno.h> 9#include <linux/ioport.h> 10#include <linux/interrupt.h> 11#include <linux/in.h> 12#include <linux/if_arp.h> 13#include <linux/netdevice.h> 14#include <linux/etherdevice.h> 15#include <linux/skbuff.h> 16#include <linux/inet.h> 17#include <linux/bitops.h> 18 19#include <asm/processor.h> /* Processor type for cache alignment. */ 20#include <asm/io.h> 21#include <asm/dma.h> 22 23#include <linux/uaccess.h> 24 25#include "lmc.h" 26#include "lmc_var.h" 27#include "lmc_ioctl.h" 28#include "lmc_debug.h" 29 30#define CONFIG_LMC_IGNORE_HARDWARE_HANDSHAKE 1 31 32 /* 33 * Copyright (c) 1997-2000 LAN Media Corporation (LMC) 34 * All rights reserved. www.lanmedia.com 35 * 36 * This code is written by: 37 * Andrew Stanley-Jones (asj@cban.com) 38 * Rob Braun (bbraun@vix.com), 39 * Michael Graff (explorer@vix.com) and 40 * Matt Thomas (matt@3am-software.com). 41 */ 42 43/* 44 * protocol independent method. 45 */ 46static void lmc_set_protocol (lmc_softc_t * const, lmc_ctl_t *); 47 48/* 49 * media independent methods to check on media status, link, light LEDs, 50 * etc. 51 */ 52static void lmc_ds3_init (lmc_softc_t * const); 53static void lmc_ds3_default (lmc_softc_t * const); 54static void lmc_ds3_set_status (lmc_softc_t * const, lmc_ctl_t *); 55static void lmc_ds3_set_100ft (lmc_softc_t * const, int); 56static int lmc_ds3_get_link_status (lmc_softc_t * const); 57static void lmc_ds3_set_crc_length (lmc_softc_t * const, int); 58static void lmc_ds3_set_scram (lmc_softc_t * const, int); 59static void lmc_ds3_watchdog (lmc_softc_t * const); 60 61static void lmc_hssi_init (lmc_softc_t * const); 62static void lmc_hssi_default (lmc_softc_t * const); 63static void lmc_hssi_set_status (lmc_softc_t * const, lmc_ctl_t *); 64static void lmc_hssi_set_clock (lmc_softc_t * const, int); 65static int lmc_hssi_get_link_status (lmc_softc_t * const); 66static void lmc_hssi_set_link_status (lmc_softc_t * const, int); 67static void lmc_hssi_set_crc_length (lmc_softc_t * const, int); 68static void lmc_hssi_watchdog (lmc_softc_t * const); 69 70static void lmc_ssi_init (lmc_softc_t * const); 71static void lmc_ssi_default (lmc_softc_t * const); 72static void lmc_ssi_set_status (lmc_softc_t * const, lmc_ctl_t *); 73static void lmc_ssi_set_clock (lmc_softc_t * const, int); 74static void lmc_ssi_set_speed (lmc_softc_t * const, lmc_ctl_t *); 75static int lmc_ssi_get_link_status (lmc_softc_t * const); 76static void lmc_ssi_set_link_status (lmc_softc_t * const, int); 77static void lmc_ssi_set_crc_length (lmc_softc_t * const, int); 78static void lmc_ssi_watchdog (lmc_softc_t * const); 79 80static void lmc_t1_init (lmc_softc_t * const); 81static void lmc_t1_default (lmc_softc_t * const); 82static void lmc_t1_set_status (lmc_softc_t * const, lmc_ctl_t *); 83static int lmc_t1_get_link_status (lmc_softc_t * const); 84static void lmc_t1_set_circuit_type (lmc_softc_t * const, int); 85static void lmc_t1_set_crc_length (lmc_softc_t * const, int); 86static void lmc_t1_set_clock (lmc_softc_t * const, int); 87static void lmc_t1_watchdog (lmc_softc_t * const); 88 89static void lmc_dummy_set_1 (lmc_softc_t * const, int); 90static void lmc_dummy_set2_1 (lmc_softc_t * const, lmc_ctl_t *); 91 92static inline void write_av9110_bit (lmc_softc_t *, int); 93static void write_av9110(lmc_softc_t *, u32, u32, u32, u32, u32); 94 95lmc_media_t lmc_ds3_media = { 96 .init = lmc_ds3_init, /* special media init stuff */ 97 .defaults = lmc_ds3_default, /* reset to default state */ 98 .set_status = lmc_ds3_set_status, /* reset status to state provided */ 99 .set_clock_source = lmc_dummy_set_1, /* set clock source */ 100 .set_speed = lmc_dummy_set2_1, /* set line speed */ 101 .set_cable_length = lmc_ds3_set_100ft, /* set cable length */ 102 .set_scrambler = lmc_ds3_set_scram, /* set scrambler */ 103 .get_link_status = lmc_ds3_get_link_status, /* get link status */ 104 .set_link_status = lmc_dummy_set_1, /* set link status */ 105 .set_crc_length = lmc_ds3_set_crc_length, /* set CRC length */ 106 .set_circuit_type = lmc_dummy_set_1, /* set T1 or E1 circuit type */ 107 .watchdog = lmc_ds3_watchdog 108}; 109 110lmc_media_t lmc_hssi_media = { 111 .init = lmc_hssi_init, /* special media init stuff */ 112 .defaults = lmc_hssi_default, /* reset to default state */ 113 .set_status = lmc_hssi_set_status, /* reset status to state provided */ 114 .set_clock_source = lmc_hssi_set_clock, /* set clock source */ 115 .set_speed = lmc_dummy_set2_1, /* set line speed */ 116 .set_cable_length = lmc_dummy_set_1, /* set cable length */ 117 .set_scrambler = lmc_dummy_set_1, /* set scrambler */ 118 .get_link_status = lmc_hssi_get_link_status, /* get link status */ 119 .set_link_status = lmc_hssi_set_link_status, /* set link status */ 120 .set_crc_length = lmc_hssi_set_crc_length, /* set CRC length */ 121 .set_circuit_type = lmc_dummy_set_1, /* set T1 or E1 circuit type */ 122 .watchdog = lmc_hssi_watchdog 123}; 124 125lmc_media_t lmc_ssi_media = { 126 .init = lmc_ssi_init, /* special media init stuff */ 127 .defaults = lmc_ssi_default, /* reset to default state */ 128 .set_status = lmc_ssi_set_status, /* reset status to state provided */ 129 .set_clock_source = lmc_ssi_set_clock, /* set clock source */ 130 .set_speed = lmc_ssi_set_speed, /* set line speed */ 131 .set_cable_length = lmc_dummy_set_1, /* set cable length */ 132 .set_scrambler = lmc_dummy_set_1, /* set scrambler */ 133 .get_link_status = lmc_ssi_get_link_status, /* get link status */ 134 .set_link_status = lmc_ssi_set_link_status, /* set link status */ 135 .set_crc_length = lmc_ssi_set_crc_length, /* set CRC length */ 136 .set_circuit_type = lmc_dummy_set_1, /* set T1 or E1 circuit type */ 137 .watchdog = lmc_ssi_watchdog 138}; 139 140lmc_media_t lmc_t1_media = { 141 .init = lmc_t1_init, /* special media init stuff */ 142 .defaults = lmc_t1_default, /* reset to default state */ 143 .set_status = lmc_t1_set_status, /* reset status to state provided */ 144 .set_clock_source = lmc_t1_set_clock, /* set clock source */ 145 .set_speed = lmc_dummy_set2_1, /* set line speed */ 146 .set_cable_length = lmc_dummy_set_1, /* set cable length */ 147 .set_scrambler = lmc_dummy_set_1, /* set scrambler */ 148 .get_link_status = lmc_t1_get_link_status, /* get link status */ 149 .set_link_status = lmc_dummy_set_1, /* set link status */ 150 .set_crc_length = lmc_t1_set_crc_length, /* set CRC length */ 151 .set_circuit_type = lmc_t1_set_circuit_type, /* set T1 or E1 circuit type */ 152 .watchdog = lmc_t1_watchdog 153}; 154 155static void 156lmc_dummy_set_1 (lmc_softc_t * const sc, int a) 157{ 158} 159 160static void 161lmc_dummy_set2_1 (lmc_softc_t * const sc, lmc_ctl_t * a) 162{ 163} 164 165/* 166 * HSSI methods 167 */ 168 169static void 170lmc_hssi_init (lmc_softc_t * const sc) 171{ 172 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5200; 173 174 lmc_gpio_mkoutput (sc, LMC_GEP_HSSI_CLOCK); 175} 176 177static void 178lmc_hssi_default (lmc_softc_t * const sc) 179{ 180 sc->lmc_miireg16 = LMC_MII16_LED_ALL; 181 182 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN); 183 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT); 184 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16); 185} 186 187/* 188 * Given a user provided state, set ourselves up to match it. This will 189 * always reset the card if needed. 190 */ 191static void 192lmc_hssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl) 193{ 194 if (ctl == NULL) 195 { 196 sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source); 197 lmc_set_protocol (sc, NULL); 198 199 return; 200 } 201 202 /* 203 * check for change in clock source 204 */ 205 if (ctl->clock_source && !sc->ictl.clock_source) 206 { 207 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_INT); 208 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT; 209 } 210 else if (!ctl->clock_source && sc->ictl.clock_source) 211 { 212 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT; 213 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT); 214 } 215 216 lmc_set_protocol (sc, ctl); 217} 218 219/* 220 * 1 == internal, 0 == external 221 */ 222static void 223lmc_hssi_set_clock (lmc_softc_t * const sc, int ie) 224{ 225 int old; 226 old = sc->ictl.clock_source; 227 if (ie == LMC_CTL_CLOCK_SOURCE_EXT) 228 { 229 sc->lmc_gpio |= LMC_GEP_HSSI_CLOCK; 230 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 231 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT; 232 if(old != ie) 233 printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS); 234 } 235 else 236 { 237 sc->lmc_gpio &= ~(LMC_GEP_HSSI_CLOCK); 238 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 239 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT; 240 if(old != ie) 241 printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS); 242 } 243} 244 245/* 246 * return hardware link status. 247 * 0 == link is down, 1 == link is up. 248 */ 249static int 250lmc_hssi_get_link_status (lmc_softc_t * const sc) 251{ 252 /* 253 * We're using the same code as SSI since 254 * they're practically the same 255 */ 256 return lmc_ssi_get_link_status(sc); 257} 258 259static void 260lmc_hssi_set_link_status (lmc_softc_t * const sc, int state) 261{ 262 if (state == LMC_LINK_UP) 263 sc->lmc_miireg16 |= LMC_MII16_HSSI_TA; 264 else 265 sc->lmc_miireg16 &= ~LMC_MII16_HSSI_TA; 266 267 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); 268} 269 270/* 271 * 0 == 16bit, 1 == 32bit 272 */ 273static void 274lmc_hssi_set_crc_length (lmc_softc_t * const sc, int state) 275{ 276 if (state == LMC_CTL_CRC_LENGTH_32) 277 { 278 /* 32 bit */ 279 sc->lmc_miireg16 |= LMC_MII16_HSSI_CRC; 280 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32; 281 } 282 else 283 { 284 /* 16 bit */ 285 sc->lmc_miireg16 &= ~LMC_MII16_HSSI_CRC; 286 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16; 287 } 288 289 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); 290} 291 292static void 293lmc_hssi_watchdog (lmc_softc_t * const sc) 294{ 295 /* HSSI is blank */ 296} 297 298/* 299 * DS3 methods 300 */ 301 302/* 303 * Set cable length 304 */ 305static void 306lmc_ds3_set_100ft (lmc_softc_t * const sc, int ie) 307{ 308 if (ie == LMC_CTL_CABLE_LENGTH_GT_100FT) 309 { 310 sc->lmc_miireg16 &= ~LMC_MII16_DS3_ZERO; 311 sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_GT_100FT; 312 } 313 else if (ie == LMC_CTL_CABLE_LENGTH_LT_100FT) 314 { 315 sc->lmc_miireg16 |= LMC_MII16_DS3_ZERO; 316 sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_LT_100FT; 317 } 318 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); 319} 320 321static void 322lmc_ds3_default (lmc_softc_t * const sc) 323{ 324 sc->lmc_miireg16 = LMC_MII16_LED_ALL; 325 326 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN); 327 sc->lmc_media->set_cable_length (sc, LMC_CTL_CABLE_LENGTH_LT_100FT); 328 sc->lmc_media->set_scrambler (sc, LMC_CTL_OFF); 329 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16); 330} 331 332/* 333 * Given a user provided state, set ourselves up to match it. This will 334 * always reset the card if needed. 335 */ 336static void 337lmc_ds3_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl) 338{ 339 if (ctl == NULL) 340 { 341 sc->lmc_media->set_cable_length (sc, sc->ictl.cable_length); 342 sc->lmc_media->set_scrambler (sc, sc->ictl.scrambler_onoff); 343 lmc_set_protocol (sc, NULL); 344 345 return; 346 } 347 348 /* 349 * check for change in cable length setting 350 */ 351 if (ctl->cable_length && !sc->ictl.cable_length) 352 lmc_ds3_set_100ft (sc, LMC_CTL_CABLE_LENGTH_GT_100FT); 353 else if (!ctl->cable_length && sc->ictl.cable_length) 354 lmc_ds3_set_100ft (sc, LMC_CTL_CABLE_LENGTH_LT_100FT); 355 356 /* 357 * Check for change in scrambler setting (requires reset) 358 */ 359 if (ctl->scrambler_onoff && !sc->ictl.scrambler_onoff) 360 lmc_ds3_set_scram (sc, LMC_CTL_ON); 361 else if (!ctl->scrambler_onoff && sc->ictl.scrambler_onoff) 362 lmc_ds3_set_scram (sc, LMC_CTL_OFF); 363 364 lmc_set_protocol (sc, ctl); 365} 366 367static void 368lmc_ds3_init (lmc_softc_t * const sc) 369{ 370 int i; 371 372 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5245; 373 374 /* writes zeros everywhere */ 375 for (i = 0; i < 21; i++) 376 { 377 lmc_mii_writereg (sc, 0, 17, i); 378 lmc_mii_writereg (sc, 0, 18, 0); 379 } 380 381 /* set some essential bits */ 382 lmc_mii_writereg (sc, 0, 17, 1); 383 lmc_mii_writereg (sc, 0, 18, 0x25); /* ser, xtx */ 384 385 lmc_mii_writereg (sc, 0, 17, 5); 386 lmc_mii_writereg (sc, 0, 18, 0x80); /* emode */ 387 388 lmc_mii_writereg (sc, 0, 17, 14); 389 lmc_mii_writereg (sc, 0, 18, 0x30); /* rcgen, tcgen */ 390 391 /* clear counters and latched bits */ 392 for (i = 0; i < 21; i++) 393 { 394 lmc_mii_writereg (sc, 0, 17, i); 395 lmc_mii_readreg (sc, 0, 18); 396 } 397} 398 399/* 400 * 1 == DS3 payload scrambled, 0 == not scrambled 401 */ 402static void 403lmc_ds3_set_scram (lmc_softc_t * const sc, int ie) 404{ 405 if (ie == LMC_CTL_ON) 406 { 407 sc->lmc_miireg16 |= LMC_MII16_DS3_SCRAM; 408 sc->ictl.scrambler_onoff = LMC_CTL_ON; 409 } 410 else 411 { 412 sc->lmc_miireg16 &= ~LMC_MII16_DS3_SCRAM; 413 sc->ictl.scrambler_onoff = LMC_CTL_OFF; 414 } 415 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); 416} 417 418/* 419 * return hardware link status. 420 * 0 == link is down, 1 == link is up. 421 */ 422static int 423lmc_ds3_get_link_status (lmc_softc_t * const sc) 424{ 425 u16 link_status, link_status_11; 426 int ret = 1; 427 428 lmc_mii_writereg (sc, 0, 17, 7); 429 link_status = lmc_mii_readreg (sc, 0, 18); 430 431 /* LMC5245 (DS3) & LMC1200 (DS1) LED definitions 432 * led0 yellow = far-end adapter is in Red alarm condition 433 * led1 blue = received an Alarm Indication signal 434 * (upstream failure) 435 * led2 Green = power to adapter, Gate Array loaded & driver 436 * attached 437 * led3 red = Loss of Signal (LOS) or out of frame (OOF) 438 * conditions detected on T3 receive signal 439 */ 440 441 lmc_led_on(sc, LMC_DS3_LED2); 442 443 if ((link_status & LMC_FRAMER_REG0_DLOS) || 444 (link_status & LMC_FRAMER_REG0_OOFS)){ 445 ret = 0; 446 if(sc->last_led_err[3] != 1){ 447 u16 r1; 448 lmc_mii_writereg (sc, 0, 17, 01); /* Turn on Xbit error as our cisco does */ 449 r1 = lmc_mii_readreg (sc, 0, 18); 450 r1 &= 0xfe; 451 lmc_mii_writereg(sc, 0, 18, r1); 452 printk(KERN_WARNING "%s: Red Alarm - Loss of Signal or Loss of Framing\n", sc->name); 453 } 454 lmc_led_on(sc, LMC_DS3_LED3); /* turn on red LED */ 455 sc->last_led_err[3] = 1; 456 } 457 else { 458 lmc_led_off(sc, LMC_DS3_LED3); /* turn on red LED */ 459 if(sc->last_led_err[3] == 1){ 460 u16 r1; 461 lmc_mii_writereg (sc, 0, 17, 01); /* Turn off Xbit error */ 462 r1 = lmc_mii_readreg (sc, 0, 18); 463 r1 |= 0x01; 464 lmc_mii_writereg(sc, 0, 18, r1); 465 } 466 sc->last_led_err[3] = 0; 467 } 468 469 lmc_mii_writereg(sc, 0, 17, 0x10); 470 link_status_11 = lmc_mii_readreg(sc, 0, 18); 471 if((link_status & LMC_FRAMER_REG0_AIS) || 472 (link_status_11 & LMC_FRAMER_REG10_XBIT)) { 473 ret = 0; 474 if(sc->last_led_err[0] != 1){ 475 printk(KERN_WARNING "%s: AIS Alarm or XBit Error\n", sc->name); 476 printk(KERN_WARNING "%s: Remote end has loss of signal or framing\n", sc->name); 477 } 478 lmc_led_on(sc, LMC_DS3_LED0); 479 sc->last_led_err[0] = 1; 480 } 481 else { 482 lmc_led_off(sc, LMC_DS3_LED0); 483 sc->last_led_err[0] = 0; 484 } 485 486 lmc_mii_writereg (sc, 0, 17, 9); 487 link_status = lmc_mii_readreg (sc, 0, 18); 488 489 if(link_status & LMC_FRAMER_REG9_RBLUE){ 490 ret = 0; 491 if(sc->last_led_err[1] != 1){ 492 printk(KERN_WARNING "%s: Blue Alarm - Receiving all 1's\n", sc->name); 493 } 494 lmc_led_on(sc, LMC_DS3_LED1); 495 sc->last_led_err[1] = 1; 496 } 497 else { 498 lmc_led_off(sc, LMC_DS3_LED1); 499 sc->last_led_err[1] = 0; 500 } 501 502 return ret; 503} 504 505/* 506 * 0 == 16bit, 1 == 32bit 507 */ 508static void 509lmc_ds3_set_crc_length (lmc_softc_t * const sc, int state) 510{ 511 if (state == LMC_CTL_CRC_LENGTH_32) 512 { 513 /* 32 bit */ 514 sc->lmc_miireg16 |= LMC_MII16_DS3_CRC; 515 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32; 516 } 517 else 518 { 519 /* 16 bit */ 520 sc->lmc_miireg16 &= ~LMC_MII16_DS3_CRC; 521 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16; 522 } 523 524 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); 525} 526 527static void 528lmc_ds3_watchdog (lmc_softc_t * const sc) 529{ 530 531} 532 533 534/* 535 * SSI methods 536 */ 537 538static void lmc_ssi_init(lmc_softc_t * const sc) 539{ 540 u16 mii17; 541 int cable; 542 543 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1000; 544 545 mii17 = lmc_mii_readreg(sc, 0, 17); 546 547 cable = (mii17 & LMC_MII17_SSI_CABLE_MASK) >> LMC_MII17_SSI_CABLE_SHIFT; 548 sc->ictl.cable_type = cable; 549 550 lmc_gpio_mkoutput(sc, LMC_GEP_SSI_TXCLOCK); 551} 552 553static void 554lmc_ssi_default (lmc_softc_t * const sc) 555{ 556 sc->lmc_miireg16 = LMC_MII16_LED_ALL; 557 558 /* 559 * make TXCLOCK always be an output 560 */ 561 lmc_gpio_mkoutput (sc, LMC_GEP_SSI_TXCLOCK); 562 563 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN); 564 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT); 565 sc->lmc_media->set_speed (sc, NULL); 566 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16); 567} 568 569/* 570 * Given a user provided state, set ourselves up to match it. This will 571 * always reset the card if needed. 572 */ 573static void 574lmc_ssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl) 575{ 576 if (ctl == NULL) 577 { 578 sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source); 579 sc->lmc_media->set_speed (sc, &sc->ictl); 580 lmc_set_protocol (sc, NULL); 581 582 return; 583 } 584 585 /* 586 * check for change in clock source 587 */ 588 if (ctl->clock_source == LMC_CTL_CLOCK_SOURCE_INT 589 && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_EXT) 590 { 591 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_INT); 592 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT; 593 } 594 else if (ctl->clock_source == LMC_CTL_CLOCK_SOURCE_EXT 595 && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_INT) 596 { 597 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT); 598 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT; 599 } 600 601 if (ctl->clock_rate != sc->ictl.clock_rate) 602 sc->lmc_media->set_speed (sc, ctl); 603 604 lmc_set_protocol (sc, ctl); 605} 606 607/* 608 * 1 == internal, 0 == external 609 */ 610static void 611lmc_ssi_set_clock (lmc_softc_t * const sc, int ie) 612{ 613 int old; 614 old = ie; 615 if (ie == LMC_CTL_CLOCK_SOURCE_EXT) 616 { 617 sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK); 618 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 619 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT; 620 if(ie != old) 621 printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS); 622 } 623 else 624 { 625 sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK; 626 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 627 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT; 628 if(ie != old) 629 printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS); 630 } 631} 632 633static void 634lmc_ssi_set_speed (lmc_softc_t * const sc, lmc_ctl_t * ctl) 635{ 636 lmc_ctl_t *ictl = &sc->ictl; 637 lmc_av9110_t *av; 638 639 /* original settings for clock rate of: 640 * 100 Khz (8,25,0,0,2) were incorrect 641 * they should have been 80,125,1,3,3 642 * There are 17 param combinations to produce this freq. 643 * For 1.5 Mhz use 120,100,1,1,2 (226 param. combinations) 644 */ 645 if (ctl == NULL) 646 { 647 av = &ictl->cardspec.ssi; 648 ictl->clock_rate = 1500000; 649 av->f = ictl->clock_rate; 650 av->n = 120; 651 av->m = 100; 652 av->v = 1; 653 av->x = 1; 654 av->r = 2; 655 656 write_av9110 (sc, av->n, av->m, av->v, av->x, av->r); 657 return; 658 } 659 660 av = &ctl->cardspec.ssi; 661 662 if (av->f == 0) 663 return; 664 665 ictl->clock_rate = av->f; /* really, this is the rate we are */ 666 ictl->cardspec.ssi = *av; 667 668 write_av9110 (sc, av->n, av->m, av->v, av->x, av->r); 669} 670 671/* 672 * return hardware link status. 673 * 0 == link is down, 1 == link is up. 674 */ 675static int 676lmc_ssi_get_link_status (lmc_softc_t * const sc) 677{ 678 u16 link_status; 679 u32 ticks; 680 int ret = 1; 681 int hw_hdsk = 1; 682 683 /* 684 * missing CTS? Hmm. If we require CTS on, we may never get the 685 * link to come up, so omit it in this test. 686 * 687 * Also, it seems that with a loopback cable, DCD isn't asserted, 688 * so just check for things like this: 689 * DSR _must_ be asserted. 690 * One of DCD or CTS must be asserted. 691 */ 692 693 /* LMC 1000 (SSI) LED definitions 694 * led0 Green = power to adapter, Gate Array loaded & 695 * driver attached 696 * led1 Green = DSR and DTR and RTS and CTS are set 697 * led2 Green = Cable detected 698 * led3 red = No timing is available from the 699 * cable or the on-board frequency 700 * generator. 701 */ 702 703 link_status = lmc_mii_readreg (sc, 0, 16); 704 705 /* Is the transmit clock still available */ 706 ticks = LMC_CSR_READ (sc, csr_gp_timer); 707 ticks = 0x0000ffff - (ticks & 0x0000ffff); 708 709 lmc_led_on (sc, LMC_MII16_LED0); 710 711 /* ====== transmit clock determination ===== */ 712 if (sc->lmc_timing == LMC_CTL_CLOCK_SOURCE_INT) { 713 lmc_led_off(sc, LMC_MII16_LED3); 714 } 715 else if (ticks == 0 ) { /* no clock found ? */ 716 ret = 0; 717 if (sc->last_led_err[3] != 1) { 718 sc->extra_stats.tx_lossOfClockCnt++; 719 printk(KERN_WARNING "%s: Lost Clock, Link Down\n", sc->name); 720 } 721 sc->last_led_err[3] = 1; 722 lmc_led_on (sc, LMC_MII16_LED3); /* turn ON red LED */ 723 } 724 else { 725 if(sc->last_led_err[3] == 1) 726 printk(KERN_WARNING "%s: Clock Returned\n", sc->name); 727 sc->last_led_err[3] = 0; 728 lmc_led_off (sc, LMC_MII16_LED3); /* turn OFF red LED */ 729 } 730 731 if ((link_status & LMC_MII16_SSI_DSR) == 0) { /* Also HSSI CA */ 732 ret = 0; 733 hw_hdsk = 0; 734 } 735 736#ifdef CONFIG_LMC_IGNORE_HARDWARE_HANDSHAKE 737 if ((link_status & (LMC_MII16_SSI_CTS | LMC_MII16_SSI_DCD)) == 0){ 738 ret = 0; 739 hw_hdsk = 0; 740 } 741#endif 742 743 if(hw_hdsk == 0){ 744 if(sc->last_led_err[1] != 1) 745 printk(KERN_WARNING "%s: DSR not asserted\n", sc->name); 746 sc->last_led_err[1] = 1; 747 lmc_led_off(sc, LMC_MII16_LED1); 748 } 749 else { 750 if(sc->last_led_err[1] != 0) 751 printk(KERN_WARNING "%s: DSR now asserted\n", sc->name); 752 sc->last_led_err[1] = 0; 753 lmc_led_on(sc, LMC_MII16_LED1); 754 } 755 756 if(ret == 1) { 757 lmc_led_on(sc, LMC_MII16_LED2); /* Over all good status? */ 758 } 759 760 return ret; 761} 762 763static void 764lmc_ssi_set_link_status (lmc_softc_t * const sc, int state) 765{ 766 if (state == LMC_LINK_UP) 767 { 768 sc->lmc_miireg16 |= (LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS); 769 printk (LMC_PRINTF_FMT ": asserting DTR and RTS\n", LMC_PRINTF_ARGS); 770 } 771 else 772 { 773 sc->lmc_miireg16 &= ~(LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS); 774 printk (LMC_PRINTF_FMT ": deasserting DTR and RTS\n", LMC_PRINTF_ARGS); 775 } 776 777 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); 778 779} 780 781/* 782 * 0 == 16bit, 1 == 32bit 783 */ 784static void 785lmc_ssi_set_crc_length (lmc_softc_t * const sc, int state) 786{ 787 if (state == LMC_CTL_CRC_LENGTH_32) 788 { 789 /* 32 bit */ 790 sc->lmc_miireg16 |= LMC_MII16_SSI_CRC; 791 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32; 792 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4; 793 794 } 795 else 796 { 797 /* 16 bit */ 798 sc->lmc_miireg16 &= ~LMC_MII16_SSI_CRC; 799 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16; 800 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2; 801 } 802 803 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); 804} 805 806/* 807 * These are bits to program the ssi frequency generator 808 */ 809static inline void 810write_av9110_bit (lmc_softc_t * sc, int c) 811{ 812 /* 813 * set the data bit as we need it. 814 */ 815 sc->lmc_gpio &= ~(LMC_GEP_CLK); 816 if (c & 0x01) 817 sc->lmc_gpio |= LMC_GEP_DATA; 818 else 819 sc->lmc_gpio &= ~(LMC_GEP_DATA); 820 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 821 822 /* 823 * set the clock to high 824 */ 825 sc->lmc_gpio |= LMC_GEP_CLK; 826 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 827 828 /* 829 * set the clock to low again. 830 */ 831 sc->lmc_gpio &= ~(LMC_GEP_CLK); 832 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 833} 834 835static void write_av9110(lmc_softc_t *sc, u32 n, u32 m, u32 v, u32 x, u32 r) 836{ 837 int i; 838 839#if 0 840 printk (LMC_PRINTF_FMT ": speed %u, %d %d %d %d %d\n", 841 LMC_PRINTF_ARGS, sc->ictl.clock_rate, n, m, v, x, r); 842#endif 843 844 sc->lmc_gpio |= LMC_GEP_SSI_GENERATOR; 845 sc->lmc_gpio &= ~(LMC_GEP_DATA | LMC_GEP_CLK); 846 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 847 848 /* 849 * Set the TXCLOCK, GENERATOR, SERIAL, and SERIALCLK 850 * as outputs. 851 */ 852 lmc_gpio_mkoutput (sc, (LMC_GEP_DATA | LMC_GEP_CLK 853 | LMC_GEP_SSI_GENERATOR)); 854 855 sc->lmc_gpio &= ~(LMC_GEP_SSI_GENERATOR); 856 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 857 858 /* 859 * a shifting we will go... 860 */ 861 for (i = 0; i < 7; i++) 862 write_av9110_bit (sc, n >> i); 863 for (i = 0; i < 7; i++) 864 write_av9110_bit (sc, m >> i); 865 for (i = 0; i < 1; i++) 866 write_av9110_bit (sc, v >> i); 867 for (i = 0; i < 2; i++) 868 write_av9110_bit (sc, x >> i); 869 for (i = 0; i < 2; i++) 870 write_av9110_bit (sc, r >> i); 871 for (i = 0; i < 5; i++) 872 write_av9110_bit (sc, 0x17 >> i); 873 874 /* 875 * stop driving serial-related signals 876 */ 877 lmc_gpio_mkinput (sc, 878 (LMC_GEP_DATA | LMC_GEP_CLK 879 | LMC_GEP_SSI_GENERATOR)); 880} 881 882static void lmc_ssi_watchdog(lmc_softc_t * const sc) 883{ 884 u16 mii17 = lmc_mii_readreg(sc, 0, 17); 885 if (((mii17 >> 3) & 7) == 7) 886 lmc_led_off(sc, LMC_MII16_LED2); 887 else 888 lmc_led_on(sc, LMC_MII16_LED2); 889} 890 891/* 892 * T1 methods 893 */ 894 895/* 896 * The framer regs are multiplexed through MII regs 17 & 18 897 * write the register address to MII reg 17 and the * data to MII reg 18. */ 898static void 899lmc_t1_write (lmc_softc_t * const sc, int a, int d) 900{ 901 lmc_mii_writereg (sc, 0, 17, a); 902 lmc_mii_writereg (sc, 0, 18, d); 903} 904 905/* Save a warning 906static int 907lmc_t1_read (lmc_softc_t * const sc, int a) 908{ 909 lmc_mii_writereg (sc, 0, 17, a); 910 return lmc_mii_readreg (sc, 0, 18); 911} 912*/ 913 914 915static void 916lmc_t1_init (lmc_softc_t * const sc) 917{ 918 u16 mii16; 919 int i; 920 921 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1200; 922 mii16 = lmc_mii_readreg (sc, 0, 16); 923 924 /* reset 8370 */ 925 mii16 &= ~LMC_MII16_T1_RST; 926 lmc_mii_writereg (sc, 0, 16, mii16 | LMC_MII16_T1_RST); 927 lmc_mii_writereg (sc, 0, 16, mii16); 928 929 /* set T1 or E1 line. Uses sc->lmcmii16 reg in function so update it */ 930 sc->lmc_miireg16 = mii16; 931 lmc_t1_set_circuit_type(sc, LMC_CTL_CIRCUIT_TYPE_T1); 932 mii16 = sc->lmc_miireg16; 933 934 lmc_t1_write (sc, 0x01, 0x1B); /* CR0 - primary control */ 935 lmc_t1_write (sc, 0x02, 0x42); /* JAT_CR - jitter atten config */ 936 lmc_t1_write (sc, 0x14, 0x00); /* LOOP - loopback config */ 937 lmc_t1_write (sc, 0x15, 0x00); /* DL3_TS - external data link timeslot */ 938 lmc_t1_write (sc, 0x18, 0xFF); /* PIO - programmable I/O */ 939 lmc_t1_write (sc, 0x19, 0x30); /* POE - programmable OE */ 940 lmc_t1_write (sc, 0x1A, 0x0F); /* CMUX - clock input mux */ 941 lmc_t1_write (sc, 0x20, 0x41); /* LIU_CR - RX LIU config */ 942 lmc_t1_write (sc, 0x22, 0x76); /* RLIU_CR - RX LIU config */ 943 lmc_t1_write (sc, 0x40, 0x03); /* RCR0 - RX config */ 944 lmc_t1_write (sc, 0x45, 0x00); /* RALM - RX alarm config */ 945 lmc_t1_write (sc, 0x46, 0x05); /* LATCH - RX alarm/err/cntr latch */ 946 lmc_t1_write (sc, 0x68, 0x40); /* TLIU_CR - TX LIU config */ 947 lmc_t1_write (sc, 0x70, 0x0D); /* TCR0 - TX framer config */ 948 lmc_t1_write (sc, 0x71, 0x05); /* TCR1 - TX config */ 949 lmc_t1_write (sc, 0x72, 0x0B); /* TFRM - TX frame format */ 950 lmc_t1_write (sc, 0x73, 0x00); /* TERROR - TX error insert */ 951 lmc_t1_write (sc, 0x74, 0x00); /* TMAN - TX manual Sa/FEBE config */ 952 lmc_t1_write (sc, 0x75, 0x00); /* TALM - TX alarm signal config */ 953 lmc_t1_write (sc, 0x76, 0x00); /* TPATT - TX test pattern config */ 954 lmc_t1_write (sc, 0x77, 0x00); /* TLB - TX inband loopback config */ 955 lmc_t1_write (sc, 0x90, 0x05); /* CLAD_CR - clock rate adapter config */ 956 lmc_t1_write (sc, 0x91, 0x05); /* CSEL - clad freq sel */ 957 lmc_t1_write (sc, 0xA6, 0x00); /* DL1_CTL - DL1 control */ 958 lmc_t1_write (sc, 0xB1, 0x00); /* DL2_CTL - DL2 control */ 959 lmc_t1_write (sc, 0xD0, 0x47); /* SBI_CR - sys bus iface config */ 960 lmc_t1_write (sc, 0xD1, 0x70); /* RSB_CR - RX sys bus config */ 961 lmc_t1_write (sc, 0xD4, 0x30); /* TSB_CR - TX sys bus config */ 962 for (i = 0; i < 32; i++) 963 { 964 lmc_t1_write (sc, 0x0E0 + i, 0x00); /* SBCn - sys bus per-channel ctl */ 965 lmc_t1_write (sc, 0x100 + i, 0x00); /* TPCn - TX per-channel ctl */ 966 lmc_t1_write (sc, 0x180 + i, 0x00); /* RPCn - RX per-channel ctl */ 967 } 968 for (i = 1; i < 25; i++) 969 { 970 lmc_t1_write (sc, 0x0E0 + i, 0x0D); /* SBCn - sys bus per-channel ctl */ 971 } 972 973 mii16 |= LMC_MII16_T1_XOE; 974 lmc_mii_writereg (sc, 0, 16, mii16); 975 sc->lmc_miireg16 = mii16; 976} 977 978static void 979lmc_t1_default (lmc_softc_t * const sc) 980{ 981 sc->lmc_miireg16 = LMC_MII16_LED_ALL; 982 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN); 983 sc->lmc_media->set_circuit_type (sc, LMC_CTL_CIRCUIT_TYPE_T1); 984 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16); 985 /* Right now we can only clock from out internal source */ 986 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT; 987} 988/* * Given a user provided state, set ourselves up to match it. This will * always reset the card if needed. 989 */ 990static void 991lmc_t1_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl) 992{ 993 if (ctl == NULL) 994 { 995 sc->lmc_media->set_circuit_type (sc, sc->ictl.circuit_type); 996 lmc_set_protocol (sc, NULL); 997 998 return; 999 } 1000 /* 1001 * check for change in circuit type */ 1002 if (ctl->circuit_type == LMC_CTL_CIRCUIT_TYPE_T1 1003 && sc->ictl.circuit_type == 1004 LMC_CTL_CIRCUIT_TYPE_E1) sc->lmc_media->set_circuit_type (sc, 1005 LMC_CTL_CIRCUIT_TYPE_E1); 1006 else if (ctl->circuit_type == LMC_CTL_CIRCUIT_TYPE_E1 1007 && sc->ictl.circuit_type == LMC_CTL_CIRCUIT_TYPE_T1) 1008 sc->lmc_media->set_circuit_type (sc, LMC_CTL_CIRCUIT_TYPE_T1); 1009 lmc_set_protocol (sc, ctl); 1010} 1011/* 1012 * return hardware link status. 1013 * 0 == link is down, 1 == link is up. 1014 */ static int 1015lmc_t1_get_link_status (lmc_softc_t * const sc) 1016{ 1017 u16 link_status; 1018 int ret = 1; 1019 1020 /* LMC5245 (DS3) & LMC1200 (DS1) LED definitions 1021 * led0 yellow = far-end adapter is in Red alarm condition 1022 * led1 blue = received an Alarm Indication signal 1023 * (upstream failure) 1024 * led2 Green = power to adapter, Gate Array loaded & driver 1025 * attached 1026 * led3 red = Loss of Signal (LOS) or out of frame (OOF) 1027 * conditions detected on T3 receive signal 1028 */ 1029 lmc_led_on(sc, LMC_DS3_LED2); 1030 1031 lmc_mii_writereg (sc, 0, 17, T1FRAMER_ALARM1_STATUS); 1032 link_status = lmc_mii_readreg (sc, 0, 18); 1033 1034 1035 if (link_status & T1F_RAIS) { /* turn on blue LED */ 1036 ret = 0; 1037 if(sc->last_led_err[1] != 1){ 1038 printk(KERN_WARNING "%s: Receive AIS/Blue Alarm. Far end in RED alarm\n", sc->name); 1039 } 1040 lmc_led_on(sc, LMC_DS3_LED1); 1041 sc->last_led_err[1] = 1; 1042 } 1043 else { 1044 if(sc->last_led_err[1] != 0){ 1045 printk(KERN_WARNING "%s: End AIS/Blue Alarm\n", sc->name); 1046 } 1047 lmc_led_off (sc, LMC_DS3_LED1); 1048 sc->last_led_err[1] = 0; 1049 } 1050 1051 /* 1052 * Yellow Alarm is nasty evil stuff, looks at data patterns 1053 * inside the channel and confuses it with HDLC framing 1054 * ignore all yellow alarms. 1055 * 1056 * Do listen to MultiFrame Yellow alarm which while implemented 1057 * different ways isn't in the channel and hence somewhat 1058 * more reliable 1059 */ 1060 1061 if (link_status & T1F_RMYEL) { 1062 ret = 0; 1063 if(sc->last_led_err[0] != 1){ 1064 printk(KERN_WARNING "%s: Receive Yellow AIS Alarm\n", sc->name); 1065 } 1066 lmc_led_on(sc, LMC_DS3_LED0); 1067 sc->last_led_err[0] = 1; 1068 } 1069 else { 1070 if(sc->last_led_err[0] != 0){ 1071 printk(KERN_WARNING "%s: End of Yellow AIS Alarm\n", sc->name); 1072 } 1073 lmc_led_off(sc, LMC_DS3_LED0); 1074 sc->last_led_err[0] = 0; 1075 } 1076 1077 /* 1078 * Loss of signal and los of frame 1079 * Use the green bit to identify which one lit the led 1080 */ 1081 if(link_status & T1F_RLOF){ 1082 ret = 0; 1083 if(sc->last_led_err[3] != 1){ 1084 printk(KERN_WARNING "%s: Local Red Alarm: Loss of Framing\n", sc->name); 1085 } 1086 lmc_led_on(sc, LMC_DS3_LED3); 1087 sc->last_led_err[3] = 1; 1088 1089 } 1090 else { 1091 if(sc->last_led_err[3] != 0){ 1092 printk(KERN_WARNING "%s: End Red Alarm (LOF)\n", sc->name); 1093 } 1094 if( ! (link_status & T1F_RLOS)) 1095 lmc_led_off(sc, LMC_DS3_LED3); 1096 sc->last_led_err[3] = 0; 1097 } 1098 1099 if(link_status & T1F_RLOS){ 1100 ret = 0; 1101 if(sc->last_led_err[2] != 1){ 1102 printk(KERN_WARNING "%s: Local Red Alarm: Loss of Signal\n", sc->name); 1103 } 1104 lmc_led_on(sc, LMC_DS3_LED3); 1105 sc->last_led_err[2] = 1; 1106 1107 } 1108 else { 1109 if(sc->last_led_err[2] != 0){ 1110 printk(KERN_WARNING "%s: End Red Alarm (LOS)\n", sc->name); 1111 } 1112 if( ! (link_status & T1F_RLOF)) 1113 lmc_led_off(sc, LMC_DS3_LED3); 1114 sc->last_led_err[2] = 0; 1115 } 1116 1117 sc->lmc_xinfo.t1_alarm1_status = link_status; 1118 1119 lmc_mii_writereg (sc, 0, 17, T1FRAMER_ALARM2_STATUS); 1120 sc->lmc_xinfo.t1_alarm2_status = lmc_mii_readreg (sc, 0, 18); 1121 1122 return ret; 1123} 1124 1125/* 1126 * 1 == T1 Circuit Type , 0 == E1 Circuit Type 1127 */ 1128static void 1129lmc_t1_set_circuit_type (lmc_softc_t * const sc, int ie) 1130{ 1131 if (ie == LMC_CTL_CIRCUIT_TYPE_T1) { 1132 sc->lmc_miireg16 |= LMC_MII16_T1_Z; 1133 sc->ictl.circuit_type = LMC_CTL_CIRCUIT_TYPE_T1; 1134 printk(KERN_INFO "%s: In T1 Mode\n", sc->name); 1135 } 1136 else { 1137 sc->lmc_miireg16 &= ~LMC_MII16_T1_Z; 1138 sc->ictl.circuit_type = LMC_CTL_CIRCUIT_TYPE_E1; 1139 printk(KERN_INFO "%s: In E1 Mode\n", sc->name); 1140 } 1141 1142 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); 1143 1144} 1145 1146/* 1147 * 0 == 16bit, 1 == 32bit */ 1148static void 1149lmc_t1_set_crc_length (lmc_softc_t * const sc, int state) 1150{ 1151 if (state == LMC_CTL_CRC_LENGTH_32) 1152 { 1153 /* 32 bit */ 1154 sc->lmc_miireg16 |= LMC_MII16_T1_CRC; 1155 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32; 1156 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4; 1157 1158 } 1159 else 1160 { 1161 /* 16 bit */ sc->lmc_miireg16 &= ~LMC_MII16_T1_CRC; 1162 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16; 1163 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2; 1164 1165 } 1166 1167 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); 1168} 1169 1170/* 1171 * 1 == internal, 0 == external 1172 */ 1173static void 1174lmc_t1_set_clock (lmc_softc_t * const sc, int ie) 1175{ 1176 int old; 1177 old = ie; 1178 if (ie == LMC_CTL_CLOCK_SOURCE_EXT) 1179 { 1180 sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK); 1181 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 1182 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT; 1183 if(old != ie) 1184 printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS); 1185 } 1186 else 1187 { 1188 sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK; 1189 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 1190 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT; 1191 if(old != ie) 1192 printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS); 1193 } 1194} 1195 1196static void 1197lmc_t1_watchdog (lmc_softc_t * const sc) 1198{ 1199} 1200 1201static void 1202lmc_set_protocol (lmc_softc_t * const sc, lmc_ctl_t * ctl) 1203{ 1204 if (!ctl) 1205 sc->ictl.keepalive_onoff = LMC_CTL_ON; 1206} 1207