1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * drivers/net/phy/marvell.c 4 * 5 * Driver for Marvell PHYs 6 * 7 * Author: Andy Fleming 8 * 9 * Copyright (c) 2004 Freescale Semiconductor, Inc. 10 * 11 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de> 12 */ 13#include <linux/kernel.h> 14#include <linux/string.h> 15#include <linux/ctype.h> 16#include <linux/errno.h> 17#include <linux/unistd.h> 18#include <linux/hwmon.h> 19#include <linux/interrupt.h> 20#include <linux/init.h> 21#include <linux/delay.h> 22#include <linux/netdevice.h> 23#include <linux/etherdevice.h> 24#include <linux/skbuff.h> 25#include <linux/spinlock.h> 26#include <linux/mm.h> 27#include <linux/module.h> 28#include <linux/mii.h> 29#include <linux/ethtool.h> 30#include <linux/ethtool_netlink.h> 31#include <linux/phy.h> 32#include <linux/marvell_phy.h> 33#include <linux/bitfield.h> 34#include <linux/of.h> 35 36#include <linux/io.h> 37#include <asm/irq.h> 38#include <linux/uaccess.h> 39 40#define MII_MARVELL_PHY_PAGE 22 41#define MII_MARVELL_COPPER_PAGE 0x00 42#define MII_MARVELL_FIBER_PAGE 0x01 43#define MII_MARVELL_MSCR_PAGE 0x02 44#define MII_MARVELL_LED_PAGE 0x03 45#define MII_MARVELL_VCT5_PAGE 0x05 46#define MII_MARVELL_MISC_TEST_PAGE 0x06 47#define MII_MARVELL_VCT7_PAGE 0x07 48#define MII_MARVELL_WOL_PAGE 0x11 49 50#define MII_M1011_IEVENT 0x13 51#define MII_M1011_IEVENT_CLEAR 0x0000 52 53#define MII_M1011_IMASK 0x12 54#define MII_M1011_IMASK_INIT 0x6400 55#define MII_M1011_IMASK_CLEAR 0x0000 56 57#define MII_M1011_PHY_SCR 0x10 58#define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11) 59#define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12) 60#define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8 61#define MII_M1011_PHY_SCR_MDI (0x0 << 5) 62#define MII_M1011_PHY_SCR_MDI_X (0x1 << 5) 63#define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5) 64 65#define MII_M1011_PHY_SSR 0x11 66#define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5) 67 68#define MII_M1111_PHY_LED_CONTROL 0x18 69#define MII_M1111_PHY_LED_DIRECT 0x4100 70#define MII_M1111_PHY_LED_COMBINE 0x411c 71#define MII_M1111_PHY_EXT_CR 0x14 72#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9) 73#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8 74#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8) 75#define MII_M1111_RGMII_RX_DELAY BIT(7) 76#define MII_M1111_RGMII_TX_DELAY BIT(1) 77#define MII_M1111_PHY_EXT_SR 0x1b 78 79#define MII_M1111_HWCFG_MODE_MASK 0xf 80#define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 81#define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 82#define MII_M1111_HWCFG_MODE_RTBI 0x7 83#define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 84#define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb 85#define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13) 86#define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15) 87 88#define MII_88E1121_PHY_MSCR_REG 21 89#define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5) 90#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) 91#define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4)) 92 93#define MII_88E1121_MISC_TEST 0x1a 94#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00 95#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8 96#define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7) 97#define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6) 98#define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5) 99#define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f 100 101#define MII_88E1510_TEMP_SENSOR 0x1b 102#define MII_88E1510_TEMP_SENSOR_MASK 0xff 103 104#define MII_88E1540_COPPER_CTRL3 0x1a 105#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10) 106#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0 107#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1 108#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2 109#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3 110#define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9) 111 112#define MII_88E6390_MISC_TEST 0x1b 113#define MII_88E6390_MISC_TEST_SAMPLE_1S 0 114#define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14) 115#define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15) 116#define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0 117#define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14) 118 119#define MII_88E6390_TEMP_SENSOR 0x1c 120#define MII_88E6390_TEMP_SENSOR_MASK 0xff 121#define MII_88E6390_TEMP_SENSOR_SAMPLES 10 122 123#define MII_88E1318S_PHY_MSCR1_REG 16 124#define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) 125 126/* Copper Specific Interrupt Enable Register */ 127#define MII_88E1318S_PHY_CSIER 0x12 128/* WOL Event Interrupt Enable */ 129#define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) 130 131/* LED Timer Control Register */ 132#define MII_88E1318S_PHY_LED_TCR 0x12 133#define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) 134#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) 135#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) 136 137/* Magic Packet MAC address registers */ 138#define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 139#define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18 140#define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19 141 142#define MII_88E1318S_PHY_WOL_CTRL 0x10 143#define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12) 144#define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14) 145 146#define MII_PHY_LED_CTRL 16 147#define MII_88E1121_PHY_LED_DEF 0x0030 148#define MII_88E1510_PHY_LED_DEF 0x1177 149#define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040 150 151#define MII_M1011_PHY_STATUS 0x11 152#define MII_M1011_PHY_STATUS_1000 0x8000 153#define MII_M1011_PHY_STATUS_100 0x4000 154#define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 155#define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 156#define MII_M1011_PHY_STATUS_RESOLVED 0x0800 157#define MII_M1011_PHY_STATUS_LINK 0x0400 158 159#define MII_88E3016_PHY_SPEC_CTRL 0x10 160#define MII_88E3016_DISABLE_SCRAMBLER 0x0200 161#define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030 162 163#define MII_88E1510_GEN_CTRL_REG_1 0x14 164#define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7 165#define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */ 166#define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ 167 168#define MII_VCT5_TX_RX_MDI0_COUPLING 0x10 169#define MII_VCT5_TX_RX_MDI1_COUPLING 0x11 170#define MII_VCT5_TX_RX_MDI2_COUPLING 0x12 171#define MII_VCT5_TX_RX_MDI3_COUPLING 0x13 172#define MII_VCT5_TX_RX_AMPLITUDE_MASK 0x7f00 173#define MII_VCT5_TX_RX_AMPLITUDE_SHIFT 8 174#define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION BIT(15) 175 176#define MII_VCT5_CTRL 0x17 177#define MII_VCT5_CTRL_ENABLE BIT(15) 178#define MII_VCT5_CTRL_COMPLETE BIT(14) 179#define MII_VCT5_CTRL_TX_SAME_CHANNEL (0x0 << 11) 180#define MII_VCT5_CTRL_TX0_CHANNEL (0x4 << 11) 181#define MII_VCT5_CTRL_TX1_CHANNEL (0x5 << 11) 182#define MII_VCT5_CTRL_TX2_CHANNEL (0x6 << 11) 183#define MII_VCT5_CTRL_TX3_CHANNEL (0x7 << 11) 184#define MII_VCT5_CTRL_SAMPLES_2 (0x0 << 8) 185#define MII_VCT5_CTRL_SAMPLES_4 (0x1 << 8) 186#define MII_VCT5_CTRL_SAMPLES_8 (0x2 << 8) 187#define MII_VCT5_CTRL_SAMPLES_16 (0x3 << 8) 188#define MII_VCT5_CTRL_SAMPLES_32 (0x4 << 8) 189#define MII_VCT5_CTRL_SAMPLES_64 (0x5 << 8) 190#define MII_VCT5_CTRL_SAMPLES_128 (0x6 << 8) 191#define MII_VCT5_CTRL_SAMPLES_DEFAULT (0x6 << 8) 192#define MII_VCT5_CTRL_SAMPLES_256 (0x7 << 8) 193#define MII_VCT5_CTRL_SAMPLES_SHIFT 8 194#define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK (0x0 << 6) 195#define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK (0x1 << 6) 196#define MII_VCT5_CTRL_MODE_OFFSET (0x2 << 6) 197#define MII_VCT5_CTRL_SAMPLE_POINT (0x3 << 6) 198#define MII_VCT5_CTRL_PEEK_HYST_DEFAULT 3 199 200#define MII_VCT5_SAMPLE_POINT_DISTANCE 0x18 201#define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX 511 202#define MII_VCT5_TX_PULSE_CTRL 0x1c 203#define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN BIT(12) 204#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS (0x0 << 10) 205#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS (0x1 << 10) 206#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS (0x2 << 10) 207#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS (0x3 << 10) 208#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT 10 209#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV (0x0 << 8) 210#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV (0x1 << 8) 211#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV (0x2 << 8) 212#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV (0x3 << 8) 213#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT 8 214#define MII_VCT5_TX_PULSE_CTRL_MAX_AMP BIT(7) 215#define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV (0x6 << 0) 216 217/* For TDR measurements less than 11 meters, a short pulse should be 218 * used. 219 */ 220#define TDR_SHORT_CABLE_LENGTH 11 221 222#define MII_VCT7_PAIR_0_DISTANCE 0x10 223#define MII_VCT7_PAIR_1_DISTANCE 0x11 224#define MII_VCT7_PAIR_2_DISTANCE 0x12 225#define MII_VCT7_PAIR_3_DISTANCE 0x13 226 227#define MII_VCT7_RESULTS 0x14 228#define MII_VCT7_RESULTS_PAIR3_MASK 0xf000 229#define MII_VCT7_RESULTS_PAIR2_MASK 0x0f00 230#define MII_VCT7_RESULTS_PAIR1_MASK 0x00f0 231#define MII_VCT7_RESULTS_PAIR0_MASK 0x000f 232#define MII_VCT7_RESULTS_PAIR3_SHIFT 12 233#define MII_VCT7_RESULTS_PAIR2_SHIFT 8 234#define MII_VCT7_RESULTS_PAIR1_SHIFT 4 235#define MII_VCT7_RESULTS_PAIR0_SHIFT 0 236#define MII_VCT7_RESULTS_INVALID 0 237#define MII_VCT7_RESULTS_OK 1 238#define MII_VCT7_RESULTS_OPEN 2 239#define MII_VCT7_RESULTS_SAME_SHORT 3 240#define MII_VCT7_RESULTS_CROSS_SHORT 4 241#define MII_VCT7_RESULTS_BUSY 9 242 243#define MII_VCT7_CTRL 0x15 244#define MII_VCT7_CTRL_RUN_NOW BIT(15) 245#define MII_VCT7_CTRL_RUN_ANEG BIT(14) 246#define MII_VCT7_CTRL_DISABLE_CROSS BIT(13) 247#define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK BIT(12) 248#define MII_VCT7_CTRL_IN_PROGRESS BIT(11) 249#define MII_VCT7_CTRL_METERS BIT(10) 250#define MII_VCT7_CTRL_CENTIMETERS 0 251 252#define LPA_PAUSE_FIBER 0x180 253#define LPA_PAUSE_ASYM_FIBER 0x100 254 255#define NB_FIBER_STATS 1 256 257MODULE_DESCRIPTION("Marvell PHY driver"); 258MODULE_AUTHOR("Andy Fleming"); 259MODULE_LICENSE("GPL"); 260 261struct marvell_hw_stat { 262 const char *string; 263 u8 page; 264 u8 reg; 265 u8 bits; 266}; 267 268static struct marvell_hw_stat marvell_hw_stats[] = { 269 { "phy_receive_errors_copper", 0, 21, 16}, 270 { "phy_idle_errors", 0, 10, 8 }, 271 { "phy_receive_errors_fiber", 1, 21, 16}, 272}; 273 274struct marvell_priv { 275 u64 stats[ARRAY_SIZE(marvell_hw_stats)]; 276 char *hwmon_name; 277 struct device *hwmon_dev; 278 bool cable_test_tdr; 279 u32 first; 280 u32 last; 281 u32 step; 282 s8 pair; 283}; 284 285static int marvell_read_page(struct phy_device *phydev) 286{ 287 return __phy_read(phydev, MII_MARVELL_PHY_PAGE); 288} 289 290static int marvell_write_page(struct phy_device *phydev, int page) 291{ 292 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 293} 294 295static int marvell_set_page(struct phy_device *phydev, int page) 296{ 297 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 298} 299 300static int marvell_ack_interrupt(struct phy_device *phydev) 301{ 302 int err; 303 304 /* Clear the interrupts by reading the reg */ 305 err = phy_read(phydev, MII_M1011_IEVENT); 306 307 if (err < 0) 308 return err; 309 310 return 0; 311} 312 313static int marvell_config_intr(struct phy_device *phydev) 314{ 315 int err; 316 317 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 318 err = phy_write(phydev, MII_M1011_IMASK, 319 MII_M1011_IMASK_INIT); 320 else 321 err = phy_write(phydev, MII_M1011_IMASK, 322 MII_M1011_IMASK_CLEAR); 323 324 return err; 325} 326 327static int marvell_set_polarity(struct phy_device *phydev, int polarity) 328{ 329 int reg; 330 int err; 331 int val; 332 333 /* get the current settings */ 334 reg = phy_read(phydev, MII_M1011_PHY_SCR); 335 if (reg < 0) 336 return reg; 337 338 val = reg; 339 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS; 340 switch (polarity) { 341 case ETH_TP_MDI: 342 val |= MII_M1011_PHY_SCR_MDI; 343 break; 344 case ETH_TP_MDI_X: 345 val |= MII_M1011_PHY_SCR_MDI_X; 346 break; 347 case ETH_TP_MDI_AUTO: 348 case ETH_TP_MDI_INVALID: 349 default: 350 val |= MII_M1011_PHY_SCR_AUTO_CROSS; 351 break; 352 } 353 354 if (val != reg) { 355 /* Set the new polarity value in the register */ 356 err = phy_write(phydev, MII_M1011_PHY_SCR, val); 357 if (err) 358 return err; 359 } 360 361 return val != reg; 362} 363 364static int marvell_config_aneg(struct phy_device *phydev) 365{ 366 int changed = 0; 367 int err; 368 369 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 370 if (err < 0) 371 return err; 372 373 changed = err; 374 375 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 376 MII_M1111_PHY_LED_DIRECT); 377 if (err < 0) 378 return err; 379 380 err = genphy_config_aneg(phydev); 381 if (err < 0) 382 return err; 383 384 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 385 /* A write to speed/duplex bits (that is performed by 386 * genphy_config_aneg() call above) must be followed by 387 * a software reset. Otherwise, the write has no effect. 388 */ 389 err = genphy_soft_reset(phydev); 390 if (err < 0) 391 return err; 392 } 393 394 return 0; 395} 396 397static int m88e1101_config_aneg(struct phy_device *phydev) 398{ 399 int err; 400 401 /* This Marvell PHY has an errata which requires 402 * that certain registers get written in order 403 * to restart autonegotiation 404 */ 405 err = genphy_soft_reset(phydev); 406 if (err < 0) 407 return err; 408 409 err = phy_write(phydev, 0x1d, 0x1f); 410 if (err < 0) 411 return err; 412 413 err = phy_write(phydev, 0x1e, 0x200c); 414 if (err < 0) 415 return err; 416 417 err = phy_write(phydev, 0x1d, 0x5); 418 if (err < 0) 419 return err; 420 421 err = phy_write(phydev, 0x1e, 0); 422 if (err < 0) 423 return err; 424 425 err = phy_write(phydev, 0x1e, 0x100); 426 if (err < 0) 427 return err; 428 429 return marvell_config_aneg(phydev); 430} 431 432#if IS_ENABLED(CONFIG_OF_MDIO) 433/* Set and/or override some configuration registers based on the 434 * marvell,reg-init property stored in the of_node for the phydev. 435 * 436 * marvell,reg-init = <reg-page reg mask value>,...; 437 * 438 * There may be one or more sets of <reg-page reg mask value>: 439 * 440 * reg-page: which register bank to use. 441 * reg: the register. 442 * mask: if non-zero, ANDed with existing register value. 443 * value: ORed with the masked value and written to the regiser. 444 * 445 */ 446static int marvell_of_reg_init(struct phy_device *phydev) 447{ 448 const __be32 *paddr; 449 int len, i, saved_page, current_page, ret = 0; 450 451 if (!phydev->mdio.dev.of_node) 452 return 0; 453 454 paddr = of_get_property(phydev->mdio.dev.of_node, 455 "marvell,reg-init", &len); 456 if (!paddr || len < (4 * sizeof(*paddr))) 457 return 0; 458 459 saved_page = phy_save_page(phydev); 460 if (saved_page < 0) 461 goto err; 462 current_page = saved_page; 463 464 len /= sizeof(*paddr); 465 for (i = 0; i < len - 3; i += 4) { 466 u16 page = be32_to_cpup(paddr + i); 467 u16 reg = be32_to_cpup(paddr + i + 1); 468 u16 mask = be32_to_cpup(paddr + i + 2); 469 u16 val_bits = be32_to_cpup(paddr + i + 3); 470 int val; 471 472 if (page != current_page) { 473 current_page = page; 474 ret = marvell_write_page(phydev, page); 475 if (ret < 0) 476 goto err; 477 } 478 479 val = 0; 480 if (mask) { 481 val = __phy_read(phydev, reg); 482 if (val < 0) { 483 ret = val; 484 goto err; 485 } 486 val &= mask; 487 } 488 val |= val_bits; 489 490 ret = __phy_write(phydev, reg, val); 491 if (ret < 0) 492 goto err; 493 } 494err: 495 return phy_restore_page(phydev, saved_page, ret); 496} 497#else 498static int marvell_of_reg_init(struct phy_device *phydev) 499{ 500 return 0; 501} 502#endif /* CONFIG_OF_MDIO */ 503 504static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev) 505{ 506 int mscr; 507 508 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) 509 mscr = MII_88E1121_PHY_MSCR_RX_DELAY | 510 MII_88E1121_PHY_MSCR_TX_DELAY; 511 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) 512 mscr = MII_88E1121_PHY_MSCR_RX_DELAY; 513 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) 514 mscr = MII_88E1121_PHY_MSCR_TX_DELAY; 515 else 516 mscr = 0; 517 518 return phy_modify_paged_changed(phydev, MII_MARVELL_MSCR_PAGE, 519 MII_88E1121_PHY_MSCR_REG, 520 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); 521} 522 523static int m88e1121_config_aneg(struct phy_device *phydev) 524{ 525 int changed = 0; 526 int err = 0; 527 528 if (phy_interface_is_rgmii(phydev)) { 529 err = m88e1121_config_aneg_rgmii_delays(phydev); 530 if (err < 0) 531 return err; 532 } 533 534 changed = err; 535 536 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 537 if (err < 0) 538 return err; 539 540 changed |= err; 541 542 err = genphy_config_aneg(phydev); 543 if (err < 0) 544 return err; 545 546 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 547 /* A software reset is used to ensure a "commit" of the 548 * changes is done. 549 */ 550 err = genphy_soft_reset(phydev); 551 if (err < 0) 552 return err; 553 } 554 555 return 0; 556} 557 558static int m88e1318_config_aneg(struct phy_device *phydev) 559{ 560 int err; 561 562 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 563 MII_88E1318S_PHY_MSCR1_REG, 564 0, MII_88E1318S_PHY_MSCR1_PAD_ODD); 565 if (err < 0) 566 return err; 567 568 return m88e1121_config_aneg(phydev); 569} 570 571/** 572 * linkmode_adv_to_fiber_adv_t 573 * @advertise: the linkmode advertisement settings 574 * 575 * A small helper function that translates linkmode advertisement 576 * settings to phy autonegotiation advertisements for the MII_ADV 577 * register for fiber link. 578 */ 579static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise) 580{ 581 u32 result = 0; 582 583 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise)) 584 result |= ADVERTISE_1000XHALF; 585 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise)) 586 result |= ADVERTISE_1000XFULL; 587 588 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) && 589 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 590 result |= ADVERTISE_1000XPSE_ASYM; 591 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 592 result |= ADVERTISE_1000XPAUSE; 593 594 return result; 595} 596 597/** 598 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR 599 * @phydev: target phy_device struct 600 * 601 * Description: If auto-negotiation is enabled, we configure the 602 * advertising, and then restart auto-negotiation. If it is not 603 * enabled, then we write the BMCR. Adapted for fiber link in 604 * some Marvell's devices. 605 */ 606static int marvell_config_aneg_fiber(struct phy_device *phydev) 607{ 608 int changed = 0; 609 int err; 610 u16 adv; 611 612 if (phydev->autoneg != AUTONEG_ENABLE) 613 return genphy_setup_forced(phydev); 614 615 /* Only allow advertising what this PHY supports */ 616 linkmode_and(phydev->advertising, phydev->advertising, 617 phydev->supported); 618 619 adv = linkmode_adv_to_fiber_adv_t(phydev->advertising); 620 621 /* Setup fiber advertisement */ 622 err = phy_modify_changed(phydev, MII_ADVERTISE, 623 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL | 624 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM, 625 adv); 626 if (err < 0) 627 return err; 628 if (err > 0) 629 changed = 1; 630 631 return genphy_check_and_restart_aneg(phydev, changed); 632} 633 634static int m88e1510_config_aneg(struct phy_device *phydev) 635{ 636 int err; 637 638 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 639 if (err < 0) 640 goto error; 641 642 /* Configure the copper link first */ 643 err = m88e1318_config_aneg(phydev); 644 if (err < 0) 645 goto error; 646 647 /* Do not touch the fiber page if we're in copper->sgmii mode */ 648 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 649 return 0; 650 651 /* Then the fiber link */ 652 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 653 if (err < 0) 654 goto error; 655 656 err = marvell_config_aneg_fiber(phydev); 657 if (err < 0) 658 goto error; 659 660 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 661 662error: 663 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 664 return err; 665} 666 667static void marvell_config_led(struct phy_device *phydev) 668{ 669 u16 def_config; 670 int err; 671 672 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) { 673 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ 674 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R): 675 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S): 676 def_config = MII_88E1121_PHY_LED_DEF; 677 break; 678 /* Default PHY LED config: 679 * LED[0] .. 1000Mbps Link 680 * LED[1] .. 100Mbps Link 681 * LED[2] .. Blink, Activity 682 */ 683 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510): 684 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE) 685 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE; 686 else 687 def_config = MII_88E1510_PHY_LED_DEF; 688 break; 689 default: 690 return; 691 } 692 693 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL, 694 def_config); 695 if (err < 0) 696 phydev_warn(phydev, "Fail to config marvell phy LED.\n"); 697} 698 699static int marvell_config_init(struct phy_device *phydev) 700{ 701 /* Set defalut LED */ 702 marvell_config_led(phydev); 703 704 /* Set registers from marvell,reg-init DT property */ 705 return marvell_of_reg_init(phydev); 706} 707 708static int m88e3016_config_init(struct phy_device *phydev) 709{ 710 int ret; 711 712 /* Enable Scrambler and Auto-Crossover */ 713 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL, 714 MII_88E3016_DISABLE_SCRAMBLER, 715 MII_88E3016_AUTO_MDIX_CROSSOVER); 716 if (ret < 0) 717 return ret; 718 719 return marvell_config_init(phydev); 720} 721 722static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev, 723 u16 mode, 724 int fibre_copper_auto) 725{ 726 if (fibre_copper_auto) 727 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; 728 729 return phy_modify(phydev, MII_M1111_PHY_EXT_SR, 730 MII_M1111_HWCFG_MODE_MASK | 731 MII_M1111_HWCFG_FIBER_COPPER_AUTO | 732 MII_M1111_HWCFG_FIBER_COPPER_RES, 733 mode); 734} 735 736static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev) 737{ 738 int delay; 739 740 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 741 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY; 742 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { 743 delay = MII_M1111_RGMII_RX_DELAY; 744 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { 745 delay = MII_M1111_RGMII_TX_DELAY; 746 } else { 747 delay = 0; 748 } 749 750 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 751 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY, 752 delay); 753} 754 755static int m88e1111_config_init_rgmii(struct phy_device *phydev) 756{ 757 int temp; 758 int err; 759 760 err = m88e1111_config_init_rgmii_delays(phydev); 761 if (err < 0) 762 return err; 763 764 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 765 if (temp < 0) 766 return temp; 767 768 temp &= ~(MII_M1111_HWCFG_MODE_MASK); 769 770 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) 771 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; 772 else 773 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; 774 775 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 776} 777 778static int m88e1111_config_init_sgmii(struct phy_device *phydev) 779{ 780 int err; 781 782 err = m88e1111_config_init_hwcfg_mode( 783 phydev, 784 MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 785 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 786 if (err < 0) 787 return err; 788 789 /* make sure copper is selected */ 790 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 791} 792 793static int m88e1111_config_init_rtbi(struct phy_device *phydev) 794{ 795 int err; 796 797 err = m88e1111_config_init_rgmii_delays(phydev); 798 if (err < 0) 799 return err; 800 801 err = m88e1111_config_init_hwcfg_mode( 802 phydev, 803 MII_M1111_HWCFG_MODE_RTBI, 804 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 805 if (err < 0) 806 return err; 807 808 /* soft reset */ 809 err = genphy_soft_reset(phydev); 810 if (err < 0) 811 return err; 812 813 return m88e1111_config_init_hwcfg_mode( 814 phydev, 815 MII_M1111_HWCFG_MODE_RTBI, 816 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 817} 818 819static int m88e1111_config_init(struct phy_device *phydev) 820{ 821 int err; 822 823 if (phy_interface_is_rgmii(phydev)) { 824 err = m88e1111_config_init_rgmii(phydev); 825 if (err < 0) 826 return err; 827 } 828 829 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 830 err = m88e1111_config_init_sgmii(phydev); 831 if (err < 0) 832 return err; 833 } 834 835 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { 836 err = m88e1111_config_init_rtbi(phydev); 837 if (err < 0) 838 return err; 839 } 840 841 err = marvell_of_reg_init(phydev); 842 if (err < 0) 843 return err; 844 845 return genphy_soft_reset(phydev); 846} 847 848static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data) 849{ 850 int val, cnt, enable; 851 852 val = phy_read(phydev, MII_M1111_PHY_EXT_CR); 853 if (val < 0) 854 return val; 855 856 enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val); 857 cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1; 858 859 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE; 860 861 return 0; 862} 863 864static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt) 865{ 866 int val, err; 867 868 if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX) 869 return -E2BIG; 870 871 if (!cnt) { 872 err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR, 873 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN); 874 } else { 875 val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN; 876 val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1); 877 878 err = phy_modify(phydev, MII_M1111_PHY_EXT_CR, 879 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN | 880 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, 881 val); 882 } 883 884 if (err < 0) 885 return err; 886 887 return genphy_soft_reset(phydev); 888} 889 890static int m88e1111_get_tunable(struct phy_device *phydev, 891 struct ethtool_tunable *tuna, void *data) 892{ 893 switch (tuna->id) { 894 case ETHTOOL_PHY_DOWNSHIFT: 895 return m88e1111_get_downshift(phydev, data); 896 default: 897 return -EOPNOTSUPP; 898 } 899} 900 901static int m88e1111_set_tunable(struct phy_device *phydev, 902 struct ethtool_tunable *tuna, const void *data) 903{ 904 switch (tuna->id) { 905 case ETHTOOL_PHY_DOWNSHIFT: 906 return m88e1111_set_downshift(phydev, *(const u8 *)data); 907 default: 908 return -EOPNOTSUPP; 909 } 910} 911 912static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data) 913{ 914 int val, cnt, enable; 915 916 val = phy_read(phydev, MII_M1011_PHY_SCR); 917 if (val < 0) 918 return val; 919 920 enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val); 921 cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1; 922 923 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE; 924 925 return 0; 926} 927 928static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt) 929{ 930 int val, err; 931 932 if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX) 933 return -E2BIG; 934 935 if (!cnt) { 936 err = phy_clear_bits(phydev, MII_M1011_PHY_SCR, 937 MII_M1011_PHY_SCR_DOWNSHIFT_EN); 938 } else { 939 val = MII_M1011_PHY_SCR_DOWNSHIFT_EN; 940 val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1); 941 942 err = phy_modify(phydev, MII_M1011_PHY_SCR, 943 MII_M1011_PHY_SCR_DOWNSHIFT_EN | 944 MII_M1011_PHY_SCR_DOWNSHIFT_MASK, 945 val); 946 } 947 948 if (err < 0) 949 return err; 950 951 return genphy_soft_reset(phydev); 952} 953 954static int m88e1011_get_tunable(struct phy_device *phydev, 955 struct ethtool_tunable *tuna, void *data) 956{ 957 switch (tuna->id) { 958 case ETHTOOL_PHY_DOWNSHIFT: 959 return m88e1011_get_downshift(phydev, data); 960 default: 961 return -EOPNOTSUPP; 962 } 963} 964 965static int m88e1011_set_tunable(struct phy_device *phydev, 966 struct ethtool_tunable *tuna, const void *data) 967{ 968 switch (tuna->id) { 969 case ETHTOOL_PHY_DOWNSHIFT: 970 return m88e1011_set_downshift(phydev, *(const u8 *)data); 971 default: 972 return -EOPNOTSUPP; 973 } 974} 975 976static int m88e1116r_config_init(struct phy_device *phydev) 977{ 978 int err; 979 980 err = genphy_soft_reset(phydev); 981 if (err < 0) 982 return err; 983 984 msleep(500); 985 986 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 987 if (err < 0) 988 return err; 989 990 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 991 if (err < 0) 992 return err; 993 994 err = m88e1011_set_downshift(phydev, 8); 995 if (err < 0) 996 return err; 997 998 if (phy_interface_is_rgmii(phydev)) { 999 err = m88e1121_config_aneg_rgmii_delays(phydev); 1000 if (err < 0) 1001 return err; 1002 } 1003 1004 err = genphy_soft_reset(phydev); 1005 if (err < 0) 1006 return err; 1007 1008 return marvell_config_init(phydev); 1009} 1010 1011static int m88e1318_config_init(struct phy_device *phydev) 1012{ 1013 if (phy_interrupt_is_valid(phydev)) { 1014 int err = phy_modify_paged( 1015 phydev, MII_MARVELL_LED_PAGE, 1016 MII_88E1318S_PHY_LED_TCR, 1017 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1018 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1019 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1020 if (err < 0) 1021 return err; 1022 } 1023 1024 return marvell_config_init(phydev); 1025} 1026 1027static int m88e1510_config_init(struct phy_device *phydev) 1028{ 1029 int err; 1030 1031 /* SGMII-to-Copper mode initialization */ 1032 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1033 /* Select page 18 */ 1034 err = marvell_set_page(phydev, 18); 1035 if (err < 0) 1036 return err; 1037 1038 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ 1039 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 1040 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 1041 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII); 1042 if (err < 0) 1043 return err; 1044 1045 /* PHY reset is necessary after changing MODE[2:0] */ 1046 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0, 1047 MII_88E1510_GEN_CTRL_REG_1_RESET); 1048 if (err < 0) 1049 return err; 1050 1051 /* Reset page selection */ 1052 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1053 if (err < 0) 1054 return err; 1055 } 1056 1057 return m88e1318_config_init(phydev); 1058} 1059 1060static int m88e1118_config_aneg(struct phy_device *phydev) 1061{ 1062 int err; 1063 1064 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 1065 if (err < 0) 1066 return err; 1067 1068 err = genphy_config_aneg(phydev); 1069 if (err < 0) 1070 return err; 1071 1072 return genphy_soft_reset(phydev); 1073} 1074 1075static int m88e1118_config_init(struct phy_device *phydev) 1076{ 1077 int err; 1078 1079 /* Change address */ 1080 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 1081 if (err < 0) 1082 return err; 1083 1084 /* Enable 1000 Mbit */ 1085 err = phy_write(phydev, 0x15, 0x1070); 1086 if (err < 0) 1087 return err; 1088 1089 /* Change address */ 1090 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE); 1091 if (err < 0) 1092 return err; 1093 1094 if (phy_interface_is_rgmii(phydev)) { 1095 err = m88e1121_config_aneg_rgmii_delays(phydev); 1096 if (err < 0) 1097 return err; 1098 } 1099 1100 /* Adjust LED Control */ 1101 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) 1102 err = phy_write(phydev, 0x10, 0x1100); 1103 else 1104 err = phy_write(phydev, 0x10, 0x021e); 1105 if (err < 0) 1106 return err; 1107 1108 err = marvell_of_reg_init(phydev); 1109 if (err < 0) 1110 return err; 1111 1112 /* Reset address */ 1113 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1114 if (err < 0) 1115 return err; 1116 1117 return genphy_soft_reset(phydev); 1118} 1119 1120static int m88e1149_config_init(struct phy_device *phydev) 1121{ 1122 int err; 1123 1124 /* Change address */ 1125 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 1126 if (err < 0) 1127 return err; 1128 1129 /* Enable 1000 Mbit */ 1130 err = phy_write(phydev, 0x15, 0x1048); 1131 if (err < 0) 1132 return err; 1133 1134 err = marvell_of_reg_init(phydev); 1135 if (err < 0) 1136 return err; 1137 1138 /* Reset address */ 1139 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1140 if (err < 0) 1141 return err; 1142 1143 return genphy_soft_reset(phydev); 1144} 1145 1146static int m88e1145_config_init_rgmii(struct phy_device *phydev) 1147{ 1148 int err; 1149 1150 err = m88e1111_config_init_rgmii_delays(phydev); 1151 if (err < 0) 1152 return err; 1153 1154 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { 1155 err = phy_write(phydev, 0x1d, 0x0012); 1156 if (err < 0) 1157 return err; 1158 1159 err = phy_modify(phydev, 0x1e, 0x0fc0, 1160 2 << 9 | /* 36 ohm */ 1161 2 << 6); /* 39 ohm */ 1162 if (err < 0) 1163 return err; 1164 1165 err = phy_write(phydev, 0x1d, 0x3); 1166 if (err < 0) 1167 return err; 1168 1169 err = phy_write(phydev, 0x1e, 0x8000); 1170 } 1171 return err; 1172} 1173 1174static int m88e1145_config_init_sgmii(struct phy_device *phydev) 1175{ 1176 return m88e1111_config_init_hwcfg_mode( 1177 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 1178 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 1179} 1180 1181static int m88e1145_config_init(struct phy_device *phydev) 1182{ 1183 int err; 1184 1185 /* Take care of errata E0 & E1 */ 1186 err = phy_write(phydev, 0x1d, 0x001b); 1187 if (err < 0) 1188 return err; 1189 1190 err = phy_write(phydev, 0x1e, 0x418f); 1191 if (err < 0) 1192 return err; 1193 1194 err = phy_write(phydev, 0x1d, 0x0016); 1195 if (err < 0) 1196 return err; 1197 1198 err = phy_write(phydev, 0x1e, 0xa2da); 1199 if (err < 0) 1200 return err; 1201 1202 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 1203 err = m88e1145_config_init_rgmii(phydev); 1204 if (err < 0) 1205 return err; 1206 } 1207 1208 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1209 err = m88e1145_config_init_sgmii(phydev); 1210 if (err < 0) 1211 return err; 1212 } 1213 1214 err = marvell_of_reg_init(phydev); 1215 if (err < 0) 1216 return err; 1217 1218 return 0; 1219} 1220 1221static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs) 1222{ 1223 int val; 1224 1225 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3); 1226 if (val < 0) 1227 return val; 1228 1229 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) { 1230 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF; 1231 return 0; 1232 } 1233 1234 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1235 1236 switch (val) { 1237 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS: 1238 *msecs = 0; 1239 break; 1240 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS: 1241 *msecs = 10; 1242 break; 1243 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS: 1244 *msecs = 20; 1245 break; 1246 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS: 1247 *msecs = 40; 1248 break; 1249 default: 1250 return -EINVAL; 1251 } 1252 1253 return 0; 1254} 1255 1256static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs) 1257{ 1258 struct ethtool_eee eee; 1259 int val, ret; 1260 1261 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF) 1262 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3, 1263 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 1264 1265 /* According to the Marvell data sheet EEE must be disabled for 1266 * Fast Link Down detection to work properly 1267 */ 1268 ret = phy_ethtool_get_eee(phydev, &eee); 1269 if (!ret && eee.eee_enabled) { 1270 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n"); 1271 return -EBUSY; 1272 } 1273 1274 if (*msecs <= 5) 1275 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS; 1276 else if (*msecs <= 15) 1277 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS; 1278 else if (*msecs <= 30) 1279 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS; 1280 else 1281 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS; 1282 1283 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1284 1285 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3, 1286 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1287 if (ret) 1288 return ret; 1289 1290 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3, 1291 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 1292} 1293 1294static int m88e1540_get_tunable(struct phy_device *phydev, 1295 struct ethtool_tunable *tuna, void *data) 1296{ 1297 switch (tuna->id) { 1298 case ETHTOOL_PHY_FAST_LINK_DOWN: 1299 return m88e1540_get_fld(phydev, data); 1300 case ETHTOOL_PHY_DOWNSHIFT: 1301 return m88e1011_get_downshift(phydev, data); 1302 default: 1303 return -EOPNOTSUPP; 1304 } 1305} 1306 1307static int m88e1540_set_tunable(struct phy_device *phydev, 1308 struct ethtool_tunable *tuna, const void *data) 1309{ 1310 switch (tuna->id) { 1311 case ETHTOOL_PHY_FAST_LINK_DOWN: 1312 return m88e1540_set_fld(phydev, data); 1313 case ETHTOOL_PHY_DOWNSHIFT: 1314 return m88e1011_set_downshift(phydev, *(const u8 *)data); 1315 default: 1316 return -EOPNOTSUPP; 1317 } 1318} 1319 1320/* The VOD can be out of specification on link up. Poke an 1321 * undocumented register, in an undocumented page, with a magic value 1322 * to fix this. 1323 */ 1324static int m88e6390_errata(struct phy_device *phydev) 1325{ 1326 int err; 1327 1328 err = phy_write(phydev, MII_BMCR, 1329 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX); 1330 if (err) 1331 return err; 1332 1333 usleep_range(300, 400); 1334 1335 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36); 1336 if (err) 1337 return err; 1338 1339 return genphy_soft_reset(phydev); 1340} 1341 1342static int m88e6390_config_aneg(struct phy_device *phydev) 1343{ 1344 int err; 1345 1346 err = m88e6390_errata(phydev); 1347 if (err) 1348 return err; 1349 1350 return m88e1510_config_aneg(phydev); 1351} 1352 1353/** 1354 * fiber_lpa_mod_linkmode_lpa_t 1355 * @advertising: the linkmode advertisement settings 1356 * @lpa: value of the MII_LPA register for fiber link 1357 * 1358 * A small helper function that translates MII_LPA bits to linkmode LP 1359 * advertisement settings. Other bits in advertising are left 1360 * unchanged. 1361 */ 1362static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa) 1363{ 1364 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, 1365 advertising, lpa & LPA_1000XHALF); 1366 1367 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 1368 advertising, lpa & LPA_1000XFULL); 1369} 1370 1371static int marvell_read_status_page_an(struct phy_device *phydev, 1372 int fiber, int status) 1373{ 1374 int lpa; 1375 int err; 1376 1377 if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) { 1378 phydev->link = 0; 1379 return 0; 1380 } 1381 1382 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) 1383 phydev->duplex = DUPLEX_FULL; 1384 else 1385 phydev->duplex = DUPLEX_HALF; 1386 1387 switch (status & MII_M1011_PHY_STATUS_SPD_MASK) { 1388 case MII_M1011_PHY_STATUS_1000: 1389 phydev->speed = SPEED_1000; 1390 break; 1391 1392 case MII_M1011_PHY_STATUS_100: 1393 phydev->speed = SPEED_100; 1394 break; 1395 1396 default: 1397 phydev->speed = SPEED_10; 1398 break; 1399 } 1400 1401 if (!fiber) { 1402 err = genphy_read_lpa(phydev); 1403 if (err < 0) 1404 return err; 1405 1406 phy_resolve_aneg_pause(phydev); 1407 } else { 1408 lpa = phy_read(phydev, MII_LPA); 1409 if (lpa < 0) 1410 return lpa; 1411 1412 /* The fiber link is only 1000M capable */ 1413 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa); 1414 1415 if (phydev->duplex == DUPLEX_FULL) { 1416 if (!(lpa & LPA_PAUSE_FIBER)) { 1417 phydev->pause = 0; 1418 phydev->asym_pause = 0; 1419 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) { 1420 phydev->pause = 1; 1421 phydev->asym_pause = 1; 1422 } else { 1423 phydev->pause = 1; 1424 phydev->asym_pause = 0; 1425 } 1426 } 1427 } 1428 1429 return 0; 1430} 1431 1432/* marvell_read_status_page 1433 * 1434 * Description: 1435 * Check the link, then figure out the current state 1436 * by comparing what we advertise with what the link partner 1437 * advertises. Start by checking the gigabit possibilities, 1438 * then move on to 10/100. 1439 */ 1440static int marvell_read_status_page(struct phy_device *phydev, int page) 1441{ 1442 int status; 1443 int fiber; 1444 int err; 1445 1446 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1447 if (status < 0) 1448 return status; 1449 1450 /* Use the generic register for copper link status, 1451 * and the PHY status register for fiber link status. 1452 */ 1453 if (page == MII_MARVELL_FIBER_PAGE) { 1454 phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK); 1455 } else { 1456 err = genphy_update_link(phydev); 1457 if (err) 1458 return err; 1459 } 1460 1461 if (page == MII_MARVELL_FIBER_PAGE) 1462 fiber = 1; 1463 else 1464 fiber = 0; 1465 1466 linkmode_zero(phydev->lp_advertising); 1467 phydev->pause = 0; 1468 phydev->asym_pause = 0; 1469 phydev->speed = SPEED_UNKNOWN; 1470 phydev->duplex = DUPLEX_UNKNOWN; 1471 phydev->port = fiber ? PORT_FIBRE : PORT_TP; 1472 1473 if (phydev->autoneg == AUTONEG_ENABLE) 1474 err = marvell_read_status_page_an(phydev, fiber, status); 1475 else 1476 err = genphy_read_status_fixed(phydev); 1477 1478 return err; 1479} 1480 1481/* marvell_read_status 1482 * 1483 * Some Marvell's phys have two modes: fiber and copper. 1484 * Both need status checked. 1485 * Description: 1486 * First, check the fiber link and status. 1487 * If the fiber link is down, check the copper link and status which 1488 * will be the default value if both link are down. 1489 */ 1490static int marvell_read_status(struct phy_device *phydev) 1491{ 1492 int err; 1493 1494 /* Check the fiber mode first */ 1495 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1496 phydev->supported) && 1497 phydev->interface != PHY_INTERFACE_MODE_SGMII) { 1498 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1499 if (err < 0) 1500 goto error; 1501 1502 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE); 1503 if (err < 0) 1504 goto error; 1505 1506 /* If the fiber link is up, it is the selected and 1507 * used link. In this case, we need to stay in the 1508 * fiber page. Please to be careful about that, avoid 1509 * to restore Copper page in other functions which 1510 * could break the behaviour for some fiber phy like 1511 * 88E1512. 1512 */ 1513 if (phydev->link) 1514 return 0; 1515 1516 /* If fiber link is down, check and save copper mode state */ 1517 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1518 if (err < 0) 1519 goto error; 1520 } 1521 1522 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE); 1523 1524error: 1525 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1526 return err; 1527} 1528 1529/* marvell_suspend 1530 * 1531 * Some Marvell's phys have two modes: fiber and copper. 1532 * Both need to be suspended 1533 */ 1534static int marvell_suspend(struct phy_device *phydev) 1535{ 1536 int err; 1537 1538 /* Suspend the fiber mode first */ 1539 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1540 phydev->supported)) { 1541 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1542 if (err < 0) 1543 goto error; 1544 1545 /* With the page set, use the generic suspend */ 1546 err = genphy_suspend(phydev); 1547 if (err < 0) 1548 goto error; 1549 1550 /* Then, the copper link */ 1551 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1552 if (err < 0) 1553 goto error; 1554 } 1555 1556 /* With the page set, use the generic suspend */ 1557 return genphy_suspend(phydev); 1558 1559error: 1560 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1561 return err; 1562} 1563 1564/* marvell_resume 1565 * 1566 * Some Marvell's phys have two modes: fiber and copper. 1567 * Both need to be resumed 1568 */ 1569static int marvell_resume(struct phy_device *phydev) 1570{ 1571 int err; 1572 1573 /* Resume the fiber mode first */ 1574 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1575 phydev->supported)) { 1576 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1577 if (err < 0) 1578 goto error; 1579 1580 /* With the page set, use the generic resume */ 1581 err = genphy_resume(phydev); 1582 if (err < 0) 1583 goto error; 1584 1585 /* Then, the copper link */ 1586 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1587 if (err < 0) 1588 goto error; 1589 } 1590 1591 /* With the page set, use the generic resume */ 1592 return genphy_resume(phydev); 1593 1594error: 1595 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1596 return err; 1597} 1598 1599static int marvell_aneg_done(struct phy_device *phydev) 1600{ 1601 int retval = phy_read(phydev, MII_M1011_PHY_STATUS); 1602 1603 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED); 1604} 1605 1606static int m88e1121_did_interrupt(struct phy_device *phydev) 1607{ 1608 int imask; 1609 1610 imask = phy_read(phydev, MII_M1011_IEVENT); 1611 1612 if (imask & MII_M1011_IMASK_INIT) 1613 return 1; 1614 1615 return 0; 1616} 1617 1618static void m88e1318_get_wol(struct phy_device *phydev, 1619 struct ethtool_wolinfo *wol) 1620{ 1621 int ret; 1622 1623 wol->supported = WAKE_MAGIC; 1624 wol->wolopts = 0; 1625 1626 ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE, 1627 MII_88E1318S_PHY_WOL_CTRL); 1628 if (ret >= 0 && ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE) 1629 wol->wolopts |= WAKE_MAGIC; 1630} 1631 1632static int m88e1318_set_wol(struct phy_device *phydev, 1633 struct ethtool_wolinfo *wol) 1634{ 1635 int err = 0, oldpage; 1636 1637 oldpage = phy_save_page(phydev); 1638 if (oldpage < 0) 1639 goto error; 1640 1641 if (wol->wolopts & WAKE_MAGIC) { 1642 /* Explicitly switch to page 0x00, just to be sure */ 1643 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE); 1644 if (err < 0) 1645 goto error; 1646 1647 /* If WOL event happened once, the LED[2] interrupt pin 1648 * will not be cleared unless we reading the interrupt status 1649 * register. If interrupts are in use, the normal interrupt 1650 * handling will clear the WOL event. Clear the WOL event 1651 * before enabling it if !phy_interrupt_is_valid() 1652 */ 1653 if (!phy_interrupt_is_valid(phydev)) 1654 __phy_read(phydev, MII_M1011_IEVENT); 1655 1656 /* Enable the WOL interrupt */ 1657 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0, 1658 MII_88E1318S_PHY_CSIER_WOL_EIE); 1659 if (err < 0) 1660 goto error; 1661 1662 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE); 1663 if (err < 0) 1664 goto error; 1665 1666 /* Setup LED[2] as interrupt pin (active low) */ 1667 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR, 1668 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1669 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1670 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1671 if (err < 0) 1672 goto error; 1673 1674 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1675 if (err < 0) 1676 goto error; 1677 1678 /* Store the device address for the magic packet */ 1679 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, 1680 ((phydev->attached_dev->dev_addr[5] << 8) | 1681 phydev->attached_dev->dev_addr[4])); 1682 if (err < 0) 1683 goto error; 1684 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, 1685 ((phydev->attached_dev->dev_addr[3] << 8) | 1686 phydev->attached_dev->dev_addr[2])); 1687 if (err < 0) 1688 goto error; 1689 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, 1690 ((phydev->attached_dev->dev_addr[1] << 8) | 1691 phydev->attached_dev->dev_addr[0])); 1692 if (err < 0) 1693 goto error; 1694 1695 /* Clear WOL status and enable magic packet matching */ 1696 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0, 1697 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | 1698 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE); 1699 if (err < 0) 1700 goto error; 1701 } else { 1702 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1703 if (err < 0) 1704 goto error; 1705 1706 /* Clear WOL status and disable magic packet matching */ 1707 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 1708 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE, 1709 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); 1710 if (err < 0) 1711 goto error; 1712 } 1713 1714error: 1715 return phy_restore_page(phydev, oldpage, err); 1716} 1717 1718static int marvell_get_sset_count(struct phy_device *phydev) 1719{ 1720 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1721 phydev->supported)) 1722 return ARRAY_SIZE(marvell_hw_stats); 1723 else 1724 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS; 1725} 1726 1727static void marvell_get_strings(struct phy_device *phydev, u8 *data) 1728{ 1729 int count = marvell_get_sset_count(phydev); 1730 int i; 1731 1732 for (i = 0; i < count; i++) { 1733 strlcpy(data + i * ETH_GSTRING_LEN, 1734 marvell_hw_stats[i].string, ETH_GSTRING_LEN); 1735 } 1736} 1737 1738static u64 marvell_get_stat(struct phy_device *phydev, int i) 1739{ 1740 struct marvell_hw_stat stat = marvell_hw_stats[i]; 1741 struct marvell_priv *priv = phydev->priv; 1742 int val; 1743 u64 ret; 1744 1745 val = phy_read_paged(phydev, stat.page, stat.reg); 1746 if (val < 0) { 1747 ret = U64_MAX; 1748 } else { 1749 val = val & ((1 << stat.bits) - 1); 1750 priv->stats[i] += val; 1751 ret = priv->stats[i]; 1752 } 1753 1754 return ret; 1755} 1756 1757static void marvell_get_stats(struct phy_device *phydev, 1758 struct ethtool_stats *stats, u64 *data) 1759{ 1760 int count = marvell_get_sset_count(phydev); 1761 int i; 1762 1763 for (i = 0; i < count; i++) 1764 data[i] = marvell_get_stat(phydev, i); 1765} 1766 1767static int marvell_vct5_wait_complete(struct phy_device *phydev) 1768{ 1769 int i; 1770 int val; 1771 1772 for (i = 0; i < 32; i++) { 1773 val = __phy_read(phydev, MII_VCT5_CTRL); 1774 if (val < 0) 1775 return val; 1776 1777 if (val & MII_VCT5_CTRL_COMPLETE) 1778 return 0; 1779 } 1780 1781 phydev_err(phydev, "Timeout while waiting for cable test to finish\n"); 1782 return -ETIMEDOUT; 1783} 1784 1785static int marvell_vct5_amplitude(struct phy_device *phydev, int pair) 1786{ 1787 int amplitude; 1788 int val; 1789 int reg; 1790 1791 reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair; 1792 val = __phy_read(phydev, reg); 1793 1794 if (val < 0) 1795 return 0; 1796 1797 amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >> 1798 MII_VCT5_TX_RX_AMPLITUDE_SHIFT; 1799 1800 if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION)) 1801 amplitude = -amplitude; 1802 1803 return 1000 * amplitude / 128; 1804} 1805 1806static u32 marvell_vct5_distance2cm(int distance) 1807{ 1808 return distance * 805 / 10; 1809} 1810 1811static u32 marvell_vct5_cm2distance(int cm) 1812{ 1813 return cm * 10 / 805; 1814} 1815 1816static int marvell_vct5_amplitude_distance(struct phy_device *phydev, 1817 int distance, int pair) 1818{ 1819 u16 reg; 1820 int err; 1821 int mV; 1822 int i; 1823 1824 err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE, 1825 distance); 1826 if (err) 1827 return err; 1828 1829 reg = MII_VCT5_CTRL_ENABLE | 1830 MII_VCT5_CTRL_TX_SAME_CHANNEL | 1831 MII_VCT5_CTRL_SAMPLES_DEFAULT | 1832 MII_VCT5_CTRL_SAMPLE_POINT | 1833 MII_VCT5_CTRL_PEEK_HYST_DEFAULT; 1834 err = __phy_write(phydev, MII_VCT5_CTRL, reg); 1835 if (err) 1836 return err; 1837 1838 err = marvell_vct5_wait_complete(phydev); 1839 if (err) 1840 return err; 1841 1842 for (i = 0; i < 4; i++) { 1843 if (pair != PHY_PAIR_ALL && i != pair) 1844 continue; 1845 1846 mV = marvell_vct5_amplitude(phydev, i); 1847 ethnl_cable_test_amplitude(phydev, i, mV); 1848 } 1849 1850 return 0; 1851} 1852 1853static int marvell_vct5_amplitude_graph(struct phy_device *phydev) 1854{ 1855 struct marvell_priv *priv = phydev->priv; 1856 int distance; 1857 u16 width; 1858 int page; 1859 int err; 1860 u16 reg; 1861 1862 if (priv->first <= TDR_SHORT_CABLE_LENGTH) 1863 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS; 1864 else 1865 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS; 1866 1867 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV | 1868 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN | 1869 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width; 1870 1871 err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE, 1872 MII_VCT5_TX_PULSE_CTRL, reg); 1873 if (err) 1874 return err; 1875 1876 /* Reading the TDR data is very MDIO heavy. We need to optimize 1877 * access to keep the time to a minimum. So lock the bus once, 1878 * and don't release it until complete. We can then avoid having 1879 * to change the page for every access, greatly speeding things 1880 * up. 1881 */ 1882 page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE); 1883 if (page < 0) 1884 goto restore_page; 1885 1886 for (distance = priv->first; 1887 distance <= priv->last; 1888 distance += priv->step) { 1889 err = marvell_vct5_amplitude_distance(phydev, distance, 1890 priv->pair); 1891 if (err) 1892 goto restore_page; 1893 1894 if (distance > TDR_SHORT_CABLE_LENGTH && 1895 width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) { 1896 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS; 1897 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV | 1898 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN | 1899 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width; 1900 err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg); 1901 if (err) 1902 goto restore_page; 1903 } 1904 } 1905 1906restore_page: 1907 return phy_restore_page(phydev, page, err); 1908} 1909 1910static int marvell_cable_test_start_common(struct phy_device *phydev) 1911{ 1912 int bmcr, bmsr, ret; 1913 1914 /* If auto-negotiation is enabled, but not complete, the cable 1915 * test never completes. So disable auto-neg. 1916 */ 1917 bmcr = phy_read(phydev, MII_BMCR); 1918 if (bmcr < 0) 1919 return bmcr; 1920 1921 bmsr = phy_read(phydev, MII_BMSR); 1922 1923 if (bmsr < 0) 1924 return bmsr; 1925 1926 if (bmcr & BMCR_ANENABLE) { 1927 ret = phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0); 1928 if (ret < 0) 1929 return ret; 1930 ret = genphy_soft_reset(phydev); 1931 if (ret < 0) 1932 return ret; 1933 } 1934 1935 /* If the link is up, allow it some time to go down */ 1936 if (bmsr & BMSR_LSTATUS) 1937 msleep(1500); 1938 1939 return 0; 1940} 1941 1942static int marvell_vct7_cable_test_start(struct phy_device *phydev) 1943{ 1944 struct marvell_priv *priv = phydev->priv; 1945 int ret; 1946 1947 ret = marvell_cable_test_start_common(phydev); 1948 if (ret) 1949 return ret; 1950 1951 priv->cable_test_tdr = false; 1952 1953 /* Reset the VCT5 API control to defaults, otherwise 1954 * VCT7 does not work correctly. 1955 */ 1956 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE, 1957 MII_VCT5_CTRL, 1958 MII_VCT5_CTRL_TX_SAME_CHANNEL | 1959 MII_VCT5_CTRL_SAMPLES_DEFAULT | 1960 MII_VCT5_CTRL_MODE_MAXIMUM_PEEK | 1961 MII_VCT5_CTRL_PEEK_HYST_DEFAULT); 1962 if (ret) 1963 return ret; 1964 1965 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE, 1966 MII_VCT5_SAMPLE_POINT_DISTANCE, 0); 1967 if (ret) 1968 return ret; 1969 1970 return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE, 1971 MII_VCT7_CTRL, 1972 MII_VCT7_CTRL_RUN_NOW | 1973 MII_VCT7_CTRL_CENTIMETERS); 1974} 1975 1976static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev, 1977 const struct phy_tdr_config *cfg) 1978{ 1979 struct marvell_priv *priv = phydev->priv; 1980 int ret; 1981 1982 priv->cable_test_tdr = true; 1983 priv->first = marvell_vct5_cm2distance(cfg->first); 1984 priv->last = marvell_vct5_cm2distance(cfg->last); 1985 priv->step = marvell_vct5_cm2distance(cfg->step); 1986 priv->pair = cfg->pair; 1987 1988 if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX) 1989 return -EINVAL; 1990 1991 if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX) 1992 return -EINVAL; 1993 1994 /* Disable VCT7 */ 1995 ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE, 1996 MII_VCT7_CTRL, 0); 1997 if (ret) 1998 return ret; 1999 2000 ret = marvell_cable_test_start_common(phydev); 2001 if (ret) 2002 return ret; 2003 2004 ret = ethnl_cable_test_pulse(phydev, 1000); 2005 if (ret) 2006 return ret; 2007 2008 return ethnl_cable_test_step(phydev, 2009 marvell_vct5_distance2cm(priv->first), 2010 marvell_vct5_distance2cm(priv->last), 2011 marvell_vct5_distance2cm(priv->step)); 2012} 2013 2014static int marvell_vct7_distance_to_length(int distance, bool meter) 2015{ 2016 if (meter) 2017 distance *= 100; 2018 2019 return distance; 2020} 2021 2022static bool marvell_vct7_distance_valid(int result) 2023{ 2024 switch (result) { 2025 case MII_VCT7_RESULTS_OPEN: 2026 case MII_VCT7_RESULTS_SAME_SHORT: 2027 case MII_VCT7_RESULTS_CROSS_SHORT: 2028 return true; 2029 } 2030 return false; 2031} 2032 2033static int marvell_vct7_report_length(struct phy_device *phydev, 2034 int pair, bool meter) 2035{ 2036 int length; 2037 int ret; 2038 2039 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, 2040 MII_VCT7_PAIR_0_DISTANCE + pair); 2041 if (ret < 0) 2042 return ret; 2043 2044 length = marvell_vct7_distance_to_length(ret, meter); 2045 2046 ethnl_cable_test_fault_length(phydev, pair, length); 2047 2048 return 0; 2049} 2050 2051static int marvell_vct7_cable_test_report_trans(int result) 2052{ 2053 switch (result) { 2054 case MII_VCT7_RESULTS_OK: 2055 return ETHTOOL_A_CABLE_RESULT_CODE_OK; 2056 case MII_VCT7_RESULTS_OPEN: 2057 return ETHTOOL_A_CABLE_RESULT_CODE_OPEN; 2058 case MII_VCT7_RESULTS_SAME_SHORT: 2059 return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT; 2060 case MII_VCT7_RESULTS_CROSS_SHORT: 2061 return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT; 2062 default: 2063 return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC; 2064 } 2065} 2066 2067static int marvell_vct7_cable_test_report(struct phy_device *phydev) 2068{ 2069 int pair0, pair1, pair2, pair3; 2070 bool meter; 2071 int ret; 2072 2073 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, 2074 MII_VCT7_RESULTS); 2075 if (ret < 0) 2076 return ret; 2077 2078 pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >> 2079 MII_VCT7_RESULTS_PAIR3_SHIFT; 2080 pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >> 2081 MII_VCT7_RESULTS_PAIR2_SHIFT; 2082 pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >> 2083 MII_VCT7_RESULTS_PAIR1_SHIFT; 2084 pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >> 2085 MII_VCT7_RESULTS_PAIR0_SHIFT; 2086 2087 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A, 2088 marvell_vct7_cable_test_report_trans(pair0)); 2089 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B, 2090 marvell_vct7_cable_test_report_trans(pair1)); 2091 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C, 2092 marvell_vct7_cable_test_report_trans(pair2)); 2093 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D, 2094 marvell_vct7_cable_test_report_trans(pair3)); 2095 2096 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL); 2097 if (ret < 0) 2098 return ret; 2099 2100 meter = ret & MII_VCT7_CTRL_METERS; 2101 2102 if (marvell_vct7_distance_valid(pair0)) 2103 marvell_vct7_report_length(phydev, 0, meter); 2104 if (marvell_vct7_distance_valid(pair1)) 2105 marvell_vct7_report_length(phydev, 1, meter); 2106 if (marvell_vct7_distance_valid(pair2)) 2107 marvell_vct7_report_length(phydev, 2, meter); 2108 if (marvell_vct7_distance_valid(pair3)) 2109 marvell_vct7_report_length(phydev, 3, meter); 2110 2111 return 0; 2112} 2113 2114static int marvell_vct7_cable_test_get_status(struct phy_device *phydev, 2115 bool *finished) 2116{ 2117 struct marvell_priv *priv = phydev->priv; 2118 int ret; 2119 2120 if (priv->cable_test_tdr) { 2121 ret = marvell_vct5_amplitude_graph(phydev); 2122 *finished = true; 2123 return ret; 2124 } 2125 2126 *finished = false; 2127 2128 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, 2129 MII_VCT7_CTRL); 2130 2131 if (ret < 0) 2132 return ret; 2133 2134 if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) { 2135 *finished = true; 2136 2137 return marvell_vct7_cable_test_report(phydev); 2138 } 2139 2140 return 0; 2141} 2142 2143#ifdef CONFIG_HWMON 2144static int m88e1121_get_temp(struct phy_device *phydev, long *temp) 2145{ 2146 int oldpage; 2147 int ret = 0; 2148 int val; 2149 2150 *temp = 0; 2151 2152 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 2153 if (oldpage < 0) 2154 goto error; 2155 2156 /* Enable temperature sensor */ 2157 ret = __phy_read(phydev, MII_88E1121_MISC_TEST); 2158 if (ret < 0) 2159 goto error; 2160 2161 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 2162 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 2163 if (ret < 0) 2164 goto error; 2165 2166 /* Wait for temperature to stabilize */ 2167 usleep_range(10000, 12000); 2168 2169 val = __phy_read(phydev, MII_88E1121_MISC_TEST); 2170 if (val < 0) { 2171 ret = val; 2172 goto error; 2173 } 2174 2175 /* Disable temperature sensor */ 2176 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 2177 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 2178 if (ret < 0) 2179 goto error; 2180 2181 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000; 2182 2183error: 2184 return phy_restore_page(phydev, oldpage, ret); 2185} 2186 2187static int m88e1121_hwmon_read(struct device *dev, 2188 enum hwmon_sensor_types type, 2189 u32 attr, int channel, long *temp) 2190{ 2191 struct phy_device *phydev = dev_get_drvdata(dev); 2192 int err; 2193 2194 switch (attr) { 2195 case hwmon_temp_input: 2196 err = m88e1121_get_temp(phydev, temp); 2197 break; 2198 default: 2199 return -EOPNOTSUPP; 2200 } 2201 2202 return err; 2203} 2204 2205static umode_t m88e1121_hwmon_is_visible(const void *data, 2206 enum hwmon_sensor_types type, 2207 u32 attr, int channel) 2208{ 2209 if (type != hwmon_temp) 2210 return 0; 2211 2212 switch (attr) { 2213 case hwmon_temp_input: 2214 return 0444; 2215 default: 2216 return 0; 2217 } 2218} 2219 2220static u32 m88e1121_hwmon_chip_config[] = { 2221 HWMON_C_REGISTER_TZ, 2222 0 2223}; 2224 2225static const struct hwmon_channel_info m88e1121_hwmon_chip = { 2226 .type = hwmon_chip, 2227 .config = m88e1121_hwmon_chip_config, 2228}; 2229 2230static u32 m88e1121_hwmon_temp_config[] = { 2231 HWMON_T_INPUT, 2232 0 2233}; 2234 2235static const struct hwmon_channel_info m88e1121_hwmon_temp = { 2236 .type = hwmon_temp, 2237 .config = m88e1121_hwmon_temp_config, 2238}; 2239 2240static const struct hwmon_channel_info *m88e1121_hwmon_info[] = { 2241 &m88e1121_hwmon_chip, 2242 &m88e1121_hwmon_temp, 2243 NULL 2244}; 2245 2246static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = { 2247 .is_visible = m88e1121_hwmon_is_visible, 2248 .read = m88e1121_hwmon_read, 2249}; 2250 2251static const struct hwmon_chip_info m88e1121_hwmon_chip_info = { 2252 .ops = &m88e1121_hwmon_hwmon_ops, 2253 .info = m88e1121_hwmon_info, 2254}; 2255 2256static int m88e1510_get_temp(struct phy_device *phydev, long *temp) 2257{ 2258 int ret; 2259 2260 *temp = 0; 2261 2262 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2263 MII_88E1510_TEMP_SENSOR); 2264 if (ret < 0) 2265 return ret; 2266 2267 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000; 2268 2269 return 0; 2270} 2271 2272static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp) 2273{ 2274 int ret; 2275 2276 *temp = 0; 2277 2278 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2279 MII_88E1121_MISC_TEST); 2280 if (ret < 0) 2281 return ret; 2282 2283 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >> 2284 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25; 2285 /* convert to mC */ 2286 *temp *= 1000; 2287 2288 return 0; 2289} 2290 2291static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp) 2292{ 2293 temp = temp / 1000; 2294 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f); 2295 2296 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2297 MII_88E1121_MISC_TEST, 2298 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK, 2299 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT); 2300} 2301 2302static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm) 2303{ 2304 int ret; 2305 2306 *alarm = false; 2307 2308 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2309 MII_88E1121_MISC_TEST); 2310 if (ret < 0) 2311 return ret; 2312 2313 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ); 2314 2315 return 0; 2316} 2317 2318static int m88e1510_hwmon_read(struct device *dev, 2319 enum hwmon_sensor_types type, 2320 u32 attr, int channel, long *temp) 2321{ 2322 struct phy_device *phydev = dev_get_drvdata(dev); 2323 int err; 2324 2325 switch (attr) { 2326 case hwmon_temp_input: 2327 err = m88e1510_get_temp(phydev, temp); 2328 break; 2329 case hwmon_temp_crit: 2330 err = m88e1510_get_temp_critical(phydev, temp); 2331 break; 2332 case hwmon_temp_max_alarm: 2333 err = m88e1510_get_temp_alarm(phydev, temp); 2334 break; 2335 default: 2336 return -EOPNOTSUPP; 2337 } 2338 2339 return err; 2340} 2341 2342static int m88e1510_hwmon_write(struct device *dev, 2343 enum hwmon_sensor_types type, 2344 u32 attr, int channel, long temp) 2345{ 2346 struct phy_device *phydev = dev_get_drvdata(dev); 2347 int err; 2348 2349 switch (attr) { 2350 case hwmon_temp_crit: 2351 err = m88e1510_set_temp_critical(phydev, temp); 2352 break; 2353 default: 2354 return -EOPNOTSUPP; 2355 } 2356 return err; 2357} 2358 2359static umode_t m88e1510_hwmon_is_visible(const void *data, 2360 enum hwmon_sensor_types type, 2361 u32 attr, int channel) 2362{ 2363 if (type != hwmon_temp) 2364 return 0; 2365 2366 switch (attr) { 2367 case hwmon_temp_input: 2368 case hwmon_temp_max_alarm: 2369 return 0444; 2370 case hwmon_temp_crit: 2371 return 0644; 2372 default: 2373 return 0; 2374 } 2375} 2376 2377static u32 m88e1510_hwmon_temp_config[] = { 2378 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM, 2379 0 2380}; 2381 2382static const struct hwmon_channel_info m88e1510_hwmon_temp = { 2383 .type = hwmon_temp, 2384 .config = m88e1510_hwmon_temp_config, 2385}; 2386 2387static const struct hwmon_channel_info *m88e1510_hwmon_info[] = { 2388 &m88e1121_hwmon_chip, 2389 &m88e1510_hwmon_temp, 2390 NULL 2391}; 2392 2393static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = { 2394 .is_visible = m88e1510_hwmon_is_visible, 2395 .read = m88e1510_hwmon_read, 2396 .write = m88e1510_hwmon_write, 2397}; 2398 2399static const struct hwmon_chip_info m88e1510_hwmon_chip_info = { 2400 .ops = &m88e1510_hwmon_hwmon_ops, 2401 .info = m88e1510_hwmon_info, 2402}; 2403 2404static int m88e6390_get_temp(struct phy_device *phydev, long *temp) 2405{ 2406 int sum = 0; 2407 int oldpage; 2408 int ret = 0; 2409 int i; 2410 2411 *temp = 0; 2412 2413 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 2414 if (oldpage < 0) 2415 goto error; 2416 2417 /* Enable temperature sensor */ 2418 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 2419 if (ret < 0) 2420 goto error; 2421 2422 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 2423 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE | 2424 MII_88E6390_MISC_TEST_SAMPLE_1S; 2425 2426 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 2427 if (ret < 0) 2428 goto error; 2429 2430 /* Wait for temperature to stabilize */ 2431 usleep_range(10000, 12000); 2432 2433 /* Reading the temperature sense has an errata. You need to read 2434 * a number of times and take an average. 2435 */ 2436 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) { 2437 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR); 2438 if (ret < 0) 2439 goto error; 2440 sum += ret & MII_88E6390_TEMP_SENSOR_MASK; 2441 } 2442 2443 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES; 2444 *temp = (sum - 75) * 1000; 2445 2446 /* Disable temperature sensor */ 2447 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 2448 if (ret < 0) 2449 goto error; 2450 2451 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 2452 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE; 2453 2454 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 2455 2456error: 2457 phy_restore_page(phydev, oldpage, ret); 2458 2459 return ret; 2460} 2461 2462static int m88e6390_hwmon_read(struct device *dev, 2463 enum hwmon_sensor_types type, 2464 u32 attr, int channel, long *temp) 2465{ 2466 struct phy_device *phydev = dev_get_drvdata(dev); 2467 int err; 2468 2469 switch (attr) { 2470 case hwmon_temp_input: 2471 err = m88e6390_get_temp(phydev, temp); 2472 break; 2473 default: 2474 return -EOPNOTSUPP; 2475 } 2476 2477 return err; 2478} 2479 2480static umode_t m88e6390_hwmon_is_visible(const void *data, 2481 enum hwmon_sensor_types type, 2482 u32 attr, int channel) 2483{ 2484 if (type != hwmon_temp) 2485 return 0; 2486 2487 switch (attr) { 2488 case hwmon_temp_input: 2489 return 0444; 2490 default: 2491 return 0; 2492 } 2493} 2494 2495static u32 m88e6390_hwmon_temp_config[] = { 2496 HWMON_T_INPUT, 2497 0 2498}; 2499 2500static const struct hwmon_channel_info m88e6390_hwmon_temp = { 2501 .type = hwmon_temp, 2502 .config = m88e6390_hwmon_temp_config, 2503}; 2504 2505static const struct hwmon_channel_info *m88e6390_hwmon_info[] = { 2506 &m88e1121_hwmon_chip, 2507 &m88e6390_hwmon_temp, 2508 NULL 2509}; 2510 2511static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = { 2512 .is_visible = m88e6390_hwmon_is_visible, 2513 .read = m88e6390_hwmon_read, 2514}; 2515 2516static const struct hwmon_chip_info m88e6390_hwmon_chip_info = { 2517 .ops = &m88e6390_hwmon_hwmon_ops, 2518 .info = m88e6390_hwmon_info, 2519}; 2520 2521static int marvell_hwmon_name(struct phy_device *phydev) 2522{ 2523 struct marvell_priv *priv = phydev->priv; 2524 struct device *dev = &phydev->mdio.dev; 2525 const char *devname = dev_name(dev); 2526 size_t len = strlen(devname); 2527 int i, j; 2528 2529 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL); 2530 if (!priv->hwmon_name) 2531 return -ENOMEM; 2532 2533 for (i = j = 0; i < len && devname[i]; i++) { 2534 if (isalnum(devname[i])) 2535 priv->hwmon_name[j++] = devname[i]; 2536 } 2537 2538 return 0; 2539} 2540 2541static int marvell_hwmon_probe(struct phy_device *phydev, 2542 const struct hwmon_chip_info *chip) 2543{ 2544 struct marvell_priv *priv = phydev->priv; 2545 struct device *dev = &phydev->mdio.dev; 2546 int err; 2547 2548 err = marvell_hwmon_name(phydev); 2549 if (err) 2550 return err; 2551 2552 priv->hwmon_dev = devm_hwmon_device_register_with_info( 2553 dev, priv->hwmon_name, phydev, chip, NULL); 2554 2555 return PTR_ERR_OR_ZERO(priv->hwmon_dev); 2556} 2557 2558static int m88e1121_hwmon_probe(struct phy_device *phydev) 2559{ 2560 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info); 2561} 2562 2563static int m88e1510_hwmon_probe(struct phy_device *phydev) 2564{ 2565 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info); 2566} 2567 2568static int m88e6390_hwmon_probe(struct phy_device *phydev) 2569{ 2570 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info); 2571} 2572#else 2573static int m88e1121_hwmon_probe(struct phy_device *phydev) 2574{ 2575 return 0; 2576} 2577 2578static int m88e1510_hwmon_probe(struct phy_device *phydev) 2579{ 2580 return 0; 2581} 2582 2583static int m88e6390_hwmon_probe(struct phy_device *phydev) 2584{ 2585 return 0; 2586} 2587#endif 2588 2589static int marvell_probe(struct phy_device *phydev) 2590{ 2591 struct marvell_priv *priv; 2592 2593 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); 2594 if (!priv) 2595 return -ENOMEM; 2596 2597 phydev->priv = priv; 2598 2599 return 0; 2600} 2601 2602static int m88e1121_probe(struct phy_device *phydev) 2603{ 2604 int err; 2605 2606 err = marvell_probe(phydev); 2607 if (err) 2608 return err; 2609 2610 return m88e1121_hwmon_probe(phydev); 2611} 2612 2613static int m88e1510_probe(struct phy_device *phydev) 2614{ 2615 int err; 2616 2617 err = marvell_probe(phydev); 2618 if (err) 2619 return err; 2620 2621 return m88e1510_hwmon_probe(phydev); 2622} 2623 2624static int m88e6390_probe(struct phy_device *phydev) 2625{ 2626 int err; 2627 2628 err = marvell_probe(phydev); 2629 if (err) 2630 return err; 2631 2632 return m88e6390_hwmon_probe(phydev); 2633} 2634 2635static struct phy_driver marvell_drivers[] = { 2636 { 2637 .phy_id = MARVELL_PHY_ID_88E1101, 2638 .phy_id_mask = MARVELL_PHY_ID_MASK, 2639 .name = "Marvell 88E1101", 2640 /* PHY_GBIT_FEATURES */ 2641 .probe = marvell_probe, 2642 .config_init = marvell_config_init, 2643 .config_aneg = m88e1101_config_aneg, 2644 .ack_interrupt = marvell_ack_interrupt, 2645 .config_intr = marvell_config_intr, 2646 .resume = genphy_resume, 2647 .suspend = genphy_suspend, 2648 .read_page = marvell_read_page, 2649 .write_page = marvell_write_page, 2650 .get_sset_count = marvell_get_sset_count, 2651 .get_strings = marvell_get_strings, 2652 .get_stats = marvell_get_stats, 2653 }, 2654 { 2655 .phy_id = MARVELL_PHY_ID_88E1112, 2656 .phy_id_mask = MARVELL_PHY_ID_MASK, 2657 .name = "Marvell 88E1112", 2658 /* PHY_GBIT_FEATURES */ 2659 .probe = marvell_probe, 2660 .config_init = m88e1111_config_init, 2661 .config_aneg = marvell_config_aneg, 2662 .ack_interrupt = marvell_ack_interrupt, 2663 .config_intr = marvell_config_intr, 2664 .resume = genphy_resume, 2665 .suspend = genphy_suspend, 2666 .read_page = marvell_read_page, 2667 .write_page = marvell_write_page, 2668 .get_sset_count = marvell_get_sset_count, 2669 .get_strings = marvell_get_strings, 2670 .get_stats = marvell_get_stats, 2671 .get_tunable = m88e1011_get_tunable, 2672 .set_tunable = m88e1011_set_tunable, 2673 }, 2674 { 2675 .phy_id = MARVELL_PHY_ID_88E1111, 2676 .phy_id_mask = MARVELL_PHY_ID_MASK, 2677 .name = "Marvell 88E1111", 2678 /* PHY_GBIT_FEATURES */ 2679 .probe = marvell_probe, 2680 .config_init = m88e1111_config_init, 2681 .config_aneg = marvell_config_aneg, 2682 .read_status = marvell_read_status, 2683 .ack_interrupt = marvell_ack_interrupt, 2684 .config_intr = marvell_config_intr, 2685 .resume = genphy_resume, 2686 .suspend = genphy_suspend, 2687 .read_page = marvell_read_page, 2688 .write_page = marvell_write_page, 2689 .get_sset_count = marvell_get_sset_count, 2690 .get_strings = marvell_get_strings, 2691 .get_stats = marvell_get_stats, 2692 .get_tunable = m88e1111_get_tunable, 2693 .set_tunable = m88e1111_set_tunable, 2694 }, 2695 { 2696 .phy_id = MARVELL_PHY_ID_88E1118, 2697 .phy_id_mask = MARVELL_PHY_ID_MASK, 2698 .name = "Marvell 88E1118", 2699 /* PHY_GBIT_FEATURES */ 2700 .probe = marvell_probe, 2701 .config_init = m88e1118_config_init, 2702 .config_aneg = m88e1118_config_aneg, 2703 .ack_interrupt = marvell_ack_interrupt, 2704 .config_intr = marvell_config_intr, 2705 .resume = genphy_resume, 2706 .suspend = genphy_suspend, 2707 .read_page = marvell_read_page, 2708 .write_page = marvell_write_page, 2709 .get_sset_count = marvell_get_sset_count, 2710 .get_strings = marvell_get_strings, 2711 .get_stats = marvell_get_stats, 2712 }, 2713 { 2714 .phy_id = MARVELL_PHY_ID_88E1121R, 2715 .phy_id_mask = MARVELL_PHY_ID_MASK, 2716 .name = "Marvell 88E1121R", 2717 /* PHY_GBIT_FEATURES */ 2718 .probe = m88e1121_probe, 2719 .config_init = marvell_config_init, 2720 .config_aneg = m88e1121_config_aneg, 2721 .read_status = marvell_read_status, 2722 .ack_interrupt = marvell_ack_interrupt, 2723 .config_intr = marvell_config_intr, 2724 .did_interrupt = m88e1121_did_interrupt, 2725 .resume = genphy_resume, 2726 .suspend = genphy_suspend, 2727 .read_page = marvell_read_page, 2728 .write_page = marvell_write_page, 2729 .get_sset_count = marvell_get_sset_count, 2730 .get_strings = marvell_get_strings, 2731 .get_stats = marvell_get_stats, 2732 .get_tunable = m88e1011_get_tunable, 2733 .set_tunable = m88e1011_set_tunable, 2734 }, 2735 { 2736 .phy_id = MARVELL_PHY_ID_88E1318S, 2737 .phy_id_mask = MARVELL_PHY_ID_MASK, 2738 .name = "Marvell 88E1318S", 2739 /* PHY_GBIT_FEATURES */ 2740 .probe = marvell_probe, 2741 .config_init = m88e1318_config_init, 2742 .config_aneg = m88e1318_config_aneg, 2743 .read_status = marvell_read_status, 2744 .ack_interrupt = marvell_ack_interrupt, 2745 .config_intr = marvell_config_intr, 2746 .did_interrupt = m88e1121_did_interrupt, 2747 .get_wol = m88e1318_get_wol, 2748 .set_wol = m88e1318_set_wol, 2749 .resume = genphy_resume, 2750 .suspend = genphy_suspend, 2751 .read_page = marvell_read_page, 2752 .write_page = marvell_write_page, 2753 .get_sset_count = marvell_get_sset_count, 2754 .get_strings = marvell_get_strings, 2755 .get_stats = marvell_get_stats, 2756 }, 2757 { 2758 .phy_id = MARVELL_PHY_ID_88E1145, 2759 .phy_id_mask = MARVELL_PHY_ID_MASK, 2760 .name = "Marvell 88E1145", 2761 /* PHY_GBIT_FEATURES */ 2762 .probe = marvell_probe, 2763 .config_init = m88e1145_config_init, 2764 .config_aneg = m88e1101_config_aneg, 2765 .read_status = genphy_read_status, 2766 .ack_interrupt = marvell_ack_interrupt, 2767 .config_intr = marvell_config_intr, 2768 .resume = genphy_resume, 2769 .suspend = genphy_suspend, 2770 .read_page = marvell_read_page, 2771 .write_page = marvell_write_page, 2772 .get_sset_count = marvell_get_sset_count, 2773 .get_strings = marvell_get_strings, 2774 .get_stats = marvell_get_stats, 2775 .get_tunable = m88e1111_get_tunable, 2776 .set_tunable = m88e1111_set_tunable, 2777 }, 2778 { 2779 .phy_id = MARVELL_PHY_ID_88E1149R, 2780 .phy_id_mask = MARVELL_PHY_ID_MASK, 2781 .name = "Marvell 88E1149R", 2782 /* PHY_GBIT_FEATURES */ 2783 .probe = marvell_probe, 2784 .config_init = m88e1149_config_init, 2785 .config_aneg = m88e1118_config_aneg, 2786 .ack_interrupt = marvell_ack_interrupt, 2787 .config_intr = marvell_config_intr, 2788 .resume = genphy_resume, 2789 .suspend = genphy_suspend, 2790 .read_page = marvell_read_page, 2791 .write_page = marvell_write_page, 2792 .get_sset_count = marvell_get_sset_count, 2793 .get_strings = marvell_get_strings, 2794 .get_stats = marvell_get_stats, 2795 }, 2796 { 2797 .phy_id = MARVELL_PHY_ID_88E1240, 2798 .phy_id_mask = MARVELL_PHY_ID_MASK, 2799 .name = "Marvell 88E1240", 2800 /* PHY_GBIT_FEATURES */ 2801 .probe = marvell_probe, 2802 .config_init = m88e1111_config_init, 2803 .config_aneg = marvell_config_aneg, 2804 .ack_interrupt = marvell_ack_interrupt, 2805 .config_intr = marvell_config_intr, 2806 .resume = genphy_resume, 2807 .suspend = genphy_suspend, 2808 .read_page = marvell_read_page, 2809 .write_page = marvell_write_page, 2810 .get_sset_count = marvell_get_sset_count, 2811 .get_strings = marvell_get_strings, 2812 .get_stats = marvell_get_stats, 2813 }, 2814 { 2815 .phy_id = MARVELL_PHY_ID_88E1116R, 2816 .phy_id_mask = MARVELL_PHY_ID_MASK, 2817 .name = "Marvell 88E1116R", 2818 /* PHY_GBIT_FEATURES */ 2819 .probe = marvell_probe, 2820 .config_init = m88e1116r_config_init, 2821 .ack_interrupt = marvell_ack_interrupt, 2822 .config_intr = marvell_config_intr, 2823 .resume = genphy_resume, 2824 .suspend = genphy_suspend, 2825 .read_page = marvell_read_page, 2826 .write_page = marvell_write_page, 2827 .get_sset_count = marvell_get_sset_count, 2828 .get_strings = marvell_get_strings, 2829 .get_stats = marvell_get_stats, 2830 .get_tunable = m88e1011_get_tunable, 2831 .set_tunable = m88e1011_set_tunable, 2832 }, 2833 { 2834 .phy_id = MARVELL_PHY_ID_88E1510, 2835 .phy_id_mask = MARVELL_PHY_ID_MASK, 2836 .name = "Marvell 88E1510", 2837 .features = PHY_GBIT_FIBRE_FEATURES, 2838 .flags = PHY_POLL_CABLE_TEST, 2839 .probe = m88e1510_probe, 2840 .config_init = m88e1510_config_init, 2841 .config_aneg = m88e1510_config_aneg, 2842 .read_status = marvell_read_status, 2843 .ack_interrupt = marvell_ack_interrupt, 2844 .config_intr = marvell_config_intr, 2845 .did_interrupt = m88e1121_did_interrupt, 2846 .get_wol = m88e1318_get_wol, 2847 .set_wol = m88e1318_set_wol, 2848 .resume = marvell_resume, 2849 .suspend = marvell_suspend, 2850 .read_page = marvell_read_page, 2851 .write_page = marvell_write_page, 2852 .get_sset_count = marvell_get_sset_count, 2853 .get_strings = marvell_get_strings, 2854 .get_stats = marvell_get_stats, 2855 .set_loopback = genphy_loopback, 2856 .get_tunable = m88e1011_get_tunable, 2857 .set_tunable = m88e1011_set_tunable, 2858 .cable_test_start = marvell_vct7_cable_test_start, 2859 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 2860 .cable_test_get_status = marvell_vct7_cable_test_get_status, 2861 }, 2862 { 2863 .phy_id = MARVELL_PHY_ID_88E1540, 2864 .phy_id_mask = MARVELL_PHY_ID_MASK, 2865 .name = "Marvell 88E1540", 2866 /* PHY_GBIT_FEATURES */ 2867 .flags = PHY_POLL_CABLE_TEST, 2868 .probe = m88e1510_probe, 2869 .config_init = marvell_config_init, 2870 .config_aneg = m88e1510_config_aneg, 2871 .read_status = marvell_read_status, 2872 .ack_interrupt = marvell_ack_interrupt, 2873 .config_intr = marvell_config_intr, 2874 .did_interrupt = m88e1121_did_interrupt, 2875 .resume = genphy_resume, 2876 .suspend = genphy_suspend, 2877 .read_page = marvell_read_page, 2878 .write_page = marvell_write_page, 2879 .get_sset_count = marvell_get_sset_count, 2880 .get_strings = marvell_get_strings, 2881 .get_stats = marvell_get_stats, 2882 .get_tunable = m88e1540_get_tunable, 2883 .set_tunable = m88e1540_set_tunable, 2884 .cable_test_start = marvell_vct7_cable_test_start, 2885 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 2886 .cable_test_get_status = marvell_vct7_cable_test_get_status, 2887 }, 2888 { 2889 .phy_id = MARVELL_PHY_ID_88E1545, 2890 .phy_id_mask = MARVELL_PHY_ID_MASK, 2891 .name = "Marvell 88E1545", 2892 .probe = m88e1510_probe, 2893 /* PHY_GBIT_FEATURES */ 2894 .flags = PHY_POLL_CABLE_TEST, 2895 .config_init = marvell_config_init, 2896 .config_aneg = m88e1510_config_aneg, 2897 .read_status = marvell_read_status, 2898 .ack_interrupt = marvell_ack_interrupt, 2899 .config_intr = marvell_config_intr, 2900 .did_interrupt = m88e1121_did_interrupt, 2901 .resume = genphy_resume, 2902 .suspend = genphy_suspend, 2903 .read_page = marvell_read_page, 2904 .write_page = marvell_write_page, 2905 .get_sset_count = marvell_get_sset_count, 2906 .get_strings = marvell_get_strings, 2907 .get_stats = marvell_get_stats, 2908 .get_tunable = m88e1540_get_tunable, 2909 .set_tunable = m88e1540_set_tunable, 2910 .cable_test_start = marvell_vct7_cable_test_start, 2911 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 2912 .cable_test_get_status = marvell_vct7_cable_test_get_status, 2913 }, 2914 { 2915 .phy_id = MARVELL_PHY_ID_88E3016, 2916 .phy_id_mask = MARVELL_PHY_ID_MASK, 2917 .name = "Marvell 88E3016", 2918 /* PHY_BASIC_FEATURES */ 2919 .probe = marvell_probe, 2920 .config_init = m88e3016_config_init, 2921 .aneg_done = marvell_aneg_done, 2922 .read_status = marvell_read_status, 2923 .ack_interrupt = marvell_ack_interrupt, 2924 .config_intr = marvell_config_intr, 2925 .did_interrupt = m88e1121_did_interrupt, 2926 .resume = genphy_resume, 2927 .suspend = genphy_suspend, 2928 .read_page = marvell_read_page, 2929 .write_page = marvell_write_page, 2930 .get_sset_count = marvell_get_sset_count, 2931 .get_strings = marvell_get_strings, 2932 .get_stats = marvell_get_stats, 2933 }, 2934 { 2935 .phy_id = MARVELL_PHY_ID_88E6341_FAMILY, 2936 .phy_id_mask = MARVELL_PHY_ID_MASK, 2937 .name = "Marvell 88E6341 Family", 2938 /* PHY_GBIT_FEATURES */ 2939 .flags = PHY_POLL_CABLE_TEST, 2940 .probe = m88e1510_probe, 2941 .config_init = marvell_config_init, 2942 .config_aneg = m88e6390_config_aneg, 2943 .read_status = marvell_read_status, 2944 .ack_interrupt = marvell_ack_interrupt, 2945 .config_intr = marvell_config_intr, 2946 .did_interrupt = m88e1121_did_interrupt, 2947 .resume = genphy_resume, 2948 .suspend = genphy_suspend, 2949 .read_page = marvell_read_page, 2950 .write_page = marvell_write_page, 2951 .get_sset_count = marvell_get_sset_count, 2952 .get_strings = marvell_get_strings, 2953 .get_stats = marvell_get_stats, 2954 .get_tunable = m88e1540_get_tunable, 2955 .set_tunable = m88e1540_set_tunable, 2956 .cable_test_start = marvell_vct7_cable_test_start, 2957 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 2958 .cable_test_get_status = marvell_vct7_cable_test_get_status, 2959 }, 2960 { 2961 .phy_id = MARVELL_PHY_ID_88E6390_FAMILY, 2962 .phy_id_mask = MARVELL_PHY_ID_MASK, 2963 .name = "Marvell 88E6390 Family", 2964 /* PHY_GBIT_FEATURES */ 2965 .flags = PHY_POLL_CABLE_TEST, 2966 .probe = m88e6390_probe, 2967 .config_init = marvell_config_init, 2968 .config_aneg = m88e6390_config_aneg, 2969 .read_status = marvell_read_status, 2970 .ack_interrupt = marvell_ack_interrupt, 2971 .config_intr = marvell_config_intr, 2972 .did_interrupt = m88e1121_did_interrupt, 2973 .resume = genphy_resume, 2974 .suspend = genphy_suspend, 2975 .read_page = marvell_read_page, 2976 .write_page = marvell_write_page, 2977 .get_sset_count = marvell_get_sset_count, 2978 .get_strings = marvell_get_strings, 2979 .get_stats = marvell_get_stats, 2980 .get_tunable = m88e1540_get_tunable, 2981 .set_tunable = m88e1540_set_tunable, 2982 .cable_test_start = marvell_vct7_cable_test_start, 2983 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 2984 .cable_test_get_status = marvell_vct7_cable_test_get_status, 2985 }, 2986 { 2987 .phy_id = MARVELL_PHY_ID_88E1340S, 2988 .phy_id_mask = MARVELL_PHY_ID_MASK, 2989 .name = "Marvell 88E1340S", 2990 .probe = m88e1510_probe, 2991 /* PHY_GBIT_FEATURES */ 2992 .config_init = marvell_config_init, 2993 .config_aneg = m88e1510_config_aneg, 2994 .read_status = marvell_read_status, 2995 .ack_interrupt = marvell_ack_interrupt, 2996 .config_intr = marvell_config_intr, 2997 .did_interrupt = m88e1121_did_interrupt, 2998 .resume = genphy_resume, 2999 .suspend = genphy_suspend, 3000 .read_page = marvell_read_page, 3001 .write_page = marvell_write_page, 3002 .get_sset_count = marvell_get_sset_count, 3003 .get_strings = marvell_get_strings, 3004 .get_stats = marvell_get_stats, 3005 .get_tunable = m88e1540_get_tunable, 3006 .set_tunable = m88e1540_set_tunable, 3007 }, 3008 { 3009 .phy_id = MARVELL_PHY_ID_88E1548P, 3010 .phy_id_mask = MARVELL_PHY_ID_MASK, 3011 .name = "Marvell 88E1548P", 3012 .probe = m88e1510_probe, 3013 .features = PHY_GBIT_FIBRE_FEATURES, 3014 .config_init = marvell_config_init, 3015 .config_aneg = m88e1510_config_aneg, 3016 .read_status = marvell_read_status, 3017 .ack_interrupt = marvell_ack_interrupt, 3018 .config_intr = marvell_config_intr, 3019 .did_interrupt = m88e1121_did_interrupt, 3020 .resume = genphy_resume, 3021 .suspend = genphy_suspend, 3022 .read_page = marvell_read_page, 3023 .write_page = marvell_write_page, 3024 .get_sset_count = marvell_get_sset_count, 3025 .get_strings = marvell_get_strings, 3026 .get_stats = marvell_get_stats, 3027 .get_tunable = m88e1540_get_tunable, 3028 .set_tunable = m88e1540_set_tunable, 3029 }, 3030}; 3031 3032module_phy_driver(marvell_drivers); 3033 3034static struct mdio_device_id __maybe_unused marvell_tbl[] = { 3035 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK }, 3036 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK }, 3037 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK }, 3038 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK }, 3039 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK }, 3040 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK }, 3041 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, 3042 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, 3043 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, 3044 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, 3045 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK }, 3046 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK }, 3047 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK }, 3048 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK }, 3049 { MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK }, 3050 { MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK }, 3051 { MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK }, 3052 { MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK }, 3053 { } 3054}; 3055 3056MODULE_DEVICE_TABLE(mdio, marvell_tbl); 3057