1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * drivers/net/phy/davicom.c
4 *
5 * Driver for Davicom PHYs
6 *
7 * Author: Andy Fleming
8 *
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 */
11#include <linux/kernel.h>
12#include <linux/string.h>
13#include <linux/errno.h>
14#include <linux/unistd.h>
15#include <linux/interrupt.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/netdevice.h>
19#include <linux/etherdevice.h>
20#include <linux/skbuff.h>
21#include <linux/spinlock.h>
22#include <linux/mm.h>
23#include <linux/module.h>
24#include <linux/mii.h>
25#include <linux/ethtool.h>
26#include <linux/phy.h>
27
28#include <asm/io.h>
29#include <asm/irq.h>
30#include <linux/uaccess.h>
31
32#define MII_DM9161_SCR		0x10
33#define MII_DM9161_SCR_INIT	0x0610
34#define MII_DM9161_SCR_RMII	0x0100
35
36/* DM9161 Interrupt Register */
37#define MII_DM9161_INTR	0x15
38#define MII_DM9161_INTR_PEND		0x8000
39#define MII_DM9161_INTR_DPLX_MASK	0x0800
40#define MII_DM9161_INTR_SPD_MASK	0x0400
41#define MII_DM9161_INTR_LINK_MASK	0x0200
42#define MII_DM9161_INTR_MASK		0x0100
43#define MII_DM9161_INTR_DPLX_CHANGE	0x0010
44#define MII_DM9161_INTR_SPD_CHANGE	0x0008
45#define MII_DM9161_INTR_LINK_CHANGE	0x0004
46#define MII_DM9161_INTR_INIT 		0x0000
47#define MII_DM9161_INTR_STOP	\
48(MII_DM9161_INTR_DPLX_MASK | MII_DM9161_INTR_SPD_MASK \
49 | MII_DM9161_INTR_LINK_MASK | MII_DM9161_INTR_MASK)
50
51/* DM9161 10BT Configuration/Status */
52#define MII_DM9161_10BTCSR	0x12
53#define MII_DM9161_10BTCSR_INIT	0x7800
54
55MODULE_DESCRIPTION("Davicom PHY driver");
56MODULE_AUTHOR("Andy Fleming");
57MODULE_LICENSE("GPL");
58
59
60#define DM9161_DELAY 1
61static int dm9161_config_intr(struct phy_device *phydev)
62{
63	int temp;
64
65	temp = phy_read(phydev, MII_DM9161_INTR);
66
67	if (temp < 0)
68		return temp;
69
70	if (PHY_INTERRUPT_ENABLED == phydev->interrupts)
71		temp &= ~(MII_DM9161_INTR_STOP);
72	else
73		temp |= MII_DM9161_INTR_STOP;
74
75	temp = phy_write(phydev, MII_DM9161_INTR, temp);
76
77	return temp;
78}
79
80static int dm9161_config_aneg(struct phy_device *phydev)
81{
82	int err;
83
84	/* Isolate the PHY */
85	err = phy_write(phydev, MII_BMCR, BMCR_ISOLATE);
86
87	if (err < 0)
88		return err;
89
90	/* Configure the new settings */
91	err = genphy_config_aneg(phydev);
92
93	if (err < 0)
94		return err;
95
96	return 0;
97}
98
99static int dm9161_config_init(struct phy_device *phydev)
100{
101	int err, temp;
102
103	/* Isolate the PHY */
104	err = phy_write(phydev, MII_BMCR, BMCR_ISOLATE);
105
106	if (err < 0)
107		return err;
108
109	switch (phydev->interface) {
110	case PHY_INTERFACE_MODE_MII:
111		temp = MII_DM9161_SCR_INIT;
112		break;
113	case PHY_INTERFACE_MODE_RMII:
114		temp =  MII_DM9161_SCR_INIT | MII_DM9161_SCR_RMII;
115		break;
116	default:
117		return -EINVAL;
118	}
119
120	/* Do not bypass the scrambler/descrambler */
121	err = phy_write(phydev, MII_DM9161_SCR, temp);
122	if (err < 0)
123		return err;
124
125	/* Clear 10BTCSR to default */
126	err = phy_write(phydev, MII_DM9161_10BTCSR, MII_DM9161_10BTCSR_INIT);
127
128	if (err < 0)
129		return err;
130
131	/* Reconnect the PHY, and enable Autonegotiation */
132	return phy_write(phydev, MII_BMCR, BMCR_ANENABLE);
133}
134
135static int dm9161_ack_interrupt(struct phy_device *phydev)
136{
137	int err = phy_read(phydev, MII_DM9161_INTR);
138
139	return (err < 0) ? err : 0;
140}
141
142static struct phy_driver dm91xx_driver[] = {
143{
144	.phy_id		= 0x0181b880,
145	.name		= "Davicom DM9161E",
146	.phy_id_mask	= 0x0ffffff0,
147	/* PHY_BASIC_FEATURES */
148	.config_init	= dm9161_config_init,
149	.config_aneg	= dm9161_config_aneg,
150	.ack_interrupt	= dm9161_ack_interrupt,
151	.config_intr	= dm9161_config_intr,
152}, {
153	.phy_id		= 0x0181b8b0,
154	.name		= "Davicom DM9161B/C",
155	.phy_id_mask	= 0x0ffffff0,
156	/* PHY_BASIC_FEATURES */
157	.config_init	= dm9161_config_init,
158	.config_aneg	= dm9161_config_aneg,
159	.ack_interrupt	= dm9161_ack_interrupt,
160	.config_intr	= dm9161_config_intr,
161}, {
162	.phy_id		= 0x0181b8a0,
163	.name		= "Davicom DM9161A",
164	.phy_id_mask	= 0x0ffffff0,
165	/* PHY_BASIC_FEATURES */
166	.config_init	= dm9161_config_init,
167	.config_aneg	= dm9161_config_aneg,
168	.ack_interrupt	= dm9161_ack_interrupt,
169	.config_intr	= dm9161_config_intr,
170}, {
171	.phy_id		= 0x00181b80,
172	.name		= "Davicom DM9131",
173	.phy_id_mask	= 0x0ffffff0,
174	/* PHY_BASIC_FEATURES */
175	.ack_interrupt	= dm9161_ack_interrupt,
176	.config_intr	= dm9161_config_intr,
177} };
178
179module_phy_driver(dm91xx_driver);
180
181static struct mdio_device_id __maybe_unused davicom_tbl[] = {
182	{ 0x0181b880, 0x0ffffff0 },
183	{ 0x0181b8b0, 0x0ffffff0 },
184	{ 0x0181b8a0, 0x0ffffff0 },
185	{ 0x00181b80, 0x0ffffff0 },
186	{ }
187};
188
189MODULE_DEVICE_TABLE(mdio, davicom_tbl);
190