1// SPDX-License-Identifier: GPL-2.0
2/* Qualcomm IPQ8064 MDIO interface driver
3 *
4 * Copyright (C) 2019 Christian Lamparter <chunkeey@gmail.com>
5 * Copyright (C) 2020 Ansuel Smith <ansuelsmth@gmail.com>
6 */
7
8#include <linux/delay.h>
9#include <linux/kernel.h>
10#include <linux/mfd/syscon.h>
11#include <linux/module.h>
12#include <linux/of_mdio.h>
13#include <linux/of_address.h>
14#include <linux/platform_device.h>
15#include <linux/regmap.h>
16
17/* MII address register definitions */
18#define MII_ADDR_REG_ADDR                       0x10
19#define MII_BUSY                                BIT(0)
20#define MII_WRITE                               BIT(1)
21#define MII_CLKRANGE_60_100M                    (0 << 2)
22#define MII_CLKRANGE_100_150M                   (1 << 2)
23#define MII_CLKRANGE_20_35M                     (2 << 2)
24#define MII_CLKRANGE_35_60M                     (3 << 2)
25#define MII_CLKRANGE_150_250M                   (4 << 2)
26#define MII_CLKRANGE_250_300M                   (5 << 2)
27#define MII_CLKRANGE_MASK			GENMASK(4, 2)
28#define MII_REG_SHIFT				6
29#define MII_REG_MASK				GENMASK(10, 6)
30#define MII_ADDR_SHIFT				11
31#define MII_ADDR_MASK				GENMASK(15, 11)
32
33#define MII_DATA_REG_ADDR                       0x14
34
35#define MII_MDIO_DELAY_USEC                     (1000)
36#define MII_MDIO_RETRY_MSEC                     (10)
37
38struct ipq8064_mdio {
39	struct regmap *base; /* NSS_GMAC0_BASE */
40};
41
42static int
43ipq8064_mdio_wait_busy(struct ipq8064_mdio *priv)
44{
45	u32 busy;
46
47	return regmap_read_poll_timeout(priv->base, MII_ADDR_REG_ADDR, busy,
48					!(busy & MII_BUSY), MII_MDIO_DELAY_USEC,
49					MII_MDIO_RETRY_MSEC * USEC_PER_MSEC);
50}
51
52static int
53ipq8064_mdio_read(struct mii_bus *bus, int phy_addr, int reg_offset)
54{
55	u32 miiaddr = MII_BUSY | MII_CLKRANGE_250_300M;
56	struct ipq8064_mdio *priv = bus->priv;
57	u32 ret_val;
58	int err;
59
60	/* Reject clause 45 */
61	if (reg_offset & MII_ADDR_C45)
62		return -EOPNOTSUPP;
63
64	miiaddr |= ((phy_addr << MII_ADDR_SHIFT) & MII_ADDR_MASK) |
65		   ((reg_offset << MII_REG_SHIFT) & MII_REG_MASK);
66
67	regmap_write(priv->base, MII_ADDR_REG_ADDR, miiaddr);
68	usleep_range(8, 10);
69
70	err = ipq8064_mdio_wait_busy(priv);
71	if (err)
72		return err;
73
74	regmap_read(priv->base, MII_DATA_REG_ADDR, &ret_val);
75	return (int)ret_val;
76}
77
78static int
79ipq8064_mdio_write(struct mii_bus *bus, int phy_addr, int reg_offset, u16 data)
80{
81	u32 miiaddr = MII_WRITE | MII_BUSY | MII_CLKRANGE_250_300M;
82	struct ipq8064_mdio *priv = bus->priv;
83
84	/* Reject clause 45 */
85	if (reg_offset & MII_ADDR_C45)
86		return -EOPNOTSUPP;
87
88	regmap_write(priv->base, MII_DATA_REG_ADDR, data);
89
90	miiaddr |= ((phy_addr << MII_ADDR_SHIFT) & MII_ADDR_MASK) |
91		   ((reg_offset << MII_REG_SHIFT) & MII_REG_MASK);
92
93	regmap_write(priv->base, MII_ADDR_REG_ADDR, miiaddr);
94	usleep_range(8, 10);
95
96	return ipq8064_mdio_wait_busy(priv);
97}
98
99static const struct regmap_config ipq8064_mdio_regmap_config = {
100	.reg_bits = 32,
101	.reg_stride = 4,
102	.val_bits = 32,
103	.can_multi_write = false,
104	/* the mdio lock is used by any user of this mdio driver */
105	.disable_locking = true,
106
107	.cache_type = REGCACHE_NONE,
108};
109
110static int
111ipq8064_mdio_probe(struct platform_device *pdev)
112{
113	struct device_node *np = pdev->dev.of_node;
114	struct ipq8064_mdio *priv;
115	struct resource res;
116	struct mii_bus *bus;
117	void __iomem *base;
118	int ret;
119
120	if (of_address_to_resource(np, 0, &res))
121		return -ENOMEM;
122
123	base = ioremap(res.start, resource_size(&res));
124	if (!base)
125		return -ENOMEM;
126
127	bus = devm_mdiobus_alloc_size(&pdev->dev, sizeof(*priv));
128	if (!bus)
129		return -ENOMEM;
130
131	bus->name = "ipq8064_mdio_bus";
132	bus->read = ipq8064_mdio_read;
133	bus->write = ipq8064_mdio_write;
134	snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mii", dev_name(&pdev->dev));
135	bus->parent = &pdev->dev;
136
137	priv = bus->priv;
138	priv->base = devm_regmap_init_mmio(&pdev->dev, base,
139					   &ipq8064_mdio_regmap_config);
140	if (IS_ERR(priv->base))
141		return PTR_ERR(priv->base);
142
143	ret = of_mdiobus_register(bus, np);
144	if (ret)
145		return ret;
146
147	platform_set_drvdata(pdev, bus);
148	return 0;
149}
150
151static int
152ipq8064_mdio_remove(struct platform_device *pdev)
153{
154	struct mii_bus *bus = platform_get_drvdata(pdev);
155
156	mdiobus_unregister(bus);
157
158	return 0;
159}
160
161static const struct of_device_id ipq8064_mdio_dt_ids[] = {
162	{ .compatible = "qcom,ipq8064-mdio" },
163	{ }
164};
165MODULE_DEVICE_TABLE(of, ipq8064_mdio_dt_ids);
166
167static struct platform_driver ipq8064_mdio_driver = {
168	.probe = ipq8064_mdio_probe,
169	.remove = ipq8064_mdio_remove,
170	.driver = {
171		.name = "ipq8064-mdio",
172		.of_match_table = ipq8064_mdio_dt_ids,
173	},
174};
175
176module_platform_driver(ipq8064_mdio_driver);
177
178MODULE_DESCRIPTION("Qualcomm IPQ8064 MDIO interface driver");
179MODULE_AUTHOR("Christian Lamparter <chunkeey@gmail.com>");
180MODULE_AUTHOR("Ansuel Smith <ansuelsmth@gmail.com>");
181MODULE_LICENSE("GPL");
182