1/* SPDX-License-Identifier: GPL-2.0-only */
2/****************************************************************************
3 * Driver for Solarflare network controllers and boards
4 * Copyright 2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation, incorporated herein by reference.
10 */
11
12#include "net_driver.h"
13#include "nic_common.h"
14
15extern const struct efx_nic_type ef100_pf_nic_type;
16extern const struct efx_nic_type ef100_vf_nic_type;
17
18int ef100_probe_pf(struct efx_nic *efx);
19int ef100_probe_vf(struct efx_nic *efx);
20void ef100_remove(struct efx_nic *efx);
21
22enum {
23	EF100_STAT_port_tx_bytes = GENERIC_STAT_COUNT,
24	EF100_STAT_port_tx_packets,
25	EF100_STAT_port_tx_pause,
26	EF100_STAT_port_tx_unicast,
27	EF100_STAT_port_tx_multicast,
28	EF100_STAT_port_tx_broadcast,
29	EF100_STAT_port_tx_lt64,
30	EF100_STAT_port_tx_64,
31	EF100_STAT_port_tx_65_to_127,
32	EF100_STAT_port_tx_128_to_255,
33	EF100_STAT_port_tx_256_to_511,
34	EF100_STAT_port_tx_512_to_1023,
35	EF100_STAT_port_tx_1024_to_15xx,
36	EF100_STAT_port_tx_15xx_to_jumbo,
37	EF100_STAT_port_rx_bytes,
38	EF100_STAT_port_rx_packets,
39	EF100_STAT_port_rx_good,
40	EF100_STAT_port_rx_bad,
41	EF100_STAT_port_rx_pause,
42	EF100_STAT_port_rx_unicast,
43	EF100_STAT_port_rx_multicast,
44	EF100_STAT_port_rx_broadcast,
45	EF100_STAT_port_rx_lt64,
46	EF100_STAT_port_rx_64,
47	EF100_STAT_port_rx_65_to_127,
48	EF100_STAT_port_rx_128_to_255,
49	EF100_STAT_port_rx_256_to_511,
50	EF100_STAT_port_rx_512_to_1023,
51	EF100_STAT_port_rx_1024_to_15xx,
52	EF100_STAT_port_rx_15xx_to_jumbo,
53	EF100_STAT_port_rx_gtjumbo,
54	EF100_STAT_port_rx_bad_gtjumbo,
55	EF100_STAT_port_rx_align_error,
56	EF100_STAT_port_rx_length_error,
57	EF100_STAT_port_rx_overflow,
58	EF100_STAT_port_rx_nodesc_drops,
59	EF100_STAT_COUNT
60};
61
62struct ef100_nic_data {
63	struct efx_nic *efx;
64	struct efx_buffer mcdi_buf;
65	u32 datapath_caps;
66	u32 datapath_caps2;
67	u32 datapath_caps3;
68	unsigned int pf_index;
69	u16 warm_boot_count;
70	u8 port_id[ETH_ALEN];
71	DECLARE_BITMAP(evq_phases, EFX_MAX_CHANNELS);
72	u64 stats[EF100_STAT_COUNT];
73	u16 tso_max_hdr_len;
74	u16 tso_max_payload_num_segs;
75	u16 tso_max_frames;
76	unsigned int tso_max_payload_len;
77};
78
79#define efx_ef100_has_cap(caps, flag) \
80	(!!((caps) & BIT_ULL(MC_CMD_GET_CAPABILITIES_V4_OUT_ ## flag ## _LBN)))
81