18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 28c2ecf20Sopenharmony_ci/* 10G controller driver for Samsung SoCs 38c2ecf20Sopenharmony_ci * 48c2ecf20Sopenharmony_ci * Copyright (C) 2013 Samsung Electronics Co., Ltd. 58c2ecf20Sopenharmony_ci * http://www.samsung.com 68c2ecf20Sopenharmony_ci * 78c2ecf20Sopenharmony_ci * Author: Siva Reddy Kallam <siva.kallam@samsung.com> 88c2ecf20Sopenharmony_ci */ 98c2ecf20Sopenharmony_ci#ifndef __SXGBE_DMA_H__ 108c2ecf20Sopenharmony_ci#define __SXGBE_DMA_H__ 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ci/* forward declaration */ 138c2ecf20Sopenharmony_cistruct sxgbe_extra_stats; 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ci#define SXGBE_DMA_BLENMAP_LSHIFT 1 168c2ecf20Sopenharmony_ci#define SXGBE_DMA_TXPBL_LSHIFT 16 178c2ecf20Sopenharmony_ci#define SXGBE_DMA_RXPBL_LSHIFT 16 188c2ecf20Sopenharmony_ci#define DEFAULT_DMA_PBL 8 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_cistruct sxgbe_dma_ops { 218c2ecf20Sopenharmony_ci /* DMA core initialization */ 228c2ecf20Sopenharmony_ci int (*init)(void __iomem *ioaddr, int fix_burst, int burst_map); 238c2ecf20Sopenharmony_ci void (*cha_init)(void __iomem *ioaddr, int cha_num, int fix_burst, 248c2ecf20Sopenharmony_ci int pbl, dma_addr_t dma_tx, dma_addr_t dma_rx, 258c2ecf20Sopenharmony_ci int t_rzie, int r_rsize); 268c2ecf20Sopenharmony_ci void (*enable_dma_transmission)(void __iomem *ioaddr, int dma_cnum); 278c2ecf20Sopenharmony_ci void (*enable_dma_irq)(void __iomem *ioaddr, int dma_cnum); 288c2ecf20Sopenharmony_ci void (*disable_dma_irq)(void __iomem *ioaddr, int dma_cnum); 298c2ecf20Sopenharmony_ci void (*start_tx)(void __iomem *ioaddr, int tchannels); 308c2ecf20Sopenharmony_ci void (*start_tx_queue)(void __iomem *ioaddr, int dma_cnum); 318c2ecf20Sopenharmony_ci void (*stop_tx)(void __iomem *ioaddr, int tchannels); 328c2ecf20Sopenharmony_ci void (*stop_tx_queue)(void __iomem *ioaddr, int dma_cnum); 338c2ecf20Sopenharmony_ci void (*start_rx)(void __iomem *ioaddr, int rchannels); 348c2ecf20Sopenharmony_ci void (*stop_rx)(void __iomem *ioaddr, int rchannels); 358c2ecf20Sopenharmony_ci int (*tx_dma_int_status)(void __iomem *ioaddr, int channel_no, 368c2ecf20Sopenharmony_ci struct sxgbe_extra_stats *x); 378c2ecf20Sopenharmony_ci int (*rx_dma_int_status)(void __iomem *ioaddr, int channel_no, 388c2ecf20Sopenharmony_ci struct sxgbe_extra_stats *x); 398c2ecf20Sopenharmony_ci /* Program the HW RX Watchdog */ 408c2ecf20Sopenharmony_ci void (*rx_watchdog)(void __iomem *ioaddr, u32 riwt); 418c2ecf20Sopenharmony_ci /* Enable TSO for each DMA channel */ 428c2ecf20Sopenharmony_ci void (*enable_tso)(void __iomem *ioaddr, u8 chan_num); 438c2ecf20Sopenharmony_ci}; 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ciconst struct sxgbe_dma_ops *sxgbe_get_dma_ops(void); 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ci#endif /* __SXGBE_CORE_H__ */ 48