18c2ecf20Sopenharmony_ci/*
28c2ecf20Sopenharmony_ci *   Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc.
38c2ecf20Sopenharmony_ci *   Copyright (c) 2014, I2SE GmbH
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci *   Permission to use, copy, modify, and/or distribute this software
68c2ecf20Sopenharmony_ci *   for any purpose with or without fee is hereby granted, provided
78c2ecf20Sopenharmony_ci *   that the above copyright notice and this permission notice appear
88c2ecf20Sopenharmony_ci *   in all copies.
98c2ecf20Sopenharmony_ci *
108c2ecf20Sopenharmony_ci *   THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
118c2ecf20Sopenharmony_ci *   WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
128c2ecf20Sopenharmony_ci *   WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL
138c2ecf20Sopenharmony_ci *   THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR
148c2ecf20Sopenharmony_ci *   CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
158c2ecf20Sopenharmony_ci *   LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
168c2ecf20Sopenharmony_ci *   NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
178c2ecf20Sopenharmony_ci *   CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
188c2ecf20Sopenharmony_ci */
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ci/*   Qualcomm Atheros SPI register definition.
218c2ecf20Sopenharmony_ci *
228c2ecf20Sopenharmony_ci *   This module is designed to define the Qualcomm Atheros SPI register
238c2ecf20Sopenharmony_ci *   placeholders;
248c2ecf20Sopenharmony_ci */
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ci#ifndef _QCA_SPI_H
278c2ecf20Sopenharmony_ci#define _QCA_SPI_H
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_ci#include <linux/netdevice.h>
308c2ecf20Sopenharmony_ci#include <linux/sched.h>
318c2ecf20Sopenharmony_ci#include <linux/skbuff.h>
328c2ecf20Sopenharmony_ci#include <linux/spi/spi.h>
338c2ecf20Sopenharmony_ci#include <linux/types.h>
348c2ecf20Sopenharmony_ci
358c2ecf20Sopenharmony_ci#include "qca_7k_common.h"
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_ci#define QCASPI_DRV_VERSION "0.2.7-i"
388c2ecf20Sopenharmony_ci#define QCASPI_DRV_NAME    "qcaspi"
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_ci#define QCASPI_GOOD_SIGNATURE 0xAA55
418c2ecf20Sopenharmony_ci
428c2ecf20Sopenharmony_ci#define TX_RING_MAX_LEN 10
438c2ecf20Sopenharmony_ci#define TX_RING_MIN_LEN 2
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ci/* sync related constants */
468c2ecf20Sopenharmony_ci#define QCASPI_SYNC_UNKNOWN 0
478c2ecf20Sopenharmony_ci#define QCASPI_SYNC_RESET   1
488c2ecf20Sopenharmony_ci#define QCASPI_SYNC_READY   2
498c2ecf20Sopenharmony_ci
508c2ecf20Sopenharmony_ci#define QCASPI_RESET_TIMEOUT 10
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_ci/* sync events */
538c2ecf20Sopenharmony_ci#define QCASPI_EVENT_UPDATE 0
548c2ecf20Sopenharmony_ci#define QCASPI_EVENT_CPUON  1
558c2ecf20Sopenharmony_ci
568c2ecf20Sopenharmony_cistruct tx_ring {
578c2ecf20Sopenharmony_ci	struct sk_buff *skb[TX_RING_MAX_LEN];
588c2ecf20Sopenharmony_ci	u16 head;
598c2ecf20Sopenharmony_ci	u16 tail;
608c2ecf20Sopenharmony_ci	u16 size;
618c2ecf20Sopenharmony_ci	u16 count;
628c2ecf20Sopenharmony_ci};
638c2ecf20Sopenharmony_ci
648c2ecf20Sopenharmony_cistruct qcaspi_stats {
658c2ecf20Sopenharmony_ci	u64 trig_reset;
668c2ecf20Sopenharmony_ci	u64 device_reset;
678c2ecf20Sopenharmony_ci	u64 reset_timeout;
688c2ecf20Sopenharmony_ci	u64 read_err;
698c2ecf20Sopenharmony_ci	u64 write_err;
708c2ecf20Sopenharmony_ci	u64 read_buf_err;
718c2ecf20Sopenharmony_ci	u64 write_buf_err;
728c2ecf20Sopenharmony_ci	u64 out_of_mem;
738c2ecf20Sopenharmony_ci	u64 write_buf_miss;
748c2ecf20Sopenharmony_ci	u64 ring_full;
758c2ecf20Sopenharmony_ci	u64 spi_err;
768c2ecf20Sopenharmony_ci	u64 write_verify_failed;
778c2ecf20Sopenharmony_ci	u64 buf_avail_err;
788c2ecf20Sopenharmony_ci};
798c2ecf20Sopenharmony_ci
808c2ecf20Sopenharmony_cistruct qcaspi {
818c2ecf20Sopenharmony_ci	struct net_device *net_dev;
828c2ecf20Sopenharmony_ci	struct spi_device *spi_dev;
838c2ecf20Sopenharmony_ci	struct task_struct *spi_thread;
848c2ecf20Sopenharmony_ci
858c2ecf20Sopenharmony_ci	struct tx_ring txr;
868c2ecf20Sopenharmony_ci	struct qcaspi_stats stats;
878c2ecf20Sopenharmony_ci
888c2ecf20Sopenharmony_ci	u8 *rx_buffer;
898c2ecf20Sopenharmony_ci	u32 buffer_size;
908c2ecf20Sopenharmony_ci	u8 sync;
918c2ecf20Sopenharmony_ci
928c2ecf20Sopenharmony_ci	struct qcafrm_handle frm_handle;
938c2ecf20Sopenharmony_ci	struct sk_buff *rx_skb;
948c2ecf20Sopenharmony_ci
958c2ecf20Sopenharmony_ci	unsigned int intr_req;
968c2ecf20Sopenharmony_ci	unsigned int intr_svc;
978c2ecf20Sopenharmony_ci	u16 reset_count;
988c2ecf20Sopenharmony_ci
998c2ecf20Sopenharmony_ci#ifdef CONFIG_DEBUG_FS
1008c2ecf20Sopenharmony_ci	struct dentry *device_root;
1018c2ecf20Sopenharmony_ci#endif
1028c2ecf20Sopenharmony_ci
1038c2ecf20Sopenharmony_ci	/* user configurable options */
1048c2ecf20Sopenharmony_ci	u32 clkspeed;
1058c2ecf20Sopenharmony_ci	u8 legacy_mode;
1068c2ecf20Sopenharmony_ci	u16 burst_len;
1078c2ecf20Sopenharmony_ci};
1088c2ecf20Sopenharmony_ci
1098c2ecf20Sopenharmony_ci#endif /* _QCA_SPI_H */
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