1/* 2 * Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc. 3 * Copyright (c) 2014, I2SE GmbH 4 * 5 * Permission to use, copy, modify, and/or distribute this software 6 * for any purpose with or without fee is hereby granted, provided 7 * that the above copyright notice and this permission notice appear 8 * in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL 13 * THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR 14 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM 15 * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, 16 * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 17 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20/* This module implements the Qualcomm Atheros SPI protocol for 21 * kernel-based SPI device; it is essentially an Ethernet-to-SPI 22 * serial converter; 23 */ 24 25#include <linux/errno.h> 26#include <linux/etherdevice.h> 27#include <linux/if_arp.h> 28#include <linux/if_ether.h> 29#include <linux/init.h> 30#include <linux/interrupt.h> 31#include <linux/jiffies.h> 32#include <linux/kernel.h> 33#include <linux/kthread.h> 34#include <linux/module.h> 35#include <linux/moduleparam.h> 36#include <linux/netdevice.h> 37#include <linux/of.h> 38#include <linux/of_device.h> 39#include <linux/of_net.h> 40#include <linux/sched.h> 41#include <linux/skbuff.h> 42#include <linux/spi/spi.h> 43#include <linux/types.h> 44 45#include "qca_7k.h" 46#include "qca_7k_common.h" 47#include "qca_debug.h" 48#include "qca_spi.h" 49 50#define MAX_DMA_BURST_LEN 5000 51 52/* Modules parameters */ 53#define QCASPI_CLK_SPEED_MIN 1000000 54#define QCASPI_CLK_SPEED_MAX 16000000 55#define QCASPI_CLK_SPEED 8000000 56static int qcaspi_clkspeed; 57module_param(qcaspi_clkspeed, int, 0); 58MODULE_PARM_DESC(qcaspi_clkspeed, "SPI bus clock speed (Hz). Use 1000000-16000000."); 59 60#define QCASPI_BURST_LEN_MIN 1 61#define QCASPI_BURST_LEN_MAX MAX_DMA_BURST_LEN 62static int qcaspi_burst_len = MAX_DMA_BURST_LEN; 63module_param(qcaspi_burst_len, int, 0); 64MODULE_PARM_DESC(qcaspi_burst_len, "Number of data bytes per burst. Use 1-5000."); 65 66#define QCASPI_PLUGGABLE_MIN 0 67#define QCASPI_PLUGGABLE_MAX 1 68static int qcaspi_pluggable = QCASPI_PLUGGABLE_MIN; 69module_param(qcaspi_pluggable, int, 0); 70MODULE_PARM_DESC(qcaspi_pluggable, "Pluggable SPI connection (yes/no)."); 71 72#define QCASPI_WRITE_VERIFY_MIN 0 73#define QCASPI_WRITE_VERIFY_MAX 3 74static int wr_verify = QCASPI_WRITE_VERIFY_MIN; 75module_param(wr_verify, int, 0); 76MODULE_PARM_DESC(wr_verify, "SPI register write verify trails. Use 0-3."); 77 78#define QCASPI_TX_TIMEOUT (1 * HZ) 79#define QCASPI_QCA7K_REBOOT_TIME_MS 1000 80 81static void 82start_spi_intr_handling(struct qcaspi *qca, u16 *intr_cause) 83{ 84 *intr_cause = 0; 85 86 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0, wr_verify); 87 qcaspi_read_register(qca, SPI_REG_INTR_CAUSE, intr_cause); 88 netdev_dbg(qca->net_dev, "interrupts: 0x%04x\n", *intr_cause); 89} 90 91static void 92end_spi_intr_handling(struct qcaspi *qca, u16 intr_cause) 93{ 94 u16 intr_enable = (SPI_INT_CPU_ON | 95 SPI_INT_PKT_AVLBL | 96 SPI_INT_RDBUF_ERR | 97 SPI_INT_WRBUF_ERR); 98 99 qcaspi_write_register(qca, SPI_REG_INTR_CAUSE, intr_cause, 0); 100 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, intr_enable, wr_verify); 101 netdev_dbg(qca->net_dev, "acking int: 0x%04x\n", intr_cause); 102} 103 104static u32 105qcaspi_write_burst(struct qcaspi *qca, u8 *src, u32 len) 106{ 107 __be16 cmd; 108 struct spi_message msg; 109 struct spi_transfer transfer[2]; 110 int ret; 111 112 memset(&transfer, 0, sizeof(transfer)); 113 spi_message_init(&msg); 114 115 cmd = cpu_to_be16(QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL); 116 transfer[0].tx_buf = &cmd; 117 transfer[0].len = QCASPI_CMD_LEN; 118 transfer[1].tx_buf = src; 119 transfer[1].len = len; 120 121 spi_message_add_tail(&transfer[0], &msg); 122 spi_message_add_tail(&transfer[1], &msg); 123 ret = spi_sync(qca->spi_dev, &msg); 124 125 if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) { 126 qcaspi_spi_error(qca); 127 return 0; 128 } 129 130 return len; 131} 132 133static u32 134qcaspi_write_legacy(struct qcaspi *qca, u8 *src, u32 len) 135{ 136 struct spi_message msg; 137 struct spi_transfer transfer; 138 int ret; 139 140 memset(&transfer, 0, sizeof(transfer)); 141 spi_message_init(&msg); 142 143 transfer.tx_buf = src; 144 transfer.len = len; 145 146 spi_message_add_tail(&transfer, &msg); 147 ret = spi_sync(qca->spi_dev, &msg); 148 149 if (ret || (msg.actual_length != len)) { 150 qcaspi_spi_error(qca); 151 return 0; 152 } 153 154 return len; 155} 156 157static u32 158qcaspi_read_burst(struct qcaspi *qca, u8 *dst, u32 len) 159{ 160 struct spi_message msg; 161 __be16 cmd; 162 struct spi_transfer transfer[2]; 163 int ret; 164 165 memset(&transfer, 0, sizeof(transfer)); 166 spi_message_init(&msg); 167 168 cmd = cpu_to_be16(QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL); 169 transfer[0].tx_buf = &cmd; 170 transfer[0].len = QCASPI_CMD_LEN; 171 transfer[1].rx_buf = dst; 172 transfer[1].len = len; 173 174 spi_message_add_tail(&transfer[0], &msg); 175 spi_message_add_tail(&transfer[1], &msg); 176 ret = spi_sync(qca->spi_dev, &msg); 177 178 if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) { 179 qcaspi_spi_error(qca); 180 return 0; 181 } 182 183 return len; 184} 185 186static u32 187qcaspi_read_legacy(struct qcaspi *qca, u8 *dst, u32 len) 188{ 189 struct spi_message msg; 190 struct spi_transfer transfer; 191 int ret; 192 193 memset(&transfer, 0, sizeof(transfer)); 194 spi_message_init(&msg); 195 196 transfer.rx_buf = dst; 197 transfer.len = len; 198 199 spi_message_add_tail(&transfer, &msg); 200 ret = spi_sync(qca->spi_dev, &msg); 201 202 if (ret || (msg.actual_length != len)) { 203 qcaspi_spi_error(qca); 204 return 0; 205 } 206 207 return len; 208} 209 210static int 211qcaspi_tx_cmd(struct qcaspi *qca, u16 cmd) 212{ 213 __be16 tx_data; 214 struct spi_message msg; 215 struct spi_transfer transfer; 216 int ret; 217 218 memset(&transfer, 0, sizeof(transfer)); 219 220 spi_message_init(&msg); 221 222 tx_data = cpu_to_be16(cmd); 223 transfer.len = sizeof(cmd); 224 transfer.tx_buf = &tx_data; 225 spi_message_add_tail(&transfer, &msg); 226 227 ret = spi_sync(qca->spi_dev, &msg); 228 229 if (!ret) 230 ret = msg.status; 231 232 if (ret) 233 qcaspi_spi_error(qca); 234 235 return ret; 236} 237 238static int 239qcaspi_tx_frame(struct qcaspi *qca, struct sk_buff *skb) 240{ 241 u32 count; 242 u32 written; 243 u32 offset; 244 u32 len; 245 246 len = skb->len; 247 248 qcaspi_write_register(qca, SPI_REG_BFR_SIZE, len, wr_verify); 249 if (qca->legacy_mode) 250 qcaspi_tx_cmd(qca, QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL); 251 252 offset = 0; 253 while (len) { 254 count = len; 255 if (count > qca->burst_len) 256 count = qca->burst_len; 257 258 if (qca->legacy_mode) { 259 written = qcaspi_write_legacy(qca, 260 skb->data + offset, 261 count); 262 } else { 263 written = qcaspi_write_burst(qca, 264 skb->data + offset, 265 count); 266 } 267 268 if (written != count) 269 return -1; 270 271 offset += count; 272 len -= count; 273 } 274 275 return 0; 276} 277 278static int 279qcaspi_transmit(struct qcaspi *qca) 280{ 281 struct net_device_stats *n_stats = &qca->net_dev->stats; 282 u16 available = 0; 283 u32 pkt_len; 284 u16 new_head; 285 u16 packets = 0; 286 287 if (qca->txr.skb[qca->txr.head] == NULL) 288 return 0; 289 290 qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA, &available); 291 292 if (available > QCASPI_HW_BUF_LEN) { 293 /* This could only happen by interferences on the SPI line. 294 * So retry later ... 295 */ 296 qca->stats.buf_avail_err++; 297 return -1; 298 } 299 300 while (qca->txr.skb[qca->txr.head]) { 301 pkt_len = qca->txr.skb[qca->txr.head]->len + QCASPI_HW_PKT_LEN; 302 303 if (available < pkt_len) { 304 if (packets == 0) 305 qca->stats.write_buf_miss++; 306 break; 307 } 308 309 if (qcaspi_tx_frame(qca, qca->txr.skb[qca->txr.head]) == -1) { 310 qca->stats.write_err++; 311 return -1; 312 } 313 314 packets++; 315 n_stats->tx_packets++; 316 n_stats->tx_bytes += qca->txr.skb[qca->txr.head]->len; 317 available -= pkt_len; 318 319 /* remove the skb from the queue */ 320 /* XXX After inconsistent lock states netif_tx_lock() 321 * has been replaced by netif_tx_lock_bh() and so on. 322 */ 323 netif_tx_lock_bh(qca->net_dev); 324 dev_kfree_skb(qca->txr.skb[qca->txr.head]); 325 qca->txr.skb[qca->txr.head] = NULL; 326 qca->txr.size -= pkt_len; 327 new_head = qca->txr.head + 1; 328 if (new_head >= qca->txr.count) 329 new_head = 0; 330 qca->txr.head = new_head; 331 if (netif_queue_stopped(qca->net_dev)) 332 netif_wake_queue(qca->net_dev); 333 netif_tx_unlock_bh(qca->net_dev); 334 } 335 336 return 0; 337} 338 339static int 340qcaspi_receive(struct qcaspi *qca) 341{ 342 struct net_device *net_dev = qca->net_dev; 343 struct net_device_stats *n_stats = &net_dev->stats; 344 u16 available = 0; 345 u32 bytes_read; 346 u8 *cp; 347 348 /* Allocate rx SKB if we don't have one available. */ 349 if (!qca->rx_skb) { 350 qca->rx_skb = netdev_alloc_skb_ip_align(net_dev, 351 net_dev->mtu + 352 VLAN_ETH_HLEN); 353 if (!qca->rx_skb) { 354 netdev_dbg(net_dev, "out of RX resources\n"); 355 qca->stats.out_of_mem++; 356 return -1; 357 } 358 } 359 360 /* Read the packet size. */ 361 qcaspi_read_register(qca, SPI_REG_RDBUF_BYTE_AVA, &available); 362 363 netdev_dbg(net_dev, "qcaspi_receive: SPI_REG_RDBUF_BYTE_AVA: Value: %08x\n", 364 available); 365 366 if (available > QCASPI_HW_BUF_LEN + QCASPI_HW_PKT_LEN) { 367 /* This could only happen by interferences on the SPI line. 368 * So retry later ... 369 */ 370 qca->stats.buf_avail_err++; 371 return -1; 372 } else if (available == 0) { 373 netdev_dbg(net_dev, "qcaspi_receive called without any data being available!\n"); 374 return -1; 375 } 376 377 qcaspi_write_register(qca, SPI_REG_BFR_SIZE, available, wr_verify); 378 379 if (qca->legacy_mode) 380 qcaspi_tx_cmd(qca, QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL); 381 382 while (available) { 383 u32 count = available; 384 385 if (count > qca->burst_len) 386 count = qca->burst_len; 387 388 if (qca->legacy_mode) { 389 bytes_read = qcaspi_read_legacy(qca, qca->rx_buffer, 390 count); 391 } else { 392 bytes_read = qcaspi_read_burst(qca, qca->rx_buffer, 393 count); 394 } 395 396 netdev_dbg(net_dev, "available: %d, byte read: %d\n", 397 available, bytes_read); 398 399 if (bytes_read) { 400 available -= bytes_read; 401 } else { 402 qca->stats.read_err++; 403 return -1; 404 } 405 406 cp = qca->rx_buffer; 407 408 while ((bytes_read--) && (qca->rx_skb)) { 409 s32 retcode; 410 411 retcode = qcafrm_fsm_decode(&qca->frm_handle, 412 qca->rx_skb->data, 413 skb_tailroom(qca->rx_skb), 414 *cp); 415 cp++; 416 switch (retcode) { 417 case QCAFRM_GATHER: 418 case QCAFRM_NOHEAD: 419 break; 420 case QCAFRM_NOTAIL: 421 netdev_dbg(net_dev, "no RX tail\n"); 422 n_stats->rx_errors++; 423 n_stats->rx_dropped++; 424 break; 425 case QCAFRM_INVLEN: 426 netdev_dbg(net_dev, "invalid RX length\n"); 427 n_stats->rx_errors++; 428 n_stats->rx_dropped++; 429 break; 430 default: 431 qca->rx_skb->dev = qca->net_dev; 432 n_stats->rx_packets++; 433 n_stats->rx_bytes += retcode; 434 skb_put(qca->rx_skb, retcode); 435 qca->rx_skb->protocol = eth_type_trans( 436 qca->rx_skb, qca->rx_skb->dev); 437 skb_checksum_none_assert(qca->rx_skb); 438 netif_rx_ni(qca->rx_skb); 439 qca->rx_skb = netdev_alloc_skb_ip_align(net_dev, 440 net_dev->mtu + VLAN_ETH_HLEN); 441 if (!qca->rx_skb) { 442 netdev_dbg(net_dev, "out of RX resources\n"); 443 n_stats->rx_errors++; 444 qca->stats.out_of_mem++; 445 break; 446 } 447 } 448 } 449 } 450 451 return 0; 452} 453 454/* Check that tx ring stores only so much bytes 455 * that fit into the internal QCA buffer. 456 */ 457 458static int 459qcaspi_tx_ring_has_space(struct tx_ring *txr) 460{ 461 if (txr->skb[txr->tail]) 462 return 0; 463 464 return (txr->size + QCAFRM_MAX_LEN < QCASPI_HW_BUF_LEN) ? 1 : 0; 465} 466 467/* Flush the tx ring. This function is only safe to 468 * call from the qcaspi_spi_thread. 469 */ 470 471static void 472qcaspi_flush_tx_ring(struct qcaspi *qca) 473{ 474 int i; 475 476 /* XXX After inconsistent lock states netif_tx_lock() 477 * has been replaced by netif_tx_lock_bh() and so on. 478 */ 479 netif_tx_lock_bh(qca->net_dev); 480 for (i = 0; i < TX_RING_MAX_LEN; i++) { 481 if (qca->txr.skb[i]) { 482 dev_kfree_skb(qca->txr.skb[i]); 483 qca->txr.skb[i] = NULL; 484 qca->net_dev->stats.tx_dropped++; 485 } 486 } 487 qca->txr.tail = 0; 488 qca->txr.head = 0; 489 qca->txr.size = 0; 490 netif_tx_unlock_bh(qca->net_dev); 491} 492 493static void 494qcaspi_qca7k_sync(struct qcaspi *qca, int event) 495{ 496 u16 signature = 0; 497 u16 spi_config; 498 u16 wrbuf_space = 0; 499 500 if (event == QCASPI_EVENT_CPUON) { 501 /* Read signature twice, if not valid 502 * go back to unknown state. 503 */ 504 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 505 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 506 if (signature != QCASPI_GOOD_SIGNATURE) { 507 qca->sync = QCASPI_SYNC_UNKNOWN; 508 netdev_dbg(qca->net_dev, "sync: got CPU on, but signature was invalid, restart\n"); 509 } else { 510 /* ensure that the WRBUF is empty */ 511 qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA, 512 &wrbuf_space); 513 if (wrbuf_space != QCASPI_HW_BUF_LEN) { 514 netdev_dbg(qca->net_dev, "sync: got CPU on, but wrbuf not empty. reset!\n"); 515 qca->sync = QCASPI_SYNC_UNKNOWN; 516 } else { 517 netdev_dbg(qca->net_dev, "sync: got CPU on, now in sync\n"); 518 qca->sync = QCASPI_SYNC_READY; 519 return; 520 } 521 } 522 } 523 524 switch (qca->sync) { 525 case QCASPI_SYNC_READY: 526 /* Read signature, if not valid go to unknown state. */ 527 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 528 if (signature != QCASPI_GOOD_SIGNATURE) { 529 qca->sync = QCASPI_SYNC_UNKNOWN; 530 netdev_dbg(qca->net_dev, "sync: bad signature, restart\n"); 531 /* don't reset right away */ 532 return; 533 } 534 break; 535 case QCASPI_SYNC_UNKNOWN: 536 /* Read signature, if not valid stay in unknown state */ 537 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 538 if (signature != QCASPI_GOOD_SIGNATURE) { 539 netdev_dbg(qca->net_dev, "sync: could not read signature to reset device, retry.\n"); 540 return; 541 } 542 543 /* TODO: use GPIO to reset QCA7000 in legacy mode*/ 544 netdev_dbg(qca->net_dev, "sync: resetting device.\n"); 545 qcaspi_read_register(qca, SPI_REG_SPI_CONFIG, &spi_config); 546 spi_config |= QCASPI_SLAVE_RESET_BIT; 547 qcaspi_write_register(qca, SPI_REG_SPI_CONFIG, spi_config, 0); 548 549 qca->sync = QCASPI_SYNC_RESET; 550 qca->stats.trig_reset++; 551 qca->reset_count = 0; 552 break; 553 case QCASPI_SYNC_RESET: 554 qca->reset_count++; 555 netdev_dbg(qca->net_dev, "sync: waiting for CPU on, count %u.\n", 556 qca->reset_count); 557 if (qca->reset_count >= QCASPI_RESET_TIMEOUT) { 558 /* reset did not seem to take place, try again */ 559 qca->sync = QCASPI_SYNC_UNKNOWN; 560 qca->stats.reset_timeout++; 561 netdev_dbg(qca->net_dev, "sync: reset timeout, restarting process.\n"); 562 } 563 break; 564 } 565} 566 567static int 568qcaspi_spi_thread(void *data) 569{ 570 struct qcaspi *qca = data; 571 u16 intr_cause = 0; 572 573 netdev_info(qca->net_dev, "SPI thread created\n"); 574 while (!kthread_should_stop()) { 575 set_current_state(TASK_INTERRUPTIBLE); 576 if (kthread_should_park()) { 577 netif_tx_disable(qca->net_dev); 578 netif_carrier_off(qca->net_dev); 579 qcaspi_flush_tx_ring(qca); 580 kthread_parkme(); 581 if (qca->sync == QCASPI_SYNC_READY) { 582 netif_carrier_on(qca->net_dev); 583 netif_wake_queue(qca->net_dev); 584 } 585 continue; 586 } 587 588 if ((qca->intr_req == qca->intr_svc) && 589 !qca->txr.skb[qca->txr.head]) 590 schedule(); 591 592 set_current_state(TASK_RUNNING); 593 594 netdev_dbg(qca->net_dev, "have work to do. int: %d, tx_skb: %p\n", 595 qca->intr_req - qca->intr_svc, 596 qca->txr.skb[qca->txr.head]); 597 598 qcaspi_qca7k_sync(qca, QCASPI_EVENT_UPDATE); 599 600 if (qca->sync != QCASPI_SYNC_READY) { 601 netdev_dbg(qca->net_dev, "sync: not ready %u, turn off carrier and flush\n", 602 (unsigned int)qca->sync); 603 netif_stop_queue(qca->net_dev); 604 netif_carrier_off(qca->net_dev); 605 qcaspi_flush_tx_ring(qca); 606 msleep(QCASPI_QCA7K_REBOOT_TIME_MS); 607 } 608 609 if (qca->intr_svc != qca->intr_req) { 610 qca->intr_svc = qca->intr_req; 611 start_spi_intr_handling(qca, &intr_cause); 612 613 if (intr_cause & SPI_INT_CPU_ON) { 614 qcaspi_qca7k_sync(qca, QCASPI_EVENT_CPUON); 615 616 /* Frame decoding in progress */ 617 if (qca->frm_handle.state != qca->frm_handle.init) 618 qca->net_dev->stats.rx_dropped++; 619 620 qcafrm_fsm_init_spi(&qca->frm_handle); 621 qca->stats.device_reset++; 622 623 /* not synced. */ 624 if (qca->sync != QCASPI_SYNC_READY) 625 continue; 626 627 netif_wake_queue(qca->net_dev); 628 netif_carrier_on(qca->net_dev); 629 } 630 631 if (intr_cause & SPI_INT_RDBUF_ERR) { 632 /* restart sync */ 633 netdev_dbg(qca->net_dev, "===> rdbuf error!\n"); 634 qca->stats.read_buf_err++; 635 qca->sync = QCASPI_SYNC_UNKNOWN; 636 continue; 637 } 638 639 if (intr_cause & SPI_INT_WRBUF_ERR) { 640 /* restart sync */ 641 netdev_dbg(qca->net_dev, "===> wrbuf error!\n"); 642 qca->stats.write_buf_err++; 643 qca->sync = QCASPI_SYNC_UNKNOWN; 644 continue; 645 } 646 647 /* can only handle other interrupts 648 * if sync has occurred 649 */ 650 if (qca->sync == QCASPI_SYNC_READY) { 651 if (intr_cause & SPI_INT_PKT_AVLBL) 652 qcaspi_receive(qca); 653 } 654 655 end_spi_intr_handling(qca, intr_cause); 656 } 657 658 if (qca->sync == QCASPI_SYNC_READY) 659 qcaspi_transmit(qca); 660 } 661 set_current_state(TASK_RUNNING); 662 netdev_info(qca->net_dev, "SPI thread exit\n"); 663 664 return 0; 665} 666 667static irqreturn_t 668qcaspi_intr_handler(int irq, void *data) 669{ 670 struct qcaspi *qca = data; 671 672 qca->intr_req++; 673 if (qca->spi_thread && 674 qca->spi_thread->state != TASK_RUNNING) 675 wake_up_process(qca->spi_thread); 676 677 return IRQ_HANDLED; 678} 679 680static int 681qcaspi_netdev_open(struct net_device *dev) 682{ 683 struct qcaspi *qca = netdev_priv(dev); 684 int ret = 0; 685 686 if (!qca) 687 return -EINVAL; 688 689 qca->intr_req = 1; 690 qca->intr_svc = 0; 691 qca->sync = QCASPI_SYNC_UNKNOWN; 692 qcafrm_fsm_init_spi(&qca->frm_handle); 693 694 qca->spi_thread = kthread_run((void *)qcaspi_spi_thread, 695 qca, "%s", dev->name); 696 697 if (IS_ERR(qca->spi_thread)) { 698 netdev_err(dev, "%s: unable to start kernel thread.\n", 699 QCASPI_DRV_NAME); 700 return PTR_ERR(qca->spi_thread); 701 } 702 703 ret = request_irq(qca->spi_dev->irq, qcaspi_intr_handler, 0, 704 dev->name, qca); 705 if (ret) { 706 netdev_err(dev, "%s: unable to get IRQ %d (irqval=%d).\n", 707 QCASPI_DRV_NAME, qca->spi_dev->irq, ret); 708 kthread_stop(qca->spi_thread); 709 return ret; 710 } 711 712 /* SPI thread takes care of TX queue */ 713 714 return 0; 715} 716 717static int 718qcaspi_netdev_close(struct net_device *dev) 719{ 720 struct qcaspi *qca = netdev_priv(dev); 721 722 netif_stop_queue(dev); 723 724 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0, wr_verify); 725 free_irq(qca->spi_dev->irq, qca); 726 727 kthread_stop(qca->spi_thread); 728 qca->spi_thread = NULL; 729 qcaspi_flush_tx_ring(qca); 730 731 return 0; 732} 733 734static netdev_tx_t 735qcaspi_netdev_xmit(struct sk_buff *skb, struct net_device *dev) 736{ 737 u32 frame_len; 738 u8 *ptmp; 739 struct qcaspi *qca = netdev_priv(dev); 740 u16 new_tail; 741 struct sk_buff *tskb; 742 u8 pad_len = 0; 743 744 if (skb->len < QCAFRM_MIN_LEN) 745 pad_len = QCAFRM_MIN_LEN - skb->len; 746 747 if (qca->txr.skb[qca->txr.tail]) { 748 netdev_warn(qca->net_dev, "queue was unexpectedly full!\n"); 749 netif_stop_queue(qca->net_dev); 750 qca->stats.ring_full++; 751 return NETDEV_TX_BUSY; 752 } 753 754 if ((skb_headroom(skb) < QCAFRM_HEADER_LEN) || 755 (skb_tailroom(skb) < QCAFRM_FOOTER_LEN + pad_len)) { 756 tskb = skb_copy_expand(skb, QCAFRM_HEADER_LEN, 757 QCAFRM_FOOTER_LEN + pad_len, GFP_ATOMIC); 758 if (!tskb) { 759 qca->stats.out_of_mem++; 760 return NETDEV_TX_BUSY; 761 } 762 dev_kfree_skb(skb); 763 skb = tskb; 764 } 765 766 frame_len = skb->len + pad_len; 767 768 ptmp = skb_push(skb, QCAFRM_HEADER_LEN); 769 qcafrm_create_header(ptmp, frame_len); 770 771 if (pad_len) { 772 ptmp = skb_put_zero(skb, pad_len); 773 } 774 775 ptmp = skb_put(skb, QCAFRM_FOOTER_LEN); 776 qcafrm_create_footer(ptmp); 777 778 netdev_dbg(qca->net_dev, "Tx-ing packet: Size: 0x%08x\n", 779 skb->len); 780 781 qca->txr.size += skb->len + QCASPI_HW_PKT_LEN; 782 783 new_tail = qca->txr.tail + 1; 784 if (new_tail >= qca->txr.count) 785 new_tail = 0; 786 787 qca->txr.skb[qca->txr.tail] = skb; 788 qca->txr.tail = new_tail; 789 790 if (!qcaspi_tx_ring_has_space(&qca->txr)) { 791 netif_stop_queue(qca->net_dev); 792 qca->stats.ring_full++; 793 } 794 795 netif_trans_update(dev); 796 797 if (qca->spi_thread && 798 qca->spi_thread->state != TASK_RUNNING) 799 wake_up_process(qca->spi_thread); 800 801 return NETDEV_TX_OK; 802} 803 804static void 805qcaspi_netdev_tx_timeout(struct net_device *dev, unsigned int txqueue) 806{ 807 struct qcaspi *qca = netdev_priv(dev); 808 809 netdev_info(qca->net_dev, "Transmit timeout at %ld, latency %ld\n", 810 jiffies, jiffies - dev_trans_start(dev)); 811 qca->net_dev->stats.tx_errors++; 812 /* Trigger tx queue flush and QCA7000 reset */ 813 qca->sync = QCASPI_SYNC_UNKNOWN; 814 815 if (qca->spi_thread) 816 wake_up_process(qca->spi_thread); 817} 818 819static int 820qcaspi_netdev_init(struct net_device *dev) 821{ 822 struct qcaspi *qca = netdev_priv(dev); 823 824 dev->mtu = QCAFRM_MAX_MTU; 825 dev->type = ARPHRD_ETHER; 826 qca->clkspeed = qcaspi_clkspeed; 827 qca->burst_len = qcaspi_burst_len; 828 qca->spi_thread = NULL; 829 qca->buffer_size = (dev->mtu + VLAN_ETH_HLEN + QCAFRM_HEADER_LEN + 830 QCAFRM_FOOTER_LEN + 4) * 4; 831 832 memset(&qca->stats, 0, sizeof(struct qcaspi_stats)); 833 834 qca->rx_buffer = kmalloc(qca->buffer_size, GFP_KERNEL); 835 if (!qca->rx_buffer) 836 return -ENOBUFS; 837 838 qca->rx_skb = netdev_alloc_skb_ip_align(dev, qca->net_dev->mtu + 839 VLAN_ETH_HLEN); 840 if (!qca->rx_skb) { 841 kfree(qca->rx_buffer); 842 netdev_info(qca->net_dev, "Failed to allocate RX sk_buff.\n"); 843 return -ENOBUFS; 844 } 845 846 return 0; 847} 848 849static void 850qcaspi_netdev_uninit(struct net_device *dev) 851{ 852 struct qcaspi *qca = netdev_priv(dev); 853 854 kfree(qca->rx_buffer); 855 qca->buffer_size = 0; 856 dev_kfree_skb(qca->rx_skb); 857} 858 859static const struct net_device_ops qcaspi_netdev_ops = { 860 .ndo_init = qcaspi_netdev_init, 861 .ndo_uninit = qcaspi_netdev_uninit, 862 .ndo_open = qcaspi_netdev_open, 863 .ndo_stop = qcaspi_netdev_close, 864 .ndo_start_xmit = qcaspi_netdev_xmit, 865 .ndo_set_mac_address = eth_mac_addr, 866 .ndo_tx_timeout = qcaspi_netdev_tx_timeout, 867 .ndo_validate_addr = eth_validate_addr, 868}; 869 870static void 871qcaspi_netdev_setup(struct net_device *dev) 872{ 873 struct qcaspi *qca = NULL; 874 875 dev->netdev_ops = &qcaspi_netdev_ops; 876 qcaspi_set_ethtool_ops(dev); 877 dev->watchdog_timeo = QCASPI_TX_TIMEOUT; 878 dev->priv_flags &= ~IFF_TX_SKB_SHARING; 879 dev->tx_queue_len = 100; 880 881 /* MTU range: 46 - 1500 */ 882 dev->min_mtu = QCAFRM_MIN_MTU; 883 dev->max_mtu = QCAFRM_MAX_MTU; 884 885 qca = netdev_priv(dev); 886 memset(qca, 0, sizeof(struct qcaspi)); 887 888 memset(&qca->txr, 0, sizeof(qca->txr)); 889 qca->txr.count = TX_RING_MAX_LEN; 890} 891 892static const struct of_device_id qca_spi_of_match[] = { 893 { .compatible = "qca,qca7000" }, 894 { /* sentinel */ } 895}; 896MODULE_DEVICE_TABLE(of, qca_spi_of_match); 897 898static int 899qca_spi_probe(struct spi_device *spi) 900{ 901 struct qcaspi *qca = NULL; 902 struct net_device *qcaspi_devs = NULL; 903 u8 legacy_mode = 0; 904 u16 signature; 905 const char *mac; 906 907 if (!spi->dev.of_node) { 908 dev_err(&spi->dev, "Missing device tree\n"); 909 return -EINVAL; 910 } 911 912 legacy_mode = of_property_read_bool(spi->dev.of_node, 913 "qca,legacy-mode"); 914 915 if (qcaspi_clkspeed == 0) { 916 if (spi->max_speed_hz) 917 qcaspi_clkspeed = spi->max_speed_hz; 918 else 919 qcaspi_clkspeed = QCASPI_CLK_SPEED; 920 } 921 922 if ((qcaspi_clkspeed < QCASPI_CLK_SPEED_MIN) || 923 (qcaspi_clkspeed > QCASPI_CLK_SPEED_MAX)) { 924 dev_err(&spi->dev, "Invalid clkspeed: %d\n", 925 qcaspi_clkspeed); 926 return -EINVAL; 927 } 928 929 if ((qcaspi_burst_len < QCASPI_BURST_LEN_MIN) || 930 (qcaspi_burst_len > QCASPI_BURST_LEN_MAX)) { 931 dev_err(&spi->dev, "Invalid burst len: %d\n", 932 qcaspi_burst_len); 933 return -EINVAL; 934 } 935 936 if ((qcaspi_pluggable < QCASPI_PLUGGABLE_MIN) || 937 (qcaspi_pluggable > QCASPI_PLUGGABLE_MAX)) { 938 dev_err(&spi->dev, "Invalid pluggable: %d\n", 939 qcaspi_pluggable); 940 return -EINVAL; 941 } 942 943 if (wr_verify < QCASPI_WRITE_VERIFY_MIN || 944 wr_verify > QCASPI_WRITE_VERIFY_MAX) { 945 dev_err(&spi->dev, "Invalid write verify: %d\n", 946 wr_verify); 947 return -EINVAL; 948 } 949 950 dev_info(&spi->dev, "ver=%s, clkspeed=%d, burst_len=%d, pluggable=%d\n", 951 QCASPI_DRV_VERSION, 952 qcaspi_clkspeed, 953 qcaspi_burst_len, 954 qcaspi_pluggable); 955 956 spi->mode = SPI_MODE_3; 957 spi->max_speed_hz = qcaspi_clkspeed; 958 if (spi_setup(spi) < 0) { 959 dev_err(&spi->dev, "Unable to setup SPI device\n"); 960 return -EFAULT; 961 } 962 963 qcaspi_devs = alloc_etherdev(sizeof(struct qcaspi)); 964 if (!qcaspi_devs) 965 return -ENOMEM; 966 967 qcaspi_netdev_setup(qcaspi_devs); 968 SET_NETDEV_DEV(qcaspi_devs, &spi->dev); 969 970 qca = netdev_priv(qcaspi_devs); 971 if (!qca) { 972 free_netdev(qcaspi_devs); 973 dev_err(&spi->dev, "Fail to retrieve private structure\n"); 974 return -ENOMEM; 975 } 976 qca->net_dev = qcaspi_devs; 977 qca->spi_dev = spi; 978 qca->legacy_mode = legacy_mode; 979 980 spi_set_drvdata(spi, qcaspi_devs); 981 982 mac = of_get_mac_address(spi->dev.of_node); 983 984 if (!IS_ERR(mac)) 985 ether_addr_copy(qca->net_dev->dev_addr, mac); 986 987 if (!is_valid_ether_addr(qca->net_dev->dev_addr)) { 988 eth_hw_addr_random(qca->net_dev); 989 dev_info(&spi->dev, "Using random MAC address: %pM\n", 990 qca->net_dev->dev_addr); 991 } 992 993 netif_carrier_off(qca->net_dev); 994 995 if (!qcaspi_pluggable) { 996 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 997 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 998 999 if (signature != QCASPI_GOOD_SIGNATURE) { 1000 dev_err(&spi->dev, "Invalid signature (0x%04X)\n", 1001 signature); 1002 free_netdev(qcaspi_devs); 1003 return -EFAULT; 1004 } 1005 } 1006 1007 if (register_netdev(qcaspi_devs)) { 1008 dev_err(&spi->dev, "Unable to register net device %s\n", 1009 qcaspi_devs->name); 1010 free_netdev(qcaspi_devs); 1011 return -EFAULT; 1012 } 1013 1014 qcaspi_init_device_debugfs(qca); 1015 1016 return 0; 1017} 1018 1019static int 1020qca_spi_remove(struct spi_device *spi) 1021{ 1022 struct net_device *qcaspi_devs = spi_get_drvdata(spi); 1023 struct qcaspi *qca = netdev_priv(qcaspi_devs); 1024 1025 qcaspi_remove_device_debugfs(qca); 1026 1027 unregister_netdev(qcaspi_devs); 1028 free_netdev(qcaspi_devs); 1029 1030 return 0; 1031} 1032 1033static const struct spi_device_id qca_spi_id[] = { 1034 { "qca7000", 0 }, 1035 { /* sentinel */ } 1036}; 1037MODULE_DEVICE_TABLE(spi, qca_spi_id); 1038 1039static struct spi_driver qca_spi_driver = { 1040 .driver = { 1041 .name = QCASPI_DRV_NAME, 1042 .of_match_table = qca_spi_of_match, 1043 }, 1044 .id_table = qca_spi_id, 1045 .probe = qca_spi_probe, 1046 .remove = qca_spi_remove, 1047}; 1048module_spi_driver(qca_spi_driver); 1049 1050MODULE_DESCRIPTION("Qualcomm Atheros QCA7000 SPI Driver"); 1051MODULE_AUTHOR("Qualcomm Atheros Communications"); 1052MODULE_AUTHOR("Stefan Wahren <stefan.wahren@i2se.com>"); 1053MODULE_LICENSE("Dual BSD/GPL"); 1054MODULE_VERSION(QCASPI_DRV_VERSION); 1055