1// SPDX-License-Identifier: GPL-2.0 2/* Copyright(c) 2018 Intel Corporation. */ 3 4#include <linux/bpf_trace.h> 5#include <net/xdp_sock_drv.h> 6#include <net/xdp.h> 7 8#include "ixgbe.h" 9#include "ixgbe_txrx_common.h" 10 11struct xsk_buff_pool *ixgbe_xsk_pool(struct ixgbe_adapter *adapter, 12 struct ixgbe_ring *ring) 13{ 14 bool xdp_on = READ_ONCE(adapter->xdp_prog); 15 int qid = ring->ring_idx; 16 17 if (!xdp_on || !test_bit(qid, adapter->af_xdp_zc_qps)) 18 return NULL; 19 20 return xsk_get_pool_from_qid(adapter->netdev, qid); 21} 22 23static int ixgbe_xsk_pool_enable(struct ixgbe_adapter *adapter, 24 struct xsk_buff_pool *pool, 25 u16 qid) 26{ 27 struct net_device *netdev = adapter->netdev; 28 bool if_running; 29 int err; 30 31 if (qid >= adapter->num_rx_queues) 32 return -EINVAL; 33 34 if (qid >= netdev->real_num_rx_queues || 35 qid >= netdev->real_num_tx_queues) 36 return -EINVAL; 37 38 err = xsk_pool_dma_map(pool, &adapter->pdev->dev, IXGBE_RX_DMA_ATTR); 39 if (err) 40 return err; 41 42 if_running = netif_running(adapter->netdev) && 43 ixgbe_enabled_xdp_adapter(adapter); 44 45 if (if_running) 46 ixgbe_txrx_ring_disable(adapter, qid); 47 48 set_bit(qid, adapter->af_xdp_zc_qps); 49 50 if (if_running) { 51 ixgbe_txrx_ring_enable(adapter, qid); 52 53 /* Kick start the NAPI context so that receiving will start */ 54 err = ixgbe_xsk_wakeup(adapter->netdev, qid, XDP_WAKEUP_RX); 55 if (err) { 56 clear_bit(qid, adapter->af_xdp_zc_qps); 57 xsk_pool_dma_unmap(pool, IXGBE_RX_DMA_ATTR); 58 return err; 59 } 60 } 61 62 return 0; 63} 64 65static int ixgbe_xsk_pool_disable(struct ixgbe_adapter *adapter, u16 qid) 66{ 67 struct xsk_buff_pool *pool; 68 bool if_running; 69 70 pool = xsk_get_pool_from_qid(adapter->netdev, qid); 71 if (!pool) 72 return -EINVAL; 73 74 if_running = netif_running(adapter->netdev) && 75 ixgbe_enabled_xdp_adapter(adapter); 76 77 if (if_running) 78 ixgbe_txrx_ring_disable(adapter, qid); 79 80 clear_bit(qid, adapter->af_xdp_zc_qps); 81 xsk_pool_dma_unmap(pool, IXGBE_RX_DMA_ATTR); 82 83 if (if_running) 84 ixgbe_txrx_ring_enable(adapter, qid); 85 86 return 0; 87} 88 89int ixgbe_xsk_pool_setup(struct ixgbe_adapter *adapter, 90 struct xsk_buff_pool *pool, 91 u16 qid) 92{ 93 return pool ? ixgbe_xsk_pool_enable(adapter, pool, qid) : 94 ixgbe_xsk_pool_disable(adapter, qid); 95} 96 97static int ixgbe_run_xdp_zc(struct ixgbe_adapter *adapter, 98 struct ixgbe_ring *rx_ring, 99 struct xdp_buff *xdp) 100{ 101 int err, result = IXGBE_XDP_PASS; 102 struct bpf_prog *xdp_prog; 103 struct xdp_frame *xdpf; 104 u32 act; 105 106 rcu_read_lock(); 107 xdp_prog = READ_ONCE(rx_ring->xdp_prog); 108 act = bpf_prog_run_xdp(xdp_prog, xdp); 109 110 if (likely(act == XDP_REDIRECT)) { 111 err = xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog); 112 if (err) 113 goto out_failure; 114 rcu_read_unlock(); 115 return IXGBE_XDP_REDIR; 116 } 117 118 switch (act) { 119 case XDP_PASS: 120 break; 121 case XDP_TX: 122 xdpf = xdp_convert_buff_to_frame(xdp); 123 if (unlikely(!xdpf)) 124 goto out_failure; 125 result = ixgbe_xmit_xdp_ring(adapter, xdpf); 126 if (result == IXGBE_XDP_CONSUMED) 127 goto out_failure; 128 break; 129 default: 130 bpf_warn_invalid_xdp_action(act); 131 fallthrough; 132 case XDP_ABORTED: 133out_failure: 134 trace_xdp_exception(rx_ring->netdev, xdp_prog, act); 135 fallthrough; /* handle aborts by dropping packet */ 136 case XDP_DROP: 137 result = IXGBE_XDP_CONSUMED; 138 break; 139 } 140 rcu_read_unlock(); 141 return result; 142} 143 144bool ixgbe_alloc_rx_buffers_zc(struct ixgbe_ring *rx_ring, u16 count) 145{ 146 union ixgbe_adv_rx_desc *rx_desc; 147 struct ixgbe_rx_buffer *bi; 148 u16 i = rx_ring->next_to_use; 149 dma_addr_t dma; 150 bool ok = true; 151 152 /* nothing to do */ 153 if (!count) 154 return true; 155 156 rx_desc = IXGBE_RX_DESC(rx_ring, i); 157 bi = &rx_ring->rx_buffer_info[i]; 158 i -= rx_ring->count; 159 160 do { 161 bi->xdp = xsk_buff_alloc(rx_ring->xsk_pool); 162 if (!bi->xdp) { 163 ok = false; 164 break; 165 } 166 167 dma = xsk_buff_xdp_get_dma(bi->xdp); 168 169 /* Refresh the desc even if buffer_addrs didn't change 170 * because each write-back erases this info. 171 */ 172 rx_desc->read.pkt_addr = cpu_to_le64(dma); 173 174 rx_desc++; 175 bi++; 176 i++; 177 if (unlikely(!i)) { 178 rx_desc = IXGBE_RX_DESC(rx_ring, 0); 179 bi = rx_ring->rx_buffer_info; 180 i -= rx_ring->count; 181 } 182 183 /* clear the length for the next_to_use descriptor */ 184 rx_desc->wb.upper.length = 0; 185 186 count--; 187 } while (count); 188 189 i += rx_ring->count; 190 191 if (rx_ring->next_to_use != i) { 192 rx_ring->next_to_use = i; 193 194 /* Force memory writes to complete before letting h/w 195 * know there are new descriptors to fetch. (Only 196 * applicable for weak-ordered memory model archs, 197 * such as IA-64). 198 */ 199 wmb(); 200 writel(i, rx_ring->tail); 201 } 202 203 return ok; 204} 205 206static struct sk_buff *ixgbe_construct_skb_zc(struct ixgbe_ring *rx_ring, 207 struct ixgbe_rx_buffer *bi) 208{ 209 unsigned int metasize = bi->xdp->data - bi->xdp->data_meta; 210 unsigned int datasize = bi->xdp->data_end - bi->xdp->data; 211 struct sk_buff *skb; 212 213 /* allocate a skb to store the frags */ 214 skb = __napi_alloc_skb(&rx_ring->q_vector->napi, 215 bi->xdp->data_end - bi->xdp->data_hard_start, 216 GFP_ATOMIC | __GFP_NOWARN); 217 if (unlikely(!skb)) 218 return NULL; 219 220 skb_reserve(skb, bi->xdp->data - bi->xdp->data_hard_start); 221 memcpy(__skb_put(skb, datasize), bi->xdp->data, datasize); 222 if (metasize) 223 skb_metadata_set(skb, metasize); 224 225 xsk_buff_free(bi->xdp); 226 bi->xdp = NULL; 227 return skb; 228} 229 230static void ixgbe_inc_ntc(struct ixgbe_ring *rx_ring) 231{ 232 u32 ntc = rx_ring->next_to_clean + 1; 233 234 ntc = (ntc < rx_ring->count) ? ntc : 0; 235 rx_ring->next_to_clean = ntc; 236 prefetch(IXGBE_RX_DESC(rx_ring, ntc)); 237} 238 239int ixgbe_clean_rx_irq_zc(struct ixgbe_q_vector *q_vector, 240 struct ixgbe_ring *rx_ring, 241 const int budget) 242{ 243 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 244 struct ixgbe_adapter *adapter = q_vector->adapter; 245 u16 cleaned_count = ixgbe_desc_unused(rx_ring); 246 unsigned int xdp_res, xdp_xmit = 0; 247 bool failure = false; 248 struct sk_buff *skb; 249 250 while (likely(total_rx_packets < budget)) { 251 union ixgbe_adv_rx_desc *rx_desc; 252 struct ixgbe_rx_buffer *bi; 253 unsigned int size; 254 255 /* return some buffers to hardware, one at a time is too slow */ 256 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) { 257 failure = failure || 258 !ixgbe_alloc_rx_buffers_zc(rx_ring, 259 cleaned_count); 260 cleaned_count = 0; 261 } 262 263 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean); 264 size = le16_to_cpu(rx_desc->wb.upper.length); 265 if (!size) 266 break; 267 268 /* This memory barrier is needed to keep us from reading 269 * any other fields out of the rx_desc until we know the 270 * descriptor has been written back 271 */ 272 dma_rmb(); 273 274 bi = &rx_ring->rx_buffer_info[rx_ring->next_to_clean]; 275 276 if (unlikely(!ixgbe_test_staterr(rx_desc, 277 IXGBE_RXD_STAT_EOP))) { 278 struct ixgbe_rx_buffer *next_bi; 279 280 xsk_buff_free(bi->xdp); 281 bi->xdp = NULL; 282 ixgbe_inc_ntc(rx_ring); 283 next_bi = 284 &rx_ring->rx_buffer_info[rx_ring->next_to_clean]; 285 next_bi->discard = true; 286 continue; 287 } 288 289 if (unlikely(bi->discard)) { 290 xsk_buff_free(bi->xdp); 291 bi->xdp = NULL; 292 bi->discard = false; 293 ixgbe_inc_ntc(rx_ring); 294 continue; 295 } 296 297 bi->xdp->data_end = bi->xdp->data + size; 298 xsk_buff_dma_sync_for_cpu(bi->xdp, rx_ring->xsk_pool); 299 xdp_res = ixgbe_run_xdp_zc(adapter, rx_ring, bi->xdp); 300 301 if (xdp_res) { 302 if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) 303 xdp_xmit |= xdp_res; 304 else 305 xsk_buff_free(bi->xdp); 306 307 bi->xdp = NULL; 308 total_rx_packets++; 309 total_rx_bytes += size; 310 311 cleaned_count++; 312 ixgbe_inc_ntc(rx_ring); 313 continue; 314 } 315 316 /* XDP_PASS path */ 317 skb = ixgbe_construct_skb_zc(rx_ring, bi); 318 if (!skb) { 319 rx_ring->rx_stats.alloc_rx_buff_failed++; 320 break; 321 } 322 323 cleaned_count++; 324 ixgbe_inc_ntc(rx_ring); 325 326 if (eth_skb_pad(skb)) 327 continue; 328 329 total_rx_bytes += skb->len; 330 total_rx_packets++; 331 332 ixgbe_process_skb_fields(rx_ring, rx_desc, skb); 333 ixgbe_rx_skb(q_vector, skb); 334 } 335 336 if (xdp_xmit & IXGBE_XDP_REDIR) 337 xdp_do_flush_map(); 338 339 if (xdp_xmit & IXGBE_XDP_TX) { 340 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()]; 341 342 /* Force memory writes to complete before letting h/w 343 * know there are new descriptors to fetch. 344 */ 345 wmb(); 346 writel(ring->next_to_use, ring->tail); 347 } 348 349 u64_stats_update_begin(&rx_ring->syncp); 350 rx_ring->stats.packets += total_rx_packets; 351 rx_ring->stats.bytes += total_rx_bytes; 352 u64_stats_update_end(&rx_ring->syncp); 353 q_vector->rx.total_packets += total_rx_packets; 354 q_vector->rx.total_bytes += total_rx_bytes; 355 356 if (xsk_uses_need_wakeup(rx_ring->xsk_pool)) { 357 if (failure || rx_ring->next_to_clean == rx_ring->next_to_use) 358 xsk_set_rx_need_wakeup(rx_ring->xsk_pool); 359 else 360 xsk_clear_rx_need_wakeup(rx_ring->xsk_pool); 361 362 return (int)total_rx_packets; 363 } 364 return failure ? budget : (int)total_rx_packets; 365} 366 367void ixgbe_xsk_clean_rx_ring(struct ixgbe_ring *rx_ring) 368{ 369 struct ixgbe_rx_buffer *bi; 370 u16 i; 371 372 for (i = 0; i < rx_ring->count; i++) { 373 bi = &rx_ring->rx_buffer_info[i]; 374 375 if (!bi->xdp) 376 continue; 377 378 xsk_buff_free(bi->xdp); 379 bi->xdp = NULL; 380 } 381} 382 383static bool ixgbe_xmit_zc(struct ixgbe_ring *xdp_ring, unsigned int budget) 384{ 385 struct xsk_buff_pool *pool = xdp_ring->xsk_pool; 386 union ixgbe_adv_tx_desc *tx_desc = NULL; 387 struct ixgbe_tx_buffer *tx_bi; 388 bool work_done = true; 389 struct xdp_desc desc; 390 dma_addr_t dma; 391 u32 cmd_type; 392 393 while (budget-- > 0) { 394 if (unlikely(!ixgbe_desc_unused(xdp_ring))) { 395 work_done = false; 396 break; 397 } 398 399 if (!netif_carrier_ok(xdp_ring->netdev)) 400 break; 401 402 if (!xsk_tx_peek_desc(pool, &desc)) 403 break; 404 405 dma = xsk_buff_raw_get_dma(pool, desc.addr); 406 xsk_buff_raw_dma_sync_for_device(pool, dma, desc.len); 407 408 tx_bi = &xdp_ring->tx_buffer_info[xdp_ring->next_to_use]; 409 tx_bi->bytecount = desc.len; 410 tx_bi->xdpf = NULL; 411 tx_bi->gso_segs = 1; 412 413 tx_desc = IXGBE_TX_DESC(xdp_ring, xdp_ring->next_to_use); 414 tx_desc->read.buffer_addr = cpu_to_le64(dma); 415 416 /* put descriptor type bits */ 417 cmd_type = IXGBE_ADVTXD_DTYP_DATA | 418 IXGBE_ADVTXD_DCMD_DEXT | 419 IXGBE_ADVTXD_DCMD_IFCS; 420 cmd_type |= desc.len | IXGBE_TXD_CMD; 421 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type); 422 tx_desc->read.olinfo_status = 423 cpu_to_le32(desc.len << IXGBE_ADVTXD_PAYLEN_SHIFT); 424 425 xdp_ring->next_to_use++; 426 if (xdp_ring->next_to_use == xdp_ring->count) 427 xdp_ring->next_to_use = 0; 428 } 429 430 if (tx_desc) { 431 ixgbe_xdp_ring_update_tail(xdp_ring); 432 xsk_tx_release(pool); 433 } 434 435 return !!budget && work_done; 436} 437 438static void ixgbe_clean_xdp_tx_buffer(struct ixgbe_ring *tx_ring, 439 struct ixgbe_tx_buffer *tx_bi) 440{ 441 xdp_return_frame(tx_bi->xdpf); 442 dma_unmap_single(tx_ring->dev, 443 dma_unmap_addr(tx_bi, dma), 444 dma_unmap_len(tx_bi, len), DMA_TO_DEVICE); 445 dma_unmap_len_set(tx_bi, len, 0); 446} 447 448bool ixgbe_clean_xdp_tx_irq(struct ixgbe_q_vector *q_vector, 449 struct ixgbe_ring *tx_ring, int napi_budget) 450{ 451 u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use; 452 unsigned int total_packets = 0, total_bytes = 0; 453 struct xsk_buff_pool *pool = tx_ring->xsk_pool; 454 union ixgbe_adv_tx_desc *tx_desc; 455 struct ixgbe_tx_buffer *tx_bi; 456 u32 xsk_frames = 0; 457 458 tx_bi = &tx_ring->tx_buffer_info[ntc]; 459 tx_desc = IXGBE_TX_DESC(tx_ring, ntc); 460 461 while (ntc != ntu) { 462 if (!(tx_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD))) 463 break; 464 465 total_bytes += tx_bi->bytecount; 466 total_packets += tx_bi->gso_segs; 467 468 if (tx_bi->xdpf) 469 ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi); 470 else 471 xsk_frames++; 472 473 tx_bi->xdpf = NULL; 474 475 tx_bi++; 476 tx_desc++; 477 ntc++; 478 if (unlikely(ntc == tx_ring->count)) { 479 ntc = 0; 480 tx_bi = tx_ring->tx_buffer_info; 481 tx_desc = IXGBE_TX_DESC(tx_ring, 0); 482 } 483 484 /* issue prefetch for next Tx descriptor */ 485 prefetch(tx_desc); 486 } 487 488 tx_ring->next_to_clean = ntc; 489 490 u64_stats_update_begin(&tx_ring->syncp); 491 tx_ring->stats.bytes += total_bytes; 492 tx_ring->stats.packets += total_packets; 493 u64_stats_update_end(&tx_ring->syncp); 494 q_vector->tx.total_bytes += total_bytes; 495 q_vector->tx.total_packets += total_packets; 496 497 if (xsk_frames) 498 xsk_tx_completed(pool, xsk_frames); 499 500 if (xsk_uses_need_wakeup(pool)) 501 xsk_set_tx_need_wakeup(pool); 502 503 return ixgbe_xmit_zc(tx_ring, q_vector->tx.work_limit); 504} 505 506int ixgbe_xsk_wakeup(struct net_device *dev, u32 qid, u32 flags) 507{ 508 struct ixgbe_adapter *adapter = netdev_priv(dev); 509 struct ixgbe_ring *ring; 510 511 if (test_bit(__IXGBE_DOWN, &adapter->state)) 512 return -ENETDOWN; 513 514 if (!READ_ONCE(adapter->xdp_prog)) 515 return -ENXIO; 516 517 if (qid >= adapter->num_xdp_queues) 518 return -ENXIO; 519 520 ring = adapter->xdp_ring[qid]; 521 522 if (test_bit(__IXGBE_TX_DISABLED, &ring->state)) 523 return -ENETDOWN; 524 525 if (!ring->xsk_pool) 526 return -ENXIO; 527 528 if (!napi_if_scheduled_mark_missed(&ring->q_vector->napi)) { 529 u64 eics = BIT_ULL(ring->q_vector->v_idx); 530 531 ixgbe_irq_rearm_queues(adapter, eics); 532 } 533 534 return 0; 535} 536 537void ixgbe_xsk_clean_tx_ring(struct ixgbe_ring *tx_ring) 538{ 539 u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use; 540 struct xsk_buff_pool *pool = tx_ring->xsk_pool; 541 struct ixgbe_tx_buffer *tx_bi; 542 u32 xsk_frames = 0; 543 544 while (ntc != ntu) { 545 tx_bi = &tx_ring->tx_buffer_info[ntc]; 546 547 if (tx_bi->xdpf) 548 ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi); 549 else 550 xsk_frames++; 551 552 tx_bi->xdpf = NULL; 553 554 ntc++; 555 if (ntc == tx_ring->count) 556 ntc = 0; 557 } 558 559 if (xsk_frames) 560 xsk_tx_completed(pool, xsk_frames); 561} 562