18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 28c2ecf20Sopenharmony_ci/* Copyright(c) 2013 - 2018 Intel Corporation. */ 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ci#ifndef _I40E_ALLOC_H_ 58c2ecf20Sopenharmony_ci#define _I40E_ALLOC_H_ 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_cistruct i40e_hw; 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci/* Memory allocation types */ 108c2ecf20Sopenharmony_cienum i40e_memory_type { 118c2ecf20Sopenharmony_ci i40e_mem_arq_buf = 0, /* ARQ indirect command buffer */ 128c2ecf20Sopenharmony_ci i40e_mem_asq_buf = 1, 138c2ecf20Sopenharmony_ci i40e_mem_atq_buf = 2, /* ATQ indirect command buffer */ 148c2ecf20Sopenharmony_ci i40e_mem_arq_ring = 3, /* ARQ descriptor ring */ 158c2ecf20Sopenharmony_ci i40e_mem_atq_ring = 4, /* ATQ descriptor ring */ 168c2ecf20Sopenharmony_ci i40e_mem_pd = 5, /* Page Descriptor */ 178c2ecf20Sopenharmony_ci i40e_mem_bp = 6, /* Backing Page - 4KB */ 188c2ecf20Sopenharmony_ci i40e_mem_bp_jumbo = 7, /* Backing Page - > 4KB */ 198c2ecf20Sopenharmony_ci i40e_mem_reserved 208c2ecf20Sopenharmony_ci}; 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ci/* prototype for functions used for dynamic memory allocation */ 238c2ecf20Sopenharmony_ciint i40e_allocate_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem, 248c2ecf20Sopenharmony_ci enum i40e_memory_type type, u64 size, u32 alignment); 258c2ecf20Sopenharmony_ciint i40e_free_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem); 268c2ecf20Sopenharmony_ciint i40e_allocate_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem, 278c2ecf20Sopenharmony_ci u32 size); 288c2ecf20Sopenharmony_ciint i40e_free_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem); 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci#endif /* _I40E_ALLOC_H_ */ 31