1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2/* Copyright 2017-2019 NXP */ 3 4#include <linux/mdio.h> 5#include <linux/module.h> 6#include <linux/fsl/enetc_mdio.h> 7#include <linux/of_mdio.h> 8#include <linux/of_net.h> 9#include "enetc_pf.h" 10 11#define ENETC_DRV_NAME_STR "ENETC PF driver" 12 13static void enetc_pf_get_primary_mac_addr(struct enetc_hw *hw, int si, u8 *addr) 14{ 15 u32 upper = __raw_readl(hw->port + ENETC_PSIPMAR0(si)); 16 u16 lower = __raw_readw(hw->port + ENETC_PSIPMAR1(si)); 17 18 *(u32 *)addr = upper; 19 *(u16 *)(addr + 4) = lower; 20} 21 22static void enetc_pf_set_primary_mac_addr(struct enetc_hw *hw, int si, 23 const u8 *addr) 24{ 25 u32 upper = *(const u32 *)addr; 26 u16 lower = *(const u16 *)(addr + 4); 27 28 __raw_writel(upper, hw->port + ENETC_PSIPMAR0(si)); 29 __raw_writew(lower, hw->port + ENETC_PSIPMAR1(si)); 30} 31 32static int enetc_pf_set_mac_addr(struct net_device *ndev, void *addr) 33{ 34 struct enetc_ndev_priv *priv = netdev_priv(ndev); 35 struct sockaddr *saddr = addr; 36 37 if (!is_valid_ether_addr(saddr->sa_data)) 38 return -EADDRNOTAVAIL; 39 40 memcpy(ndev->dev_addr, saddr->sa_data, ndev->addr_len); 41 enetc_pf_set_primary_mac_addr(&priv->si->hw, 0, saddr->sa_data); 42 43 return 0; 44} 45 46static void enetc_set_vlan_promisc(struct enetc_hw *hw, char si_map) 47{ 48 u32 val = enetc_port_rd(hw, ENETC_PSIPVMR); 49 50 val &= ~ENETC_PSIPVMR_SET_VP(ENETC_VLAN_PROMISC_MAP_ALL); 51 enetc_port_wr(hw, ENETC_PSIPVMR, ENETC_PSIPVMR_SET_VP(si_map) | val); 52} 53 54static void enetc_enable_si_vlan_promisc(struct enetc_pf *pf, int si_idx) 55{ 56 pf->vlan_promisc_simap |= BIT(si_idx); 57 enetc_set_vlan_promisc(&pf->si->hw, pf->vlan_promisc_simap); 58} 59 60static void enetc_disable_si_vlan_promisc(struct enetc_pf *pf, int si_idx) 61{ 62 pf->vlan_promisc_simap &= ~BIT(si_idx); 63 enetc_set_vlan_promisc(&pf->si->hw, pf->vlan_promisc_simap); 64} 65 66static void enetc_set_isol_vlan(struct enetc_hw *hw, int si, u16 vlan, u8 qos) 67{ 68 u32 val = 0; 69 70 if (vlan) 71 val = ENETC_PSIVLAN_EN | ENETC_PSIVLAN_SET_QOS(qos) | vlan; 72 73 enetc_port_wr(hw, ENETC_PSIVLANR(si), val); 74} 75 76static int enetc_mac_addr_hash_idx(const u8 *addr) 77{ 78 u64 fold = __swab64(ether_addr_to_u64(addr)) >> 16; 79 u64 mask = 0; 80 int res = 0; 81 int i; 82 83 for (i = 0; i < 8; i++) 84 mask |= BIT_ULL(i * 6); 85 86 for (i = 0; i < 6; i++) 87 res |= (hweight64(fold & (mask << i)) & 0x1) << i; 88 89 return res; 90} 91 92static void enetc_reset_mac_addr_filter(struct enetc_mac_filter *filter) 93{ 94 filter->mac_addr_cnt = 0; 95 96 bitmap_zero(filter->mac_hash_table, 97 ENETC_MADDR_HASH_TBL_SZ); 98} 99 100static void enetc_add_mac_addr_em_filter(struct enetc_mac_filter *filter, 101 const unsigned char *addr) 102{ 103 /* add exact match addr */ 104 ether_addr_copy(filter->mac_addr, addr); 105 filter->mac_addr_cnt++; 106} 107 108static void enetc_add_mac_addr_ht_filter(struct enetc_mac_filter *filter, 109 const unsigned char *addr) 110{ 111 int idx = enetc_mac_addr_hash_idx(addr); 112 113 /* add hash table entry */ 114 __set_bit(idx, filter->mac_hash_table); 115 filter->mac_addr_cnt++; 116} 117 118static void enetc_clear_mac_ht_flt(struct enetc_si *si, int si_idx, int type) 119{ 120 bool err = si->errata & ENETC_ERR_UCMCSWP; 121 122 if (type == UC) { 123 enetc_port_wr(&si->hw, ENETC_PSIUMHFR0(si_idx, err), 0); 124 enetc_port_wr(&si->hw, ENETC_PSIUMHFR1(si_idx), 0); 125 } else { /* MC */ 126 enetc_port_wr(&si->hw, ENETC_PSIMMHFR0(si_idx, err), 0); 127 enetc_port_wr(&si->hw, ENETC_PSIMMHFR1(si_idx), 0); 128 } 129} 130 131static void enetc_set_mac_ht_flt(struct enetc_si *si, int si_idx, int type, 132 u32 *hash) 133{ 134 bool err = si->errata & ENETC_ERR_UCMCSWP; 135 136 if (type == UC) { 137 enetc_port_wr(&si->hw, ENETC_PSIUMHFR0(si_idx, err), *hash); 138 enetc_port_wr(&si->hw, ENETC_PSIUMHFR1(si_idx), *(hash + 1)); 139 } else { /* MC */ 140 enetc_port_wr(&si->hw, ENETC_PSIMMHFR0(si_idx, err), *hash); 141 enetc_port_wr(&si->hw, ENETC_PSIMMHFR1(si_idx), *(hash + 1)); 142 } 143} 144 145static void enetc_sync_mac_filters(struct enetc_pf *pf) 146{ 147 struct enetc_mac_filter *f = pf->mac_filter; 148 struct enetc_si *si = pf->si; 149 int i, pos; 150 151 pos = EMETC_MAC_ADDR_FILT_RES; 152 153 for (i = 0; i < MADDR_TYPE; i++, f++) { 154 bool em = (f->mac_addr_cnt == 1) && (i == UC); 155 bool clear = !f->mac_addr_cnt; 156 157 if (clear) { 158 if (i == UC) 159 enetc_clear_mac_flt_entry(si, pos); 160 161 enetc_clear_mac_ht_flt(si, 0, i); 162 continue; 163 } 164 165 /* exact match filter */ 166 if (em) { 167 int err; 168 169 enetc_clear_mac_ht_flt(si, 0, UC); 170 171 err = enetc_set_mac_flt_entry(si, pos, f->mac_addr, 172 BIT(0)); 173 if (!err) 174 continue; 175 176 /* fallback to HT filtering */ 177 dev_warn(&si->pdev->dev, "fallback to HT filt (%d)\n", 178 err); 179 } 180 181 /* hash table filter, clear EM filter for UC entries */ 182 if (i == UC) 183 enetc_clear_mac_flt_entry(si, pos); 184 185 enetc_set_mac_ht_flt(si, 0, i, (u32 *)f->mac_hash_table); 186 } 187} 188 189static void enetc_pf_set_rx_mode(struct net_device *ndev) 190{ 191 struct enetc_ndev_priv *priv = netdev_priv(ndev); 192 struct enetc_pf *pf = enetc_si_priv(priv->si); 193 struct enetc_hw *hw = &priv->si->hw; 194 bool uprom = false, mprom = false; 195 struct enetc_mac_filter *filter; 196 struct netdev_hw_addr *ha; 197 u32 psipmr = 0; 198 bool em; 199 200 if (ndev->flags & IFF_PROMISC) { 201 /* enable promisc mode for SI0 (PF) */ 202 psipmr = ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0); 203 uprom = true; 204 mprom = true; 205 } else if (ndev->flags & IFF_ALLMULTI) { 206 /* enable multi cast promisc mode for SI0 (PF) */ 207 psipmr = ENETC_PSIPMR_SET_MP(0); 208 mprom = true; 209 } 210 211 /* first 2 filter entries belong to PF */ 212 if (!uprom) { 213 /* Update unicast filters */ 214 filter = &pf->mac_filter[UC]; 215 enetc_reset_mac_addr_filter(filter); 216 217 em = (netdev_uc_count(ndev) == 1); 218 netdev_for_each_uc_addr(ha, ndev) { 219 if (em) { 220 enetc_add_mac_addr_em_filter(filter, ha->addr); 221 break; 222 } 223 224 enetc_add_mac_addr_ht_filter(filter, ha->addr); 225 } 226 } 227 228 if (!mprom) { 229 /* Update multicast filters */ 230 filter = &pf->mac_filter[MC]; 231 enetc_reset_mac_addr_filter(filter); 232 233 netdev_for_each_mc_addr(ha, ndev) { 234 if (!is_multicast_ether_addr(ha->addr)) 235 continue; 236 237 enetc_add_mac_addr_ht_filter(filter, ha->addr); 238 } 239 } 240 241 if (!uprom || !mprom) 242 /* update PF entries */ 243 enetc_sync_mac_filters(pf); 244 245 psipmr |= enetc_port_rd(hw, ENETC_PSIPMR) & 246 ~(ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0)); 247 enetc_port_wr(hw, ENETC_PSIPMR, psipmr); 248} 249 250static void enetc_set_vlan_ht_filter(struct enetc_hw *hw, int si_idx, 251 u32 *hash) 252{ 253 enetc_port_wr(hw, ENETC_PSIVHFR0(si_idx), *hash); 254 enetc_port_wr(hw, ENETC_PSIVHFR1(si_idx), *(hash + 1)); 255} 256 257static int enetc_vid_hash_idx(unsigned int vid) 258{ 259 int res = 0; 260 int i; 261 262 for (i = 0; i < 6; i++) 263 res |= (hweight8(vid & (BIT(i) | BIT(i + 6))) & 0x1) << i; 264 265 return res; 266} 267 268static void enetc_sync_vlan_ht_filter(struct enetc_pf *pf, bool rehash) 269{ 270 int i; 271 272 if (rehash) { 273 bitmap_zero(pf->vlan_ht_filter, ENETC_VLAN_HT_SIZE); 274 275 for_each_set_bit(i, pf->active_vlans, VLAN_N_VID) { 276 int hidx = enetc_vid_hash_idx(i); 277 278 __set_bit(hidx, pf->vlan_ht_filter); 279 } 280 } 281 282 enetc_set_vlan_ht_filter(&pf->si->hw, 0, (u32 *)pf->vlan_ht_filter); 283} 284 285static int enetc_vlan_rx_add_vid(struct net_device *ndev, __be16 prot, u16 vid) 286{ 287 struct enetc_ndev_priv *priv = netdev_priv(ndev); 288 struct enetc_pf *pf = enetc_si_priv(priv->si); 289 int idx; 290 291 __set_bit(vid, pf->active_vlans); 292 293 idx = enetc_vid_hash_idx(vid); 294 if (!__test_and_set_bit(idx, pf->vlan_ht_filter)) 295 enetc_sync_vlan_ht_filter(pf, false); 296 297 return 0; 298} 299 300static int enetc_vlan_rx_del_vid(struct net_device *ndev, __be16 prot, u16 vid) 301{ 302 struct enetc_ndev_priv *priv = netdev_priv(ndev); 303 struct enetc_pf *pf = enetc_si_priv(priv->si); 304 305 __clear_bit(vid, pf->active_vlans); 306 enetc_sync_vlan_ht_filter(pf, true); 307 308 return 0; 309} 310 311static void enetc_set_loopback(struct net_device *ndev, bool en) 312{ 313 struct enetc_ndev_priv *priv = netdev_priv(ndev); 314 struct enetc_hw *hw = &priv->si->hw; 315 u32 reg; 316 317 reg = enetc_port_rd(hw, ENETC_PM0_IF_MODE); 318 if (reg & ENETC_PM0_IFM_RG) { 319 /* RGMII mode */ 320 reg = (reg & ~ENETC_PM0_IFM_RLP) | 321 (en ? ENETC_PM0_IFM_RLP : 0); 322 enetc_port_wr(hw, ENETC_PM0_IF_MODE, reg); 323 } else { 324 /* assume SGMII mode */ 325 reg = enetc_port_rd(hw, ENETC_PM0_CMD_CFG); 326 reg = (reg & ~ENETC_PM0_CMD_XGLP) | 327 (en ? ENETC_PM0_CMD_XGLP : 0); 328 reg = (reg & ~ENETC_PM0_CMD_PHY_TX_EN) | 329 (en ? ENETC_PM0_CMD_PHY_TX_EN : 0); 330 enetc_port_wr(hw, ENETC_PM0_CMD_CFG, reg); 331 enetc_port_wr(hw, ENETC_PM1_CMD_CFG, reg); 332 } 333} 334 335static int enetc_pf_set_vf_mac(struct net_device *ndev, int vf, u8 *mac) 336{ 337 struct enetc_ndev_priv *priv = netdev_priv(ndev); 338 struct enetc_pf *pf = enetc_si_priv(priv->si); 339 struct enetc_vf_state *vf_state; 340 341 if (vf >= pf->total_vfs) 342 return -EINVAL; 343 344 if (!is_valid_ether_addr(mac)) 345 return -EADDRNOTAVAIL; 346 347 vf_state = &pf->vf_state[vf]; 348 vf_state->flags |= ENETC_VF_FLAG_PF_SET_MAC; 349 enetc_pf_set_primary_mac_addr(&priv->si->hw, vf + 1, mac); 350 return 0; 351} 352 353static int enetc_pf_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, 354 u8 qos, __be16 proto) 355{ 356 struct enetc_ndev_priv *priv = netdev_priv(ndev); 357 struct enetc_pf *pf = enetc_si_priv(priv->si); 358 359 if (priv->si->errata & ENETC_ERR_VLAN_ISOL) 360 return -EOPNOTSUPP; 361 362 if (vf >= pf->total_vfs) 363 return -EINVAL; 364 365 if (proto != htons(ETH_P_8021Q)) 366 /* only C-tags supported for now */ 367 return -EPROTONOSUPPORT; 368 369 enetc_set_isol_vlan(&priv->si->hw, vf + 1, vlan, qos); 370 return 0; 371} 372 373static int enetc_pf_set_vf_spoofchk(struct net_device *ndev, int vf, bool en) 374{ 375 struct enetc_ndev_priv *priv = netdev_priv(ndev); 376 struct enetc_pf *pf = enetc_si_priv(priv->si); 377 u32 cfgr; 378 379 if (vf >= pf->total_vfs) 380 return -EINVAL; 381 382 cfgr = enetc_port_rd(&priv->si->hw, ENETC_PSICFGR0(vf + 1)); 383 cfgr = (cfgr & ~ENETC_PSICFGR0_ASE) | (en ? ENETC_PSICFGR0_ASE : 0); 384 enetc_port_wr(&priv->si->hw, ENETC_PSICFGR0(vf + 1), cfgr); 385 386 return 0; 387} 388 389static void enetc_port_setup_primary_mac_address(struct enetc_si *si) 390{ 391 unsigned char mac_addr[MAX_ADDR_LEN]; 392 struct enetc_pf *pf = enetc_si_priv(si); 393 struct enetc_hw *hw = &si->hw; 394 int i; 395 396 /* check MAC addresses for PF and all VFs, if any is 0 set it ro rand */ 397 for (i = 0; i < pf->total_vfs + 1; i++) { 398 enetc_pf_get_primary_mac_addr(hw, i, mac_addr); 399 if (!is_zero_ether_addr(mac_addr)) 400 continue; 401 eth_random_addr(mac_addr); 402 dev_info(&si->pdev->dev, "no MAC address specified for SI%d, using %pM\n", 403 i, mac_addr); 404 enetc_pf_set_primary_mac_addr(hw, i, mac_addr); 405 } 406} 407 408static void enetc_port_assign_rfs_entries(struct enetc_si *si) 409{ 410 struct enetc_pf *pf = enetc_si_priv(si); 411 struct enetc_hw *hw = &si->hw; 412 int num_entries, vf_entries, i; 413 u32 val; 414 415 /* split RFS entries between functions */ 416 val = enetc_port_rd(hw, ENETC_PRFSCAPR); 417 num_entries = ENETC_PRFSCAPR_GET_NUM_RFS(val); 418 vf_entries = num_entries / (pf->total_vfs + 1); 419 420 for (i = 0; i < pf->total_vfs; i++) 421 enetc_port_wr(hw, ENETC_PSIRFSCFGR(i + 1), vf_entries); 422 enetc_port_wr(hw, ENETC_PSIRFSCFGR(0), 423 num_entries - vf_entries * pf->total_vfs); 424 425 /* enable RFS on port */ 426 enetc_port_wr(hw, ENETC_PRFSMR, ENETC_PRFSMR_RFSE); 427} 428 429static void enetc_port_si_configure(struct enetc_si *si) 430{ 431 struct enetc_pf *pf = enetc_si_priv(si); 432 struct enetc_hw *hw = &si->hw; 433 int num_rings, i; 434 u32 val; 435 436 val = enetc_port_rd(hw, ENETC_PCAPR0); 437 num_rings = min(ENETC_PCAPR0_RXBDR(val), ENETC_PCAPR0_TXBDR(val)); 438 439 val = ENETC_PSICFGR0_SET_TXBDR(ENETC_PF_NUM_RINGS); 440 val |= ENETC_PSICFGR0_SET_RXBDR(ENETC_PF_NUM_RINGS); 441 442 if (unlikely(num_rings < ENETC_PF_NUM_RINGS)) { 443 val = ENETC_PSICFGR0_SET_TXBDR(num_rings); 444 val |= ENETC_PSICFGR0_SET_RXBDR(num_rings); 445 446 dev_warn(&si->pdev->dev, "Found %d rings, expected %d!\n", 447 num_rings, ENETC_PF_NUM_RINGS); 448 449 num_rings = 0; 450 } 451 452 /* Add default one-time settings for SI0 (PF) */ 453 val |= ENETC_PSICFGR0_SIVC(ENETC_VLAN_TYPE_C | ENETC_VLAN_TYPE_S); 454 455 enetc_port_wr(hw, ENETC_PSICFGR0(0), val); 456 457 if (num_rings) 458 num_rings -= ENETC_PF_NUM_RINGS; 459 460 /* Configure the SIs for each available VF */ 461 val = ENETC_PSICFGR0_SIVC(ENETC_VLAN_TYPE_C | ENETC_VLAN_TYPE_S); 462 val |= ENETC_PSICFGR0_VTE | ENETC_PSICFGR0_SIVIE; 463 464 if (num_rings) { 465 num_rings /= pf->total_vfs; 466 val |= ENETC_PSICFGR0_SET_TXBDR(num_rings); 467 val |= ENETC_PSICFGR0_SET_RXBDR(num_rings); 468 } 469 470 for (i = 0; i < pf->total_vfs; i++) 471 enetc_port_wr(hw, ENETC_PSICFGR0(i + 1), val); 472 473 /* Port level VLAN settings */ 474 val = ENETC_PVCLCTR_OVTPIDL(ENETC_VLAN_TYPE_C | ENETC_VLAN_TYPE_S); 475 enetc_port_wr(hw, ENETC_PVCLCTR, val); 476 /* use outer tag for VLAN filtering */ 477 enetc_port_wr(hw, ENETC_PSIVLANFMR, ENETC_PSIVLANFMR_VS); 478} 479 480static void enetc_configure_port_mac(struct enetc_hw *hw) 481{ 482 enetc_port_wr(hw, ENETC_PM0_MAXFRM, 483 ENETC_SET_MAXFRM(ENETC_RX_MAXFRM_SIZE)); 484 485 enetc_port_wr(hw, ENETC_PTCMSDUR(0), ENETC_MAC_MAXFRM_SIZE); 486 enetc_port_wr(hw, ENETC_PTXMBAR, 2 * ENETC_MAC_MAXFRM_SIZE); 487 488 enetc_port_wr(hw, ENETC_PM0_CMD_CFG, ENETC_PM0_CMD_PHY_TX_EN | 489 ENETC_PM0_CMD_TXP | ENETC_PM0_PROMISC); 490 491 enetc_port_wr(hw, ENETC_PM1_CMD_CFG, ENETC_PM0_CMD_PHY_TX_EN | 492 ENETC_PM0_CMD_TXP | ENETC_PM0_PROMISC); 493 494 /* On LS1028A, the MAC RX FIFO defaults to 2, which is too high 495 * and may lead to RX lock-up under traffic. Set it to 1 instead, 496 * as recommended by the hardware team. 497 */ 498 enetc_port_wr(hw, ENETC_PM0_RX_FIFO, ENETC_PM0_RX_FIFO_VAL); 499} 500 501static void enetc_mac_config(struct enetc_hw *hw, phy_interface_t phy_mode) 502{ 503 u32 val; 504 505 if (phy_interface_mode_is_rgmii(phy_mode)) { 506 val = enetc_port_rd(hw, ENETC_PM0_IF_MODE); 507 val &= ~(ENETC_PM0_IFM_EN_AUTO | ENETC_PM0_IFM_IFMODE_MASK); 508 val |= ENETC_PM0_IFM_IFMODE_GMII | ENETC_PM0_IFM_RG; 509 enetc_port_wr(hw, ENETC_PM0_IF_MODE, val); 510 } 511 512 if (phy_mode == PHY_INTERFACE_MODE_USXGMII) { 513 val = ENETC_PM0_IFM_FULL_DPX | ENETC_PM0_IFM_IFMODE_XGMII; 514 enetc_port_wr(hw, ENETC_PM0_IF_MODE, val); 515 } 516} 517 518static void enetc_mac_enable(struct enetc_hw *hw, bool en) 519{ 520 u32 val = enetc_port_rd(hw, ENETC_PM0_CMD_CFG); 521 522 val &= ~(ENETC_PM0_TX_EN | ENETC_PM0_RX_EN); 523 val |= en ? (ENETC_PM0_TX_EN | ENETC_PM0_RX_EN) : 0; 524 525 enetc_port_wr(hw, ENETC_PM0_CMD_CFG, val); 526 enetc_port_wr(hw, ENETC_PM1_CMD_CFG, val); 527} 528 529static void enetc_configure_port_pmac(struct enetc_hw *hw) 530{ 531 u32 temp; 532 533 /* Set pMAC step lock */ 534 temp = enetc_port_rd(hw, ENETC_PFPMR); 535 enetc_port_wr(hw, ENETC_PFPMR, 536 temp | ENETC_PFPMR_PMACE | ENETC_PFPMR_MWLM); 537 538 temp = enetc_port_rd(hw, ENETC_MMCSR); 539 enetc_port_wr(hw, ENETC_MMCSR, temp | ENETC_MMCSR_ME); 540} 541 542static void enetc_configure_port(struct enetc_pf *pf) 543{ 544 u8 hash_key[ENETC_RSSHASH_KEY_SIZE]; 545 struct enetc_hw *hw = &pf->si->hw; 546 547 enetc_configure_port_pmac(hw); 548 549 enetc_configure_port_mac(hw); 550 551 enetc_port_si_configure(pf->si); 552 553 /* set up hash key */ 554 get_random_bytes(hash_key, ENETC_RSSHASH_KEY_SIZE); 555 enetc_set_rss_key(hw, hash_key); 556 557 /* split up RFS entries */ 558 enetc_port_assign_rfs_entries(pf->si); 559 560 /* fix-up primary MAC addresses, if not set already */ 561 enetc_port_setup_primary_mac_address(pf->si); 562 563 /* enforce VLAN promisc mode for all SIs */ 564 pf->vlan_promisc_simap = ENETC_VLAN_PROMISC_MAP_ALL; 565 enetc_set_vlan_promisc(hw, pf->vlan_promisc_simap); 566 567 enetc_port_wr(hw, ENETC_PSIPMR, 0); 568 569 /* enable port */ 570 enetc_port_wr(hw, ENETC_PMR, ENETC_PMR_EN); 571} 572 573/* Messaging */ 574static u16 enetc_msg_pf_set_vf_primary_mac_addr(struct enetc_pf *pf, 575 int vf_id) 576{ 577 struct enetc_vf_state *vf_state = &pf->vf_state[vf_id]; 578 struct enetc_msg_swbd *msg = &pf->rxmsg[vf_id]; 579 struct enetc_msg_cmd_set_primary_mac *cmd; 580 struct device *dev = &pf->si->pdev->dev; 581 u16 cmd_id; 582 char *addr; 583 584 cmd = (struct enetc_msg_cmd_set_primary_mac *)msg->vaddr; 585 cmd_id = cmd->header.id; 586 if (cmd_id != ENETC_MSG_CMD_MNG_ADD) 587 return ENETC_MSG_CMD_STATUS_FAIL; 588 589 addr = cmd->mac.sa_data; 590 if (vf_state->flags & ENETC_VF_FLAG_PF_SET_MAC) 591 dev_warn(dev, "Attempt to override PF set mac addr for VF%d\n", 592 vf_id); 593 else 594 enetc_pf_set_primary_mac_addr(&pf->si->hw, vf_id + 1, addr); 595 596 return ENETC_MSG_CMD_STATUS_OK; 597} 598 599void enetc_msg_handle_rxmsg(struct enetc_pf *pf, int vf_id, u16 *status) 600{ 601 struct enetc_msg_swbd *msg = &pf->rxmsg[vf_id]; 602 struct device *dev = &pf->si->pdev->dev; 603 struct enetc_msg_cmd_header *cmd_hdr; 604 u16 cmd_type; 605 606 *status = ENETC_MSG_CMD_STATUS_OK; 607 cmd_hdr = (struct enetc_msg_cmd_header *)msg->vaddr; 608 cmd_type = cmd_hdr->type; 609 610 switch (cmd_type) { 611 case ENETC_MSG_CMD_MNG_MAC: 612 *status = enetc_msg_pf_set_vf_primary_mac_addr(pf, vf_id); 613 break; 614 default: 615 dev_err(dev, "command not supported (cmd_type: 0x%x)\n", 616 cmd_type); 617 } 618} 619 620#ifdef CONFIG_PCI_IOV 621static int enetc_sriov_configure(struct pci_dev *pdev, int num_vfs) 622{ 623 struct enetc_si *si = pci_get_drvdata(pdev); 624 struct enetc_pf *pf = enetc_si_priv(si); 625 int err; 626 627 if (!num_vfs) { 628 enetc_msg_psi_free(pf); 629 kfree(pf->vf_state); 630 pf->num_vfs = 0; 631 pci_disable_sriov(pdev); 632 } else { 633 pf->num_vfs = num_vfs; 634 635 pf->vf_state = kcalloc(num_vfs, sizeof(struct enetc_vf_state), 636 GFP_KERNEL); 637 if (!pf->vf_state) { 638 pf->num_vfs = 0; 639 return -ENOMEM; 640 } 641 642 err = enetc_msg_psi_init(pf); 643 if (err) { 644 dev_err(&pdev->dev, "enetc_msg_psi_init (%d)\n", err); 645 goto err_msg_psi; 646 } 647 648 err = pci_enable_sriov(pdev, num_vfs); 649 if (err) { 650 dev_err(&pdev->dev, "pci_enable_sriov err %d\n", err); 651 goto err_en_sriov; 652 } 653 } 654 655 return num_vfs; 656 657err_en_sriov: 658 enetc_msg_psi_free(pf); 659err_msg_psi: 660 kfree(pf->vf_state); 661 pf->num_vfs = 0; 662 663 return err; 664} 665#else 666#define enetc_sriov_configure(pdev, num_vfs) (void)0 667#endif 668 669static int enetc_pf_set_features(struct net_device *ndev, 670 netdev_features_t features) 671{ 672 netdev_features_t changed = ndev->features ^ features; 673 struct enetc_ndev_priv *priv = netdev_priv(ndev); 674 int err; 675 676 if (changed & NETIF_F_HW_TC) { 677 err = enetc_set_psfp(ndev, !!(features & NETIF_F_HW_TC)); 678 if (err) 679 return err; 680 } 681 682 if (changed & NETIF_F_HW_VLAN_CTAG_FILTER) { 683 struct enetc_pf *pf = enetc_si_priv(priv->si); 684 685 if (!!(features & NETIF_F_HW_VLAN_CTAG_FILTER)) 686 enetc_disable_si_vlan_promisc(pf, 0); 687 else 688 enetc_enable_si_vlan_promisc(pf, 0); 689 } 690 691 if (changed & NETIF_F_LOOPBACK) 692 enetc_set_loopback(ndev, !!(features & NETIF_F_LOOPBACK)); 693 694 enetc_set_features(ndev, features); 695 696 return 0; 697} 698 699static const struct net_device_ops enetc_ndev_ops = { 700 .ndo_open = enetc_open, 701 .ndo_stop = enetc_close, 702 .ndo_start_xmit = enetc_xmit, 703 .ndo_get_stats = enetc_get_stats, 704 .ndo_set_mac_address = enetc_pf_set_mac_addr, 705 .ndo_set_rx_mode = enetc_pf_set_rx_mode, 706 .ndo_vlan_rx_add_vid = enetc_vlan_rx_add_vid, 707 .ndo_vlan_rx_kill_vid = enetc_vlan_rx_del_vid, 708 .ndo_set_vf_mac = enetc_pf_set_vf_mac, 709 .ndo_set_vf_vlan = enetc_pf_set_vf_vlan, 710 .ndo_set_vf_spoofchk = enetc_pf_set_vf_spoofchk, 711 .ndo_set_features = enetc_pf_set_features, 712 .ndo_do_ioctl = enetc_ioctl, 713 .ndo_setup_tc = enetc_setup_tc, 714}; 715 716static void enetc_pf_netdev_setup(struct enetc_si *si, struct net_device *ndev, 717 const struct net_device_ops *ndev_ops) 718{ 719 struct enetc_ndev_priv *priv = netdev_priv(ndev); 720 721 SET_NETDEV_DEV(ndev, &si->pdev->dev); 722 priv->ndev = ndev; 723 priv->si = si; 724 priv->dev = &si->pdev->dev; 725 si->ndev = ndev; 726 727 priv->msg_enable = (NETIF_MSG_WOL << 1) - 1; 728 ndev->netdev_ops = ndev_ops; 729 enetc_set_ethtool_ops(ndev); 730 ndev->watchdog_timeo = 5 * HZ; 731 ndev->max_mtu = ENETC_MAX_MTU; 732 733 ndev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM | NETIF_F_HW_CSUM | 734 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX | 735 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_LOOPBACK; 736 ndev->features = NETIF_F_HIGHDMA | NETIF_F_SG | 737 NETIF_F_RXCSUM | NETIF_F_HW_CSUM | 738 NETIF_F_HW_VLAN_CTAG_TX | 739 NETIF_F_HW_VLAN_CTAG_RX; 740 741 if (si->num_rss) 742 ndev->hw_features |= NETIF_F_RXHASH; 743 744 if (si->errata & ENETC_ERR_TXCSUM) { 745 ndev->hw_features &= ~NETIF_F_HW_CSUM; 746 ndev->features &= ~NETIF_F_HW_CSUM; 747 } 748 749 ndev->priv_flags |= IFF_UNICAST_FLT; 750 751 if (si->hw_features & ENETC_SI_F_PSFP && !enetc_psfp_enable(priv)) { 752 priv->active_offloads |= ENETC_F_QCI; 753 ndev->features |= NETIF_F_HW_TC; 754 ndev->hw_features |= NETIF_F_HW_TC; 755 } 756 757 /* pick up primary MAC address from SI */ 758 enetc_get_primary_mac_addr(&si->hw, ndev->dev_addr); 759} 760 761static int enetc_mdio_probe(struct enetc_pf *pf, struct device_node *np) 762{ 763 struct device *dev = &pf->si->pdev->dev; 764 struct enetc_mdio_priv *mdio_priv; 765 struct mii_bus *bus; 766 int err; 767 768 bus = devm_mdiobus_alloc_size(dev, sizeof(*mdio_priv)); 769 if (!bus) 770 return -ENOMEM; 771 772 bus->name = "Freescale ENETC MDIO Bus"; 773 bus->read = enetc_mdio_read; 774 bus->write = enetc_mdio_write; 775 bus->parent = dev; 776 mdio_priv = bus->priv; 777 mdio_priv->hw = &pf->si->hw; 778 mdio_priv->mdio_base = ENETC_EMDIO_BASE; 779 snprintf(bus->id, MII_BUS_ID_SIZE, "%s", dev_name(dev)); 780 781 err = of_mdiobus_register(bus, np); 782 if (err) { 783 dev_err(dev, "cannot register MDIO bus\n"); 784 return err; 785 } 786 787 pf->mdio = bus; 788 789 return 0; 790} 791 792static void enetc_mdio_remove(struct enetc_pf *pf) 793{ 794 if (pf->mdio) 795 mdiobus_unregister(pf->mdio); 796} 797 798static int enetc_imdio_create(struct enetc_pf *pf) 799{ 800 struct device *dev = &pf->si->pdev->dev; 801 struct enetc_mdio_priv *mdio_priv; 802 struct lynx_pcs *pcs_lynx; 803 struct mdio_device *pcs; 804 struct mii_bus *bus; 805 int err; 806 807 bus = mdiobus_alloc_size(sizeof(*mdio_priv)); 808 if (!bus) 809 return -ENOMEM; 810 811 bus->name = "Freescale ENETC internal MDIO Bus"; 812 bus->read = enetc_mdio_read; 813 bus->write = enetc_mdio_write; 814 bus->parent = dev; 815 bus->phy_mask = ~0; 816 mdio_priv = bus->priv; 817 mdio_priv->hw = &pf->si->hw; 818 mdio_priv->mdio_base = ENETC_PM_IMDIO_BASE; 819 snprintf(bus->id, MII_BUS_ID_SIZE, "%s-imdio", dev_name(dev)); 820 821 err = mdiobus_register(bus); 822 if (err) { 823 dev_err(dev, "cannot register internal MDIO bus (%d)\n", err); 824 goto free_mdio_bus; 825 } 826 827 pcs = mdio_device_create(bus, 0); 828 if (IS_ERR(pcs)) { 829 err = PTR_ERR(pcs); 830 dev_err(dev, "cannot create pcs (%d)\n", err); 831 goto unregister_mdiobus; 832 } 833 834 pcs_lynx = lynx_pcs_create(pcs); 835 if (!pcs_lynx) { 836 mdio_device_free(pcs); 837 err = -ENOMEM; 838 dev_err(dev, "cannot create lynx pcs (%d)\n", err); 839 goto unregister_mdiobus; 840 } 841 842 pf->imdio = bus; 843 pf->pcs = pcs_lynx; 844 845 return 0; 846 847unregister_mdiobus: 848 mdiobus_unregister(bus); 849free_mdio_bus: 850 mdiobus_free(bus); 851 return err; 852} 853 854static void enetc_imdio_remove(struct enetc_pf *pf) 855{ 856 if (pf->pcs) { 857 mdio_device_free(pf->pcs->mdio); 858 lynx_pcs_destroy(pf->pcs); 859 } 860 if (pf->imdio) { 861 mdiobus_unregister(pf->imdio); 862 mdiobus_free(pf->imdio); 863 } 864} 865 866static bool enetc_port_has_pcs(struct enetc_pf *pf) 867{ 868 return (pf->if_mode == PHY_INTERFACE_MODE_SGMII || 869 pf->if_mode == PHY_INTERFACE_MODE_2500BASEX || 870 pf->if_mode == PHY_INTERFACE_MODE_USXGMII); 871} 872 873static int enetc_mdiobus_create(struct enetc_pf *pf, struct device_node *node) 874{ 875 struct device_node *mdio_np; 876 int err; 877 878 mdio_np = of_get_child_by_name(node, "mdio"); 879 if (mdio_np) { 880 err = enetc_mdio_probe(pf, mdio_np); 881 882 of_node_put(mdio_np); 883 if (err) 884 return err; 885 } 886 887 if (enetc_port_has_pcs(pf)) { 888 err = enetc_imdio_create(pf); 889 if (err) { 890 enetc_mdio_remove(pf); 891 return err; 892 } 893 } 894 895 return 0; 896} 897 898static void enetc_mdiobus_destroy(struct enetc_pf *pf) 899{ 900 enetc_mdio_remove(pf); 901 enetc_imdio_remove(pf); 902} 903 904static void enetc_pl_mac_validate(struct phylink_config *config, 905 unsigned long *supported, 906 struct phylink_link_state *state) 907{ 908 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 909 910 if (state->interface != PHY_INTERFACE_MODE_NA && 911 state->interface != PHY_INTERFACE_MODE_INTERNAL && 912 state->interface != PHY_INTERFACE_MODE_SGMII && 913 state->interface != PHY_INTERFACE_MODE_2500BASEX && 914 state->interface != PHY_INTERFACE_MODE_USXGMII && 915 !phy_interface_mode_is_rgmii(state->interface)) { 916 bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 917 return; 918 } 919 920 phylink_set_port_modes(mask); 921 phylink_set(mask, Autoneg); 922 phylink_set(mask, Pause); 923 phylink_set(mask, Asym_Pause); 924 phylink_set(mask, 10baseT_Half); 925 phylink_set(mask, 10baseT_Full); 926 phylink_set(mask, 100baseT_Half); 927 phylink_set(mask, 100baseT_Full); 928 phylink_set(mask, 100baseT_Half); 929 phylink_set(mask, 1000baseT_Half); 930 phylink_set(mask, 1000baseT_Full); 931 932 if (state->interface == PHY_INTERFACE_MODE_INTERNAL || 933 state->interface == PHY_INTERFACE_MODE_2500BASEX || 934 state->interface == PHY_INTERFACE_MODE_USXGMII) { 935 phylink_set(mask, 2500baseT_Full); 936 phylink_set(mask, 2500baseX_Full); 937 } 938 939 bitmap_and(supported, supported, mask, 940 __ETHTOOL_LINK_MODE_MASK_NBITS); 941 bitmap_and(state->advertising, state->advertising, mask, 942 __ETHTOOL_LINK_MODE_MASK_NBITS); 943} 944 945static void enetc_pl_mac_config(struct phylink_config *config, 946 unsigned int mode, 947 const struct phylink_link_state *state) 948{ 949 struct enetc_pf *pf = phylink_to_enetc_pf(config); 950 struct enetc_ndev_priv *priv; 951 952 enetc_mac_config(&pf->si->hw, state->interface); 953 954 priv = netdev_priv(pf->si->ndev); 955 if (pf->pcs) 956 phylink_set_pcs(priv->phylink, &pf->pcs->pcs); 957} 958 959static void enetc_force_rgmii_mac(struct enetc_hw *hw, int speed, int duplex) 960{ 961 u32 old_val, val; 962 963 old_val = val = enetc_port_rd(hw, ENETC_PM0_IF_MODE); 964 965 if (speed == SPEED_1000) { 966 val &= ~ENETC_PM0_IFM_SSP_MASK; 967 val |= ENETC_PM0_IFM_SSP_1000; 968 } else if (speed == SPEED_100) { 969 val &= ~ENETC_PM0_IFM_SSP_MASK; 970 val |= ENETC_PM0_IFM_SSP_100; 971 } else if (speed == SPEED_10) { 972 val &= ~ENETC_PM0_IFM_SSP_MASK; 973 val |= ENETC_PM0_IFM_SSP_10; 974 } 975 976 if (duplex == DUPLEX_FULL) 977 val |= ENETC_PM0_IFM_FULL_DPX; 978 else 979 val &= ~ENETC_PM0_IFM_FULL_DPX; 980 981 if (val == old_val) 982 return; 983 984 enetc_port_wr(hw, ENETC_PM0_IF_MODE, val); 985} 986 987static void enetc_pl_mac_link_up(struct phylink_config *config, 988 struct phy_device *phy, unsigned int mode, 989 phy_interface_t interface, int speed, 990 int duplex, bool tx_pause, bool rx_pause) 991{ 992 struct enetc_pf *pf = phylink_to_enetc_pf(config); 993 struct enetc_ndev_priv *priv; 994 995 priv = netdev_priv(pf->si->ndev); 996 997 if (pf->si->hw_features & ENETC_SI_F_QBV) 998 enetc_sched_speed_set(priv, speed); 999 1000 if (!phylink_autoneg_inband(mode) && 1001 phy_interface_mode_is_rgmii(interface)) 1002 enetc_force_rgmii_mac(&pf->si->hw, speed, duplex); 1003 1004 enetc_mac_enable(&pf->si->hw, true); 1005} 1006 1007static void enetc_pl_mac_link_down(struct phylink_config *config, 1008 unsigned int mode, 1009 phy_interface_t interface) 1010{ 1011 struct enetc_pf *pf = phylink_to_enetc_pf(config); 1012 1013 enetc_mac_enable(&pf->si->hw, false); 1014} 1015 1016static const struct phylink_mac_ops enetc_mac_phylink_ops = { 1017 .validate = enetc_pl_mac_validate, 1018 .mac_config = enetc_pl_mac_config, 1019 .mac_link_up = enetc_pl_mac_link_up, 1020 .mac_link_down = enetc_pl_mac_link_down, 1021}; 1022 1023static int enetc_phylink_create(struct enetc_ndev_priv *priv, 1024 struct device_node *node) 1025{ 1026 struct enetc_pf *pf = enetc_si_priv(priv->si); 1027 struct phylink *phylink; 1028 int err; 1029 1030 pf->phylink_config.dev = &priv->ndev->dev; 1031 pf->phylink_config.type = PHYLINK_NETDEV; 1032 1033 phylink = phylink_create(&pf->phylink_config, of_fwnode_handle(node), 1034 pf->if_mode, &enetc_mac_phylink_ops); 1035 if (IS_ERR(phylink)) { 1036 err = PTR_ERR(phylink); 1037 return err; 1038 } 1039 1040 priv->phylink = phylink; 1041 1042 return 0; 1043} 1044 1045static void enetc_phylink_destroy(struct enetc_ndev_priv *priv) 1046{ 1047 if (priv->phylink) 1048 phylink_destroy(priv->phylink); 1049} 1050 1051/* Initialize the entire shared memory for the flow steering entries 1052 * of this port (PF + VFs) 1053 */ 1054static int enetc_init_port_rfs_memory(struct enetc_si *si) 1055{ 1056 struct enetc_cmd_rfse rfse = {0}; 1057 struct enetc_hw *hw = &si->hw; 1058 int num_rfs, i, err = 0; 1059 u32 val; 1060 1061 val = enetc_port_rd(hw, ENETC_PRFSCAPR); 1062 num_rfs = ENETC_PRFSCAPR_GET_NUM_RFS(val); 1063 1064 for (i = 0; i < num_rfs; i++) { 1065 err = enetc_set_fs_entry(si, &rfse, i); 1066 if (err) 1067 break; 1068 } 1069 1070 return err; 1071} 1072 1073static int enetc_init_port_rss_memory(struct enetc_si *si) 1074{ 1075 struct enetc_hw *hw = &si->hw; 1076 int num_rss, err; 1077 int *rss_table; 1078 u32 val; 1079 1080 val = enetc_port_rd(hw, ENETC_PRSSCAPR); 1081 num_rss = ENETC_PRSSCAPR_GET_NUM_RSS(val); 1082 if (!num_rss) 1083 return 0; 1084 1085 rss_table = kcalloc(num_rss, sizeof(*rss_table), GFP_KERNEL); 1086 if (!rss_table) 1087 return -ENOMEM; 1088 1089 err = enetc_set_rss_table(si, rss_table, num_rss); 1090 1091 kfree(rss_table); 1092 1093 return err; 1094} 1095 1096static void enetc_init_unused_port(struct enetc_si *si) 1097{ 1098 struct device *dev = &si->pdev->dev; 1099 struct enetc_hw *hw = &si->hw; 1100 int err; 1101 1102 si->cbd_ring.bd_count = ENETC_CBDR_DEFAULT_SIZE; 1103 err = enetc_alloc_cbdr(dev, &si->cbd_ring); 1104 if (err) 1105 return; 1106 1107 enetc_setup_cbdr(hw, &si->cbd_ring); 1108 1109 enetc_init_port_rfs_memory(si); 1110 enetc_init_port_rss_memory(si); 1111 1112 enetc_clear_cbdr(hw); 1113 enetc_free_cbdr(dev, &si->cbd_ring); 1114} 1115 1116static int enetc_pf_probe(struct pci_dev *pdev, 1117 const struct pci_device_id *ent) 1118{ 1119 struct device_node *node = pdev->dev.of_node; 1120 struct enetc_ndev_priv *priv; 1121 struct net_device *ndev; 1122 struct enetc_si *si; 1123 struct enetc_pf *pf; 1124 int err; 1125 1126 err = enetc_pci_probe(pdev, KBUILD_MODNAME, sizeof(*pf)); 1127 if (err) { 1128 dev_err(&pdev->dev, "PCI probing failed\n"); 1129 return err; 1130 } 1131 1132 si = pci_get_drvdata(pdev); 1133 if (!si->hw.port || !si->hw.global) { 1134 err = -ENODEV; 1135 dev_err(&pdev->dev, "could not map PF space, probing a VF?\n"); 1136 goto err_map_pf_space; 1137 } 1138 1139 if (node && !of_device_is_available(node)) { 1140 enetc_init_unused_port(si); 1141 dev_info(&pdev->dev, "device is disabled, skipping\n"); 1142 err = -ENODEV; 1143 goto err_device_disabled; 1144 } 1145 1146 pf = enetc_si_priv(si); 1147 pf->si = si; 1148 pf->total_vfs = pci_sriov_get_totalvfs(pdev); 1149 1150 enetc_configure_port(pf); 1151 1152 enetc_get_si_caps(si); 1153 1154 ndev = alloc_etherdev_mq(sizeof(*priv), ENETC_MAX_NUM_TXQS); 1155 if (!ndev) { 1156 err = -ENOMEM; 1157 dev_err(&pdev->dev, "netdev creation failed\n"); 1158 goto err_alloc_netdev; 1159 } 1160 1161 enetc_pf_netdev_setup(si, ndev, &enetc_ndev_ops); 1162 1163 priv = netdev_priv(ndev); 1164 1165 enetc_init_si_rings_params(priv); 1166 1167 err = enetc_alloc_si_resources(priv); 1168 if (err) { 1169 dev_err(&pdev->dev, "SI resource alloc failed\n"); 1170 goto err_alloc_si_res; 1171 } 1172 1173 err = enetc_init_port_rfs_memory(si); 1174 if (err) { 1175 dev_err(&pdev->dev, "Failed to initialize RFS memory\n"); 1176 goto err_init_port_rfs; 1177 } 1178 1179 err = enetc_init_port_rss_memory(si); 1180 if (err) { 1181 dev_err(&pdev->dev, "Failed to initialize RSS memory\n"); 1182 goto err_init_port_rss; 1183 } 1184 1185 err = enetc_configure_si(priv); 1186 if (err) { 1187 dev_err(&pdev->dev, "Failed to configure SI\n"); 1188 goto err_config_si; 1189 } 1190 1191 err = enetc_alloc_msix(priv); 1192 if (err) { 1193 dev_err(&pdev->dev, "MSIX alloc failed\n"); 1194 goto err_alloc_msix; 1195 } 1196 1197 if (!of_get_phy_mode(node, &pf->if_mode)) { 1198 err = enetc_mdiobus_create(pf, node); 1199 if (err) 1200 goto err_mdiobus_create; 1201 1202 err = enetc_phylink_create(priv, node); 1203 if (err) 1204 goto err_phylink_create; 1205 } 1206 1207 err = register_netdev(ndev); 1208 if (err) 1209 goto err_reg_netdev; 1210 1211 return 0; 1212 1213err_reg_netdev: 1214 enetc_phylink_destroy(priv); 1215err_phylink_create: 1216 enetc_mdiobus_destroy(pf); 1217err_mdiobus_create: 1218 enetc_free_msix(priv); 1219err_config_si: 1220err_init_port_rss: 1221err_init_port_rfs: 1222err_alloc_msix: 1223 enetc_free_si_resources(priv); 1224err_alloc_si_res: 1225 si->ndev = NULL; 1226 free_netdev(ndev); 1227err_alloc_netdev: 1228err_device_disabled: 1229err_map_pf_space: 1230 enetc_pci_remove(pdev); 1231 1232 return err; 1233} 1234 1235static void enetc_pf_remove(struct pci_dev *pdev) 1236{ 1237 struct enetc_si *si = pci_get_drvdata(pdev); 1238 struct enetc_pf *pf = enetc_si_priv(si); 1239 struct enetc_ndev_priv *priv; 1240 1241 priv = netdev_priv(si->ndev); 1242 1243 if (pf->num_vfs) 1244 enetc_sriov_configure(pdev, 0); 1245 1246 unregister_netdev(si->ndev); 1247 1248 enetc_phylink_destroy(priv); 1249 enetc_mdiobus_destroy(pf); 1250 1251 enetc_free_msix(priv); 1252 1253 enetc_free_si_resources(priv); 1254 1255 free_netdev(si->ndev); 1256 1257 enetc_pci_remove(pdev); 1258} 1259 1260static const struct pci_device_id enetc_pf_id_table[] = { 1261 { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID_PF) }, 1262 { 0, } /* End of table. */ 1263}; 1264MODULE_DEVICE_TABLE(pci, enetc_pf_id_table); 1265 1266static struct pci_driver enetc_pf_driver = { 1267 .name = KBUILD_MODNAME, 1268 .id_table = enetc_pf_id_table, 1269 .probe = enetc_pf_probe, 1270 .remove = enetc_pf_remove, 1271#ifdef CONFIG_PCI_IOV 1272 .sriov_configure = enetc_sriov_configure, 1273#endif 1274}; 1275module_pci_driver(enetc_pf_driver); 1276 1277MODULE_DESCRIPTION(ENETC_DRV_NAME_STR); 1278MODULE_LICENSE("Dual BSD/GPL"); 1279