1/*
2 * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/types.h>
25#include <linux/init.h>
26#include <linux/interrupt.h>
27#include <linux/workqueue.h>
28#include <linux/pci.h>
29#include <linux/netdevice.h>
30#include <linux/etherdevice.h>
31#include <linux/if.h>
32#include <linux/if_ether.h>
33#include <linux/if_vlan.h>
34#include <linux/in.h>
35#include <linux/ip.h>
36#include <linux/ipv6.h>
37#include <linux/tcp.h>
38#include <linux/rtnetlink.h>
39#include <linux/prefetch.h>
40#include <net/ip6_checksum.h>
41#include <linux/ktime.h>
42#include <linux/numa.h>
43#ifdef CONFIG_RFS_ACCEL
44#include <linux/cpu_rmap.h>
45#endif
46#include <linux/crash_dump.h>
47#include <net/busy_poll.h>
48#include <net/vxlan.h>
49
50#include "cq_enet_desc.h"
51#include "vnic_dev.h"
52#include "vnic_intr.h"
53#include "vnic_stats.h"
54#include "vnic_vic.h"
55#include "enic_res.h"
56#include "enic.h"
57#include "enic_dev.h"
58#include "enic_pp.h"
59#include "enic_clsf.h"
60
61#define ENIC_NOTIFY_TIMER_PERIOD	(2 * HZ)
62#define WQ_ENET_MAX_DESC_LEN		(1 << WQ_ENET_LEN_BITS)
63#define MAX_TSO				(1 << 16)
64#define ENIC_DESC_MAX_SPLITS		(MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
65
66#define PCI_DEVICE_ID_CISCO_VIC_ENET         0x0043  /* ethernet vnic */
67#define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN     0x0044  /* enet dynamic vnic */
68#define PCI_DEVICE_ID_CISCO_VIC_ENET_VF      0x0071  /* enet SRIOV VF */
69
70#define RX_COPYBREAK_DEFAULT		256
71
72/* Supported devices */
73static const struct pci_device_id enic_id_table[] = {
74	{ PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
75	{ PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
76	{ PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) },
77	{ 0, }	/* end of table */
78};
79
80MODULE_DESCRIPTION(DRV_DESCRIPTION);
81MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
82MODULE_LICENSE("GPL");
83MODULE_DEVICE_TABLE(pci, enic_id_table);
84
85#define ENIC_LARGE_PKT_THRESHOLD		1000
86#define ENIC_MAX_COALESCE_TIMERS		10
87/*  Interrupt moderation table, which will be used to decide the
88 *  coalescing timer values
89 *  {rx_rate in Mbps, mapping percentage of the range}
90 */
91static struct enic_intr_mod_table mod_table[ENIC_MAX_COALESCE_TIMERS + 1] = {
92	{4000,  0},
93	{4400, 10},
94	{5060, 20},
95	{5230, 30},
96	{5540, 40},
97	{5820, 50},
98	{6120, 60},
99	{6435, 70},
100	{6745, 80},
101	{7000, 90},
102	{0xFFFFFFFF, 100}
103};
104
105/* This table helps the driver to pick different ranges for rx coalescing
106 * timer depending on the link speed.
107 */
108static struct enic_intr_mod_range mod_range[ENIC_MAX_LINK_SPEEDS] = {
109	{0,  0}, /* 0  - 4  Gbps */
110	{0,  3}, /* 4  - 10 Gbps */
111	{3,  6}, /* 10 - 40 Gbps */
112};
113
114static void enic_init_affinity_hint(struct enic *enic)
115{
116	int numa_node = dev_to_node(&enic->pdev->dev);
117	int i;
118
119	for (i = 0; i < enic->intr_count; i++) {
120		if (enic_is_err_intr(enic, i) || enic_is_notify_intr(enic, i) ||
121		    (cpumask_available(enic->msix[i].affinity_mask) &&
122		     !cpumask_empty(enic->msix[i].affinity_mask)))
123			continue;
124		if (zalloc_cpumask_var(&enic->msix[i].affinity_mask,
125				       GFP_KERNEL))
126			cpumask_set_cpu(cpumask_local_spread(i, numa_node),
127					enic->msix[i].affinity_mask);
128	}
129}
130
131static void enic_free_affinity_hint(struct enic *enic)
132{
133	int i;
134
135	for (i = 0; i < enic->intr_count; i++) {
136		if (enic_is_err_intr(enic, i) || enic_is_notify_intr(enic, i))
137			continue;
138		free_cpumask_var(enic->msix[i].affinity_mask);
139	}
140}
141
142static void enic_set_affinity_hint(struct enic *enic)
143{
144	int i;
145	int err;
146
147	for (i = 0; i < enic->intr_count; i++) {
148		if (enic_is_err_intr(enic, i)		||
149		    enic_is_notify_intr(enic, i)	||
150		    !cpumask_available(enic->msix[i].affinity_mask) ||
151		    cpumask_empty(enic->msix[i].affinity_mask))
152			continue;
153		err = irq_set_affinity_hint(enic->msix_entry[i].vector,
154					    enic->msix[i].affinity_mask);
155		if (err)
156			netdev_warn(enic->netdev, "irq_set_affinity_hint failed, err %d\n",
157				    err);
158	}
159
160	for (i = 0; i < enic->wq_count; i++) {
161		int wq_intr = enic_msix_wq_intr(enic, i);
162
163		if (cpumask_available(enic->msix[wq_intr].affinity_mask) &&
164		    !cpumask_empty(enic->msix[wq_intr].affinity_mask))
165			netif_set_xps_queue(enic->netdev,
166					    enic->msix[wq_intr].affinity_mask,
167					    i);
168	}
169}
170
171static void enic_unset_affinity_hint(struct enic *enic)
172{
173	int i;
174
175	for (i = 0; i < enic->intr_count; i++)
176		irq_set_affinity_hint(enic->msix_entry[i].vector, NULL);
177}
178
179static int enic_udp_tunnel_set_port(struct net_device *netdev,
180				    unsigned int table, unsigned int entry,
181				    struct udp_tunnel_info *ti)
182{
183	struct enic *enic = netdev_priv(netdev);
184	int err;
185
186	spin_lock_bh(&enic->devcmd_lock);
187
188	err = vnic_dev_overlay_offload_cfg(enic->vdev,
189					   OVERLAY_CFG_VXLAN_PORT_UPDATE,
190					   ntohs(ti->port));
191	if (err)
192		goto error;
193
194	err = vnic_dev_overlay_offload_ctrl(enic->vdev, OVERLAY_FEATURE_VXLAN,
195					    enic->vxlan.patch_level);
196	if (err)
197		goto error;
198
199	enic->vxlan.vxlan_udp_port_number = ntohs(ti->port);
200error:
201	spin_unlock_bh(&enic->devcmd_lock);
202
203	return err;
204}
205
206static int enic_udp_tunnel_unset_port(struct net_device *netdev,
207				      unsigned int table, unsigned int entry,
208				      struct udp_tunnel_info *ti)
209{
210	struct enic *enic = netdev_priv(netdev);
211	int err;
212
213	spin_lock_bh(&enic->devcmd_lock);
214
215	err = vnic_dev_overlay_offload_ctrl(enic->vdev, OVERLAY_FEATURE_VXLAN,
216					    OVERLAY_OFFLOAD_DISABLE);
217	if (err)
218		goto unlock;
219
220	enic->vxlan.vxlan_udp_port_number = 0;
221
222unlock:
223	spin_unlock_bh(&enic->devcmd_lock);
224
225	return err;
226}
227
228static const struct udp_tunnel_nic_info enic_udp_tunnels = {
229	.set_port	= enic_udp_tunnel_set_port,
230	.unset_port	= enic_udp_tunnel_unset_port,
231	.tables		= {
232		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, },
233	},
234}, enic_udp_tunnels_v4 = {
235	.set_port	= enic_udp_tunnel_set_port,
236	.unset_port	= enic_udp_tunnel_unset_port,
237	.flags		= UDP_TUNNEL_NIC_INFO_IPV4_ONLY,
238	.tables		= {
239		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, },
240	},
241};
242
243static netdev_features_t enic_features_check(struct sk_buff *skb,
244					     struct net_device *dev,
245					     netdev_features_t features)
246{
247	const struct ethhdr *eth = (struct ethhdr *)skb_inner_mac_header(skb);
248	struct enic *enic = netdev_priv(dev);
249	struct udphdr *udph;
250	u16 port = 0;
251	u8 proto;
252
253	if (!skb->encapsulation)
254		return features;
255
256	features = vxlan_features_check(skb, features);
257
258	switch (vlan_get_protocol(skb)) {
259	case htons(ETH_P_IPV6):
260		if (!(enic->vxlan.flags & ENIC_VXLAN_OUTER_IPV6))
261			goto out;
262		proto = ipv6_hdr(skb)->nexthdr;
263		break;
264	case htons(ETH_P_IP):
265		proto = ip_hdr(skb)->protocol;
266		break;
267	default:
268		goto out;
269	}
270
271	switch (eth->h_proto) {
272	case ntohs(ETH_P_IPV6):
273		if (!(enic->vxlan.flags & ENIC_VXLAN_INNER_IPV6))
274			goto out;
275		fallthrough;
276	case ntohs(ETH_P_IP):
277		break;
278	default:
279		goto out;
280	}
281
282
283	if (proto == IPPROTO_UDP) {
284		udph = udp_hdr(skb);
285		port = be16_to_cpu(udph->dest);
286	}
287
288	/* HW supports offload of only one UDP port. Remove CSUM and GSO MASK
289	 * for other UDP port tunnels
290	 */
291	if (port  != enic->vxlan.vxlan_udp_port_number)
292		goto out;
293
294	return features;
295
296out:
297	return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
298}
299
300int enic_is_dynamic(struct enic *enic)
301{
302	return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
303}
304
305int enic_sriov_enabled(struct enic *enic)
306{
307	return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0;
308}
309
310static int enic_is_sriov_vf(struct enic *enic)
311{
312	return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
313}
314
315int enic_is_valid_vf(struct enic *enic, int vf)
316{
317#ifdef CONFIG_PCI_IOV
318	return vf >= 0 && vf < enic->num_vfs;
319#else
320	return 0;
321#endif
322}
323
324static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
325{
326	struct enic *enic = vnic_dev_priv(wq->vdev);
327
328	if (buf->sop)
329		dma_unmap_single(&enic->pdev->dev, buf->dma_addr, buf->len,
330				 DMA_TO_DEVICE);
331	else
332		dma_unmap_page(&enic->pdev->dev, buf->dma_addr, buf->len,
333			       DMA_TO_DEVICE);
334
335	if (buf->os_buf)
336		dev_kfree_skb_any(buf->os_buf);
337}
338
339static void enic_wq_free_buf(struct vnic_wq *wq,
340	struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
341{
342	enic_free_wq_buf(wq, buf);
343}
344
345static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
346	u8 type, u16 q_number, u16 completed_index, void *opaque)
347{
348	struct enic *enic = vnic_dev_priv(vdev);
349
350	spin_lock(&enic->wq_lock[q_number]);
351
352	vnic_wq_service(&enic->wq[q_number], cq_desc,
353		completed_index, enic_wq_free_buf,
354		opaque);
355
356	if (netif_tx_queue_stopped(netdev_get_tx_queue(enic->netdev, q_number)) &&
357	    vnic_wq_desc_avail(&enic->wq[q_number]) >=
358	    (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
359		netif_wake_subqueue(enic->netdev, q_number);
360
361	spin_unlock(&enic->wq_lock[q_number]);
362
363	return 0;
364}
365
366static bool enic_log_q_error(struct enic *enic)
367{
368	unsigned int i;
369	u32 error_status;
370	bool err = false;
371
372	for (i = 0; i < enic->wq_count; i++) {
373		error_status = vnic_wq_error_status(&enic->wq[i]);
374		err |= error_status;
375		if (error_status)
376			netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
377				i, error_status);
378	}
379
380	for (i = 0; i < enic->rq_count; i++) {
381		error_status = vnic_rq_error_status(&enic->rq[i]);
382		err |= error_status;
383		if (error_status)
384			netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
385				i, error_status);
386	}
387
388	return err;
389}
390
391static void enic_msglvl_check(struct enic *enic)
392{
393	u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
394
395	if (msg_enable != enic->msg_enable) {
396		netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
397			enic->msg_enable, msg_enable);
398		enic->msg_enable = msg_enable;
399	}
400}
401
402static void enic_mtu_check(struct enic *enic)
403{
404	u32 mtu = vnic_dev_mtu(enic->vdev);
405	struct net_device *netdev = enic->netdev;
406
407	if (mtu && mtu != enic->port_mtu) {
408		enic->port_mtu = mtu;
409		if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
410			mtu = max_t(int, ENIC_MIN_MTU,
411				min_t(int, ENIC_MAX_MTU, mtu));
412			if (mtu != netdev->mtu)
413				schedule_work(&enic->change_mtu_work);
414		} else {
415			if (mtu < netdev->mtu)
416				netdev_warn(netdev,
417					"interface MTU (%d) set higher "
418					"than switch port MTU (%d)\n",
419					netdev->mtu, mtu);
420		}
421	}
422}
423
424static void enic_link_check(struct enic *enic)
425{
426	int link_status = vnic_dev_link_status(enic->vdev);
427	int carrier_ok = netif_carrier_ok(enic->netdev);
428
429	if (link_status && !carrier_ok) {
430		netdev_info(enic->netdev, "Link UP\n");
431		netif_carrier_on(enic->netdev);
432	} else if (!link_status && carrier_ok) {
433		netdev_info(enic->netdev, "Link DOWN\n");
434		netif_carrier_off(enic->netdev);
435	}
436}
437
438static void enic_notify_check(struct enic *enic)
439{
440	enic_msglvl_check(enic);
441	enic_mtu_check(enic);
442	enic_link_check(enic);
443}
444
445#define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
446
447static irqreturn_t enic_isr_legacy(int irq, void *data)
448{
449	struct net_device *netdev = data;
450	struct enic *enic = netdev_priv(netdev);
451	unsigned int io_intr = enic_legacy_io_intr();
452	unsigned int err_intr = enic_legacy_err_intr();
453	unsigned int notify_intr = enic_legacy_notify_intr();
454	u32 pba;
455
456	vnic_intr_mask(&enic->intr[io_intr]);
457
458	pba = vnic_intr_legacy_pba(enic->legacy_pba);
459	if (!pba) {
460		vnic_intr_unmask(&enic->intr[io_intr]);
461		return IRQ_NONE;	/* not our interrupt */
462	}
463
464	if (ENIC_TEST_INTR(pba, notify_intr)) {
465		enic_notify_check(enic);
466		vnic_intr_return_all_credits(&enic->intr[notify_intr]);
467	}
468
469	if (ENIC_TEST_INTR(pba, err_intr)) {
470		vnic_intr_return_all_credits(&enic->intr[err_intr]);
471		enic_log_q_error(enic);
472		/* schedule recovery from WQ/RQ error */
473		schedule_work(&enic->reset);
474		return IRQ_HANDLED;
475	}
476
477	if (ENIC_TEST_INTR(pba, io_intr))
478		napi_schedule_irqoff(&enic->napi[0]);
479	else
480		vnic_intr_unmask(&enic->intr[io_intr]);
481
482	return IRQ_HANDLED;
483}
484
485static irqreturn_t enic_isr_msi(int irq, void *data)
486{
487	struct enic *enic = data;
488
489	/* With MSI, there is no sharing of interrupts, so this is
490	 * our interrupt and there is no need to ack it.  The device
491	 * is not providing per-vector masking, so the OS will not
492	 * write to PCI config space to mask/unmask the interrupt.
493	 * We're using mask_on_assertion for MSI, so the device
494	 * automatically masks the interrupt when the interrupt is
495	 * generated.  Later, when exiting polling, the interrupt
496	 * will be unmasked (see enic_poll).
497	 *
498	 * Also, the device uses the same PCIe Traffic Class (TC)
499	 * for Memory Write data and MSI, so there are no ordering
500	 * issues; the MSI will always arrive at the Root Complex
501	 * _after_ corresponding Memory Writes (i.e. descriptor
502	 * writes).
503	 */
504
505	napi_schedule_irqoff(&enic->napi[0]);
506
507	return IRQ_HANDLED;
508}
509
510static irqreturn_t enic_isr_msix(int irq, void *data)
511{
512	struct napi_struct *napi = data;
513
514	napi_schedule_irqoff(napi);
515
516	return IRQ_HANDLED;
517}
518
519static irqreturn_t enic_isr_msix_err(int irq, void *data)
520{
521	struct enic *enic = data;
522	unsigned int intr = enic_msix_err_intr(enic);
523
524	vnic_intr_return_all_credits(&enic->intr[intr]);
525
526	if (enic_log_q_error(enic))
527		/* schedule recovery from WQ/RQ error */
528		schedule_work(&enic->reset);
529
530	return IRQ_HANDLED;
531}
532
533static irqreturn_t enic_isr_msix_notify(int irq, void *data)
534{
535	struct enic *enic = data;
536	unsigned int intr = enic_msix_notify_intr(enic);
537
538	enic_notify_check(enic);
539	vnic_intr_return_all_credits(&enic->intr[intr]);
540
541	return IRQ_HANDLED;
542}
543
544static int enic_queue_wq_skb_cont(struct enic *enic, struct vnic_wq *wq,
545				  struct sk_buff *skb, unsigned int len_left,
546				  int loopback)
547{
548	const skb_frag_t *frag;
549	dma_addr_t dma_addr;
550
551	/* Queue additional data fragments */
552	for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
553		len_left -= skb_frag_size(frag);
554		dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag, 0,
555					    skb_frag_size(frag),
556					    DMA_TO_DEVICE);
557		if (unlikely(enic_dma_map_check(enic, dma_addr)))
558			return -ENOMEM;
559		enic_queue_wq_desc_cont(wq, skb, dma_addr, skb_frag_size(frag),
560					(len_left == 0),	/* EOP? */
561					loopback);
562	}
563
564	return 0;
565}
566
567static int enic_queue_wq_skb_vlan(struct enic *enic, struct vnic_wq *wq,
568				  struct sk_buff *skb, int vlan_tag_insert,
569				  unsigned int vlan_tag, int loopback)
570{
571	unsigned int head_len = skb_headlen(skb);
572	unsigned int len_left = skb->len - head_len;
573	int eop = (len_left == 0);
574	dma_addr_t dma_addr;
575	int err = 0;
576
577	dma_addr = dma_map_single(&enic->pdev->dev, skb->data, head_len,
578				  DMA_TO_DEVICE);
579	if (unlikely(enic_dma_map_check(enic, dma_addr)))
580		return -ENOMEM;
581
582	/* Queue the main skb fragment. The fragments are no larger
583	 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
584	 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
585	 * per fragment is queued.
586	 */
587	enic_queue_wq_desc(wq, skb, dma_addr, head_len,	vlan_tag_insert,
588			   vlan_tag, eop, loopback);
589
590	if (!eop)
591		err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
592
593	return err;
594}
595
596static int enic_queue_wq_skb_csum_l4(struct enic *enic, struct vnic_wq *wq,
597				     struct sk_buff *skb, int vlan_tag_insert,
598				     unsigned int vlan_tag, int loopback)
599{
600	unsigned int head_len = skb_headlen(skb);
601	unsigned int len_left = skb->len - head_len;
602	unsigned int hdr_len = skb_checksum_start_offset(skb);
603	unsigned int csum_offset = hdr_len + skb->csum_offset;
604	int eop = (len_left == 0);
605	dma_addr_t dma_addr;
606	int err = 0;
607
608	dma_addr = dma_map_single(&enic->pdev->dev, skb->data, head_len,
609				  DMA_TO_DEVICE);
610	if (unlikely(enic_dma_map_check(enic, dma_addr)))
611		return -ENOMEM;
612
613	/* Queue the main skb fragment. The fragments are no larger
614	 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
615	 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
616	 * per fragment is queued.
617	 */
618	enic_queue_wq_desc_csum_l4(wq, skb, dma_addr, head_len,	csum_offset,
619				   hdr_len, vlan_tag_insert, vlan_tag, eop,
620				   loopback);
621
622	if (!eop)
623		err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
624
625	return err;
626}
627
628static void enic_preload_tcp_csum_encap(struct sk_buff *skb)
629{
630	const struct ethhdr *eth = (struct ethhdr *)skb_inner_mac_header(skb);
631
632	switch (eth->h_proto) {
633	case ntohs(ETH_P_IP):
634		inner_ip_hdr(skb)->check = 0;
635		inner_tcp_hdr(skb)->check =
636			~csum_tcpudp_magic(inner_ip_hdr(skb)->saddr,
637					   inner_ip_hdr(skb)->daddr, 0,
638					   IPPROTO_TCP, 0);
639		break;
640	case ntohs(ETH_P_IPV6):
641		inner_tcp_hdr(skb)->check =
642			~csum_ipv6_magic(&inner_ipv6_hdr(skb)->saddr,
643					 &inner_ipv6_hdr(skb)->daddr, 0,
644					 IPPROTO_TCP, 0);
645		break;
646	default:
647		WARN_ONCE(1, "Non ipv4/ipv6 inner pkt for encap offload");
648		break;
649	}
650}
651
652static void enic_preload_tcp_csum(struct sk_buff *skb)
653{
654	/* Preload TCP csum field with IP pseudo hdr calculated
655	 * with IP length set to zero.  HW will later add in length
656	 * to each TCP segment resulting from the TSO.
657	 */
658
659	if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
660		ip_hdr(skb)->check = 0;
661		tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
662			ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
663	} else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
664		tcp_v6_gso_csum_prep(skb);
665	}
666}
667
668static int enic_queue_wq_skb_tso(struct enic *enic, struct vnic_wq *wq,
669				 struct sk_buff *skb, unsigned int mss,
670				 int vlan_tag_insert, unsigned int vlan_tag,
671				 int loopback)
672{
673	unsigned int frag_len_left = skb_headlen(skb);
674	unsigned int len_left = skb->len - frag_len_left;
675	int eop = (len_left == 0);
676	unsigned int offset = 0;
677	unsigned int hdr_len;
678	dma_addr_t dma_addr;
679	unsigned int len;
680	skb_frag_t *frag;
681
682	if (skb->encapsulation) {
683		hdr_len = skb_inner_transport_header(skb) - skb->data;
684		hdr_len += inner_tcp_hdrlen(skb);
685		enic_preload_tcp_csum_encap(skb);
686	} else {
687		hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
688		enic_preload_tcp_csum(skb);
689	}
690
691	/* Queue WQ_ENET_MAX_DESC_LEN length descriptors
692	 * for the main skb fragment
693	 */
694	while (frag_len_left) {
695		len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
696		dma_addr = dma_map_single(&enic->pdev->dev,
697					  skb->data + offset, len,
698					  DMA_TO_DEVICE);
699		if (unlikely(enic_dma_map_check(enic, dma_addr)))
700			return -ENOMEM;
701		enic_queue_wq_desc_tso(wq, skb, dma_addr, len, mss, hdr_len,
702				       vlan_tag_insert, vlan_tag,
703				       eop && (len == frag_len_left), loopback);
704		frag_len_left -= len;
705		offset += len;
706	}
707
708	if (eop)
709		return 0;
710
711	/* Queue WQ_ENET_MAX_DESC_LEN length descriptors
712	 * for additional data fragments
713	 */
714	for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
715		len_left -= skb_frag_size(frag);
716		frag_len_left = skb_frag_size(frag);
717		offset = 0;
718
719		while (frag_len_left) {
720			len = min(frag_len_left,
721				(unsigned int)WQ_ENET_MAX_DESC_LEN);
722			dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag,
723						    offset, len,
724						    DMA_TO_DEVICE);
725			if (unlikely(enic_dma_map_check(enic, dma_addr)))
726				return -ENOMEM;
727			enic_queue_wq_desc_cont(wq, skb, dma_addr, len,
728						(len_left == 0) &&
729						 (len == frag_len_left),/*EOP*/
730						loopback);
731			frag_len_left -= len;
732			offset += len;
733		}
734	}
735
736	return 0;
737}
738
739static inline int enic_queue_wq_skb_encap(struct enic *enic, struct vnic_wq *wq,
740					  struct sk_buff *skb,
741					  int vlan_tag_insert,
742					  unsigned int vlan_tag, int loopback)
743{
744	unsigned int head_len = skb_headlen(skb);
745	unsigned int len_left = skb->len - head_len;
746	/* Hardware will overwrite the checksum fields, calculating from
747	 * scratch and ignoring the value placed by software.
748	 * Offload mode = 00
749	 * mss[2], mss[1], mss[0] bits are set
750	 */
751	unsigned int mss_or_csum = 7;
752	int eop = (len_left == 0);
753	dma_addr_t dma_addr;
754	int err = 0;
755
756	dma_addr = dma_map_single(&enic->pdev->dev, skb->data, head_len,
757				  DMA_TO_DEVICE);
758	if (unlikely(enic_dma_map_check(enic, dma_addr)))
759		return -ENOMEM;
760
761	enic_queue_wq_desc_ex(wq, skb, dma_addr, head_len, mss_or_csum, 0,
762			      vlan_tag_insert, vlan_tag,
763			      WQ_ENET_OFFLOAD_MODE_CSUM, eop, 1 /* SOP */, eop,
764			      loopback);
765	if (!eop)
766		err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
767
768	return err;
769}
770
771static inline int enic_queue_wq_skb(struct enic *enic,
772	struct vnic_wq *wq, struct sk_buff *skb)
773{
774	unsigned int mss = skb_shinfo(skb)->gso_size;
775	unsigned int vlan_tag = 0;
776	int vlan_tag_insert = 0;
777	int loopback = 0;
778	int err;
779
780	if (skb_vlan_tag_present(skb)) {
781		/* VLAN tag from trunking driver */
782		vlan_tag_insert = 1;
783		vlan_tag = skb_vlan_tag_get(skb);
784	} else if (enic->loop_enable) {
785		vlan_tag = enic->loop_tag;
786		loopback = 1;
787	}
788
789	if (mss)
790		err = enic_queue_wq_skb_tso(enic, wq, skb, mss,
791					    vlan_tag_insert, vlan_tag,
792					    loopback);
793	else if (skb->encapsulation)
794		err = enic_queue_wq_skb_encap(enic, wq, skb, vlan_tag_insert,
795					      vlan_tag, loopback);
796	else if	(skb->ip_summed == CHECKSUM_PARTIAL)
797		err = enic_queue_wq_skb_csum_l4(enic, wq, skb, vlan_tag_insert,
798						vlan_tag, loopback);
799	else
800		err = enic_queue_wq_skb_vlan(enic, wq, skb, vlan_tag_insert,
801					     vlan_tag, loopback);
802	if (unlikely(err)) {
803		struct vnic_wq_buf *buf;
804
805		buf = wq->to_use->prev;
806		/* while not EOP of previous pkt && queue not empty.
807		 * For all non EOP bufs, os_buf is NULL.
808		 */
809		while (!buf->os_buf && (buf->next != wq->to_clean)) {
810			enic_free_wq_buf(wq, buf);
811			wq->ring.desc_avail++;
812			buf = buf->prev;
813		}
814		wq->to_use = buf->next;
815		dev_kfree_skb(skb);
816	}
817	return err;
818}
819
820/* netif_tx_lock held, process context with BHs disabled, or BH */
821static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
822	struct net_device *netdev)
823{
824	struct enic *enic = netdev_priv(netdev);
825	struct vnic_wq *wq;
826	unsigned int txq_map;
827	struct netdev_queue *txq;
828
829	if (skb->len <= 0) {
830		dev_kfree_skb_any(skb);
831		return NETDEV_TX_OK;
832	}
833
834	txq_map = skb_get_queue_mapping(skb) % enic->wq_count;
835	wq = &enic->wq[txq_map];
836	txq = netdev_get_tx_queue(netdev, txq_map);
837
838	/* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
839	 * which is very likely.  In the off chance it's going to take
840	 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
841	 */
842
843	if (skb_shinfo(skb)->gso_size == 0 &&
844	    skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
845	    skb_linearize(skb)) {
846		dev_kfree_skb_any(skb);
847		return NETDEV_TX_OK;
848	}
849
850	spin_lock(&enic->wq_lock[txq_map]);
851
852	if (vnic_wq_desc_avail(wq) <
853	    skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
854		netif_tx_stop_queue(txq);
855		/* This is a hard error, log it */
856		netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
857		spin_unlock(&enic->wq_lock[txq_map]);
858		return NETDEV_TX_BUSY;
859	}
860
861	if (enic_queue_wq_skb(enic, wq, skb))
862		goto error;
863
864	if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
865		netif_tx_stop_queue(txq);
866	skb_tx_timestamp(skb);
867	if (!netdev_xmit_more() || netif_xmit_stopped(txq))
868		vnic_wq_doorbell(wq);
869
870error:
871	spin_unlock(&enic->wq_lock[txq_map]);
872
873	return NETDEV_TX_OK;
874}
875
876/* dev_base_lock rwlock held, nominally process context */
877static void enic_get_stats(struct net_device *netdev,
878			   struct rtnl_link_stats64 *net_stats)
879{
880	struct enic *enic = netdev_priv(netdev);
881	struct vnic_stats *stats;
882	int err;
883
884	err = enic_dev_stats_dump(enic, &stats);
885	/* return only when pci_zalloc_consistent fails in vnic_dev_stats_dump
886	 * For other failures, like devcmd failure, we return previously
887	 * recorded stats.
888	 */
889	if (err == -ENOMEM)
890		return;
891
892	net_stats->tx_packets = stats->tx.tx_frames_ok;
893	net_stats->tx_bytes = stats->tx.tx_bytes_ok;
894	net_stats->tx_errors = stats->tx.tx_errors;
895	net_stats->tx_dropped = stats->tx.tx_drops;
896
897	net_stats->rx_packets = stats->rx.rx_frames_ok;
898	net_stats->rx_bytes = stats->rx.rx_bytes_ok;
899	net_stats->rx_errors = stats->rx.rx_errors;
900	net_stats->multicast = stats->rx.rx_multicast_frames_ok;
901	net_stats->rx_over_errors = enic->rq_truncated_pkts;
902	net_stats->rx_crc_errors = enic->rq_bad_fcs;
903	net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
904}
905
906static int enic_mc_sync(struct net_device *netdev, const u8 *mc_addr)
907{
908	struct enic *enic = netdev_priv(netdev);
909
910	if (enic->mc_count == ENIC_MULTICAST_PERFECT_FILTERS) {
911		unsigned int mc_count = netdev_mc_count(netdev);
912
913		netdev_warn(netdev, "Registering only %d out of %d multicast addresses\n",
914			    ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
915
916		return -ENOSPC;
917	}
918
919	enic_dev_add_addr(enic, mc_addr);
920	enic->mc_count++;
921
922	return 0;
923}
924
925static int enic_mc_unsync(struct net_device *netdev, const u8 *mc_addr)
926{
927	struct enic *enic = netdev_priv(netdev);
928
929	enic_dev_del_addr(enic, mc_addr);
930	enic->mc_count--;
931
932	return 0;
933}
934
935static int enic_uc_sync(struct net_device *netdev, const u8 *uc_addr)
936{
937	struct enic *enic = netdev_priv(netdev);
938
939	if (enic->uc_count == ENIC_UNICAST_PERFECT_FILTERS) {
940		unsigned int uc_count = netdev_uc_count(netdev);
941
942		netdev_warn(netdev, "Registering only %d out of %d unicast addresses\n",
943			    ENIC_UNICAST_PERFECT_FILTERS, uc_count);
944
945		return -ENOSPC;
946	}
947
948	enic_dev_add_addr(enic, uc_addr);
949	enic->uc_count++;
950
951	return 0;
952}
953
954static int enic_uc_unsync(struct net_device *netdev, const u8 *uc_addr)
955{
956	struct enic *enic = netdev_priv(netdev);
957
958	enic_dev_del_addr(enic, uc_addr);
959	enic->uc_count--;
960
961	return 0;
962}
963
964void enic_reset_addr_lists(struct enic *enic)
965{
966	struct net_device *netdev = enic->netdev;
967
968	__dev_uc_unsync(netdev, NULL);
969	__dev_mc_unsync(netdev, NULL);
970
971	enic->mc_count = 0;
972	enic->uc_count = 0;
973	enic->flags = 0;
974}
975
976static int enic_set_mac_addr(struct net_device *netdev, char *addr)
977{
978	struct enic *enic = netdev_priv(netdev);
979
980	if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
981		if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
982			return -EADDRNOTAVAIL;
983	} else {
984		if (!is_valid_ether_addr(addr))
985			return -EADDRNOTAVAIL;
986	}
987
988	memcpy(netdev->dev_addr, addr, netdev->addr_len);
989
990	return 0;
991}
992
993static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
994{
995	struct enic *enic = netdev_priv(netdev);
996	struct sockaddr *saddr = p;
997	char *addr = saddr->sa_data;
998	int err;
999
1000	if (netif_running(enic->netdev)) {
1001		err = enic_dev_del_station_addr(enic);
1002		if (err)
1003			return err;
1004	}
1005
1006	err = enic_set_mac_addr(netdev, addr);
1007	if (err)
1008		return err;
1009
1010	if (netif_running(enic->netdev)) {
1011		err = enic_dev_add_station_addr(enic);
1012		if (err)
1013			return err;
1014	}
1015
1016	return err;
1017}
1018
1019static int enic_set_mac_address(struct net_device *netdev, void *p)
1020{
1021	struct sockaddr *saddr = p;
1022	char *addr = saddr->sa_data;
1023	struct enic *enic = netdev_priv(netdev);
1024	int err;
1025
1026	err = enic_dev_del_station_addr(enic);
1027	if (err)
1028		return err;
1029
1030	err = enic_set_mac_addr(netdev, addr);
1031	if (err)
1032		return err;
1033
1034	return enic_dev_add_station_addr(enic);
1035}
1036
1037/* netif_tx_lock held, BHs disabled */
1038static void enic_set_rx_mode(struct net_device *netdev)
1039{
1040	struct enic *enic = netdev_priv(netdev);
1041	int directed = 1;
1042	int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
1043	int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
1044	int promisc = (netdev->flags & IFF_PROMISC) ||
1045		netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
1046	int allmulti = (netdev->flags & IFF_ALLMULTI) ||
1047		netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
1048	unsigned int flags = netdev->flags |
1049		(allmulti ? IFF_ALLMULTI : 0) |
1050		(promisc ? IFF_PROMISC : 0);
1051
1052	if (enic->flags != flags) {
1053		enic->flags = flags;
1054		enic_dev_packet_filter(enic, directed,
1055			multicast, broadcast, promisc, allmulti);
1056	}
1057
1058	if (!promisc) {
1059		__dev_uc_sync(netdev, enic_uc_sync, enic_uc_unsync);
1060		if (!allmulti)
1061			__dev_mc_sync(netdev, enic_mc_sync, enic_mc_unsync);
1062	}
1063}
1064
1065/* netif_tx_lock held, BHs disabled */
1066static void enic_tx_timeout(struct net_device *netdev, unsigned int txqueue)
1067{
1068	struct enic *enic = netdev_priv(netdev);
1069	schedule_work(&enic->tx_hang_reset);
1070}
1071
1072static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
1073{
1074	struct enic *enic = netdev_priv(netdev);
1075	struct enic_port_profile *pp;
1076	int err;
1077
1078	ENIC_PP_BY_INDEX(enic, vf, pp, &err);
1079	if (err)
1080		return err;
1081
1082	if (is_valid_ether_addr(mac) || is_zero_ether_addr(mac)) {
1083		if (vf == PORT_SELF_VF) {
1084			memcpy(pp->vf_mac, mac, ETH_ALEN);
1085			return 0;
1086		} else {
1087			/*
1088			 * For sriov vf's set the mac in hw
1089			 */
1090			ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
1091				vnic_dev_set_mac_addr, mac);
1092			return enic_dev_status_to_errno(err);
1093		}
1094	} else
1095		return -EINVAL;
1096}
1097
1098static int enic_set_vf_port(struct net_device *netdev, int vf,
1099	struct nlattr *port[])
1100{
1101	struct enic *enic = netdev_priv(netdev);
1102	struct enic_port_profile prev_pp;
1103	struct enic_port_profile *pp;
1104	int err = 0, restore_pp = 1;
1105
1106	ENIC_PP_BY_INDEX(enic, vf, pp, &err);
1107	if (err)
1108		return err;
1109
1110	if (!port[IFLA_PORT_REQUEST])
1111		return -EOPNOTSUPP;
1112
1113	memcpy(&prev_pp, pp, sizeof(*enic->pp));
1114	memset(pp, 0, sizeof(*enic->pp));
1115
1116	pp->set |= ENIC_SET_REQUEST;
1117	pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]);
1118
1119	if (port[IFLA_PORT_PROFILE]) {
1120		pp->set |= ENIC_SET_NAME;
1121		memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]),
1122			PORT_PROFILE_MAX);
1123	}
1124
1125	if (port[IFLA_PORT_INSTANCE_UUID]) {
1126		pp->set |= ENIC_SET_INSTANCE;
1127		memcpy(pp->instance_uuid,
1128			nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
1129	}
1130
1131	if (port[IFLA_PORT_HOST_UUID]) {
1132		pp->set |= ENIC_SET_HOST;
1133		memcpy(pp->host_uuid,
1134			nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
1135	}
1136
1137	if (vf == PORT_SELF_VF) {
1138		/* Special case handling: mac came from IFLA_VF_MAC */
1139		if (!is_zero_ether_addr(prev_pp.vf_mac))
1140			memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN);
1141
1142		if (is_zero_ether_addr(netdev->dev_addr))
1143			eth_hw_addr_random(netdev);
1144	} else {
1145		/* SR-IOV VF: get mac from adapter */
1146		ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
1147			vnic_dev_get_mac_addr, pp->mac_addr);
1148		if (err) {
1149			netdev_err(netdev, "Error getting mac for vf %d\n", vf);
1150			memcpy(pp, &prev_pp, sizeof(*pp));
1151			return enic_dev_status_to_errno(err);
1152		}
1153	}
1154
1155	err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp);
1156	if (err) {
1157		if (restore_pp) {
1158			/* Things are still the way they were: Implicit
1159			 * DISASSOCIATE failed
1160			 */
1161			memcpy(pp, &prev_pp, sizeof(*pp));
1162		} else {
1163			memset(pp, 0, sizeof(*pp));
1164			if (vf == PORT_SELF_VF)
1165				eth_zero_addr(netdev->dev_addr);
1166		}
1167	} else {
1168		/* Set flag to indicate that the port assoc/disassoc
1169		 * request has been sent out to fw
1170		 */
1171		pp->set |= ENIC_PORT_REQUEST_APPLIED;
1172
1173		/* If DISASSOCIATE, clean up all assigned/saved macaddresses */
1174		if (pp->request == PORT_REQUEST_DISASSOCIATE) {
1175			eth_zero_addr(pp->mac_addr);
1176			if (vf == PORT_SELF_VF)
1177				eth_zero_addr(netdev->dev_addr);
1178		}
1179	}
1180
1181	if (vf == PORT_SELF_VF)
1182		eth_zero_addr(pp->vf_mac);
1183
1184	return err;
1185}
1186
1187static int enic_get_vf_port(struct net_device *netdev, int vf,
1188	struct sk_buff *skb)
1189{
1190	struct enic *enic = netdev_priv(netdev);
1191	u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
1192	struct enic_port_profile *pp;
1193	int err;
1194
1195	ENIC_PP_BY_INDEX(enic, vf, pp, &err);
1196	if (err)
1197		return err;
1198
1199	if (!(pp->set & ENIC_PORT_REQUEST_APPLIED))
1200		return -ENODATA;
1201
1202	err = enic_process_get_pp_request(enic, vf, pp->request, &response);
1203	if (err)
1204		return err;
1205
1206	if (nla_put_u16(skb, IFLA_PORT_REQUEST, pp->request) ||
1207	    nla_put_u16(skb, IFLA_PORT_RESPONSE, response) ||
1208	    ((pp->set & ENIC_SET_NAME) &&
1209	     nla_put(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, pp->name)) ||
1210	    ((pp->set & ENIC_SET_INSTANCE) &&
1211	     nla_put(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
1212		     pp->instance_uuid)) ||
1213	    ((pp->set & ENIC_SET_HOST) &&
1214	     nla_put(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, pp->host_uuid)))
1215		goto nla_put_failure;
1216	return 0;
1217
1218nla_put_failure:
1219	return -EMSGSIZE;
1220}
1221
1222static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
1223{
1224	struct enic *enic = vnic_dev_priv(rq->vdev);
1225
1226	if (!buf->os_buf)
1227		return;
1228
1229	dma_unmap_single(&enic->pdev->dev, buf->dma_addr, buf->len,
1230			 DMA_FROM_DEVICE);
1231	dev_kfree_skb_any(buf->os_buf);
1232	buf->os_buf = NULL;
1233}
1234
1235static int enic_rq_alloc_buf(struct vnic_rq *rq)
1236{
1237	struct enic *enic = vnic_dev_priv(rq->vdev);
1238	struct net_device *netdev = enic->netdev;
1239	struct sk_buff *skb;
1240	unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
1241	unsigned int os_buf_index = 0;
1242	dma_addr_t dma_addr;
1243	struct vnic_rq_buf *buf = rq->to_use;
1244
1245	if (buf->os_buf) {
1246		enic_queue_rq_desc(rq, buf->os_buf, os_buf_index, buf->dma_addr,
1247				   buf->len);
1248
1249		return 0;
1250	}
1251	skb = netdev_alloc_skb_ip_align(netdev, len);
1252	if (!skb)
1253		return -ENOMEM;
1254
1255	dma_addr = dma_map_single(&enic->pdev->dev, skb->data, len,
1256				  DMA_FROM_DEVICE);
1257	if (unlikely(enic_dma_map_check(enic, dma_addr))) {
1258		dev_kfree_skb(skb);
1259		return -ENOMEM;
1260	}
1261
1262	enic_queue_rq_desc(rq, skb, os_buf_index,
1263		dma_addr, len);
1264
1265	return 0;
1266}
1267
1268static void enic_intr_update_pkt_size(struct vnic_rx_bytes_counter *pkt_size,
1269				      u32 pkt_len)
1270{
1271	if (ENIC_LARGE_PKT_THRESHOLD <= pkt_len)
1272		pkt_size->large_pkt_bytes_cnt += pkt_len;
1273	else
1274		pkt_size->small_pkt_bytes_cnt += pkt_len;
1275}
1276
1277static bool enic_rxcopybreak(struct net_device *netdev, struct sk_buff **skb,
1278			     struct vnic_rq_buf *buf, u16 len)
1279{
1280	struct enic *enic = netdev_priv(netdev);
1281	struct sk_buff *new_skb;
1282
1283	if (len > enic->rx_copybreak)
1284		return false;
1285	new_skb = netdev_alloc_skb_ip_align(netdev, len);
1286	if (!new_skb)
1287		return false;
1288	dma_sync_single_for_cpu(&enic->pdev->dev, buf->dma_addr, len,
1289				DMA_FROM_DEVICE);
1290	memcpy(new_skb->data, (*skb)->data, len);
1291	*skb = new_skb;
1292
1293	return true;
1294}
1295
1296static void enic_rq_indicate_buf(struct vnic_rq *rq,
1297	struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
1298	int skipped, void *opaque)
1299{
1300	struct enic *enic = vnic_dev_priv(rq->vdev);
1301	struct net_device *netdev = enic->netdev;
1302	struct sk_buff *skb;
1303	struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)];
1304
1305	u8 type, color, eop, sop, ingress_port, vlan_stripped;
1306	u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
1307	u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
1308	u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
1309	u8 packet_error;
1310	u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
1311	u32 rss_hash;
1312	bool outer_csum_ok = true, encap = false;
1313
1314	if (skipped)
1315		return;
1316
1317	skb = buf->os_buf;
1318
1319	cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
1320		&type, &color, &q_number, &completed_index,
1321		&ingress_port, &fcoe, &eop, &sop, &rss_type,
1322		&csum_not_calc, &rss_hash, &bytes_written,
1323		&packet_error, &vlan_stripped, &vlan_tci, &checksum,
1324		&fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
1325		&fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
1326		&ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
1327		&fcs_ok);
1328
1329	if (packet_error) {
1330
1331		if (!fcs_ok) {
1332			if (bytes_written > 0)
1333				enic->rq_bad_fcs++;
1334			else if (bytes_written == 0)
1335				enic->rq_truncated_pkts++;
1336		}
1337
1338		dma_unmap_single(&enic->pdev->dev, buf->dma_addr, buf->len,
1339				 DMA_FROM_DEVICE);
1340		dev_kfree_skb_any(skb);
1341		buf->os_buf = NULL;
1342
1343		return;
1344	}
1345
1346	if (eop && bytes_written > 0) {
1347
1348		/* Good receive
1349		 */
1350
1351		if (!enic_rxcopybreak(netdev, &skb, buf, bytes_written)) {
1352			buf->os_buf = NULL;
1353			dma_unmap_single(&enic->pdev->dev, buf->dma_addr,
1354					 buf->len, DMA_FROM_DEVICE);
1355		}
1356		prefetch(skb->data - NET_IP_ALIGN);
1357
1358		skb_put(skb, bytes_written);
1359		skb->protocol = eth_type_trans(skb, netdev);
1360		skb_record_rx_queue(skb, q_number);
1361		if ((netdev->features & NETIF_F_RXHASH) && rss_hash &&
1362		    (type == 3)) {
1363			switch (rss_type) {
1364			case CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv4:
1365			case CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6:
1366			case CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6_EX:
1367				skb_set_hash(skb, rss_hash, PKT_HASH_TYPE_L4);
1368				break;
1369			case CQ_ENET_RQ_DESC_RSS_TYPE_IPv4:
1370			case CQ_ENET_RQ_DESC_RSS_TYPE_IPv6:
1371			case CQ_ENET_RQ_DESC_RSS_TYPE_IPv6_EX:
1372				skb_set_hash(skb, rss_hash, PKT_HASH_TYPE_L3);
1373				break;
1374			}
1375		}
1376		if (enic->vxlan.vxlan_udp_port_number) {
1377			switch (enic->vxlan.patch_level) {
1378			case 0:
1379				if (fcoe) {
1380					encap = true;
1381					outer_csum_ok = fcoe_fc_crc_ok;
1382				}
1383				break;
1384			case 2:
1385				if ((type == 7) &&
1386				    (rss_hash & BIT(0))) {
1387					encap = true;
1388					outer_csum_ok = (rss_hash & BIT(1)) &&
1389							(rss_hash & BIT(2));
1390				}
1391				break;
1392			}
1393		}
1394
1395		/* Hardware does not provide whole packet checksum. It only
1396		 * provides pseudo checksum. Since hw validates the packet
1397		 * checksum but not provide us the checksum value. use
1398		 * CHECSUM_UNNECESSARY.
1399		 *
1400		 * In case of encap pkt tcp_udp_csum_ok/tcp_udp_csum_ok is
1401		 * inner csum_ok. outer_csum_ok is set by hw when outer udp
1402		 * csum is correct or is zero.
1403		 */
1404		if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc &&
1405		    tcp_udp_csum_ok && outer_csum_ok &&
1406		    (ipv4_csum_ok || ipv6)) {
1407			skb->ip_summed = CHECKSUM_UNNECESSARY;
1408			skb->csum_level = encap;
1409		}
1410
1411		if (vlan_stripped)
1412			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tci);
1413
1414		skb_mark_napi_id(skb, &enic->napi[rq->index]);
1415		if (!(netdev->features & NETIF_F_GRO))
1416			netif_receive_skb(skb);
1417		else
1418			napi_gro_receive(&enic->napi[q_number], skb);
1419		if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
1420			enic_intr_update_pkt_size(&cq->pkt_size_counter,
1421						  bytes_written);
1422	} else {
1423
1424		/* Buffer overflow
1425		 */
1426
1427		dma_unmap_single(&enic->pdev->dev, buf->dma_addr, buf->len,
1428				 DMA_FROM_DEVICE);
1429		dev_kfree_skb_any(skb);
1430		buf->os_buf = NULL;
1431	}
1432}
1433
1434static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
1435	u8 type, u16 q_number, u16 completed_index, void *opaque)
1436{
1437	struct enic *enic = vnic_dev_priv(vdev);
1438
1439	vnic_rq_service(&enic->rq[q_number], cq_desc,
1440		completed_index, VNIC_RQ_RETURN_DESC,
1441		enic_rq_indicate_buf, opaque);
1442
1443	return 0;
1444}
1445
1446static void enic_set_int_moderation(struct enic *enic, struct vnic_rq *rq)
1447{
1448	unsigned int intr = enic_msix_rq_intr(enic, rq->index);
1449	struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)];
1450	u32 timer = cq->tobe_rx_coal_timeval;
1451
1452	if (cq->tobe_rx_coal_timeval != cq->cur_rx_coal_timeval) {
1453		vnic_intr_coalescing_timer_set(&enic->intr[intr], timer);
1454		cq->cur_rx_coal_timeval = cq->tobe_rx_coal_timeval;
1455	}
1456}
1457
1458static void enic_calc_int_moderation(struct enic *enic, struct vnic_rq *rq)
1459{
1460	struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting;
1461	struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)];
1462	struct vnic_rx_bytes_counter *pkt_size_counter = &cq->pkt_size_counter;
1463	int index;
1464	u32 timer;
1465	u32 range_start;
1466	u32 traffic;
1467	u64 delta;
1468	ktime_t now = ktime_get();
1469
1470	delta = ktime_us_delta(now, cq->prev_ts);
1471	if (delta < ENIC_AIC_TS_BREAK)
1472		return;
1473	cq->prev_ts = now;
1474
1475	traffic = pkt_size_counter->large_pkt_bytes_cnt +
1476		  pkt_size_counter->small_pkt_bytes_cnt;
1477	/* The table takes Mbps
1478	 * traffic *= 8    => bits
1479	 * traffic *= (10^6 / delta)    => bps
1480	 * traffic /= 10^6     => Mbps
1481	 *
1482	 * Combining, traffic *= (8 / delta)
1483	 */
1484
1485	traffic <<= 3;
1486	traffic = delta > UINT_MAX ? 0 : traffic / (u32)delta;
1487
1488	for (index = 0; index < ENIC_MAX_COALESCE_TIMERS; index++)
1489		if (traffic < mod_table[index].rx_rate)
1490			break;
1491	range_start = (pkt_size_counter->small_pkt_bytes_cnt >
1492		       pkt_size_counter->large_pkt_bytes_cnt << 1) ?
1493		      rx_coal->small_pkt_range_start :
1494		      rx_coal->large_pkt_range_start;
1495	timer = range_start + ((rx_coal->range_end - range_start) *
1496			       mod_table[index].range_percent / 100);
1497	/* Damping */
1498	cq->tobe_rx_coal_timeval = (timer + cq->tobe_rx_coal_timeval) >> 1;
1499
1500	pkt_size_counter->large_pkt_bytes_cnt = 0;
1501	pkt_size_counter->small_pkt_bytes_cnt = 0;
1502}
1503
1504static int enic_poll(struct napi_struct *napi, int budget)
1505{
1506	struct net_device *netdev = napi->dev;
1507	struct enic *enic = netdev_priv(netdev);
1508	unsigned int cq_rq = enic_cq_rq(enic, 0);
1509	unsigned int cq_wq = enic_cq_wq(enic, 0);
1510	unsigned int intr = enic_legacy_io_intr();
1511	unsigned int rq_work_to_do = budget;
1512	unsigned int wq_work_to_do = ENIC_WQ_NAPI_BUDGET;
1513	unsigned int  work_done, rq_work_done = 0, wq_work_done;
1514	int err;
1515
1516	wq_work_done = vnic_cq_service(&enic->cq[cq_wq], wq_work_to_do,
1517				       enic_wq_service, NULL);
1518
1519	if (budget > 0)
1520		rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
1521			rq_work_to_do, enic_rq_service, NULL);
1522
1523	/* Accumulate intr event credits for this polling
1524	 * cycle.  An intr event is the completion of a
1525	 * a WQ or RQ packet.
1526	 */
1527
1528	work_done = rq_work_done + wq_work_done;
1529
1530	if (work_done > 0)
1531		vnic_intr_return_credits(&enic->intr[intr],
1532			work_done,
1533			0 /* don't unmask intr */,
1534			0 /* don't reset intr timer */);
1535
1536	err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
1537
1538	/* Buffer allocation failed. Stay in polling
1539	 * mode so we can try to fill the ring again.
1540	 */
1541
1542	if (err)
1543		rq_work_done = rq_work_to_do;
1544	if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
1545		/* Call the function which refreshes the intr coalescing timer
1546		 * value based on the traffic.
1547		 */
1548		enic_calc_int_moderation(enic, &enic->rq[0]);
1549
1550	if ((rq_work_done < budget) && napi_complete_done(napi, rq_work_done)) {
1551
1552		/* Some work done, but not enough to stay in polling,
1553		 * exit polling
1554		 */
1555
1556		if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
1557			enic_set_int_moderation(enic, &enic->rq[0]);
1558		vnic_intr_unmask(&enic->intr[intr]);
1559	}
1560
1561	return rq_work_done;
1562}
1563
1564#ifdef CONFIG_RFS_ACCEL
1565static void enic_free_rx_cpu_rmap(struct enic *enic)
1566{
1567	free_irq_cpu_rmap(enic->netdev->rx_cpu_rmap);
1568	enic->netdev->rx_cpu_rmap = NULL;
1569}
1570
1571static void enic_set_rx_cpu_rmap(struct enic *enic)
1572{
1573	int i, res;
1574
1575	if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) {
1576		enic->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(enic->rq_count);
1577		if (unlikely(!enic->netdev->rx_cpu_rmap))
1578			return;
1579		for (i = 0; i < enic->rq_count; i++) {
1580			res = irq_cpu_rmap_add(enic->netdev->rx_cpu_rmap,
1581					       enic->msix_entry[i].vector);
1582			if (unlikely(res)) {
1583				enic_free_rx_cpu_rmap(enic);
1584				return;
1585			}
1586		}
1587	}
1588}
1589
1590#else
1591
1592static void enic_free_rx_cpu_rmap(struct enic *enic)
1593{
1594}
1595
1596static void enic_set_rx_cpu_rmap(struct enic *enic)
1597{
1598}
1599
1600#endif /* CONFIG_RFS_ACCEL */
1601
1602static int enic_poll_msix_wq(struct napi_struct *napi, int budget)
1603{
1604	struct net_device *netdev = napi->dev;
1605	struct enic *enic = netdev_priv(netdev);
1606	unsigned int wq_index = (napi - &enic->napi[0]) - enic->rq_count;
1607	struct vnic_wq *wq = &enic->wq[wq_index];
1608	unsigned int cq;
1609	unsigned int intr;
1610	unsigned int wq_work_to_do = ENIC_WQ_NAPI_BUDGET;
1611	unsigned int wq_work_done;
1612	unsigned int wq_irq;
1613
1614	wq_irq = wq->index;
1615	cq = enic_cq_wq(enic, wq_irq);
1616	intr = enic_msix_wq_intr(enic, wq_irq);
1617	wq_work_done = vnic_cq_service(&enic->cq[cq], wq_work_to_do,
1618				       enic_wq_service, NULL);
1619
1620	vnic_intr_return_credits(&enic->intr[intr], wq_work_done,
1621				 0 /* don't unmask intr */,
1622				 1 /* reset intr timer */);
1623	if (!wq_work_done) {
1624		napi_complete(napi);
1625		vnic_intr_unmask(&enic->intr[intr]);
1626		return 0;
1627	}
1628
1629	return budget;
1630}
1631
1632static int enic_poll_msix_rq(struct napi_struct *napi, int budget)
1633{
1634	struct net_device *netdev = napi->dev;
1635	struct enic *enic = netdev_priv(netdev);
1636	unsigned int rq = (napi - &enic->napi[0]);
1637	unsigned int cq = enic_cq_rq(enic, rq);
1638	unsigned int intr = enic_msix_rq_intr(enic, rq);
1639	unsigned int work_to_do = budget;
1640	unsigned int work_done = 0;
1641	int err;
1642
1643	/* Service RQ
1644	 */
1645
1646	if (budget > 0)
1647		work_done = vnic_cq_service(&enic->cq[cq],
1648			work_to_do, enic_rq_service, NULL);
1649
1650	/* Return intr event credits for this polling
1651	 * cycle.  An intr event is the completion of a
1652	 * RQ packet.
1653	 */
1654
1655	if (work_done > 0)
1656		vnic_intr_return_credits(&enic->intr[intr],
1657			work_done,
1658			0 /* don't unmask intr */,
1659			0 /* don't reset intr timer */);
1660
1661	err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
1662
1663	/* Buffer allocation failed. Stay in polling mode
1664	 * so we can try to fill the ring again.
1665	 */
1666
1667	if (err)
1668		work_done = work_to_do;
1669	if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
1670		/* Call the function which refreshes the intr coalescing timer
1671		 * value based on the traffic.
1672		 */
1673		enic_calc_int_moderation(enic, &enic->rq[rq]);
1674
1675	if ((work_done < budget) && napi_complete_done(napi, work_done)) {
1676
1677		/* Some work done, but not enough to stay in polling,
1678		 * exit polling
1679		 */
1680
1681		if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
1682			enic_set_int_moderation(enic, &enic->rq[rq]);
1683		vnic_intr_unmask(&enic->intr[intr]);
1684	}
1685
1686	return work_done;
1687}
1688
1689static void enic_notify_timer(struct timer_list *t)
1690{
1691	struct enic *enic = from_timer(enic, t, notify_timer);
1692
1693	enic_notify_check(enic);
1694
1695	mod_timer(&enic->notify_timer,
1696		round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
1697}
1698
1699static void enic_free_intr(struct enic *enic)
1700{
1701	struct net_device *netdev = enic->netdev;
1702	unsigned int i;
1703
1704	enic_free_rx_cpu_rmap(enic);
1705	switch (vnic_dev_get_intr_mode(enic->vdev)) {
1706	case VNIC_DEV_INTR_MODE_INTX:
1707		free_irq(enic->pdev->irq, netdev);
1708		break;
1709	case VNIC_DEV_INTR_MODE_MSI:
1710		free_irq(enic->pdev->irq, enic);
1711		break;
1712	case VNIC_DEV_INTR_MODE_MSIX:
1713		for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1714			if (enic->msix[i].requested)
1715				free_irq(enic->msix_entry[i].vector,
1716					enic->msix[i].devid);
1717		break;
1718	default:
1719		break;
1720	}
1721}
1722
1723static int enic_request_intr(struct enic *enic)
1724{
1725	struct net_device *netdev = enic->netdev;
1726	unsigned int i, intr;
1727	int err = 0;
1728
1729	enic_set_rx_cpu_rmap(enic);
1730	switch (vnic_dev_get_intr_mode(enic->vdev)) {
1731
1732	case VNIC_DEV_INTR_MODE_INTX:
1733
1734		err = request_irq(enic->pdev->irq, enic_isr_legacy,
1735			IRQF_SHARED, netdev->name, netdev);
1736		break;
1737
1738	case VNIC_DEV_INTR_MODE_MSI:
1739
1740		err = request_irq(enic->pdev->irq, enic_isr_msi,
1741			0, netdev->name, enic);
1742		break;
1743
1744	case VNIC_DEV_INTR_MODE_MSIX:
1745
1746		for (i = 0; i < enic->rq_count; i++) {
1747			intr = enic_msix_rq_intr(enic, i);
1748			snprintf(enic->msix[intr].devname,
1749				sizeof(enic->msix[intr].devname),
1750				"%s-rx-%u", netdev->name, i);
1751			enic->msix[intr].isr = enic_isr_msix;
1752			enic->msix[intr].devid = &enic->napi[i];
1753		}
1754
1755		for (i = 0; i < enic->wq_count; i++) {
1756			int wq = enic_cq_wq(enic, i);
1757
1758			intr = enic_msix_wq_intr(enic, i);
1759			snprintf(enic->msix[intr].devname,
1760				sizeof(enic->msix[intr].devname),
1761				"%s-tx-%u", netdev->name, i);
1762			enic->msix[intr].isr = enic_isr_msix;
1763			enic->msix[intr].devid = &enic->napi[wq];
1764		}
1765
1766		intr = enic_msix_err_intr(enic);
1767		snprintf(enic->msix[intr].devname,
1768			sizeof(enic->msix[intr].devname),
1769			"%s-err", netdev->name);
1770		enic->msix[intr].isr = enic_isr_msix_err;
1771		enic->msix[intr].devid = enic;
1772
1773		intr = enic_msix_notify_intr(enic);
1774		snprintf(enic->msix[intr].devname,
1775			sizeof(enic->msix[intr].devname),
1776			"%s-notify", netdev->name);
1777		enic->msix[intr].isr = enic_isr_msix_notify;
1778		enic->msix[intr].devid = enic;
1779
1780		for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1781			enic->msix[i].requested = 0;
1782
1783		for (i = 0; i < enic->intr_count; i++) {
1784			err = request_irq(enic->msix_entry[i].vector,
1785				enic->msix[i].isr, 0,
1786				enic->msix[i].devname,
1787				enic->msix[i].devid);
1788			if (err) {
1789				enic_free_intr(enic);
1790				break;
1791			}
1792			enic->msix[i].requested = 1;
1793		}
1794
1795		break;
1796
1797	default:
1798		break;
1799	}
1800
1801	return err;
1802}
1803
1804static void enic_synchronize_irqs(struct enic *enic)
1805{
1806	unsigned int i;
1807
1808	switch (vnic_dev_get_intr_mode(enic->vdev)) {
1809	case VNIC_DEV_INTR_MODE_INTX:
1810	case VNIC_DEV_INTR_MODE_MSI:
1811		synchronize_irq(enic->pdev->irq);
1812		break;
1813	case VNIC_DEV_INTR_MODE_MSIX:
1814		for (i = 0; i < enic->intr_count; i++)
1815			synchronize_irq(enic->msix_entry[i].vector);
1816		break;
1817	default:
1818		break;
1819	}
1820}
1821
1822static void enic_set_rx_coal_setting(struct enic *enic)
1823{
1824	unsigned int speed;
1825	int index = -1;
1826	struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting;
1827
1828	/* 1. Read the link speed from fw
1829	 * 2. Pick the default range for the speed
1830	 * 3. Update it in enic->rx_coalesce_setting
1831	 */
1832	speed = vnic_dev_port_speed(enic->vdev);
1833	if (ENIC_LINK_SPEED_10G < speed)
1834		index = ENIC_LINK_40G_INDEX;
1835	else if (ENIC_LINK_SPEED_4G < speed)
1836		index = ENIC_LINK_10G_INDEX;
1837	else
1838		index = ENIC_LINK_4G_INDEX;
1839
1840	rx_coal->small_pkt_range_start = mod_range[index].small_pkt_range_start;
1841	rx_coal->large_pkt_range_start = mod_range[index].large_pkt_range_start;
1842	rx_coal->range_end = ENIC_RX_COALESCE_RANGE_END;
1843
1844	/* Start with the value provided by UCSM */
1845	for (index = 0; index < enic->rq_count; index++)
1846		enic->cq[index].cur_rx_coal_timeval =
1847				enic->config.intr_timer_usec;
1848
1849	rx_coal->use_adaptive_rx_coalesce = 1;
1850}
1851
1852static int enic_dev_notify_set(struct enic *enic)
1853{
1854	int err;
1855
1856	spin_lock_bh(&enic->devcmd_lock);
1857	switch (vnic_dev_get_intr_mode(enic->vdev)) {
1858	case VNIC_DEV_INTR_MODE_INTX:
1859		err = vnic_dev_notify_set(enic->vdev,
1860			enic_legacy_notify_intr());
1861		break;
1862	case VNIC_DEV_INTR_MODE_MSIX:
1863		err = vnic_dev_notify_set(enic->vdev,
1864			enic_msix_notify_intr(enic));
1865		break;
1866	default:
1867		err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
1868		break;
1869	}
1870	spin_unlock_bh(&enic->devcmd_lock);
1871
1872	return err;
1873}
1874
1875static void enic_notify_timer_start(struct enic *enic)
1876{
1877	switch (vnic_dev_get_intr_mode(enic->vdev)) {
1878	case VNIC_DEV_INTR_MODE_MSI:
1879		mod_timer(&enic->notify_timer, jiffies);
1880		break;
1881	default:
1882		/* Using intr for notification for INTx/MSI-X */
1883		break;
1884	}
1885}
1886
1887/* rtnl lock is held, process context */
1888static int enic_open(struct net_device *netdev)
1889{
1890	struct enic *enic = netdev_priv(netdev);
1891	unsigned int i;
1892	int err, ret;
1893
1894	err = enic_request_intr(enic);
1895	if (err) {
1896		netdev_err(netdev, "Unable to request irq.\n");
1897		return err;
1898	}
1899	enic_init_affinity_hint(enic);
1900	enic_set_affinity_hint(enic);
1901
1902	err = enic_dev_notify_set(enic);
1903	if (err) {
1904		netdev_err(netdev,
1905			"Failed to alloc notify buffer, aborting.\n");
1906		goto err_out_free_intr;
1907	}
1908
1909	for (i = 0; i < enic->rq_count; i++) {
1910		/* enable rq before updating rq desc */
1911		vnic_rq_enable(&enic->rq[i]);
1912		vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
1913		/* Need at least one buffer on ring to get going */
1914		if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
1915			netdev_err(netdev, "Unable to alloc receive buffers\n");
1916			err = -ENOMEM;
1917			goto err_out_free_rq;
1918		}
1919	}
1920
1921	for (i = 0; i < enic->wq_count; i++)
1922		vnic_wq_enable(&enic->wq[i]);
1923
1924	if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
1925		enic_dev_add_station_addr(enic);
1926
1927	enic_set_rx_mode(netdev);
1928
1929	netif_tx_wake_all_queues(netdev);
1930
1931	for (i = 0; i < enic->rq_count; i++)
1932		napi_enable(&enic->napi[i]);
1933
1934	if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX)
1935		for (i = 0; i < enic->wq_count; i++)
1936			napi_enable(&enic->napi[enic_cq_wq(enic, i)]);
1937	enic_dev_enable(enic);
1938
1939	for (i = 0; i < enic->intr_count; i++)
1940		vnic_intr_unmask(&enic->intr[i]);
1941
1942	enic_notify_timer_start(enic);
1943	enic_rfs_timer_start(enic);
1944
1945	return 0;
1946
1947err_out_free_rq:
1948	for (i = 0; i < enic->rq_count; i++) {
1949		ret = vnic_rq_disable(&enic->rq[i]);
1950		if (!ret)
1951			vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
1952	}
1953	enic_dev_notify_unset(enic);
1954err_out_free_intr:
1955	enic_unset_affinity_hint(enic);
1956	enic_free_intr(enic);
1957
1958	return err;
1959}
1960
1961/* rtnl lock is held, process context */
1962static int enic_stop(struct net_device *netdev)
1963{
1964	struct enic *enic = netdev_priv(netdev);
1965	unsigned int i;
1966	int err;
1967
1968	for (i = 0; i < enic->intr_count; i++) {
1969		vnic_intr_mask(&enic->intr[i]);
1970		(void)vnic_intr_masked(&enic->intr[i]); /* flush write */
1971	}
1972
1973	enic_synchronize_irqs(enic);
1974
1975	del_timer_sync(&enic->notify_timer);
1976	enic_rfs_flw_tbl_free(enic);
1977
1978	enic_dev_disable(enic);
1979
1980	for (i = 0; i < enic->rq_count; i++)
1981		napi_disable(&enic->napi[i]);
1982
1983	netif_carrier_off(netdev);
1984	if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX)
1985		for (i = 0; i < enic->wq_count; i++)
1986			napi_disable(&enic->napi[enic_cq_wq(enic, i)]);
1987	netif_tx_disable(netdev);
1988
1989	if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
1990		enic_dev_del_station_addr(enic);
1991
1992	for (i = 0; i < enic->wq_count; i++) {
1993		err = vnic_wq_disable(&enic->wq[i]);
1994		if (err)
1995			return err;
1996	}
1997	for (i = 0; i < enic->rq_count; i++) {
1998		err = vnic_rq_disable(&enic->rq[i]);
1999		if (err)
2000			return err;
2001	}
2002
2003	enic_dev_notify_unset(enic);
2004	enic_unset_affinity_hint(enic);
2005	enic_free_intr(enic);
2006
2007	for (i = 0; i < enic->wq_count; i++)
2008		vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
2009	for (i = 0; i < enic->rq_count; i++)
2010		vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
2011	for (i = 0; i < enic->cq_count; i++)
2012		vnic_cq_clean(&enic->cq[i]);
2013	for (i = 0; i < enic->intr_count; i++)
2014		vnic_intr_clean(&enic->intr[i]);
2015
2016	return 0;
2017}
2018
2019static int _enic_change_mtu(struct net_device *netdev, int new_mtu)
2020{
2021	bool running = netif_running(netdev);
2022	int err = 0;
2023
2024	ASSERT_RTNL();
2025	if (running) {
2026		err = enic_stop(netdev);
2027		if (err)
2028			return err;
2029	}
2030
2031	netdev->mtu = new_mtu;
2032
2033	if (running) {
2034		err = enic_open(netdev);
2035		if (err)
2036			return err;
2037	}
2038
2039	return 0;
2040}
2041
2042static int enic_change_mtu(struct net_device *netdev, int new_mtu)
2043{
2044	struct enic *enic = netdev_priv(netdev);
2045
2046	if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
2047		return -EOPNOTSUPP;
2048
2049	if (netdev->mtu > enic->port_mtu)
2050		netdev_warn(netdev,
2051			    "interface MTU (%d) set higher than port MTU (%d)\n",
2052			    netdev->mtu, enic->port_mtu);
2053
2054	return _enic_change_mtu(netdev, new_mtu);
2055}
2056
2057static void enic_change_mtu_work(struct work_struct *work)
2058{
2059	struct enic *enic = container_of(work, struct enic, change_mtu_work);
2060	struct net_device *netdev = enic->netdev;
2061	int new_mtu = vnic_dev_mtu(enic->vdev);
2062
2063	rtnl_lock();
2064	(void)_enic_change_mtu(netdev, new_mtu);
2065	rtnl_unlock();
2066
2067	netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu);
2068}
2069
2070#ifdef CONFIG_NET_POLL_CONTROLLER
2071static void enic_poll_controller(struct net_device *netdev)
2072{
2073	struct enic *enic = netdev_priv(netdev);
2074	struct vnic_dev *vdev = enic->vdev;
2075	unsigned int i, intr;
2076
2077	switch (vnic_dev_get_intr_mode(vdev)) {
2078	case VNIC_DEV_INTR_MODE_MSIX:
2079		for (i = 0; i < enic->rq_count; i++) {
2080			intr = enic_msix_rq_intr(enic, i);
2081			enic_isr_msix(enic->msix_entry[intr].vector,
2082				      &enic->napi[i]);
2083		}
2084
2085		for (i = 0; i < enic->wq_count; i++) {
2086			intr = enic_msix_wq_intr(enic, i);
2087			enic_isr_msix(enic->msix_entry[intr].vector,
2088				      &enic->napi[enic_cq_wq(enic, i)]);
2089		}
2090
2091		break;
2092	case VNIC_DEV_INTR_MODE_MSI:
2093		enic_isr_msi(enic->pdev->irq, enic);
2094		break;
2095	case VNIC_DEV_INTR_MODE_INTX:
2096		enic_isr_legacy(enic->pdev->irq, netdev);
2097		break;
2098	default:
2099		break;
2100	}
2101}
2102#endif
2103
2104static int enic_dev_wait(struct vnic_dev *vdev,
2105	int (*start)(struct vnic_dev *, int),
2106	int (*finished)(struct vnic_dev *, int *),
2107	int arg)
2108{
2109	unsigned long time;
2110	int done;
2111	int err;
2112
2113	err = start(vdev, arg);
2114	if (err)
2115		return err;
2116
2117	/* Wait for func to complete...2 seconds max
2118	 */
2119
2120	time = jiffies + (HZ * 2);
2121	do {
2122
2123		err = finished(vdev, &done);
2124		if (err)
2125			return err;
2126
2127		if (done)
2128			return 0;
2129
2130		schedule_timeout_uninterruptible(HZ / 10);
2131
2132	} while (time_after(time, jiffies));
2133
2134	return -ETIMEDOUT;
2135}
2136
2137static int enic_dev_open(struct enic *enic)
2138{
2139	int err;
2140	u32 flags = CMD_OPENF_IG_DESCCACHE;
2141
2142	err = enic_dev_wait(enic->vdev, vnic_dev_open,
2143		vnic_dev_open_done, flags);
2144	if (err)
2145		dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
2146			err);
2147
2148	return err;
2149}
2150
2151static int enic_dev_soft_reset(struct enic *enic)
2152{
2153	int err;
2154
2155	err = enic_dev_wait(enic->vdev, vnic_dev_soft_reset,
2156			    vnic_dev_soft_reset_done, 0);
2157	if (err)
2158		netdev_err(enic->netdev, "vNIC soft reset failed, err %d\n",
2159			   err);
2160
2161	return err;
2162}
2163
2164static int enic_dev_hang_reset(struct enic *enic)
2165{
2166	int err;
2167
2168	err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
2169		vnic_dev_hang_reset_done, 0);
2170	if (err)
2171		netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
2172			err);
2173
2174	return err;
2175}
2176
2177int __enic_set_rsskey(struct enic *enic)
2178{
2179	union vnic_rss_key *rss_key_buf_va;
2180	dma_addr_t rss_key_buf_pa;
2181	int i, kidx, bidx, err;
2182
2183	rss_key_buf_va = dma_alloc_coherent(&enic->pdev->dev,
2184					    sizeof(union vnic_rss_key),
2185					    &rss_key_buf_pa, GFP_ATOMIC);
2186	if (!rss_key_buf_va)
2187		return -ENOMEM;
2188
2189	for (i = 0; i < ENIC_RSS_LEN; i++) {
2190		kidx = i / ENIC_RSS_BYTES_PER_KEY;
2191		bidx = i % ENIC_RSS_BYTES_PER_KEY;
2192		rss_key_buf_va->key[kidx].b[bidx] = enic->rss_key[i];
2193	}
2194	spin_lock_bh(&enic->devcmd_lock);
2195	err = enic_set_rss_key(enic,
2196		rss_key_buf_pa,
2197		sizeof(union vnic_rss_key));
2198	spin_unlock_bh(&enic->devcmd_lock);
2199
2200	dma_free_coherent(&enic->pdev->dev, sizeof(union vnic_rss_key),
2201			  rss_key_buf_va, rss_key_buf_pa);
2202
2203	return err;
2204}
2205
2206static int enic_set_rsskey(struct enic *enic)
2207{
2208	netdev_rss_key_fill(enic->rss_key, ENIC_RSS_LEN);
2209
2210	return __enic_set_rsskey(enic);
2211}
2212
2213static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
2214{
2215	dma_addr_t rss_cpu_buf_pa;
2216	union vnic_rss_cpu *rss_cpu_buf_va = NULL;
2217	unsigned int i;
2218	int err;
2219
2220	rss_cpu_buf_va = dma_alloc_coherent(&enic->pdev->dev,
2221					    sizeof(union vnic_rss_cpu),
2222					    &rss_cpu_buf_pa, GFP_ATOMIC);
2223	if (!rss_cpu_buf_va)
2224		return -ENOMEM;
2225
2226	for (i = 0; i < (1 << rss_hash_bits); i++)
2227		(*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
2228
2229	spin_lock_bh(&enic->devcmd_lock);
2230	err = enic_set_rss_cpu(enic,
2231		rss_cpu_buf_pa,
2232		sizeof(union vnic_rss_cpu));
2233	spin_unlock_bh(&enic->devcmd_lock);
2234
2235	dma_free_coherent(&enic->pdev->dev, sizeof(union vnic_rss_cpu),
2236			  rss_cpu_buf_va, rss_cpu_buf_pa);
2237
2238	return err;
2239}
2240
2241static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
2242	u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
2243{
2244	const u8 tso_ipid_split_en = 0;
2245	const u8 ig_vlan_strip_en = 1;
2246	int err;
2247
2248	/* Enable VLAN tag stripping.
2249	*/
2250
2251	spin_lock_bh(&enic->devcmd_lock);
2252	err = enic_set_nic_cfg(enic,
2253		rss_default_cpu, rss_hash_type,
2254		rss_hash_bits, rss_base_cpu,
2255		rss_enable, tso_ipid_split_en,
2256		ig_vlan_strip_en);
2257	spin_unlock_bh(&enic->devcmd_lock);
2258
2259	return err;
2260}
2261
2262static int enic_set_rss_nic_cfg(struct enic *enic)
2263{
2264	struct device *dev = enic_get_dev(enic);
2265	const u8 rss_default_cpu = 0;
2266	const u8 rss_hash_bits = 7;
2267	const u8 rss_base_cpu = 0;
2268	u8 rss_hash_type;
2269	int res;
2270	u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
2271
2272	spin_lock_bh(&enic->devcmd_lock);
2273	res = vnic_dev_capable_rss_hash_type(enic->vdev, &rss_hash_type);
2274	spin_unlock_bh(&enic->devcmd_lock);
2275	if (res) {
2276		/* defaults for old adapters
2277		 */
2278		rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4	|
2279				NIC_CFG_RSS_HASH_TYPE_TCP_IPV4	|
2280				NIC_CFG_RSS_HASH_TYPE_IPV6	|
2281				NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
2282	}
2283
2284	if (rss_enable) {
2285		if (!enic_set_rsskey(enic)) {
2286			if (enic_set_rsscpu(enic, rss_hash_bits)) {
2287				rss_enable = 0;
2288				dev_warn(dev, "RSS disabled, "
2289					"Failed to set RSS cpu indirection table.");
2290			}
2291		} else {
2292			rss_enable = 0;
2293			dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
2294		}
2295	}
2296
2297	return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
2298		rss_hash_bits, rss_base_cpu, rss_enable);
2299}
2300
2301static void enic_set_api_busy(struct enic *enic, bool busy)
2302{
2303	spin_lock(&enic->enic_api_lock);
2304	enic->enic_api_busy = busy;
2305	spin_unlock(&enic->enic_api_lock);
2306}
2307
2308static void enic_reset(struct work_struct *work)
2309{
2310	struct enic *enic = container_of(work, struct enic, reset);
2311
2312	if (!netif_running(enic->netdev))
2313		return;
2314
2315	rtnl_lock();
2316
2317	/* Stop any activity from infiniband */
2318	enic_set_api_busy(enic, true);
2319
2320	enic_stop(enic->netdev);
2321	enic_dev_soft_reset(enic);
2322	enic_reset_addr_lists(enic);
2323	enic_init_vnic_resources(enic);
2324	enic_set_rss_nic_cfg(enic);
2325	enic_dev_set_ig_vlan_rewrite_mode(enic);
2326	enic_open(enic->netdev);
2327
2328	/* Allow infiniband to fiddle with the device again */
2329	enic_set_api_busy(enic, false);
2330
2331	call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev);
2332
2333	rtnl_unlock();
2334}
2335
2336static void enic_tx_hang_reset(struct work_struct *work)
2337{
2338	struct enic *enic = container_of(work, struct enic, tx_hang_reset);
2339
2340	rtnl_lock();
2341
2342	/* Stop any activity from infiniband */
2343	enic_set_api_busy(enic, true);
2344
2345	enic_dev_hang_notify(enic);
2346	enic_stop(enic->netdev);
2347	enic_dev_hang_reset(enic);
2348	enic_reset_addr_lists(enic);
2349	enic_init_vnic_resources(enic);
2350	enic_set_rss_nic_cfg(enic);
2351	enic_dev_set_ig_vlan_rewrite_mode(enic);
2352	enic_open(enic->netdev);
2353
2354	/* Allow infiniband to fiddle with the device again */
2355	enic_set_api_busy(enic, false);
2356
2357	call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev);
2358
2359	rtnl_unlock();
2360}
2361
2362static int enic_set_intr_mode(struct enic *enic)
2363{
2364	unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
2365	unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
2366	unsigned int i;
2367
2368	/* Set interrupt mode (INTx, MSI, MSI-X) depending
2369	 * on system capabilities.
2370	 *
2371	 * Try MSI-X first
2372	 *
2373	 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
2374	 * (the second to last INTR is used for WQ/RQ errors)
2375	 * (the last INTR is used for notifications)
2376	 */
2377
2378	BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
2379	for (i = 0; i < n + m + 2; i++)
2380		enic->msix_entry[i].entry = i;
2381
2382	/* Use multiple RQs if RSS is enabled
2383	 */
2384
2385	if (ENIC_SETTING(enic, RSS) &&
2386	    enic->config.intr_mode < 1 &&
2387	    enic->rq_count >= n &&
2388	    enic->wq_count >= m &&
2389	    enic->cq_count >= n + m &&
2390	    enic->intr_count >= n + m + 2) {
2391
2392		if (pci_enable_msix_range(enic->pdev, enic->msix_entry,
2393					  n + m + 2, n + m + 2) > 0) {
2394
2395			enic->rq_count = n;
2396			enic->wq_count = m;
2397			enic->cq_count = n + m;
2398			enic->intr_count = n + m + 2;
2399
2400			vnic_dev_set_intr_mode(enic->vdev,
2401				VNIC_DEV_INTR_MODE_MSIX);
2402
2403			return 0;
2404		}
2405	}
2406
2407	if (enic->config.intr_mode < 1 &&
2408	    enic->rq_count >= 1 &&
2409	    enic->wq_count >= m &&
2410	    enic->cq_count >= 1 + m &&
2411	    enic->intr_count >= 1 + m + 2) {
2412		if (pci_enable_msix_range(enic->pdev, enic->msix_entry,
2413					  1 + m + 2, 1 + m + 2) > 0) {
2414
2415			enic->rq_count = 1;
2416			enic->wq_count = m;
2417			enic->cq_count = 1 + m;
2418			enic->intr_count = 1 + m + 2;
2419
2420			vnic_dev_set_intr_mode(enic->vdev,
2421				VNIC_DEV_INTR_MODE_MSIX);
2422
2423			return 0;
2424		}
2425	}
2426
2427	/* Next try MSI
2428	 *
2429	 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
2430	 */
2431
2432	if (enic->config.intr_mode < 2 &&
2433	    enic->rq_count >= 1 &&
2434	    enic->wq_count >= 1 &&
2435	    enic->cq_count >= 2 &&
2436	    enic->intr_count >= 1 &&
2437	    !pci_enable_msi(enic->pdev)) {
2438
2439		enic->rq_count = 1;
2440		enic->wq_count = 1;
2441		enic->cq_count = 2;
2442		enic->intr_count = 1;
2443
2444		vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
2445
2446		return 0;
2447	}
2448
2449	/* Next try INTx
2450	 *
2451	 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
2452	 * (the first INTR is used for WQ/RQ)
2453	 * (the second INTR is used for WQ/RQ errors)
2454	 * (the last INTR is used for notifications)
2455	 */
2456
2457	if (enic->config.intr_mode < 3 &&
2458	    enic->rq_count >= 1 &&
2459	    enic->wq_count >= 1 &&
2460	    enic->cq_count >= 2 &&
2461	    enic->intr_count >= 3) {
2462
2463		enic->rq_count = 1;
2464		enic->wq_count = 1;
2465		enic->cq_count = 2;
2466		enic->intr_count = 3;
2467
2468		vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
2469
2470		return 0;
2471	}
2472
2473	vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2474
2475	return -EINVAL;
2476}
2477
2478static void enic_clear_intr_mode(struct enic *enic)
2479{
2480	switch (vnic_dev_get_intr_mode(enic->vdev)) {
2481	case VNIC_DEV_INTR_MODE_MSIX:
2482		pci_disable_msix(enic->pdev);
2483		break;
2484	case VNIC_DEV_INTR_MODE_MSI:
2485		pci_disable_msi(enic->pdev);
2486		break;
2487	default:
2488		break;
2489	}
2490
2491	vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2492}
2493
2494static const struct net_device_ops enic_netdev_dynamic_ops = {
2495	.ndo_open		= enic_open,
2496	.ndo_stop		= enic_stop,
2497	.ndo_start_xmit		= enic_hard_start_xmit,
2498	.ndo_get_stats64	= enic_get_stats,
2499	.ndo_validate_addr	= eth_validate_addr,
2500	.ndo_set_rx_mode	= enic_set_rx_mode,
2501	.ndo_set_mac_address	= enic_set_mac_address_dynamic,
2502	.ndo_change_mtu		= enic_change_mtu,
2503	.ndo_vlan_rx_add_vid	= enic_vlan_rx_add_vid,
2504	.ndo_vlan_rx_kill_vid	= enic_vlan_rx_kill_vid,
2505	.ndo_tx_timeout		= enic_tx_timeout,
2506	.ndo_set_vf_port	= enic_set_vf_port,
2507	.ndo_get_vf_port	= enic_get_vf_port,
2508	.ndo_set_vf_mac		= enic_set_vf_mac,
2509#ifdef CONFIG_NET_POLL_CONTROLLER
2510	.ndo_poll_controller	= enic_poll_controller,
2511#endif
2512#ifdef CONFIG_RFS_ACCEL
2513	.ndo_rx_flow_steer	= enic_rx_flow_steer,
2514#endif
2515	.ndo_udp_tunnel_add	= udp_tunnel_nic_add_port,
2516	.ndo_udp_tunnel_del	= udp_tunnel_nic_del_port,
2517	.ndo_features_check	= enic_features_check,
2518};
2519
2520static const struct net_device_ops enic_netdev_ops = {
2521	.ndo_open		= enic_open,
2522	.ndo_stop		= enic_stop,
2523	.ndo_start_xmit		= enic_hard_start_xmit,
2524	.ndo_get_stats64	= enic_get_stats,
2525	.ndo_validate_addr	= eth_validate_addr,
2526	.ndo_set_mac_address	= enic_set_mac_address,
2527	.ndo_set_rx_mode	= enic_set_rx_mode,
2528	.ndo_change_mtu		= enic_change_mtu,
2529	.ndo_vlan_rx_add_vid	= enic_vlan_rx_add_vid,
2530	.ndo_vlan_rx_kill_vid	= enic_vlan_rx_kill_vid,
2531	.ndo_tx_timeout		= enic_tx_timeout,
2532	.ndo_set_vf_port	= enic_set_vf_port,
2533	.ndo_get_vf_port	= enic_get_vf_port,
2534	.ndo_set_vf_mac		= enic_set_vf_mac,
2535#ifdef CONFIG_NET_POLL_CONTROLLER
2536	.ndo_poll_controller	= enic_poll_controller,
2537#endif
2538#ifdef CONFIG_RFS_ACCEL
2539	.ndo_rx_flow_steer	= enic_rx_flow_steer,
2540#endif
2541	.ndo_udp_tunnel_add	= udp_tunnel_nic_add_port,
2542	.ndo_udp_tunnel_del	= udp_tunnel_nic_del_port,
2543	.ndo_features_check	= enic_features_check,
2544};
2545
2546static void enic_dev_deinit(struct enic *enic)
2547{
2548	unsigned int i;
2549
2550	for (i = 0; i < enic->rq_count; i++)
2551		__netif_napi_del(&enic->napi[i]);
2552
2553	if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX)
2554		for (i = 0; i < enic->wq_count; i++)
2555			__netif_napi_del(&enic->napi[enic_cq_wq(enic, i)]);
2556
2557	/* observe RCU grace period after __netif_napi_del() calls */
2558	synchronize_net();
2559
2560	enic_free_vnic_resources(enic);
2561	enic_clear_intr_mode(enic);
2562	enic_free_affinity_hint(enic);
2563}
2564
2565static void enic_kdump_kernel_config(struct enic *enic)
2566{
2567	if (is_kdump_kernel()) {
2568		dev_info(enic_get_dev(enic), "Running from within kdump kernel. Using minimal resources\n");
2569		enic->rq_count = 1;
2570		enic->wq_count = 1;
2571		enic->config.rq_desc_count = ENIC_MIN_RQ_DESCS;
2572		enic->config.wq_desc_count = ENIC_MIN_WQ_DESCS;
2573		enic->config.mtu = min_t(u16, 1500, enic->config.mtu);
2574	}
2575}
2576
2577static int enic_dev_init(struct enic *enic)
2578{
2579	struct device *dev = enic_get_dev(enic);
2580	struct net_device *netdev = enic->netdev;
2581	unsigned int i;
2582	int err;
2583
2584	/* Get interrupt coalesce timer info */
2585	err = enic_dev_intr_coal_timer_info(enic);
2586	if (err) {
2587		dev_warn(dev, "Using default conversion factor for "
2588			"interrupt coalesce timer\n");
2589		vnic_dev_intr_coal_timer_info_default(enic->vdev);
2590	}
2591
2592	/* Get vNIC configuration
2593	 */
2594
2595	err = enic_get_vnic_config(enic);
2596	if (err) {
2597		dev_err(dev, "Get vNIC configuration failed, aborting\n");
2598		return err;
2599	}
2600
2601	/* Get available resource counts
2602	 */
2603
2604	enic_get_res_counts(enic);
2605
2606	/* modify resource count if we are in kdump_kernel
2607	 */
2608	enic_kdump_kernel_config(enic);
2609
2610	/* Set interrupt mode based on resource counts and system
2611	 * capabilities
2612	 */
2613
2614	err = enic_set_intr_mode(enic);
2615	if (err) {
2616		dev_err(dev, "Failed to set intr mode based on resource "
2617			"counts and system capabilities, aborting\n");
2618		return err;
2619	}
2620
2621	/* Allocate and configure vNIC resources
2622	 */
2623
2624	err = enic_alloc_vnic_resources(enic);
2625	if (err) {
2626		dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
2627		goto err_out_free_vnic_resources;
2628	}
2629
2630	enic_init_vnic_resources(enic);
2631
2632	err = enic_set_rss_nic_cfg(enic);
2633	if (err) {
2634		dev_err(dev, "Failed to config nic, aborting\n");
2635		goto err_out_free_vnic_resources;
2636	}
2637
2638	switch (vnic_dev_get_intr_mode(enic->vdev)) {
2639	default:
2640		netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
2641		break;
2642	case VNIC_DEV_INTR_MODE_MSIX:
2643		for (i = 0; i < enic->rq_count; i++) {
2644			netif_napi_add(netdev, &enic->napi[i],
2645				enic_poll_msix_rq, NAPI_POLL_WEIGHT);
2646		}
2647		for (i = 0; i < enic->wq_count; i++)
2648			netif_napi_add(netdev, &enic->napi[enic_cq_wq(enic, i)],
2649				       enic_poll_msix_wq, NAPI_POLL_WEIGHT);
2650		break;
2651	}
2652
2653	return 0;
2654
2655err_out_free_vnic_resources:
2656	enic_free_affinity_hint(enic);
2657	enic_clear_intr_mode(enic);
2658	enic_free_vnic_resources(enic);
2659
2660	return err;
2661}
2662
2663static void enic_iounmap(struct enic *enic)
2664{
2665	unsigned int i;
2666
2667	for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
2668		if (enic->bar[i].vaddr)
2669			iounmap(enic->bar[i].vaddr);
2670}
2671
2672static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2673{
2674	struct device *dev = &pdev->dev;
2675	struct net_device *netdev;
2676	struct enic *enic;
2677	int using_dac = 0;
2678	unsigned int i;
2679	int err;
2680#ifdef CONFIG_PCI_IOV
2681	int pos = 0;
2682#endif
2683	int num_pps = 1;
2684
2685	/* Allocate net device structure and initialize.  Private
2686	 * instance data is initialized to zero.
2687	 */
2688
2689	netdev = alloc_etherdev_mqs(sizeof(struct enic),
2690				    ENIC_RQ_MAX, ENIC_WQ_MAX);
2691	if (!netdev)
2692		return -ENOMEM;
2693
2694	pci_set_drvdata(pdev, netdev);
2695
2696	SET_NETDEV_DEV(netdev, &pdev->dev);
2697
2698	enic = netdev_priv(netdev);
2699	enic->netdev = netdev;
2700	enic->pdev = pdev;
2701
2702	/* Setup PCI resources
2703	 */
2704
2705	err = pci_enable_device_mem(pdev);
2706	if (err) {
2707		dev_err(dev, "Cannot enable PCI device, aborting\n");
2708		goto err_out_free_netdev;
2709	}
2710
2711	err = pci_request_regions(pdev, DRV_NAME);
2712	if (err) {
2713		dev_err(dev, "Cannot request PCI regions, aborting\n");
2714		goto err_out_disable_device;
2715	}
2716
2717	pci_set_master(pdev);
2718
2719	/* Query PCI controller on system for DMA addressing
2720	 * limitation for the device.  Try 47-bit first, and
2721	 * fail to 32-bit.
2722	 */
2723
2724	err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(47));
2725	if (err) {
2726		err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
2727		if (err) {
2728			dev_err(dev, "No usable DMA configuration, aborting\n");
2729			goto err_out_release_regions;
2730		}
2731		err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
2732		if (err) {
2733			dev_err(dev, "Unable to obtain %u-bit DMA "
2734				"for consistent allocations, aborting\n", 32);
2735			goto err_out_release_regions;
2736		}
2737	} else {
2738		err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(47));
2739		if (err) {
2740			dev_err(dev, "Unable to obtain %u-bit DMA "
2741				"for consistent allocations, aborting\n", 47);
2742			goto err_out_release_regions;
2743		}
2744		using_dac = 1;
2745	}
2746
2747	/* Map vNIC resources from BAR0-5
2748	 */
2749
2750	for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
2751		if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
2752			continue;
2753		enic->bar[i].len = pci_resource_len(pdev, i);
2754		enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
2755		if (!enic->bar[i].vaddr) {
2756			dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
2757			err = -ENODEV;
2758			goto err_out_iounmap;
2759		}
2760		enic->bar[i].bus_addr = pci_resource_start(pdev, i);
2761	}
2762
2763	/* Register vNIC device
2764	 */
2765
2766	enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
2767		ARRAY_SIZE(enic->bar));
2768	if (!enic->vdev) {
2769		dev_err(dev, "vNIC registration failed, aborting\n");
2770		err = -ENODEV;
2771		goto err_out_iounmap;
2772	}
2773
2774	err = vnic_devcmd_init(enic->vdev);
2775
2776	if (err)
2777		goto err_out_vnic_unregister;
2778
2779#ifdef CONFIG_PCI_IOV
2780	/* Get number of subvnics */
2781	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
2782	if (pos) {
2783		pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF,
2784			&enic->num_vfs);
2785		if (enic->num_vfs) {
2786			err = pci_enable_sriov(pdev, enic->num_vfs);
2787			if (err) {
2788				dev_err(dev, "SRIOV enable failed, aborting."
2789					" pci_enable_sriov() returned %d\n",
2790					err);
2791				goto err_out_vnic_unregister;
2792			}
2793			enic->priv_flags |= ENIC_SRIOV_ENABLED;
2794			num_pps = enic->num_vfs;
2795		}
2796	}
2797#endif
2798
2799	/* Allocate structure for port profiles */
2800	enic->pp = kcalloc(num_pps, sizeof(*enic->pp), GFP_KERNEL);
2801	if (!enic->pp) {
2802		err = -ENOMEM;
2803		goto err_out_disable_sriov_pp;
2804	}
2805
2806	/* Issue device open to get device in known state
2807	 */
2808
2809	err = enic_dev_open(enic);
2810	if (err) {
2811		dev_err(dev, "vNIC dev open failed, aborting\n");
2812		goto err_out_disable_sriov;
2813	}
2814
2815	/* Setup devcmd lock
2816	 */
2817
2818	spin_lock_init(&enic->devcmd_lock);
2819	spin_lock_init(&enic->enic_api_lock);
2820
2821	/*
2822	 * Set ingress vlan rewrite mode before vnic initialization
2823	 */
2824
2825	err = enic_dev_set_ig_vlan_rewrite_mode(enic);
2826	if (err) {
2827		dev_err(dev,
2828			"Failed to set ingress vlan rewrite mode, aborting.\n");
2829		goto err_out_dev_close;
2830	}
2831
2832	/* Issue device init to initialize the vnic-to-switch link.
2833	 * We'll start with carrier off and wait for link UP
2834	 * notification later to turn on carrier.  We don't need
2835	 * to wait here for the vnic-to-switch link initialization
2836	 * to complete; link UP notification is the indication that
2837	 * the process is complete.
2838	 */
2839
2840	netif_carrier_off(netdev);
2841
2842	/* Do not call dev_init for a dynamic vnic.
2843	 * For a dynamic vnic, init_prov_info will be
2844	 * called later by an upper layer.
2845	 */
2846
2847	if (!enic_is_dynamic(enic)) {
2848		err = vnic_dev_init(enic->vdev, 0);
2849		if (err) {
2850			dev_err(dev, "vNIC dev init failed, aborting\n");
2851			goto err_out_dev_close;
2852		}
2853	}
2854
2855	err = enic_dev_init(enic);
2856	if (err) {
2857		dev_err(dev, "Device initialization failed, aborting\n");
2858		goto err_out_dev_close;
2859	}
2860
2861	netif_set_real_num_tx_queues(netdev, enic->wq_count);
2862	netif_set_real_num_rx_queues(netdev, enic->rq_count);
2863
2864	/* Setup notification timer, HW reset task, and wq locks
2865	 */
2866
2867	timer_setup(&enic->notify_timer, enic_notify_timer, 0);
2868
2869	enic_rfs_flw_tbl_init(enic);
2870	enic_set_rx_coal_setting(enic);
2871	INIT_WORK(&enic->reset, enic_reset);
2872	INIT_WORK(&enic->tx_hang_reset, enic_tx_hang_reset);
2873	INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work);
2874
2875	for (i = 0; i < enic->wq_count; i++)
2876		spin_lock_init(&enic->wq_lock[i]);
2877
2878	/* Register net device
2879	 */
2880
2881	enic->port_mtu = enic->config.mtu;
2882
2883	err = enic_set_mac_addr(netdev, enic->mac_addr);
2884	if (err) {
2885		dev_err(dev, "Invalid MAC address, aborting\n");
2886		goto err_out_dev_deinit;
2887	}
2888
2889	enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
2890	/* rx coalesce time already got initialized. This gets used
2891	 * if adaptive coal is turned off
2892	 */
2893	enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
2894
2895	if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
2896		netdev->netdev_ops = &enic_netdev_dynamic_ops;
2897	else
2898		netdev->netdev_ops = &enic_netdev_ops;
2899
2900	netdev->watchdog_timeo = 2 * HZ;
2901	enic_set_ethtool_ops(netdev);
2902
2903	netdev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
2904	if (ENIC_SETTING(enic, LOOP)) {
2905		netdev->features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2906		enic->loop_enable = 1;
2907		enic->loop_tag = enic->config.loop_tag;
2908		dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
2909	}
2910	if (ENIC_SETTING(enic, TXCSUM))
2911		netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM;
2912	if (ENIC_SETTING(enic, TSO))
2913		netdev->hw_features |= NETIF_F_TSO |
2914			NETIF_F_TSO6 | NETIF_F_TSO_ECN;
2915	if (ENIC_SETTING(enic, RSS))
2916		netdev->hw_features |= NETIF_F_RXHASH;
2917	if (ENIC_SETTING(enic, RXCSUM))
2918		netdev->hw_features |= NETIF_F_RXCSUM;
2919	if (ENIC_SETTING(enic, VXLAN)) {
2920		u64 patch_level;
2921		u64 a1 = 0;
2922
2923		netdev->hw_enc_features |= NETIF_F_RXCSUM		|
2924					   NETIF_F_TSO			|
2925					   NETIF_F_TSO6			|
2926					   NETIF_F_TSO_ECN		|
2927					   NETIF_F_GSO_UDP_TUNNEL	|
2928					   NETIF_F_HW_CSUM		|
2929					   NETIF_F_GSO_UDP_TUNNEL_CSUM;
2930		netdev->hw_features |= netdev->hw_enc_features;
2931		/* get bit mask from hw about supported offload bit level
2932		 * BIT(0) = fw supports patch_level 0
2933		 *	    fcoe bit = encap
2934		 *	    fcoe_fc_crc_ok = outer csum ok
2935		 * BIT(1) = always set by fw
2936		 * BIT(2) = fw supports patch_level 2
2937		 *	    BIT(0) in rss_hash = encap
2938		 *	    BIT(1,2) in rss_hash = outer_ip_csum_ok/
2939		 *				   outer_tcp_csum_ok
2940		 * used in enic_rq_indicate_buf
2941		 */
2942		err = vnic_dev_get_supported_feature_ver(enic->vdev,
2943							 VIC_FEATURE_VXLAN,
2944							 &patch_level, &a1);
2945		if (err)
2946			patch_level = 0;
2947		enic->vxlan.flags = (u8)a1;
2948		/* mask bits that are supported by driver
2949		 */
2950		patch_level &= BIT_ULL(0) | BIT_ULL(2);
2951		patch_level = fls(patch_level);
2952		patch_level = patch_level ? patch_level - 1 : 0;
2953		enic->vxlan.patch_level = patch_level;
2954
2955		if (vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ) == 1 ||
2956		    enic->vxlan.flags & ENIC_VXLAN_MULTI_WQ) {
2957			netdev->udp_tunnel_nic_info = &enic_udp_tunnels_v4;
2958			if (enic->vxlan.flags & ENIC_VXLAN_OUTER_IPV6)
2959				netdev->udp_tunnel_nic_info = &enic_udp_tunnels;
2960		}
2961	}
2962
2963	netdev->features |= netdev->hw_features;
2964	netdev->vlan_features |= netdev->features;
2965
2966#ifdef CONFIG_RFS_ACCEL
2967	netdev->hw_features |= NETIF_F_NTUPLE;
2968#endif
2969
2970	if (using_dac)
2971		netdev->features |= NETIF_F_HIGHDMA;
2972
2973	netdev->priv_flags |= IFF_UNICAST_FLT;
2974
2975	/* MTU range: 68 - 9000 */
2976	netdev->min_mtu = ENIC_MIN_MTU;
2977	netdev->max_mtu = ENIC_MAX_MTU;
2978	netdev->mtu	= enic->port_mtu;
2979
2980	err = register_netdev(netdev);
2981	if (err) {
2982		dev_err(dev, "Cannot register net device, aborting\n");
2983		goto err_out_dev_deinit;
2984	}
2985	enic->rx_copybreak = RX_COPYBREAK_DEFAULT;
2986
2987	return 0;
2988
2989err_out_dev_deinit:
2990	enic_dev_deinit(enic);
2991err_out_dev_close:
2992	vnic_dev_close(enic->vdev);
2993err_out_disable_sriov:
2994	kfree(enic->pp);
2995err_out_disable_sriov_pp:
2996#ifdef CONFIG_PCI_IOV
2997	if (enic_sriov_enabled(enic)) {
2998		pci_disable_sriov(pdev);
2999		enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
3000	}
3001#endif
3002err_out_vnic_unregister:
3003	vnic_dev_unregister(enic->vdev);
3004err_out_iounmap:
3005	enic_iounmap(enic);
3006err_out_release_regions:
3007	pci_release_regions(pdev);
3008err_out_disable_device:
3009	pci_disable_device(pdev);
3010err_out_free_netdev:
3011	free_netdev(netdev);
3012
3013	return err;
3014}
3015
3016static void enic_remove(struct pci_dev *pdev)
3017{
3018	struct net_device *netdev = pci_get_drvdata(pdev);
3019
3020	if (netdev) {
3021		struct enic *enic = netdev_priv(netdev);
3022
3023		cancel_work_sync(&enic->reset);
3024		cancel_work_sync(&enic->change_mtu_work);
3025		unregister_netdev(netdev);
3026		enic_dev_deinit(enic);
3027		vnic_dev_close(enic->vdev);
3028#ifdef CONFIG_PCI_IOV
3029		if (enic_sriov_enabled(enic)) {
3030			pci_disable_sriov(pdev);
3031			enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
3032		}
3033#endif
3034		kfree(enic->pp);
3035		vnic_dev_unregister(enic->vdev);
3036		enic_iounmap(enic);
3037		pci_release_regions(pdev);
3038		pci_disable_device(pdev);
3039		free_netdev(netdev);
3040	}
3041}
3042
3043static struct pci_driver enic_driver = {
3044	.name = DRV_NAME,
3045	.id_table = enic_id_table,
3046	.probe = enic_probe,
3047	.remove = enic_remove,
3048};
3049
3050static int __init enic_init_module(void)
3051{
3052	return pci_register_driver(&enic_driver);
3053}
3054
3055static void __exit enic_cleanup_module(void)
3056{
3057	pci_unregister_driver(&enic_driver);
3058}
3059
3060module_init(enic_init_module);
3061module_exit(enic_cleanup_module);
3062