1/* 2 * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet 3 * driver for Linux. 4 * 5 * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * OpenIB.org BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or 14 * without modification, are permitted provided that the following 15 * conditions are met: 16 * 17 * - Redistributions of source code must retain the above 18 * copyright notice, this list of conditions and the following 19 * disclaimer. 20 * 21 * - Redistributions in binary form must reproduce the above 22 * copyright notice, this list of conditions and the following 23 * disclaimer in the documentation and/or other materials 24 * provided with the distribution. 25 * 26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 29 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 30 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 33 * SOFTWARE. 34 */ 35 36#include <linux/pci.h> 37 38#include "t4vf_common.h" 39#include "t4vf_defs.h" 40 41#include "../cxgb4/t4_regs.h" 42#include "../cxgb4/t4_values.h" 43#include "../cxgb4/t4fw_api.h" 44 45/* 46 * Wait for the device to become ready (signified by our "who am I" register 47 * returning a value other than all 1's). Return an error if it doesn't 48 * become ready ... 49 */ 50int t4vf_wait_dev_ready(struct adapter *adapter) 51{ 52 const u32 whoami = T4VF_PL_BASE_ADDR + PL_VF_WHOAMI; 53 const u32 notready1 = 0xffffffff; 54 const u32 notready2 = 0xeeeeeeee; 55 u32 val; 56 57 val = t4_read_reg(adapter, whoami); 58 if (val != notready1 && val != notready2) 59 return 0; 60 msleep(500); 61 val = t4_read_reg(adapter, whoami); 62 if (val != notready1 && val != notready2) 63 return 0; 64 else 65 return -EIO; 66} 67 68/* 69 * Get the reply to a mailbox command and store it in @rpl in big-endian order 70 * (since the firmware data structures are specified in a big-endian layout). 71 */ 72static void get_mbox_rpl(struct adapter *adapter, __be64 *rpl, int size, 73 u32 mbox_data) 74{ 75 for ( ; size; size -= 8, mbox_data += 8) 76 *rpl++ = cpu_to_be64(t4_read_reg64(adapter, mbox_data)); 77} 78 79/** 80 * t4vf_record_mbox - record a Firmware Mailbox Command/Reply in the log 81 * @adapter: the adapter 82 * @cmd: the Firmware Mailbox Command or Reply 83 * @size: command length in bytes 84 * @access: the time (ms) needed to access the Firmware Mailbox 85 * @execute: the time (ms) the command spent being executed 86 */ 87static void t4vf_record_mbox(struct adapter *adapter, const __be64 *cmd, 88 int size, int access, int execute) 89{ 90 struct mbox_cmd_log *log = adapter->mbox_log; 91 struct mbox_cmd *entry; 92 int i; 93 94 entry = mbox_cmd_log_entry(log, log->cursor++); 95 if (log->cursor == log->size) 96 log->cursor = 0; 97 98 for (i = 0; i < size / 8; i++) 99 entry->cmd[i] = be64_to_cpu(cmd[i]); 100 while (i < MBOX_LEN / 8) 101 entry->cmd[i++] = 0; 102 entry->timestamp = jiffies; 103 entry->seqno = log->seqno++; 104 entry->access = access; 105 entry->execute = execute; 106} 107 108/** 109 * t4vf_wr_mbox_core - send a command to FW through the mailbox 110 * @adapter: the adapter 111 * @cmd: the command to write 112 * @size: command length in bytes 113 * @rpl: where to optionally store the reply 114 * @sleep_ok: if true we may sleep while awaiting command completion 115 * 116 * Sends the given command to FW through the mailbox and waits for the 117 * FW to execute the command. If @rpl is not %NULL it is used to store 118 * the FW's reply to the command. The command and its optional reply 119 * are of the same length. FW can take up to 500 ms to respond. 120 * @sleep_ok determines whether we may sleep while awaiting the response. 121 * If sleeping is allowed we use progressive backoff otherwise we spin. 122 * 123 * The return value is 0 on success or a negative errno on failure. A 124 * failure can happen either because we are not able to execute the 125 * command or FW executes it but signals an error. In the latter case 126 * the return value is the error code indicated by FW (negated). 127 */ 128int t4vf_wr_mbox_core(struct adapter *adapter, const void *cmd, int size, 129 void *rpl, bool sleep_ok) 130{ 131 static const int delay[] = { 132 1, 1, 3, 5, 10, 10, 20, 50, 100 133 }; 134 135 u16 access = 0, execute = 0; 136 u32 v, mbox_data; 137 int i, ms, delay_idx, ret; 138 const __be64 *p; 139 u32 mbox_ctl = T4VF_CIM_BASE_ADDR + CIM_VF_EXT_MAILBOX_CTRL; 140 u32 cmd_op = FW_CMD_OP_G(be32_to_cpu(((struct fw_cmd_hdr *)cmd)->hi)); 141 __be64 cmd_rpl[MBOX_LEN / 8]; 142 struct mbox_list entry; 143 144 /* In T6, mailbox size is changed to 128 bytes to avoid 145 * invalidating the entire prefetch buffer. 146 */ 147 if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5) 148 mbox_data = T4VF_MBDATA_BASE_ADDR; 149 else 150 mbox_data = T6VF_MBDATA_BASE_ADDR; 151 152 /* 153 * Commands must be multiples of 16 bytes in length and may not be 154 * larger than the size of the Mailbox Data register array. 155 */ 156 if ((size % 16) != 0 || 157 size > NUM_CIM_VF_MAILBOX_DATA_INSTANCES * 4) 158 return -EINVAL; 159 160 /* Queue ourselves onto the mailbox access list. When our entry is at 161 * the front of the list, we have rights to access the mailbox. So we 162 * wait [for a while] till we're at the front [or bail out with an 163 * EBUSY] ... 164 */ 165 spin_lock(&adapter->mbox_lock); 166 list_add_tail(&entry.list, &adapter->mlist.list); 167 spin_unlock(&adapter->mbox_lock); 168 169 delay_idx = 0; 170 ms = delay[0]; 171 172 for (i = 0; ; i += ms) { 173 /* If we've waited too long, return a busy indication. This 174 * really ought to be based on our initial position in the 175 * mailbox access list but this is a start. We very rearely 176 * contend on access to the mailbox ... 177 */ 178 if (i > FW_CMD_MAX_TIMEOUT) { 179 spin_lock(&adapter->mbox_lock); 180 list_del(&entry.list); 181 spin_unlock(&adapter->mbox_lock); 182 ret = -EBUSY; 183 t4vf_record_mbox(adapter, cmd, size, access, ret); 184 return ret; 185 } 186 187 /* If we're at the head, break out and start the mailbox 188 * protocol. 189 */ 190 if (list_first_entry(&adapter->mlist.list, struct mbox_list, 191 list) == &entry) 192 break; 193 194 /* Delay for a bit before checking again ... */ 195 if (sleep_ok) { 196 ms = delay[delay_idx]; /* last element may repeat */ 197 if (delay_idx < ARRAY_SIZE(delay) - 1) 198 delay_idx++; 199 msleep(ms); 200 } else { 201 mdelay(ms); 202 } 203 } 204 205 /* 206 * Loop trying to get ownership of the mailbox. Return an error 207 * if we can't gain ownership. 208 */ 209 v = MBOWNER_G(t4_read_reg(adapter, mbox_ctl)); 210 for (i = 0; v == MBOX_OWNER_NONE && i < 3; i++) 211 v = MBOWNER_G(t4_read_reg(adapter, mbox_ctl)); 212 if (v != MBOX_OWNER_DRV) { 213 spin_lock(&adapter->mbox_lock); 214 list_del(&entry.list); 215 spin_unlock(&adapter->mbox_lock); 216 ret = (v == MBOX_OWNER_FW) ? -EBUSY : -ETIMEDOUT; 217 t4vf_record_mbox(adapter, cmd, size, access, ret); 218 return ret; 219 } 220 221 /* 222 * Write the command array into the Mailbox Data register array and 223 * transfer ownership of the mailbox to the firmware. 224 * 225 * For the VFs, the Mailbox Data "registers" are actually backed by 226 * T4's "MA" interface rather than PL Registers (as is the case for 227 * the PFs). Because these are in different coherency domains, the 228 * write to the VF's PL-register-backed Mailbox Control can race in 229 * front of the writes to the MA-backed VF Mailbox Data "registers". 230 * So we need to do a read-back on at least one byte of the VF Mailbox 231 * Data registers before doing the write to the VF Mailbox Control 232 * register. 233 */ 234 if (cmd_op != FW_VI_STATS_CMD) 235 t4vf_record_mbox(adapter, cmd, size, access, 0); 236 for (i = 0, p = cmd; i < size; i += 8) 237 t4_write_reg64(adapter, mbox_data + i, be64_to_cpu(*p++)); 238 t4_read_reg(adapter, mbox_data); /* flush write */ 239 240 t4_write_reg(adapter, mbox_ctl, 241 MBMSGVALID_F | MBOWNER_V(MBOX_OWNER_FW)); 242 t4_read_reg(adapter, mbox_ctl); /* flush write */ 243 244 /* 245 * Spin waiting for firmware to acknowledge processing our command. 246 */ 247 delay_idx = 0; 248 ms = delay[0]; 249 250 for (i = 0; i < FW_CMD_MAX_TIMEOUT; i += ms) { 251 if (sleep_ok) { 252 ms = delay[delay_idx]; 253 if (delay_idx < ARRAY_SIZE(delay) - 1) 254 delay_idx++; 255 msleep(ms); 256 } else 257 mdelay(ms); 258 259 /* 260 * If we're the owner, see if this is the reply we wanted. 261 */ 262 v = t4_read_reg(adapter, mbox_ctl); 263 if (MBOWNER_G(v) == MBOX_OWNER_DRV) { 264 /* 265 * If the Message Valid bit isn't on, revoke ownership 266 * of the mailbox and continue waiting for our reply. 267 */ 268 if ((v & MBMSGVALID_F) == 0) { 269 t4_write_reg(adapter, mbox_ctl, 270 MBOWNER_V(MBOX_OWNER_NONE)); 271 continue; 272 } 273 274 /* 275 * We now have our reply. Extract the command return 276 * value, copy the reply back to our caller's buffer 277 * (if specified) and revoke ownership of the mailbox. 278 * We return the (negated) firmware command return 279 * code (this depends on FW_SUCCESS == 0). 280 */ 281 get_mbox_rpl(adapter, cmd_rpl, size, mbox_data); 282 283 /* return value in low-order little-endian word */ 284 v = be64_to_cpu(cmd_rpl[0]); 285 286 if (rpl) { 287 /* request bit in high-order BE word */ 288 WARN_ON((be32_to_cpu(*(const __be32 *)cmd) 289 & FW_CMD_REQUEST_F) == 0); 290 memcpy(rpl, cmd_rpl, size); 291 WARN_ON((be32_to_cpu(*(__be32 *)rpl) 292 & FW_CMD_REQUEST_F) != 0); 293 } 294 t4_write_reg(adapter, mbox_ctl, 295 MBOWNER_V(MBOX_OWNER_NONE)); 296 execute = i + ms; 297 if (cmd_op != FW_VI_STATS_CMD) 298 t4vf_record_mbox(adapter, cmd_rpl, size, access, 299 execute); 300 spin_lock(&adapter->mbox_lock); 301 list_del(&entry.list); 302 spin_unlock(&adapter->mbox_lock); 303 return -FW_CMD_RETVAL_G(v); 304 } 305 } 306 307 /* We timed out. Return the error ... */ 308 ret = -ETIMEDOUT; 309 t4vf_record_mbox(adapter, cmd, size, access, ret); 310 spin_lock(&adapter->mbox_lock); 311 list_del(&entry.list); 312 spin_unlock(&adapter->mbox_lock); 313 return ret; 314} 315 316/* In the Physical Function Driver Common Code, the ADVERT_MASK is used to 317 * mask out bits in the Advertised Port Capabilities which are managed via 318 * separate controls, like Pause Frames and Forward Error Correction. In the 319 * Virtual Function Common Code, since we never perform L1 Configuration on 320 * the Link, the only things we really need to filter out are things which 321 * we decode and report separately like Speed. 322 */ 323#define ADVERT_MASK (FW_PORT_CAP32_SPEED_V(FW_PORT_CAP32_SPEED_M) | \ 324 FW_PORT_CAP32_802_3_PAUSE | \ 325 FW_PORT_CAP32_802_3_ASM_DIR | \ 326 FW_PORT_CAP32_FEC_V(FW_PORT_CAP32_FEC_M) | \ 327 FW_PORT_CAP32_ANEG) 328 329/** 330 * fwcaps16_to_caps32 - convert 16-bit Port Capabilities to 32-bits 331 * @caps16: a 16-bit Port Capabilities value 332 * 333 * Returns the equivalent 32-bit Port Capabilities value. 334 */ 335static fw_port_cap32_t fwcaps16_to_caps32(fw_port_cap16_t caps16) 336{ 337 fw_port_cap32_t caps32 = 0; 338 339 #define CAP16_TO_CAP32(__cap) \ 340 do { \ 341 if (caps16 & FW_PORT_CAP_##__cap) \ 342 caps32 |= FW_PORT_CAP32_##__cap; \ 343 } while (0) 344 345 CAP16_TO_CAP32(SPEED_100M); 346 CAP16_TO_CAP32(SPEED_1G); 347 CAP16_TO_CAP32(SPEED_25G); 348 CAP16_TO_CAP32(SPEED_10G); 349 CAP16_TO_CAP32(SPEED_40G); 350 CAP16_TO_CAP32(SPEED_100G); 351 CAP16_TO_CAP32(FC_RX); 352 CAP16_TO_CAP32(FC_TX); 353 CAP16_TO_CAP32(ANEG); 354 CAP16_TO_CAP32(MDIAUTO); 355 CAP16_TO_CAP32(MDISTRAIGHT); 356 CAP16_TO_CAP32(FEC_RS); 357 CAP16_TO_CAP32(FEC_BASER_RS); 358 CAP16_TO_CAP32(802_3_PAUSE); 359 CAP16_TO_CAP32(802_3_ASM_DIR); 360 361 #undef CAP16_TO_CAP32 362 363 return caps32; 364} 365 366/* Translate Firmware Pause specification to Common Code */ 367static inline enum cc_pause fwcap_to_cc_pause(fw_port_cap32_t fw_pause) 368{ 369 enum cc_pause cc_pause = 0; 370 371 if (fw_pause & FW_PORT_CAP32_FC_RX) 372 cc_pause |= PAUSE_RX; 373 if (fw_pause & FW_PORT_CAP32_FC_TX) 374 cc_pause |= PAUSE_TX; 375 376 return cc_pause; 377} 378 379/* Translate Firmware Forward Error Correction specification to Common Code */ 380static inline enum cc_fec fwcap_to_cc_fec(fw_port_cap32_t fw_fec) 381{ 382 enum cc_fec cc_fec = 0; 383 384 if (fw_fec & FW_PORT_CAP32_FEC_RS) 385 cc_fec |= FEC_RS; 386 if (fw_fec & FW_PORT_CAP32_FEC_BASER_RS) 387 cc_fec |= FEC_BASER_RS; 388 389 return cc_fec; 390} 391 392/* Return the highest speed set in the port capabilities, in Mb/s. */ 393static unsigned int fwcap_to_speed(fw_port_cap32_t caps) 394{ 395 #define TEST_SPEED_RETURN(__caps_speed, __speed) \ 396 do { \ 397 if (caps & FW_PORT_CAP32_SPEED_##__caps_speed) \ 398 return __speed; \ 399 } while (0) 400 401 TEST_SPEED_RETURN(400G, 400000); 402 TEST_SPEED_RETURN(200G, 200000); 403 TEST_SPEED_RETURN(100G, 100000); 404 TEST_SPEED_RETURN(50G, 50000); 405 TEST_SPEED_RETURN(40G, 40000); 406 TEST_SPEED_RETURN(25G, 25000); 407 TEST_SPEED_RETURN(10G, 10000); 408 TEST_SPEED_RETURN(1G, 1000); 409 TEST_SPEED_RETURN(100M, 100); 410 411 #undef TEST_SPEED_RETURN 412 413 return 0; 414} 415 416/** 417 * fwcap_to_fwspeed - return highest speed in Port Capabilities 418 * @acaps: advertised Port Capabilities 419 * 420 * Get the highest speed for the port from the advertised Port 421 * Capabilities. It will be either the highest speed from the list of 422 * speeds or whatever user has set using ethtool. 423 */ 424static fw_port_cap32_t fwcap_to_fwspeed(fw_port_cap32_t acaps) 425{ 426 #define TEST_SPEED_RETURN(__caps_speed) \ 427 do { \ 428 if (acaps & FW_PORT_CAP32_SPEED_##__caps_speed) \ 429 return FW_PORT_CAP32_SPEED_##__caps_speed; \ 430 } while (0) 431 432 TEST_SPEED_RETURN(400G); 433 TEST_SPEED_RETURN(200G); 434 TEST_SPEED_RETURN(100G); 435 TEST_SPEED_RETURN(50G); 436 TEST_SPEED_RETURN(40G); 437 TEST_SPEED_RETURN(25G); 438 TEST_SPEED_RETURN(10G); 439 TEST_SPEED_RETURN(1G); 440 TEST_SPEED_RETURN(100M); 441 442 #undef TEST_SPEED_RETURN 443 return 0; 444} 445 446/* 447 * init_link_config - initialize a link's SW state 448 * @lc: structure holding the link state 449 * @pcaps: link Port Capabilities 450 * @acaps: link current Advertised Port Capabilities 451 * 452 * Initializes the SW state maintained for each link, including the link's 453 * capabilities and default speed/flow-control/autonegotiation settings. 454 */ 455static void init_link_config(struct link_config *lc, 456 fw_port_cap32_t pcaps, 457 fw_port_cap32_t acaps) 458{ 459 lc->pcaps = pcaps; 460 lc->lpacaps = 0; 461 lc->speed_caps = 0; 462 lc->speed = 0; 463 lc->requested_fc = lc->fc = PAUSE_RX | PAUSE_TX; 464 465 /* For Forward Error Control, we default to whatever the Firmware 466 * tells us the Link is currently advertising. 467 */ 468 lc->auto_fec = fwcap_to_cc_fec(acaps); 469 lc->requested_fec = FEC_AUTO; 470 lc->fec = lc->auto_fec; 471 472 /* If the Port is capable of Auto-Negtotiation, initialize it as 473 * "enabled" and copy over all of the Physical Port Capabilities 474 * to the Advertised Port Capabilities. Otherwise mark it as 475 * Auto-Negotiate disabled and select the highest supported speed 476 * for the link. Note parallel structure in t4_link_l1cfg_core() 477 * and t4_handle_get_port_info(). 478 */ 479 if (lc->pcaps & FW_PORT_CAP32_ANEG) { 480 lc->acaps = acaps & ADVERT_MASK; 481 lc->autoneg = AUTONEG_ENABLE; 482 lc->requested_fc |= PAUSE_AUTONEG; 483 } else { 484 lc->acaps = 0; 485 lc->autoneg = AUTONEG_DISABLE; 486 lc->speed_caps = fwcap_to_fwspeed(acaps); 487 } 488} 489 490/** 491 * t4vf_port_init - initialize port hardware/software state 492 * @adapter: the adapter 493 * @pidx: the adapter port index 494 */ 495int t4vf_port_init(struct adapter *adapter, int pidx) 496{ 497 struct port_info *pi = adap2pinfo(adapter, pidx); 498 unsigned int fw_caps = adapter->params.fw_caps_support; 499 struct fw_vi_cmd vi_cmd, vi_rpl; 500 struct fw_port_cmd port_cmd, port_rpl; 501 enum fw_port_type port_type; 502 int mdio_addr; 503 fw_port_cap32_t pcaps, acaps; 504 int ret; 505 506 /* If we haven't yet determined whether we're talking to Firmware 507 * which knows the new 32-bit Port Capabilities, it's time to find 508 * out now. This will also tell new Firmware to send us Port Status 509 * Updates using the new 32-bit Port Capabilities version of the 510 * Port Information message. 511 */ 512 if (fw_caps == FW_CAPS_UNKNOWN) { 513 u32 param, val; 514 515 param = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_PFVF) | 516 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_PFVF_PORT_CAPS32)); 517 val = 1; 518 ret = t4vf_set_params(adapter, 1, ¶m, &val); 519 fw_caps = (ret == 0 ? FW_CAPS32 : FW_CAPS16); 520 adapter->params.fw_caps_support = fw_caps; 521 } 522 523 /* 524 * Execute a VI Read command to get our Virtual Interface information 525 * like MAC address, etc. 526 */ 527 memset(&vi_cmd, 0, sizeof(vi_cmd)); 528 vi_cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | 529 FW_CMD_REQUEST_F | 530 FW_CMD_READ_F); 531 vi_cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(vi_cmd)); 532 vi_cmd.type_viid = cpu_to_be16(FW_VI_CMD_VIID_V(pi->viid)); 533 ret = t4vf_wr_mbox(adapter, &vi_cmd, sizeof(vi_cmd), &vi_rpl); 534 if (ret != FW_SUCCESS) 535 return ret; 536 537 BUG_ON(pi->port_id != FW_VI_CMD_PORTID_G(vi_rpl.portid_pkd)); 538 pi->rss_size = FW_VI_CMD_RSSSIZE_G(be16_to_cpu(vi_rpl.rsssize_pkd)); 539 t4_os_set_hw_addr(adapter, pidx, vi_rpl.mac); 540 541 /* 542 * If we don't have read access to our port information, we're done 543 * now. Otherwise, execute a PORT Read command to get it ... 544 */ 545 if (!(adapter->params.vfres.r_caps & FW_CMD_CAP_PORT)) 546 return 0; 547 548 memset(&port_cmd, 0, sizeof(port_cmd)); 549 port_cmd.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PORT_CMD) | 550 FW_CMD_REQUEST_F | 551 FW_CMD_READ_F | 552 FW_PORT_CMD_PORTID_V(pi->port_id)); 553 port_cmd.action_to_len16 = cpu_to_be32( 554 FW_PORT_CMD_ACTION_V(fw_caps == FW_CAPS16 555 ? FW_PORT_ACTION_GET_PORT_INFO 556 : FW_PORT_ACTION_GET_PORT_INFO32) | 557 FW_LEN16(port_cmd)); 558 ret = t4vf_wr_mbox(adapter, &port_cmd, sizeof(port_cmd), &port_rpl); 559 if (ret != FW_SUCCESS) 560 return ret; 561 562 /* Extract the various fields from the Port Information message. */ 563 if (fw_caps == FW_CAPS16) { 564 u32 lstatus = be32_to_cpu(port_rpl.u.info.lstatus_to_modtype); 565 566 port_type = FW_PORT_CMD_PTYPE_G(lstatus); 567 mdio_addr = ((lstatus & FW_PORT_CMD_MDIOCAP_F) 568 ? FW_PORT_CMD_MDIOADDR_G(lstatus) 569 : -1); 570 pcaps = fwcaps16_to_caps32(be16_to_cpu(port_rpl.u.info.pcap)); 571 acaps = fwcaps16_to_caps32(be16_to_cpu(port_rpl.u.info.acap)); 572 } else { 573 u32 lstatus32 = 574 be32_to_cpu(port_rpl.u.info32.lstatus32_to_cbllen32); 575 576 port_type = FW_PORT_CMD_PORTTYPE32_G(lstatus32); 577 mdio_addr = ((lstatus32 & FW_PORT_CMD_MDIOCAP32_F) 578 ? FW_PORT_CMD_MDIOADDR32_G(lstatus32) 579 : -1); 580 pcaps = be32_to_cpu(port_rpl.u.info32.pcaps32); 581 acaps = be32_to_cpu(port_rpl.u.info32.acaps32); 582 } 583 584 pi->port_type = port_type; 585 pi->mdio_addr = mdio_addr; 586 pi->mod_type = FW_PORT_MOD_TYPE_NA; 587 588 init_link_config(&pi->link_cfg, pcaps, acaps); 589 return 0; 590} 591 592/** 593 * t4vf_fw_reset - issue a reset to FW 594 * @adapter: the adapter 595 * 596 * Issues a reset command to FW. For a Physical Function this would 597 * result in the Firmware resetting all of its state. For a Virtual 598 * Function this just resets the state associated with the VF. 599 */ 600int t4vf_fw_reset(struct adapter *adapter) 601{ 602 struct fw_reset_cmd cmd; 603 604 memset(&cmd, 0, sizeof(cmd)); 605 cmd.op_to_write = cpu_to_be32(FW_CMD_OP_V(FW_RESET_CMD) | 606 FW_CMD_WRITE_F); 607 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 608 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 609} 610 611/** 612 * t4vf_query_params - query FW or device parameters 613 * @adapter: the adapter 614 * @nparams: the number of parameters 615 * @params: the parameter names 616 * @vals: the parameter values 617 * 618 * Reads the values of firmware or device parameters. Up to 7 parameters 619 * can be queried at once. 620 */ 621static int t4vf_query_params(struct adapter *adapter, unsigned int nparams, 622 const u32 *params, u32 *vals) 623{ 624 int i, ret; 625 struct fw_params_cmd cmd, rpl; 626 struct fw_params_param *p; 627 size_t len16; 628 629 if (nparams > 7) 630 return -EINVAL; 631 632 memset(&cmd, 0, sizeof(cmd)); 633 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PARAMS_CMD) | 634 FW_CMD_REQUEST_F | 635 FW_CMD_READ_F); 636 len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd, 637 param[nparams].mnem), 16); 638 cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 639 for (i = 0, p = &cmd.param[0]; i < nparams; i++, p++) 640 p->mnem = htonl(*params++); 641 642 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 643 if (ret == 0) 644 for (i = 0, p = &rpl.param[0]; i < nparams; i++, p++) 645 *vals++ = be32_to_cpu(p->val); 646 return ret; 647} 648 649/** 650 * t4vf_set_params - sets FW or device parameters 651 * @adapter: the adapter 652 * @nparams: the number of parameters 653 * @params: the parameter names 654 * @vals: the parameter values 655 * 656 * Sets the values of firmware or device parameters. Up to 7 parameters 657 * can be specified at once. 658 */ 659int t4vf_set_params(struct adapter *adapter, unsigned int nparams, 660 const u32 *params, const u32 *vals) 661{ 662 int i; 663 struct fw_params_cmd cmd; 664 struct fw_params_param *p; 665 size_t len16; 666 667 if (nparams > 7) 668 return -EINVAL; 669 670 memset(&cmd, 0, sizeof(cmd)); 671 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PARAMS_CMD) | 672 FW_CMD_REQUEST_F | 673 FW_CMD_WRITE_F); 674 len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd, 675 param[nparams]), 16); 676 cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 677 for (i = 0, p = &cmd.param[0]; i < nparams; i++, p++) { 678 p->mnem = cpu_to_be32(*params++); 679 p->val = cpu_to_be32(*vals++); 680 } 681 682 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 683} 684 685/** 686 * t4vf_fl_pkt_align - return the fl packet alignment 687 * @adapter: the adapter 688 * 689 * T4 has a single field to specify the packing and padding boundary. 690 * T5 onwards has separate fields for this and hence the alignment for 691 * next packet offset is maximum of these two. And T6 changes the 692 * Ingress Padding Boundary Shift, so it's all a mess and it's best 693 * if we put this in low-level Common Code ... 694 * 695 */ 696int t4vf_fl_pkt_align(struct adapter *adapter) 697{ 698 u32 sge_control, sge_control2; 699 unsigned int ingpadboundary, ingpackboundary, fl_align, ingpad_shift; 700 701 sge_control = adapter->params.sge.sge_control; 702 703 /* T4 uses a single control field to specify both the PCIe Padding and 704 * Packing Boundary. T5 introduced the ability to specify these 705 * separately. The actual Ingress Packet Data alignment boundary 706 * within Packed Buffer Mode is the maximum of these two 707 * specifications. (Note that it makes no real practical sense to 708 * have the Pading Boudary be larger than the Packing Boundary but you 709 * could set the chip up that way and, in fact, legacy T4 code would 710 * end doing this because it would initialize the Padding Boundary and 711 * leave the Packing Boundary initialized to 0 (16 bytes).) 712 * Padding Boundary values in T6 starts from 8B, 713 * where as it is 32B for T4 and T5. 714 */ 715 if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5) 716 ingpad_shift = INGPADBOUNDARY_SHIFT_X; 717 else 718 ingpad_shift = T6_INGPADBOUNDARY_SHIFT_X; 719 720 ingpadboundary = 1 << (INGPADBOUNDARY_G(sge_control) + ingpad_shift); 721 722 fl_align = ingpadboundary; 723 if (!is_t4(adapter->params.chip)) { 724 /* T5 has a different interpretation of one of the PCIe Packing 725 * Boundary values. 726 */ 727 sge_control2 = adapter->params.sge.sge_control2; 728 ingpackboundary = INGPACKBOUNDARY_G(sge_control2); 729 if (ingpackboundary == INGPACKBOUNDARY_16B_X) 730 ingpackboundary = 16; 731 else 732 ingpackboundary = 1 << (ingpackboundary + 733 INGPACKBOUNDARY_SHIFT_X); 734 735 fl_align = max(ingpadboundary, ingpackboundary); 736 } 737 return fl_align; 738} 739 740/** 741 * t4vf_bar2_sge_qregs - return BAR2 SGE Queue register information 742 * @adapter: the adapter 743 * @qid: the Queue ID 744 * @qtype: the Ingress or Egress type for @qid 745 * @pbar2_qoffset: BAR2 Queue Offset 746 * @pbar2_qid: BAR2 Queue ID or 0 for Queue ID inferred SGE Queues 747 * 748 * Returns the BAR2 SGE Queue Registers information associated with the 749 * indicated Absolute Queue ID. These are passed back in return value 750 * pointers. @qtype should be T4_BAR2_QTYPE_EGRESS for Egress Queue 751 * and T4_BAR2_QTYPE_INGRESS for Ingress Queues. 752 * 753 * This may return an error which indicates that BAR2 SGE Queue 754 * registers aren't available. If an error is not returned, then the 755 * following values are returned: 756 * 757 * *@pbar2_qoffset: the BAR2 Offset of the @qid Registers 758 * *@pbar2_qid: the BAR2 SGE Queue ID or 0 of @qid 759 * 760 * If the returned BAR2 Queue ID is 0, then BAR2 SGE registers which 761 * require the "Inferred Queue ID" ability may be used. E.g. the 762 * Write Combining Doorbell Buffer. If the BAR2 Queue ID is not 0, 763 * then these "Inferred Queue ID" register may not be used. 764 */ 765int t4vf_bar2_sge_qregs(struct adapter *adapter, 766 unsigned int qid, 767 enum t4_bar2_qtype qtype, 768 u64 *pbar2_qoffset, 769 unsigned int *pbar2_qid) 770{ 771 unsigned int page_shift, page_size, qpp_shift, qpp_mask; 772 u64 bar2_page_offset, bar2_qoffset; 773 unsigned int bar2_qid, bar2_qid_offset, bar2_qinferred; 774 775 /* T4 doesn't support BAR2 SGE Queue registers. 776 */ 777 if (is_t4(adapter->params.chip)) 778 return -EINVAL; 779 780 /* Get our SGE Page Size parameters. 781 */ 782 page_shift = adapter->params.sge.sge_vf_hps + 10; 783 page_size = 1 << page_shift; 784 785 /* Get the right Queues per Page parameters for our Queue. 786 */ 787 qpp_shift = (qtype == T4_BAR2_QTYPE_EGRESS 788 ? adapter->params.sge.sge_vf_eq_qpp 789 : adapter->params.sge.sge_vf_iq_qpp); 790 qpp_mask = (1 << qpp_shift) - 1; 791 792 /* Calculate the basics of the BAR2 SGE Queue register area: 793 * o The BAR2 page the Queue registers will be in. 794 * o The BAR2 Queue ID. 795 * o The BAR2 Queue ID Offset into the BAR2 page. 796 */ 797 bar2_page_offset = ((u64)(qid >> qpp_shift) << page_shift); 798 bar2_qid = qid & qpp_mask; 799 bar2_qid_offset = bar2_qid * SGE_UDB_SIZE; 800 801 /* If the BAR2 Queue ID Offset is less than the Page Size, then the 802 * hardware will infer the Absolute Queue ID simply from the writes to 803 * the BAR2 Queue ID Offset within the BAR2 Page (and we need to use a 804 * BAR2 Queue ID of 0 for those writes). Otherwise, we'll simply 805 * write to the first BAR2 SGE Queue Area within the BAR2 Page with 806 * the BAR2 Queue ID and the hardware will infer the Absolute Queue ID 807 * from the BAR2 Page and BAR2 Queue ID. 808 * 809 * One important censequence of this is that some BAR2 SGE registers 810 * have a "Queue ID" field and we can write the BAR2 SGE Queue ID 811 * there. But other registers synthesize the SGE Queue ID purely 812 * from the writes to the registers -- the Write Combined Doorbell 813 * Buffer is a good example. These BAR2 SGE Registers are only 814 * available for those BAR2 SGE Register areas where the SGE Absolute 815 * Queue ID can be inferred from simple writes. 816 */ 817 bar2_qoffset = bar2_page_offset; 818 bar2_qinferred = (bar2_qid_offset < page_size); 819 if (bar2_qinferred) { 820 bar2_qoffset += bar2_qid_offset; 821 bar2_qid = 0; 822 } 823 824 *pbar2_qoffset = bar2_qoffset; 825 *pbar2_qid = bar2_qid; 826 return 0; 827} 828 829unsigned int t4vf_get_pf_from_vf(struct adapter *adapter) 830{ 831 u32 whoami; 832 833 whoami = t4_read_reg(adapter, T4VF_PL_BASE_ADDR + PL_VF_WHOAMI_A); 834 return (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5 ? 835 SOURCEPF_G(whoami) : T6_SOURCEPF_G(whoami)); 836} 837 838/** 839 * t4vf_get_sge_params - retrieve adapter Scatter gather Engine parameters 840 * @adapter: the adapter 841 * 842 * Retrieves various core SGE parameters in the form of hardware SGE 843 * register values. The caller is responsible for decoding these as 844 * needed. The SGE parameters are stored in @adapter->params.sge. 845 */ 846int t4vf_get_sge_params(struct adapter *adapter) 847{ 848 struct sge_params *sge_params = &adapter->params.sge; 849 u32 params[7], vals[7]; 850 int v; 851 852 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 853 FW_PARAMS_PARAM_XYZ_V(SGE_CONTROL_A)); 854 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 855 FW_PARAMS_PARAM_XYZ_V(SGE_HOST_PAGE_SIZE_A)); 856 params[2] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 857 FW_PARAMS_PARAM_XYZ_V(SGE_FL_BUFFER_SIZE0_A)); 858 params[3] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 859 FW_PARAMS_PARAM_XYZ_V(SGE_FL_BUFFER_SIZE1_A)); 860 params[4] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 861 FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_0_AND_1_A)); 862 params[5] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 863 FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_2_AND_3_A)); 864 params[6] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 865 FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_4_AND_5_A)); 866 v = t4vf_query_params(adapter, 7, params, vals); 867 if (v) 868 return v; 869 sge_params->sge_control = vals[0]; 870 sge_params->sge_host_page_size = vals[1]; 871 sge_params->sge_fl_buffer_size[0] = vals[2]; 872 sge_params->sge_fl_buffer_size[1] = vals[3]; 873 sge_params->sge_timer_value_0_and_1 = vals[4]; 874 sge_params->sge_timer_value_2_and_3 = vals[5]; 875 sge_params->sge_timer_value_4_and_5 = vals[6]; 876 877 /* T4 uses a single control field to specify both the PCIe Padding and 878 * Packing Boundary. T5 introduced the ability to specify these 879 * separately with the Padding Boundary in SGE_CONTROL and and Packing 880 * Boundary in SGE_CONTROL2. So for T5 and later we need to grab 881 * SGE_CONTROL in order to determine how ingress packet data will be 882 * laid out in Packed Buffer Mode. Unfortunately, older versions of 883 * the firmware won't let us retrieve SGE_CONTROL2 so if we get a 884 * failure grabbing it we throw an error since we can't figure out the 885 * right value. 886 */ 887 if (!is_t4(adapter->params.chip)) { 888 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 889 FW_PARAMS_PARAM_XYZ_V(SGE_CONTROL2_A)); 890 v = t4vf_query_params(adapter, 1, params, vals); 891 if (v != FW_SUCCESS) { 892 dev_err(adapter->pdev_dev, 893 "Unable to get SGE Control2; " 894 "probably old firmware.\n"); 895 return v; 896 } 897 sge_params->sge_control2 = vals[0]; 898 } 899 900 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 901 FW_PARAMS_PARAM_XYZ_V(SGE_INGRESS_RX_THRESHOLD_A)); 902 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 903 FW_PARAMS_PARAM_XYZ_V(SGE_CONM_CTRL_A)); 904 v = t4vf_query_params(adapter, 2, params, vals); 905 if (v) 906 return v; 907 sge_params->sge_ingress_rx_threshold = vals[0]; 908 sge_params->sge_congestion_control = vals[1]; 909 910 /* For T5 and later we want to use the new BAR2 Doorbells. 911 * Unfortunately, older firmware didn't allow the this register to be 912 * read. 913 */ 914 if (!is_t4(adapter->params.chip)) { 915 unsigned int pf, s_hps, s_qpp; 916 917 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 918 FW_PARAMS_PARAM_XYZ_V( 919 SGE_EGRESS_QUEUES_PER_PAGE_VF_A)); 920 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 921 FW_PARAMS_PARAM_XYZ_V( 922 SGE_INGRESS_QUEUES_PER_PAGE_VF_A)); 923 v = t4vf_query_params(adapter, 2, params, vals); 924 if (v != FW_SUCCESS) { 925 dev_warn(adapter->pdev_dev, 926 "Unable to get VF SGE Queues/Page; " 927 "probably old firmware.\n"); 928 return v; 929 } 930 sge_params->sge_egress_queues_per_page = vals[0]; 931 sge_params->sge_ingress_queues_per_page = vals[1]; 932 933 /* We need the Queues/Page for our VF. This is based on the 934 * PF from which we're instantiated and is indexed in the 935 * register we just read. Do it once here so other code in 936 * the driver can just use it. 937 */ 938 pf = t4vf_get_pf_from_vf(adapter); 939 s_hps = (HOSTPAGESIZEPF0_S + 940 (HOSTPAGESIZEPF1_S - HOSTPAGESIZEPF0_S) * pf); 941 sge_params->sge_vf_hps = 942 ((sge_params->sge_host_page_size >> s_hps) 943 & HOSTPAGESIZEPF0_M); 944 945 s_qpp = (QUEUESPERPAGEPF0_S + 946 (QUEUESPERPAGEPF1_S - QUEUESPERPAGEPF0_S) * pf); 947 sge_params->sge_vf_eq_qpp = 948 ((sge_params->sge_egress_queues_per_page >> s_qpp) 949 & QUEUESPERPAGEPF0_M); 950 sge_params->sge_vf_iq_qpp = 951 ((sge_params->sge_ingress_queues_per_page >> s_qpp) 952 & QUEUESPERPAGEPF0_M); 953 } 954 955 return 0; 956} 957 958/** 959 * t4vf_get_vpd_params - retrieve device VPD paremeters 960 * @adapter: the adapter 961 * 962 * Retrives various device Vital Product Data parameters. The parameters 963 * are stored in @adapter->params.vpd. 964 */ 965int t4vf_get_vpd_params(struct adapter *adapter) 966{ 967 struct vpd_params *vpd_params = &adapter->params.vpd; 968 u32 params[7], vals[7]; 969 int v; 970 971 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 972 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_CCLK)); 973 v = t4vf_query_params(adapter, 1, params, vals); 974 if (v) 975 return v; 976 vpd_params->cclk = vals[0]; 977 978 return 0; 979} 980 981/** 982 * t4vf_get_dev_params - retrieve device paremeters 983 * @adapter: the adapter 984 * 985 * Retrives various device parameters. The parameters are stored in 986 * @adapter->params.dev. 987 */ 988int t4vf_get_dev_params(struct adapter *adapter) 989{ 990 struct dev_params *dev_params = &adapter->params.dev; 991 u32 params[7], vals[7]; 992 int v; 993 994 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 995 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_FWREV)); 996 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 997 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_TPREV)); 998 v = t4vf_query_params(adapter, 2, params, vals); 999 if (v) 1000 return v; 1001 dev_params->fwrev = vals[0]; 1002 dev_params->tprev = vals[1]; 1003 1004 return 0; 1005} 1006 1007/** 1008 * t4vf_get_rss_glb_config - retrieve adapter RSS Global Configuration 1009 * @adapter: the adapter 1010 * 1011 * Retrieves global RSS mode and parameters with which we have to live 1012 * and stores them in the @adapter's RSS parameters. 1013 */ 1014int t4vf_get_rss_glb_config(struct adapter *adapter) 1015{ 1016 struct rss_params *rss = &adapter->params.rss; 1017 struct fw_rss_glb_config_cmd cmd, rpl; 1018 int v; 1019 1020 /* 1021 * Execute an RSS Global Configuration read command to retrieve 1022 * our RSS configuration. 1023 */ 1024 memset(&cmd, 0, sizeof(cmd)); 1025 cmd.op_to_write = cpu_to_be32(FW_CMD_OP_V(FW_RSS_GLB_CONFIG_CMD) | 1026 FW_CMD_REQUEST_F | 1027 FW_CMD_READ_F); 1028 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1029 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1030 if (v) 1031 return v; 1032 1033 /* 1034 * Transate the big-endian RSS Global Configuration into our 1035 * cpu-endian format based on the RSS mode. We also do first level 1036 * filtering at this point to weed out modes which don't support 1037 * VF Drivers ... 1038 */ 1039 rss->mode = FW_RSS_GLB_CONFIG_CMD_MODE_G( 1040 be32_to_cpu(rpl.u.manual.mode_pkd)); 1041 switch (rss->mode) { 1042 case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { 1043 u32 word = be32_to_cpu( 1044 rpl.u.basicvirtual.synmapen_to_hashtoeplitz); 1045 1046 rss->u.basicvirtual.synmapen = 1047 ((word & FW_RSS_GLB_CONFIG_CMD_SYNMAPEN_F) != 0); 1048 rss->u.basicvirtual.syn4tupenipv6 = 1049 ((word & FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV6_F) != 0); 1050 rss->u.basicvirtual.syn2tupenipv6 = 1051 ((word & FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV6_F) != 0); 1052 rss->u.basicvirtual.syn4tupenipv4 = 1053 ((word & FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV4_F) != 0); 1054 rss->u.basicvirtual.syn2tupenipv4 = 1055 ((word & FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV4_F) != 0); 1056 1057 rss->u.basicvirtual.ofdmapen = 1058 ((word & FW_RSS_GLB_CONFIG_CMD_OFDMAPEN_F) != 0); 1059 1060 rss->u.basicvirtual.tnlmapen = 1061 ((word & FW_RSS_GLB_CONFIG_CMD_TNLMAPEN_F) != 0); 1062 rss->u.basicvirtual.tnlalllookup = 1063 ((word & FW_RSS_GLB_CONFIG_CMD_TNLALLLKP_F) != 0); 1064 1065 rss->u.basicvirtual.hashtoeplitz = 1066 ((word & FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ_F) != 0); 1067 1068 /* we need at least Tunnel Map Enable to be set */ 1069 if (!rss->u.basicvirtual.tnlmapen) 1070 return -EINVAL; 1071 break; 1072 } 1073 1074 default: 1075 /* all unknown/unsupported RSS modes result in an error */ 1076 return -EINVAL; 1077 } 1078 1079 return 0; 1080} 1081 1082/** 1083 * t4vf_get_vfres - retrieve VF resource limits 1084 * @adapter: the adapter 1085 * 1086 * Retrieves configured resource limits and capabilities for a virtual 1087 * function. The results are stored in @adapter->vfres. 1088 */ 1089int t4vf_get_vfres(struct adapter *adapter) 1090{ 1091 struct vf_resources *vfres = &adapter->params.vfres; 1092 struct fw_pfvf_cmd cmd, rpl; 1093 int v; 1094 u32 word; 1095 1096 /* 1097 * Execute PFVF Read command to get VF resource limits; bail out early 1098 * with error on command failure. 1099 */ 1100 memset(&cmd, 0, sizeof(cmd)); 1101 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PFVF_CMD) | 1102 FW_CMD_REQUEST_F | 1103 FW_CMD_READ_F); 1104 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1105 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1106 if (v) 1107 return v; 1108 1109 /* 1110 * Extract VF resource limits and return success. 1111 */ 1112 word = be32_to_cpu(rpl.niqflint_niq); 1113 vfres->niqflint = FW_PFVF_CMD_NIQFLINT_G(word); 1114 vfres->niq = FW_PFVF_CMD_NIQ_G(word); 1115 1116 word = be32_to_cpu(rpl.type_to_neq); 1117 vfres->neq = FW_PFVF_CMD_NEQ_G(word); 1118 vfres->pmask = FW_PFVF_CMD_PMASK_G(word); 1119 1120 word = be32_to_cpu(rpl.tc_to_nexactf); 1121 vfres->tc = FW_PFVF_CMD_TC_G(word); 1122 vfres->nvi = FW_PFVF_CMD_NVI_G(word); 1123 vfres->nexactf = FW_PFVF_CMD_NEXACTF_G(word); 1124 1125 word = be32_to_cpu(rpl.r_caps_to_nethctrl); 1126 vfres->r_caps = FW_PFVF_CMD_R_CAPS_G(word); 1127 vfres->wx_caps = FW_PFVF_CMD_WX_CAPS_G(word); 1128 vfres->nethctrl = FW_PFVF_CMD_NETHCTRL_G(word); 1129 1130 return 0; 1131} 1132 1133/** 1134 * t4vf_read_rss_vi_config - read a VI's RSS configuration 1135 * @adapter: the adapter 1136 * @viid: Virtual Interface ID 1137 * @config: pointer to host-native VI RSS Configuration buffer 1138 * 1139 * Reads the Virtual Interface's RSS configuration information and 1140 * translates it into CPU-native format. 1141 */ 1142int t4vf_read_rss_vi_config(struct adapter *adapter, unsigned int viid, 1143 union rss_vi_config *config) 1144{ 1145 struct fw_rss_vi_config_cmd cmd, rpl; 1146 int v; 1147 1148 memset(&cmd, 0, sizeof(cmd)); 1149 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_VI_CONFIG_CMD) | 1150 FW_CMD_REQUEST_F | 1151 FW_CMD_READ_F | 1152 FW_RSS_VI_CONFIG_CMD_VIID(viid)); 1153 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1154 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1155 if (v) 1156 return v; 1157 1158 switch (adapter->params.rss.mode) { 1159 case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { 1160 u32 word = be32_to_cpu(rpl.u.basicvirtual.defaultq_to_udpen); 1161 1162 config->basicvirtual.ip6fourtupen = 1163 ((word & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) != 0); 1164 config->basicvirtual.ip6twotupen = 1165 ((word & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) != 0); 1166 config->basicvirtual.ip4fourtupen = 1167 ((word & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) != 0); 1168 config->basicvirtual.ip4twotupen = 1169 ((word & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) != 0); 1170 config->basicvirtual.udpen = 1171 ((word & FW_RSS_VI_CONFIG_CMD_UDPEN_F) != 0); 1172 config->basicvirtual.defaultq = 1173 FW_RSS_VI_CONFIG_CMD_DEFAULTQ_G(word); 1174 break; 1175 } 1176 1177 default: 1178 return -EINVAL; 1179 } 1180 1181 return 0; 1182} 1183 1184/** 1185 * t4vf_write_rss_vi_config - write a VI's RSS configuration 1186 * @adapter: the adapter 1187 * @viid: Virtual Interface ID 1188 * @config: pointer to host-native VI RSS Configuration buffer 1189 * 1190 * Write the Virtual Interface's RSS configuration information 1191 * (translating it into firmware-native format before writing). 1192 */ 1193int t4vf_write_rss_vi_config(struct adapter *adapter, unsigned int viid, 1194 union rss_vi_config *config) 1195{ 1196 struct fw_rss_vi_config_cmd cmd, rpl; 1197 1198 memset(&cmd, 0, sizeof(cmd)); 1199 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_VI_CONFIG_CMD) | 1200 FW_CMD_REQUEST_F | 1201 FW_CMD_WRITE_F | 1202 FW_RSS_VI_CONFIG_CMD_VIID(viid)); 1203 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1204 switch (adapter->params.rss.mode) { 1205 case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { 1206 u32 word = 0; 1207 1208 if (config->basicvirtual.ip6fourtupen) 1209 word |= FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F; 1210 if (config->basicvirtual.ip6twotupen) 1211 word |= FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F; 1212 if (config->basicvirtual.ip4fourtupen) 1213 word |= FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F; 1214 if (config->basicvirtual.ip4twotupen) 1215 word |= FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F; 1216 if (config->basicvirtual.udpen) 1217 word |= FW_RSS_VI_CONFIG_CMD_UDPEN_F; 1218 word |= FW_RSS_VI_CONFIG_CMD_DEFAULTQ_V( 1219 config->basicvirtual.defaultq); 1220 cmd.u.basicvirtual.defaultq_to_udpen = cpu_to_be32(word); 1221 break; 1222 } 1223 1224 default: 1225 return -EINVAL; 1226 } 1227 1228 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1229} 1230 1231/** 1232 * t4vf_config_rss_range - configure a portion of the RSS mapping table 1233 * @adapter: the adapter 1234 * @viid: Virtual Interface of RSS Table Slice 1235 * @start: starting entry in the table to write 1236 * @n: how many table entries to write 1237 * @rspq: values for the "Response Queue" (Ingress Queue) lookup table 1238 * @nrspq: number of values in @rspq 1239 * 1240 * Programs the selected part of the VI's RSS mapping table with the 1241 * provided values. If @nrspq < @n the supplied values are used repeatedly 1242 * until the full table range is populated. 1243 * 1244 * The caller must ensure the values in @rspq are in the range 0..1023. 1245 */ 1246int t4vf_config_rss_range(struct adapter *adapter, unsigned int viid, 1247 int start, int n, const u16 *rspq, int nrspq) 1248{ 1249 const u16 *rsp = rspq; 1250 const u16 *rsp_end = rspq+nrspq; 1251 struct fw_rss_ind_tbl_cmd cmd; 1252 1253 /* 1254 * Initialize firmware command template to write the RSS table. 1255 */ 1256 memset(&cmd, 0, sizeof(cmd)); 1257 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_IND_TBL_CMD) | 1258 FW_CMD_REQUEST_F | 1259 FW_CMD_WRITE_F | 1260 FW_RSS_IND_TBL_CMD_VIID_V(viid)); 1261 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1262 1263 /* 1264 * Each firmware RSS command can accommodate up to 32 RSS Ingress 1265 * Queue Identifiers. These Ingress Queue IDs are packed three to 1266 * a 32-bit word as 10-bit values with the upper remaining 2 bits 1267 * reserved. 1268 */ 1269 while (n > 0) { 1270 __be32 *qp = &cmd.iq0_to_iq2; 1271 int nq = min(n, 32); 1272 int ret; 1273 1274 /* 1275 * Set up the firmware RSS command header to send the next 1276 * "nq" Ingress Queue IDs to the firmware. 1277 */ 1278 cmd.niqid = cpu_to_be16(nq); 1279 cmd.startidx = cpu_to_be16(start); 1280 1281 /* 1282 * "nq" more done for the start of the next loop. 1283 */ 1284 start += nq; 1285 n -= nq; 1286 1287 /* 1288 * While there are still Ingress Queue IDs to stuff into the 1289 * current firmware RSS command, retrieve them from the 1290 * Ingress Queue ID array and insert them into the command. 1291 */ 1292 while (nq > 0) { 1293 /* 1294 * Grab up to the next 3 Ingress Queue IDs (wrapping 1295 * around the Ingress Queue ID array if necessary) and 1296 * insert them into the firmware RSS command at the 1297 * current 3-tuple position within the commad. 1298 */ 1299 u16 qbuf[3]; 1300 u16 *qbp = qbuf; 1301 int nqbuf = min(3, nq); 1302 1303 nq -= nqbuf; 1304 qbuf[0] = qbuf[1] = qbuf[2] = 0; 1305 while (nqbuf) { 1306 nqbuf--; 1307 *qbp++ = *rsp++; 1308 if (rsp >= rsp_end) 1309 rsp = rspq; 1310 } 1311 *qp++ = cpu_to_be32(FW_RSS_IND_TBL_CMD_IQ0_V(qbuf[0]) | 1312 FW_RSS_IND_TBL_CMD_IQ1_V(qbuf[1]) | 1313 FW_RSS_IND_TBL_CMD_IQ2_V(qbuf[2])); 1314 } 1315 1316 /* 1317 * Send this portion of the RRS table update to the firmware; 1318 * bail out on any errors. 1319 */ 1320 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1321 if (ret) 1322 return ret; 1323 } 1324 return 0; 1325} 1326 1327/** 1328 * t4vf_alloc_vi - allocate a virtual interface on a port 1329 * @adapter: the adapter 1330 * @port_id: physical port associated with the VI 1331 * 1332 * Allocate a new Virtual Interface and bind it to the indicated 1333 * physical port. Return the new Virtual Interface Identifier on 1334 * success, or a [negative] error number on failure. 1335 */ 1336int t4vf_alloc_vi(struct adapter *adapter, int port_id) 1337{ 1338 struct fw_vi_cmd cmd, rpl; 1339 int v; 1340 1341 /* 1342 * Execute a VI command to allocate Virtual Interface and return its 1343 * VIID. 1344 */ 1345 memset(&cmd, 0, sizeof(cmd)); 1346 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | 1347 FW_CMD_REQUEST_F | 1348 FW_CMD_WRITE_F | 1349 FW_CMD_EXEC_F); 1350 cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(cmd) | 1351 FW_VI_CMD_ALLOC_F); 1352 cmd.portid_pkd = FW_VI_CMD_PORTID_V(port_id); 1353 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1354 if (v) 1355 return v; 1356 1357 return FW_VI_CMD_VIID_G(be16_to_cpu(rpl.type_viid)); 1358} 1359 1360/** 1361 * t4vf_free_vi -- free a virtual interface 1362 * @adapter: the adapter 1363 * @viid: the virtual interface identifier 1364 * 1365 * Free a previously allocated Virtual Interface. Return an error on 1366 * failure. 1367 */ 1368int t4vf_free_vi(struct adapter *adapter, int viid) 1369{ 1370 struct fw_vi_cmd cmd; 1371 1372 /* 1373 * Execute a VI command to free the Virtual Interface. 1374 */ 1375 memset(&cmd, 0, sizeof(cmd)); 1376 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | 1377 FW_CMD_REQUEST_F | 1378 FW_CMD_EXEC_F); 1379 cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(cmd) | 1380 FW_VI_CMD_FREE_F); 1381 cmd.type_viid = cpu_to_be16(FW_VI_CMD_VIID_V(viid)); 1382 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1383} 1384 1385/** 1386 * t4vf_enable_vi - enable/disable a virtual interface 1387 * @adapter: the adapter 1388 * @viid: the Virtual Interface ID 1389 * @rx_en: 1=enable Rx, 0=disable Rx 1390 * @tx_en: 1=enable Tx, 0=disable Tx 1391 * 1392 * Enables/disables a virtual interface. 1393 */ 1394int t4vf_enable_vi(struct adapter *adapter, unsigned int viid, 1395 bool rx_en, bool tx_en) 1396{ 1397 struct fw_vi_enable_cmd cmd; 1398 1399 memset(&cmd, 0, sizeof(cmd)); 1400 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_ENABLE_CMD) | 1401 FW_CMD_REQUEST_F | 1402 FW_CMD_EXEC_F | 1403 FW_VI_ENABLE_CMD_VIID_V(viid)); 1404 cmd.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_IEN_V(rx_en) | 1405 FW_VI_ENABLE_CMD_EEN_V(tx_en) | 1406 FW_LEN16(cmd)); 1407 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1408} 1409 1410/** 1411 * t4vf_enable_pi - enable/disable a Port's virtual interface 1412 * @adapter: the adapter 1413 * @pi: the Port Information structure 1414 * @rx_en: 1=enable Rx, 0=disable Rx 1415 * @tx_en: 1=enable Tx, 0=disable Tx 1416 * 1417 * Enables/disables a Port's virtual interface. If the Virtual 1418 * Interface enable/disable operation is successful, we notify the 1419 * OS-specific code of a potential Link Status change via the OS Contract 1420 * API t4vf_os_link_changed(). 1421 */ 1422int t4vf_enable_pi(struct adapter *adapter, struct port_info *pi, 1423 bool rx_en, bool tx_en) 1424{ 1425 int ret = t4vf_enable_vi(adapter, pi->viid, rx_en, tx_en); 1426 1427 if (ret) 1428 return ret; 1429 t4vf_os_link_changed(adapter, pi->pidx, 1430 rx_en && tx_en && pi->link_cfg.link_ok); 1431 return 0; 1432} 1433 1434/** 1435 * t4vf_identify_port - identify a VI's port by blinking its LED 1436 * @adapter: the adapter 1437 * @viid: the Virtual Interface ID 1438 * @nblinks: how many times to blink LED at 2.5 Hz 1439 * 1440 * Identifies a VI's port by blinking its LED. 1441 */ 1442int t4vf_identify_port(struct adapter *adapter, unsigned int viid, 1443 unsigned int nblinks) 1444{ 1445 struct fw_vi_enable_cmd cmd; 1446 1447 memset(&cmd, 0, sizeof(cmd)); 1448 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_ENABLE_CMD) | 1449 FW_CMD_REQUEST_F | 1450 FW_CMD_EXEC_F | 1451 FW_VI_ENABLE_CMD_VIID_V(viid)); 1452 cmd.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_LED_F | 1453 FW_LEN16(cmd)); 1454 cmd.blinkdur = cpu_to_be16(nblinks); 1455 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1456} 1457 1458/** 1459 * t4vf_set_rxmode - set Rx properties of a virtual interface 1460 * @adapter: the adapter 1461 * @viid: the VI id 1462 * @mtu: the new MTU or -1 for no change 1463 * @promisc: 1 to enable promiscuous mode, 0 to disable it, -1 no change 1464 * @all_multi: 1 to enable all-multi mode, 0 to disable it, -1 no change 1465 * @bcast: 1 to enable broadcast Rx, 0 to disable it, -1 no change 1466 * @vlanex: 1 to enable hardware VLAN Tag extraction, 0 to disable it, 1467 * -1 no change 1468 * @sleep_ok: call is allowed to sleep 1469 * 1470 * Sets Rx properties of a virtual interface. 1471 */ 1472int t4vf_set_rxmode(struct adapter *adapter, unsigned int viid, 1473 int mtu, int promisc, int all_multi, int bcast, int vlanex, 1474 bool sleep_ok) 1475{ 1476 struct fw_vi_rxmode_cmd cmd; 1477 1478 /* convert to FW values */ 1479 if (mtu < 0) 1480 mtu = FW_VI_RXMODE_CMD_MTU_M; 1481 if (promisc < 0) 1482 promisc = FW_VI_RXMODE_CMD_PROMISCEN_M; 1483 if (all_multi < 0) 1484 all_multi = FW_VI_RXMODE_CMD_ALLMULTIEN_M; 1485 if (bcast < 0) 1486 bcast = FW_VI_RXMODE_CMD_BROADCASTEN_M; 1487 if (vlanex < 0) 1488 vlanex = FW_VI_RXMODE_CMD_VLANEXEN_M; 1489 1490 memset(&cmd, 0, sizeof(cmd)); 1491 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_RXMODE_CMD) | 1492 FW_CMD_REQUEST_F | 1493 FW_CMD_WRITE_F | 1494 FW_VI_RXMODE_CMD_VIID_V(viid)); 1495 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1496 cmd.mtu_to_vlanexen = 1497 cpu_to_be32(FW_VI_RXMODE_CMD_MTU_V(mtu) | 1498 FW_VI_RXMODE_CMD_PROMISCEN_V(promisc) | 1499 FW_VI_RXMODE_CMD_ALLMULTIEN_V(all_multi) | 1500 FW_VI_RXMODE_CMD_BROADCASTEN_V(bcast) | 1501 FW_VI_RXMODE_CMD_VLANEXEN_V(vlanex)); 1502 return t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), NULL, sleep_ok); 1503} 1504 1505/** 1506 * t4vf_alloc_mac_filt - allocates exact-match filters for MAC addresses 1507 * @adapter: the adapter 1508 * @viid: the Virtual Interface Identifier 1509 * @free: if true any existing filters for this VI id are first removed 1510 * @naddr: the number of MAC addresses to allocate filters for (up to 7) 1511 * @addr: the MAC address(es) 1512 * @idx: where to store the index of each allocated filter 1513 * @hash: pointer to hash address filter bitmap 1514 * @sleep_ok: call is allowed to sleep 1515 * 1516 * Allocates an exact-match filter for each of the supplied addresses and 1517 * sets it to the corresponding address. If @idx is not %NULL it should 1518 * have at least @naddr entries, each of which will be set to the index of 1519 * the filter allocated for the corresponding MAC address. If a filter 1520 * could not be allocated for an address its index is set to 0xffff. 1521 * If @hash is not %NULL addresses that fail to allocate an exact filter 1522 * are hashed and update the hash filter bitmap pointed at by @hash. 1523 * 1524 * Returns a negative error number or the number of filters allocated. 1525 */ 1526int t4vf_alloc_mac_filt(struct adapter *adapter, unsigned int viid, bool free, 1527 unsigned int naddr, const u8 **addr, u16 *idx, 1528 u64 *hash, bool sleep_ok) 1529{ 1530 int offset, ret = 0; 1531 unsigned nfilters = 0; 1532 unsigned int rem = naddr; 1533 struct fw_vi_mac_cmd cmd, rpl; 1534 unsigned int max_naddr = adapter->params.arch.mps_tcam_size; 1535 1536 if (naddr > max_naddr) 1537 return -EINVAL; 1538 1539 for (offset = 0; offset < naddr; /**/) { 1540 unsigned int fw_naddr = (rem < ARRAY_SIZE(cmd.u.exact) 1541 ? rem 1542 : ARRAY_SIZE(cmd.u.exact)); 1543 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1544 u.exact[fw_naddr]), 16); 1545 struct fw_vi_mac_exact *p; 1546 int i; 1547 1548 memset(&cmd, 0, sizeof(cmd)); 1549 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1550 FW_CMD_REQUEST_F | 1551 FW_CMD_WRITE_F | 1552 (free ? FW_CMD_EXEC_F : 0) | 1553 FW_VI_MAC_CMD_VIID_V(viid)); 1554 cmd.freemacs_to_len16 = 1555 cpu_to_be32(FW_VI_MAC_CMD_FREEMACS_V(free) | 1556 FW_CMD_LEN16_V(len16)); 1557 1558 for (i = 0, p = cmd.u.exact; i < fw_naddr; i++, p++) { 1559 p->valid_to_idx = cpu_to_be16( 1560 FW_VI_MAC_CMD_VALID_F | 1561 FW_VI_MAC_CMD_IDX_V(FW_VI_MAC_ADD_MAC)); 1562 memcpy(p->macaddr, addr[offset+i], sizeof(p->macaddr)); 1563 } 1564 1565 1566 ret = t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), &rpl, 1567 sleep_ok); 1568 if (ret && ret != -ENOMEM) 1569 break; 1570 1571 for (i = 0, p = rpl.u.exact; i < fw_naddr; i++, p++) { 1572 u16 index = FW_VI_MAC_CMD_IDX_G( 1573 be16_to_cpu(p->valid_to_idx)); 1574 1575 if (idx) 1576 idx[offset+i] = 1577 (index >= max_naddr 1578 ? 0xffff 1579 : index); 1580 if (index < max_naddr) 1581 nfilters++; 1582 else if (hash) 1583 *hash |= (1ULL << hash_mac_addr(addr[offset+i])); 1584 } 1585 1586 free = false; 1587 offset += fw_naddr; 1588 rem -= fw_naddr; 1589 } 1590 1591 /* 1592 * If there were no errors or we merely ran out of room in our MAC 1593 * address arena, return the number of filters actually written. 1594 */ 1595 if (ret == 0 || ret == -ENOMEM) 1596 ret = nfilters; 1597 return ret; 1598} 1599 1600/** 1601 * t4vf_free_mac_filt - frees exact-match filters of given MAC addresses 1602 * @adapter: the adapter 1603 * @viid: the VI id 1604 * @naddr: the number of MAC addresses to allocate filters for (up to 7) 1605 * @addr: the MAC address(es) 1606 * @sleep_ok: call is allowed to sleep 1607 * 1608 * Frees the exact-match filter for each of the supplied addresses 1609 * 1610 * Returns a negative error number or the number of filters freed. 1611 */ 1612int t4vf_free_mac_filt(struct adapter *adapter, unsigned int viid, 1613 unsigned int naddr, const u8 **addr, bool sleep_ok) 1614{ 1615 int offset, ret = 0; 1616 struct fw_vi_mac_cmd cmd; 1617 unsigned int nfilters = 0; 1618 unsigned int max_naddr = adapter->params.arch.mps_tcam_size; 1619 unsigned int rem = naddr; 1620 1621 if (naddr > max_naddr) 1622 return -EINVAL; 1623 1624 for (offset = 0; offset < (int)naddr ; /**/) { 1625 unsigned int fw_naddr = (rem < ARRAY_SIZE(cmd.u.exact) ? 1626 rem : ARRAY_SIZE(cmd.u.exact)); 1627 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1628 u.exact[fw_naddr]), 16); 1629 struct fw_vi_mac_exact *p; 1630 int i; 1631 1632 memset(&cmd, 0, sizeof(cmd)); 1633 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1634 FW_CMD_REQUEST_F | 1635 FW_CMD_WRITE_F | 1636 FW_CMD_EXEC_V(0) | 1637 FW_VI_MAC_CMD_VIID_V(viid)); 1638 cmd.freemacs_to_len16 = 1639 cpu_to_be32(FW_VI_MAC_CMD_FREEMACS_V(0) | 1640 FW_CMD_LEN16_V(len16)); 1641 1642 for (i = 0, p = cmd.u.exact; i < (int)fw_naddr; i++, p++) { 1643 p->valid_to_idx = cpu_to_be16( 1644 FW_VI_MAC_CMD_VALID_F | 1645 FW_VI_MAC_CMD_IDX_V(FW_VI_MAC_MAC_BASED_FREE)); 1646 memcpy(p->macaddr, addr[offset+i], sizeof(p->macaddr)); 1647 } 1648 1649 ret = t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), &cmd, 1650 sleep_ok); 1651 if (ret) 1652 break; 1653 1654 for (i = 0, p = cmd.u.exact; i < fw_naddr; i++, p++) { 1655 u16 index = FW_VI_MAC_CMD_IDX_G( 1656 be16_to_cpu(p->valid_to_idx)); 1657 1658 if (index < max_naddr) 1659 nfilters++; 1660 } 1661 1662 offset += fw_naddr; 1663 rem -= fw_naddr; 1664 } 1665 1666 if (ret == 0) 1667 ret = nfilters; 1668 return ret; 1669} 1670 1671/** 1672 * t4vf_change_mac - modifies the exact-match filter for a MAC address 1673 * @adapter: the adapter 1674 * @viid: the Virtual Interface ID 1675 * @idx: index of existing filter for old value of MAC address, or -1 1676 * @addr: the new MAC address value 1677 * @persist: if idx < 0, the new MAC allocation should be persistent 1678 * 1679 * Modifies an exact-match filter and sets it to the new MAC address. 1680 * Note that in general it is not possible to modify the value of a given 1681 * filter so the generic way to modify an address filter is to free the 1682 * one being used by the old address value and allocate a new filter for 1683 * the new address value. @idx can be -1 if the address is a new 1684 * addition. 1685 * 1686 * Returns a negative error number or the index of the filter with the new 1687 * MAC value. 1688 */ 1689int t4vf_change_mac(struct adapter *adapter, unsigned int viid, 1690 int idx, const u8 *addr, bool persist) 1691{ 1692 int ret; 1693 struct fw_vi_mac_cmd cmd, rpl; 1694 struct fw_vi_mac_exact *p = &cmd.u.exact[0]; 1695 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1696 u.exact[1]), 16); 1697 unsigned int max_mac_addr = adapter->params.arch.mps_tcam_size; 1698 1699 /* 1700 * If this is a new allocation, determine whether it should be 1701 * persistent (across a "freemacs" operation) or not. 1702 */ 1703 if (idx < 0) 1704 idx = persist ? FW_VI_MAC_ADD_PERSIST_MAC : FW_VI_MAC_ADD_MAC; 1705 1706 memset(&cmd, 0, sizeof(cmd)); 1707 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1708 FW_CMD_REQUEST_F | 1709 FW_CMD_WRITE_F | 1710 FW_VI_MAC_CMD_VIID_V(viid)); 1711 cmd.freemacs_to_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 1712 p->valid_to_idx = cpu_to_be16(FW_VI_MAC_CMD_VALID_F | 1713 FW_VI_MAC_CMD_IDX_V(idx)); 1714 memcpy(p->macaddr, addr, sizeof(p->macaddr)); 1715 1716 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1717 if (ret == 0) { 1718 p = &rpl.u.exact[0]; 1719 ret = FW_VI_MAC_CMD_IDX_G(be16_to_cpu(p->valid_to_idx)); 1720 if (ret >= max_mac_addr) 1721 ret = -ENOMEM; 1722 } 1723 return ret; 1724} 1725 1726/** 1727 * t4vf_set_addr_hash - program the MAC inexact-match hash filter 1728 * @adapter: the adapter 1729 * @viid: the Virtual Interface Identifier 1730 * @ucast: whether the hash filter should also match unicast addresses 1731 * @vec: the value to be written to the hash filter 1732 * @sleep_ok: call is allowed to sleep 1733 * 1734 * Sets the 64-bit inexact-match hash filter for a virtual interface. 1735 */ 1736int t4vf_set_addr_hash(struct adapter *adapter, unsigned int viid, 1737 bool ucast, u64 vec, bool sleep_ok) 1738{ 1739 struct fw_vi_mac_cmd cmd; 1740 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1741 u.exact[0]), 16); 1742 1743 memset(&cmd, 0, sizeof(cmd)); 1744 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1745 FW_CMD_REQUEST_F | 1746 FW_CMD_WRITE_F | 1747 FW_VI_ENABLE_CMD_VIID_V(viid)); 1748 cmd.freemacs_to_len16 = cpu_to_be32(FW_VI_MAC_CMD_HASHVECEN_F | 1749 FW_VI_MAC_CMD_HASHUNIEN_V(ucast) | 1750 FW_CMD_LEN16_V(len16)); 1751 cmd.u.hash.hashvec = cpu_to_be64(vec); 1752 return t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), NULL, sleep_ok); 1753} 1754 1755/** 1756 * t4vf_get_port_stats - collect "port" statistics 1757 * @adapter: the adapter 1758 * @pidx: the port index 1759 * @s: the stats structure to fill 1760 * 1761 * Collect statistics for the "port"'s Virtual Interface. 1762 */ 1763int t4vf_get_port_stats(struct adapter *adapter, int pidx, 1764 struct t4vf_port_stats *s) 1765{ 1766 struct port_info *pi = adap2pinfo(adapter, pidx); 1767 struct fw_vi_stats_vf fwstats; 1768 unsigned int rem = VI_VF_NUM_STATS; 1769 __be64 *fwsp = (__be64 *)&fwstats; 1770 1771 /* 1772 * Grab the Virtual Interface statistics a chunk at a time via mailbox 1773 * commands. We could use a Work Request and get all of them at once 1774 * but that's an asynchronous interface which is awkward to use. 1775 */ 1776 while (rem) { 1777 unsigned int ix = VI_VF_NUM_STATS - rem; 1778 unsigned int nstats = min(6U, rem); 1779 struct fw_vi_stats_cmd cmd, rpl; 1780 size_t len = (offsetof(struct fw_vi_stats_cmd, u) + 1781 sizeof(struct fw_vi_stats_ctl)); 1782 size_t len16 = DIV_ROUND_UP(len, 16); 1783 int ret; 1784 1785 memset(&cmd, 0, sizeof(cmd)); 1786 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_STATS_CMD) | 1787 FW_VI_STATS_CMD_VIID_V(pi->viid) | 1788 FW_CMD_REQUEST_F | 1789 FW_CMD_READ_F); 1790 cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 1791 cmd.u.ctl.nstats_ix = 1792 cpu_to_be16(FW_VI_STATS_CMD_IX_V(ix) | 1793 FW_VI_STATS_CMD_NSTATS_V(nstats)); 1794 ret = t4vf_wr_mbox_ns(adapter, &cmd, len, &rpl); 1795 if (ret) 1796 return ret; 1797 1798 memcpy(fwsp, &rpl.u.ctl.stat0, sizeof(__be64) * nstats); 1799 1800 rem -= nstats; 1801 fwsp += nstats; 1802 } 1803 1804 /* 1805 * Translate firmware statistics into host native statistics. 1806 */ 1807 s->tx_bcast_bytes = be64_to_cpu(fwstats.tx_bcast_bytes); 1808 s->tx_bcast_frames = be64_to_cpu(fwstats.tx_bcast_frames); 1809 s->tx_mcast_bytes = be64_to_cpu(fwstats.tx_mcast_bytes); 1810 s->tx_mcast_frames = be64_to_cpu(fwstats.tx_mcast_frames); 1811 s->tx_ucast_bytes = be64_to_cpu(fwstats.tx_ucast_bytes); 1812 s->tx_ucast_frames = be64_to_cpu(fwstats.tx_ucast_frames); 1813 s->tx_drop_frames = be64_to_cpu(fwstats.tx_drop_frames); 1814 s->tx_offload_bytes = be64_to_cpu(fwstats.tx_offload_bytes); 1815 s->tx_offload_frames = be64_to_cpu(fwstats.tx_offload_frames); 1816 1817 s->rx_bcast_bytes = be64_to_cpu(fwstats.rx_bcast_bytes); 1818 s->rx_bcast_frames = be64_to_cpu(fwstats.rx_bcast_frames); 1819 s->rx_mcast_bytes = be64_to_cpu(fwstats.rx_mcast_bytes); 1820 s->rx_mcast_frames = be64_to_cpu(fwstats.rx_mcast_frames); 1821 s->rx_ucast_bytes = be64_to_cpu(fwstats.rx_ucast_bytes); 1822 s->rx_ucast_frames = be64_to_cpu(fwstats.rx_ucast_frames); 1823 1824 s->rx_err_frames = be64_to_cpu(fwstats.rx_err_frames); 1825 1826 return 0; 1827} 1828 1829/** 1830 * t4vf_iq_free - free an ingress queue and its free lists 1831 * @adapter: the adapter 1832 * @iqtype: the ingress queue type (FW_IQ_TYPE_FL_INT_CAP, etc.) 1833 * @iqid: ingress queue ID 1834 * @fl0id: FL0 queue ID or 0xffff if no attached FL0 1835 * @fl1id: FL1 queue ID or 0xffff if no attached FL1 1836 * 1837 * Frees an ingress queue and its associated free lists, if any. 1838 */ 1839int t4vf_iq_free(struct adapter *adapter, unsigned int iqtype, 1840 unsigned int iqid, unsigned int fl0id, unsigned int fl1id) 1841{ 1842 struct fw_iq_cmd cmd; 1843 1844 memset(&cmd, 0, sizeof(cmd)); 1845 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_IQ_CMD) | 1846 FW_CMD_REQUEST_F | 1847 FW_CMD_EXEC_F); 1848 cmd.alloc_to_len16 = cpu_to_be32(FW_IQ_CMD_FREE_F | 1849 FW_LEN16(cmd)); 1850 cmd.type_to_iqandstindex = 1851 cpu_to_be32(FW_IQ_CMD_TYPE_V(iqtype)); 1852 1853 cmd.iqid = cpu_to_be16(iqid); 1854 cmd.fl0id = cpu_to_be16(fl0id); 1855 cmd.fl1id = cpu_to_be16(fl1id); 1856 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1857} 1858 1859/** 1860 * t4vf_eth_eq_free - free an Ethernet egress queue 1861 * @adapter: the adapter 1862 * @eqid: egress queue ID 1863 * 1864 * Frees an Ethernet egress queue. 1865 */ 1866int t4vf_eth_eq_free(struct adapter *adapter, unsigned int eqid) 1867{ 1868 struct fw_eq_eth_cmd cmd; 1869 1870 memset(&cmd, 0, sizeof(cmd)); 1871 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_EQ_ETH_CMD) | 1872 FW_CMD_REQUEST_F | 1873 FW_CMD_EXEC_F); 1874 cmd.alloc_to_len16 = cpu_to_be32(FW_EQ_ETH_CMD_FREE_F | 1875 FW_LEN16(cmd)); 1876 cmd.eqid_pkd = cpu_to_be32(FW_EQ_ETH_CMD_EQID_V(eqid)); 1877 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1878} 1879 1880/** 1881 * t4vf_link_down_rc_str - return a string for a Link Down Reason Code 1882 * @link_down_rc: Link Down Reason Code 1883 * 1884 * Returns a string representation of the Link Down Reason Code. 1885 */ 1886static const char *t4vf_link_down_rc_str(unsigned char link_down_rc) 1887{ 1888 static const char * const reason[] = { 1889 "Link Down", 1890 "Remote Fault", 1891 "Auto-negotiation Failure", 1892 "Reserved", 1893 "Insufficient Airflow", 1894 "Unable To Determine Reason", 1895 "No RX Signal Detected", 1896 "Reserved", 1897 }; 1898 1899 if (link_down_rc >= ARRAY_SIZE(reason)) 1900 return "Bad Reason Code"; 1901 1902 return reason[link_down_rc]; 1903} 1904 1905/** 1906 * t4vf_handle_get_port_info - process a FW reply message 1907 * @pi: the port info 1908 * @cmd: start of the FW message 1909 * 1910 * Processes a GET_PORT_INFO FW reply message. 1911 */ 1912static void t4vf_handle_get_port_info(struct port_info *pi, 1913 const struct fw_port_cmd *cmd) 1914{ 1915 fw_port_cap32_t pcaps, acaps, lpacaps, linkattr; 1916 struct link_config *lc = &pi->link_cfg; 1917 struct adapter *adapter = pi->adapter; 1918 unsigned int speed, fc, fec, adv_fc; 1919 enum fw_port_module_type mod_type; 1920 int action, link_ok, linkdnrc; 1921 enum fw_port_type port_type; 1922 1923 /* Extract the various fields from the Port Information message. */ 1924 action = FW_PORT_CMD_ACTION_G(be32_to_cpu(cmd->action_to_len16)); 1925 switch (action) { 1926 case FW_PORT_ACTION_GET_PORT_INFO: { 1927 u32 lstatus = be32_to_cpu(cmd->u.info.lstatus_to_modtype); 1928 1929 link_ok = (lstatus & FW_PORT_CMD_LSTATUS_F) != 0; 1930 linkdnrc = FW_PORT_CMD_LINKDNRC_G(lstatus); 1931 port_type = FW_PORT_CMD_PTYPE_G(lstatus); 1932 mod_type = FW_PORT_CMD_MODTYPE_G(lstatus); 1933 pcaps = fwcaps16_to_caps32(be16_to_cpu(cmd->u.info.pcap)); 1934 acaps = fwcaps16_to_caps32(be16_to_cpu(cmd->u.info.acap)); 1935 lpacaps = fwcaps16_to_caps32(be16_to_cpu(cmd->u.info.lpacap)); 1936 1937 /* Unfortunately the format of the Link Status in the old 1938 * 16-bit Port Information message isn't the same as the 1939 * 16-bit Port Capabilities bitfield used everywhere else ... 1940 */ 1941 linkattr = 0; 1942 if (lstatus & FW_PORT_CMD_RXPAUSE_F) 1943 linkattr |= FW_PORT_CAP32_FC_RX; 1944 if (lstatus & FW_PORT_CMD_TXPAUSE_F) 1945 linkattr |= FW_PORT_CAP32_FC_TX; 1946 if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_100M)) 1947 linkattr |= FW_PORT_CAP32_SPEED_100M; 1948 if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_1G)) 1949 linkattr |= FW_PORT_CAP32_SPEED_1G; 1950 if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_10G)) 1951 linkattr |= FW_PORT_CAP32_SPEED_10G; 1952 if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_25G)) 1953 linkattr |= FW_PORT_CAP32_SPEED_25G; 1954 if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_40G)) 1955 linkattr |= FW_PORT_CAP32_SPEED_40G; 1956 if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_100G)) 1957 linkattr |= FW_PORT_CAP32_SPEED_100G; 1958 1959 break; 1960 } 1961 1962 case FW_PORT_ACTION_GET_PORT_INFO32: { 1963 u32 lstatus32; 1964 1965 lstatus32 = be32_to_cpu(cmd->u.info32.lstatus32_to_cbllen32); 1966 link_ok = (lstatus32 & FW_PORT_CMD_LSTATUS32_F) != 0; 1967 linkdnrc = FW_PORT_CMD_LINKDNRC32_G(lstatus32); 1968 port_type = FW_PORT_CMD_PORTTYPE32_G(lstatus32); 1969 mod_type = FW_PORT_CMD_MODTYPE32_G(lstatus32); 1970 pcaps = be32_to_cpu(cmd->u.info32.pcaps32); 1971 acaps = be32_to_cpu(cmd->u.info32.acaps32); 1972 lpacaps = be32_to_cpu(cmd->u.info32.lpacaps32); 1973 linkattr = be32_to_cpu(cmd->u.info32.linkattr32); 1974 break; 1975 } 1976 1977 default: 1978 dev_err(adapter->pdev_dev, "Handle Port Information: Bad Command/Action %#x\n", 1979 be32_to_cpu(cmd->action_to_len16)); 1980 return; 1981 } 1982 1983 fec = fwcap_to_cc_fec(acaps); 1984 adv_fc = fwcap_to_cc_pause(acaps); 1985 fc = fwcap_to_cc_pause(linkattr); 1986 speed = fwcap_to_speed(linkattr); 1987 1988 if (mod_type != pi->mod_type) { 1989 /* When a new Transceiver Module is inserted, the Firmware 1990 * will examine any Forward Error Correction parameters 1991 * present in the Transceiver Module i2c EPROM and determine 1992 * the supported and recommended FEC settings from those 1993 * based on IEEE 802.3 standards. We always record the 1994 * IEEE 802.3 recommended "automatic" settings. 1995 */ 1996 lc->auto_fec = fec; 1997 1998 /* Some versions of the early T6 Firmware "cheated" when 1999 * handling different Transceiver Modules by changing the 2000 * underlaying Port Type reported to the Host Drivers. As 2001 * such we need to capture whatever Port Type the Firmware 2002 * sends us and record it in case it's different from what we 2003 * were told earlier. Unfortunately, since Firmware is 2004 * forever, we'll need to keep this code here forever, but in 2005 * later T6 Firmware it should just be an assignment of the 2006 * same value already recorded. 2007 */ 2008 pi->port_type = port_type; 2009 2010 pi->mod_type = mod_type; 2011 t4vf_os_portmod_changed(adapter, pi->pidx); 2012 } 2013 2014 if (link_ok != lc->link_ok || speed != lc->speed || 2015 fc != lc->fc || adv_fc != lc->advertised_fc || 2016 fec != lc->fec) { 2017 /* something changed */ 2018 if (!link_ok && lc->link_ok) { 2019 lc->link_down_rc = linkdnrc; 2020 dev_warn_ratelimited(adapter->pdev_dev, 2021 "Port %d link down, reason: %s\n", 2022 pi->port_id, 2023 t4vf_link_down_rc_str(linkdnrc)); 2024 } 2025 lc->link_ok = link_ok; 2026 lc->speed = speed; 2027 lc->advertised_fc = adv_fc; 2028 lc->fc = fc; 2029 lc->fec = fec; 2030 2031 lc->pcaps = pcaps; 2032 lc->lpacaps = lpacaps; 2033 lc->acaps = acaps & ADVERT_MASK; 2034 2035 /* If we're not physically capable of Auto-Negotiation, note 2036 * this as Auto-Negotiation disabled. Otherwise, we track 2037 * what Auto-Negotiation settings we have. Note parallel 2038 * structure in init_link_config(). 2039 */ 2040 if (!(lc->pcaps & FW_PORT_CAP32_ANEG)) { 2041 lc->autoneg = AUTONEG_DISABLE; 2042 } else if (lc->acaps & FW_PORT_CAP32_ANEG) { 2043 lc->autoneg = AUTONEG_ENABLE; 2044 } else { 2045 /* When Autoneg is disabled, user needs to set 2046 * single speed. 2047 * Similar to cxgb4_ethtool.c: set_link_ksettings 2048 */ 2049 lc->acaps = 0; 2050 lc->speed_caps = fwcap_to_speed(acaps); 2051 lc->autoneg = AUTONEG_DISABLE; 2052 } 2053 2054 t4vf_os_link_changed(adapter, pi->pidx, link_ok); 2055 } 2056} 2057 2058/** 2059 * t4vf_update_port_info - retrieve and update port information if changed 2060 * @pi: the port_info 2061 * 2062 * We issue a Get Port Information Command to the Firmware and, if 2063 * successful, we check to see if anything is different from what we 2064 * last recorded and update things accordingly. 2065 */ 2066int t4vf_update_port_info(struct port_info *pi) 2067{ 2068 unsigned int fw_caps = pi->adapter->params.fw_caps_support; 2069 struct fw_port_cmd port_cmd; 2070 int ret; 2071 2072 memset(&port_cmd, 0, sizeof(port_cmd)); 2073 port_cmd.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PORT_CMD) | 2074 FW_CMD_REQUEST_F | FW_CMD_READ_F | 2075 FW_PORT_CMD_PORTID_V(pi->port_id)); 2076 port_cmd.action_to_len16 = cpu_to_be32( 2077 FW_PORT_CMD_ACTION_V(fw_caps == FW_CAPS16 2078 ? FW_PORT_ACTION_GET_PORT_INFO 2079 : FW_PORT_ACTION_GET_PORT_INFO32) | 2080 FW_LEN16(port_cmd)); 2081 ret = t4vf_wr_mbox(pi->adapter, &port_cmd, sizeof(port_cmd), 2082 &port_cmd); 2083 if (ret) 2084 return ret; 2085 t4vf_handle_get_port_info(pi, &port_cmd); 2086 return 0; 2087} 2088 2089/** 2090 * t4vf_handle_fw_rpl - process a firmware reply message 2091 * @adapter: the adapter 2092 * @rpl: start of the firmware message 2093 * 2094 * Processes a firmware message, such as link state change messages. 2095 */ 2096int t4vf_handle_fw_rpl(struct adapter *adapter, const __be64 *rpl) 2097{ 2098 const struct fw_cmd_hdr *cmd_hdr = (const struct fw_cmd_hdr *)rpl; 2099 u8 opcode = FW_CMD_OP_G(be32_to_cpu(cmd_hdr->hi)); 2100 2101 switch (opcode) { 2102 case FW_PORT_CMD: { 2103 /* 2104 * Link/module state change message. 2105 */ 2106 const struct fw_port_cmd *port_cmd = 2107 (const struct fw_port_cmd *)rpl; 2108 int action = FW_PORT_CMD_ACTION_G( 2109 be32_to_cpu(port_cmd->action_to_len16)); 2110 int port_id, pidx; 2111 2112 if (action != FW_PORT_ACTION_GET_PORT_INFO && 2113 action != FW_PORT_ACTION_GET_PORT_INFO32) { 2114 dev_err(adapter->pdev_dev, 2115 "Unknown firmware PORT reply action %x\n", 2116 action); 2117 break; 2118 } 2119 2120 port_id = FW_PORT_CMD_PORTID_G( 2121 be32_to_cpu(port_cmd->op_to_portid)); 2122 for_each_port(adapter, pidx) { 2123 struct port_info *pi = adap2pinfo(adapter, pidx); 2124 2125 if (pi->port_id != port_id) 2126 continue; 2127 t4vf_handle_get_port_info(pi, port_cmd); 2128 } 2129 break; 2130 } 2131 2132 default: 2133 dev_err(adapter->pdev_dev, "Unknown firmware reply %X\n", 2134 opcode); 2135 } 2136 return 0; 2137} 2138 2139int t4vf_prep_adapter(struct adapter *adapter) 2140{ 2141 int err; 2142 unsigned int chipid; 2143 2144 /* Wait for the device to become ready before proceeding ... 2145 */ 2146 err = t4vf_wait_dev_ready(adapter); 2147 if (err) 2148 return err; 2149 2150 /* Default port and clock for debugging in case we can't reach 2151 * firmware. 2152 */ 2153 adapter->params.nports = 1; 2154 adapter->params.vfres.pmask = 1; 2155 adapter->params.vpd.cclk = 50000; 2156 2157 adapter->params.chip = 0; 2158 switch (CHELSIO_PCI_ID_VER(adapter->pdev->device)) { 2159 case CHELSIO_T4: 2160 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T4, 0); 2161 adapter->params.arch.sge_fl_db = DBPRIO_F; 2162 adapter->params.arch.mps_tcam_size = 2163 NUM_MPS_CLS_SRAM_L_INSTANCES; 2164 break; 2165 2166 case CHELSIO_T5: 2167 chipid = REV_G(t4_read_reg(adapter, PL_VF_REV_A)); 2168 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T5, chipid); 2169 adapter->params.arch.sge_fl_db = DBPRIO_F | DBTYPE_F; 2170 adapter->params.arch.mps_tcam_size = 2171 NUM_MPS_T5_CLS_SRAM_L_INSTANCES; 2172 break; 2173 2174 case CHELSIO_T6: 2175 chipid = REV_G(t4_read_reg(adapter, PL_VF_REV_A)); 2176 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T6, chipid); 2177 adapter->params.arch.sge_fl_db = 0; 2178 adapter->params.arch.mps_tcam_size = 2179 NUM_MPS_T5_CLS_SRAM_L_INSTANCES; 2180 break; 2181 } 2182 2183 return 0; 2184} 2185 2186/** 2187 * t4vf_get_vf_mac_acl - Get the MAC address to be set to 2188 * the VI of this VF. 2189 * @adapter: The adapter 2190 * @port: The port associated with vf 2191 * @naddr: the number of ACL MAC addresses returned in addr 2192 * @addr: Placeholder for MAC addresses 2193 * 2194 * Find the MAC address to be set to the VF's VI. The requested MAC address 2195 * is from the host OS via callback in the PF driver. 2196 */ 2197int t4vf_get_vf_mac_acl(struct adapter *adapter, unsigned int port, 2198 unsigned int *naddr, u8 *addr) 2199{ 2200 struct fw_acl_mac_cmd cmd; 2201 int ret; 2202 2203 memset(&cmd, 0, sizeof(cmd)); 2204 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_ACL_MAC_CMD) | 2205 FW_CMD_REQUEST_F | 2206 FW_CMD_READ_F); 2207 cmd.en_to_len16 = cpu_to_be32((unsigned int)FW_LEN16(cmd)); 2208 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &cmd); 2209 if (ret) 2210 return ret; 2211 2212 if (cmd.nmac < *naddr) 2213 *naddr = cmd.nmac; 2214 2215 switch (port) { 2216 case 3: 2217 memcpy(addr, cmd.macaddr3, sizeof(cmd.macaddr3)); 2218 break; 2219 case 2: 2220 memcpy(addr, cmd.macaddr2, sizeof(cmd.macaddr2)); 2221 break; 2222 case 1: 2223 memcpy(addr, cmd.macaddr1, sizeof(cmd.macaddr1)); 2224 break; 2225 case 0: 2226 memcpy(addr, cmd.macaddr0, sizeof(cmd.macaddr0)); 2227 break; 2228 } 2229 2230 return ret; 2231} 2232 2233/** 2234 * t4vf_get_vf_vlan_acl - Get the VLAN ID to be set to 2235 * the VI of this VF. 2236 * @adapter: The adapter 2237 * 2238 * Find the VLAN ID to be set to the VF's VI. The requested VLAN ID 2239 * is from the host OS via callback in the PF driver. 2240 */ 2241int t4vf_get_vf_vlan_acl(struct adapter *adapter) 2242{ 2243 struct fw_acl_vlan_cmd cmd; 2244 int vlan = 0; 2245 int ret = 0; 2246 2247 cmd.op_to_vfn = htonl(FW_CMD_OP_V(FW_ACL_VLAN_CMD) | 2248 FW_CMD_REQUEST_F | FW_CMD_READ_F); 2249 2250 /* Note: Do not enable the ACL */ 2251 cmd.en_to_len16 = cpu_to_be32((unsigned int)FW_LEN16(cmd)); 2252 2253 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &cmd); 2254 2255 if (!ret) 2256 vlan = be16_to_cpu(cmd.vlanid[0]); 2257 2258 return vlan; 2259} 2260