18c2ecf20Sopenharmony_ci/*****************************************************************************
28c2ecf20Sopenharmony_ci *                                                                           *
38c2ecf20Sopenharmony_ci * File: common.h                                                            *
48c2ecf20Sopenharmony_ci * $Revision: 1.21 $                                                         *
58c2ecf20Sopenharmony_ci * $Date: 2005/06/22 00:43:25 $                                              *
68c2ecf20Sopenharmony_ci * Description:                                                              *
78c2ecf20Sopenharmony_ci *  part of the Chelsio 10Gb Ethernet Driver.                                *
88c2ecf20Sopenharmony_ci *                                                                           *
98c2ecf20Sopenharmony_ci * This program is free software; you can redistribute it and/or modify      *
108c2ecf20Sopenharmony_ci * it under the terms of the GNU General Public License, version 2, as       *
118c2ecf20Sopenharmony_ci * published by the Free Software Foundation.                                *
128c2ecf20Sopenharmony_ci *                                                                           *
138c2ecf20Sopenharmony_ci * You should have received a copy of the GNU General Public License along   *
148c2ecf20Sopenharmony_ci * with this program; if not, see <http://www.gnu.org/licenses/>.            *
158c2ecf20Sopenharmony_ci *                                                                           *
168c2ecf20Sopenharmony_ci * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED    *
178c2ecf20Sopenharmony_ci * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF      *
188c2ecf20Sopenharmony_ci * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.                     *
198c2ecf20Sopenharmony_ci *                                                                           *
208c2ecf20Sopenharmony_ci * http://www.chelsio.com                                                    *
218c2ecf20Sopenharmony_ci *                                                                           *
228c2ecf20Sopenharmony_ci * Copyright (c) 2003 - 2005 Chelsio Communications, Inc.                    *
238c2ecf20Sopenharmony_ci * All rights reserved.                                                      *
248c2ecf20Sopenharmony_ci *                                                                           *
258c2ecf20Sopenharmony_ci * Maintainers: maintainers@chelsio.com                                      *
268c2ecf20Sopenharmony_ci *                                                                           *
278c2ecf20Sopenharmony_ci * Authors: Dimitrios Michailidis   <dm@chelsio.com>                         *
288c2ecf20Sopenharmony_ci *          Tina Yang               <tainay@chelsio.com>                     *
298c2ecf20Sopenharmony_ci *          Felix Marti             <felix@chelsio.com>                      *
308c2ecf20Sopenharmony_ci *          Scott Bardone           <sbardone@chelsio.com>                   *
318c2ecf20Sopenharmony_ci *          Kurt Ottaway            <kottaway@chelsio.com>                   *
328c2ecf20Sopenharmony_ci *          Frank DiMambro          <frank@chelsio.com>                      *
338c2ecf20Sopenharmony_ci *                                                                           *
348c2ecf20Sopenharmony_ci * History:                                                                  *
358c2ecf20Sopenharmony_ci *                                                                           *
368c2ecf20Sopenharmony_ci ****************************************************************************/
378c2ecf20Sopenharmony_ci
388c2ecf20Sopenharmony_ci#define pr_fmt(fmt) "cxgb: " fmt
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_ci#ifndef _CXGB_COMMON_H_
418c2ecf20Sopenharmony_ci#define _CXGB_COMMON_H_
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci#include <linux/module.h>
448c2ecf20Sopenharmony_ci#include <linux/netdevice.h>
458c2ecf20Sopenharmony_ci#include <linux/types.h>
468c2ecf20Sopenharmony_ci#include <linux/delay.h>
478c2ecf20Sopenharmony_ci#include <linux/pci.h>
488c2ecf20Sopenharmony_ci#include <linux/ethtool.h>
498c2ecf20Sopenharmony_ci#include <linux/if_vlan.h>
508c2ecf20Sopenharmony_ci#include <linux/mdio.h>
518c2ecf20Sopenharmony_ci#include <linux/crc32.h>
528c2ecf20Sopenharmony_ci#include <linux/slab.h>
538c2ecf20Sopenharmony_ci#include <asm/io.h>
548c2ecf20Sopenharmony_ci#include <linux/pci_ids.h>
558c2ecf20Sopenharmony_ci
568c2ecf20Sopenharmony_ci#define DRV_DESCRIPTION "Chelsio 10Gb Ethernet Driver"
578c2ecf20Sopenharmony_ci#define DRV_NAME "cxgb"
588c2ecf20Sopenharmony_ci
598c2ecf20Sopenharmony_ci#define CH_DEVICE(devid, ssid, idx) \
608c2ecf20Sopenharmony_ci	{ PCI_VENDOR_ID_CHELSIO, devid, PCI_ANY_ID, ssid, 0, 0, idx }
618c2ecf20Sopenharmony_ci
628c2ecf20Sopenharmony_ci#define SUPPORTED_PAUSE       (1 << 13)
638c2ecf20Sopenharmony_ci#define SUPPORTED_LOOPBACK    (1 << 15)
648c2ecf20Sopenharmony_ci
658c2ecf20Sopenharmony_ci#define ADVERTISED_PAUSE      (1 << 13)
668c2ecf20Sopenharmony_ci#define ADVERTISED_ASYM_PAUSE (1 << 14)
678c2ecf20Sopenharmony_ci
688c2ecf20Sopenharmony_citypedef struct adapter adapter_t;
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_cistruct t1_rx_mode {
718c2ecf20Sopenharmony_ci       struct net_device *dev;
728c2ecf20Sopenharmony_ci};
738c2ecf20Sopenharmony_ci
748c2ecf20Sopenharmony_ci#define t1_rx_mode_promisc(rm)	(rm->dev->flags & IFF_PROMISC)
758c2ecf20Sopenharmony_ci#define t1_rx_mode_allmulti(rm)	(rm->dev->flags & IFF_ALLMULTI)
768c2ecf20Sopenharmony_ci#define t1_rx_mode_mc_cnt(rm)	(netdev_mc_count(rm->dev))
778c2ecf20Sopenharmony_ci#define t1_get_netdev(rm)	(rm->dev)
788c2ecf20Sopenharmony_ci
798c2ecf20Sopenharmony_ci#define	MAX_NPORTS 4
808c2ecf20Sopenharmony_ci#define PORT_MASK ((1 << MAX_NPORTS) - 1)
818c2ecf20Sopenharmony_ci#define NMTUS      8
828c2ecf20Sopenharmony_ci#define TCB_SIZE   128
838c2ecf20Sopenharmony_ci
848c2ecf20Sopenharmony_ci#define SPEED_INVALID 0xffff
858c2ecf20Sopenharmony_ci#define DUPLEX_INVALID 0xff
868c2ecf20Sopenharmony_ci
878c2ecf20Sopenharmony_ci/* Max frame size PM3393 can handle. Includes Ethernet header and CRC. */
888c2ecf20Sopenharmony_ci#define PM3393_MAX_FRAME_SIZE 9600
898c2ecf20Sopenharmony_ci
908c2ecf20Sopenharmony_ci#define VSC7326_MAX_MTU 9600
918c2ecf20Sopenharmony_ci
928c2ecf20Sopenharmony_cienum {
938c2ecf20Sopenharmony_ci	CHBT_BOARD_N110,
948c2ecf20Sopenharmony_ci	CHBT_BOARD_N210,
958c2ecf20Sopenharmony_ci	CHBT_BOARD_7500,
968c2ecf20Sopenharmony_ci	CHBT_BOARD_8000,
978c2ecf20Sopenharmony_ci	CHBT_BOARD_CHT101,
988c2ecf20Sopenharmony_ci	CHBT_BOARD_CHT110,
998c2ecf20Sopenharmony_ci	CHBT_BOARD_CHT210,
1008c2ecf20Sopenharmony_ci	CHBT_BOARD_CHT204,
1018c2ecf20Sopenharmony_ci	CHBT_BOARD_CHT204V,
1028c2ecf20Sopenharmony_ci	CHBT_BOARD_CHT204E,
1038c2ecf20Sopenharmony_ci	CHBT_BOARD_CHN204,
1048c2ecf20Sopenharmony_ci	CHBT_BOARD_COUGAR,
1058c2ecf20Sopenharmony_ci	CHBT_BOARD_6800,
1068c2ecf20Sopenharmony_ci	CHBT_BOARD_SIMUL,
1078c2ecf20Sopenharmony_ci};
1088c2ecf20Sopenharmony_ci
1098c2ecf20Sopenharmony_cienum {
1108c2ecf20Sopenharmony_ci	CHBT_TERM_FPGA,
1118c2ecf20Sopenharmony_ci	CHBT_TERM_T1,
1128c2ecf20Sopenharmony_ci	CHBT_TERM_T2,
1138c2ecf20Sopenharmony_ci	CHBT_TERM_T3
1148c2ecf20Sopenharmony_ci};
1158c2ecf20Sopenharmony_ci
1168c2ecf20Sopenharmony_cienum {
1178c2ecf20Sopenharmony_ci	CHBT_MAC_CHELSIO_A,
1188c2ecf20Sopenharmony_ci	CHBT_MAC_IXF1010,
1198c2ecf20Sopenharmony_ci	CHBT_MAC_PM3393,
1208c2ecf20Sopenharmony_ci	CHBT_MAC_VSC7321,
1218c2ecf20Sopenharmony_ci	CHBT_MAC_DUMMY
1228c2ecf20Sopenharmony_ci};
1238c2ecf20Sopenharmony_ci
1248c2ecf20Sopenharmony_cienum {
1258c2ecf20Sopenharmony_ci	CHBT_PHY_88E1041,
1268c2ecf20Sopenharmony_ci	CHBT_PHY_88E1111,
1278c2ecf20Sopenharmony_ci	CHBT_PHY_88X2010,
1288c2ecf20Sopenharmony_ci	CHBT_PHY_XPAK,
1298c2ecf20Sopenharmony_ci	CHBT_PHY_MY3126,
1308c2ecf20Sopenharmony_ci	CHBT_PHY_8244,
1318c2ecf20Sopenharmony_ci	CHBT_PHY_DUMMY
1328c2ecf20Sopenharmony_ci};
1338c2ecf20Sopenharmony_ci
1348c2ecf20Sopenharmony_cienum {
1358c2ecf20Sopenharmony_ci	PAUSE_RX      = 1 << 0,
1368c2ecf20Sopenharmony_ci	PAUSE_TX      = 1 << 1,
1378c2ecf20Sopenharmony_ci	PAUSE_AUTONEG = 1 << 2
1388c2ecf20Sopenharmony_ci};
1398c2ecf20Sopenharmony_ci
1408c2ecf20Sopenharmony_ci/* Revisions of T1 chip */
1418c2ecf20Sopenharmony_cienum {
1428c2ecf20Sopenharmony_ci	TERM_T1A   = 0,
1438c2ecf20Sopenharmony_ci	TERM_T1B   = 1,
1448c2ecf20Sopenharmony_ci	TERM_T2    = 3
1458c2ecf20Sopenharmony_ci};
1468c2ecf20Sopenharmony_ci
1478c2ecf20Sopenharmony_cistruct sge_params {
1488c2ecf20Sopenharmony_ci	unsigned int cmdQ_size[2];
1498c2ecf20Sopenharmony_ci	unsigned int freelQ_size[2];
1508c2ecf20Sopenharmony_ci	unsigned int large_buf_capacity;
1518c2ecf20Sopenharmony_ci	unsigned int rx_coalesce_usecs;
1528c2ecf20Sopenharmony_ci	unsigned int last_rx_coalesce_raw;
1538c2ecf20Sopenharmony_ci	unsigned int default_rx_coalesce_usecs;
1548c2ecf20Sopenharmony_ci	unsigned int sample_interval_usecs;
1558c2ecf20Sopenharmony_ci	unsigned int coalesce_enable;
1568c2ecf20Sopenharmony_ci	unsigned int polling;
1578c2ecf20Sopenharmony_ci};
1588c2ecf20Sopenharmony_ci
1598c2ecf20Sopenharmony_cistruct chelsio_pci_params {
1608c2ecf20Sopenharmony_ci	unsigned short speed;
1618c2ecf20Sopenharmony_ci	unsigned char  width;
1628c2ecf20Sopenharmony_ci	unsigned char  is_pcix;
1638c2ecf20Sopenharmony_ci};
1648c2ecf20Sopenharmony_ci
1658c2ecf20Sopenharmony_cistruct tp_params {
1668c2ecf20Sopenharmony_ci	unsigned int pm_size;
1678c2ecf20Sopenharmony_ci	unsigned int cm_size;
1688c2ecf20Sopenharmony_ci	unsigned int pm_rx_base;
1698c2ecf20Sopenharmony_ci	unsigned int pm_tx_base;
1708c2ecf20Sopenharmony_ci	unsigned int pm_rx_pg_size;
1718c2ecf20Sopenharmony_ci	unsigned int pm_tx_pg_size;
1728c2ecf20Sopenharmony_ci	unsigned int pm_rx_num_pgs;
1738c2ecf20Sopenharmony_ci	unsigned int pm_tx_num_pgs;
1748c2ecf20Sopenharmony_ci	unsigned int rx_coalescing_size;
1758c2ecf20Sopenharmony_ci	unsigned int use_5tuple_mode;
1768c2ecf20Sopenharmony_ci};
1778c2ecf20Sopenharmony_ci
1788c2ecf20Sopenharmony_cistruct mc5_params {
1798c2ecf20Sopenharmony_ci	unsigned int mode;       /* selects MC5 width */
1808c2ecf20Sopenharmony_ci	unsigned int nservers;   /* size of server region */
1818c2ecf20Sopenharmony_ci	unsigned int nroutes;    /* size of routing region */
1828c2ecf20Sopenharmony_ci};
1838c2ecf20Sopenharmony_ci
1848c2ecf20Sopenharmony_ci/* Default MC5 region sizes */
1858c2ecf20Sopenharmony_ci#define DEFAULT_SERVER_REGION_LEN 256
1868c2ecf20Sopenharmony_ci#define DEFAULT_RT_REGION_LEN 1024
1878c2ecf20Sopenharmony_ci
1888c2ecf20Sopenharmony_cistruct adapter_params {
1898c2ecf20Sopenharmony_ci	struct sge_params sge;
1908c2ecf20Sopenharmony_ci	struct mc5_params mc5;
1918c2ecf20Sopenharmony_ci	struct tp_params  tp;
1928c2ecf20Sopenharmony_ci	struct chelsio_pci_params pci;
1938c2ecf20Sopenharmony_ci
1948c2ecf20Sopenharmony_ci	const struct board_info *brd_info;
1958c2ecf20Sopenharmony_ci
1968c2ecf20Sopenharmony_ci	unsigned short mtus[NMTUS];
1978c2ecf20Sopenharmony_ci	unsigned int   nports;          /* # of ethernet ports */
1988c2ecf20Sopenharmony_ci	unsigned int   stats_update_period;
1998c2ecf20Sopenharmony_ci	unsigned short chip_revision;
2008c2ecf20Sopenharmony_ci	unsigned char  chip_version;
2018c2ecf20Sopenharmony_ci	unsigned char  is_asic;
2028c2ecf20Sopenharmony_ci	unsigned char  has_msi;
2038c2ecf20Sopenharmony_ci};
2048c2ecf20Sopenharmony_ci
2058c2ecf20Sopenharmony_cistruct link_config {
2068c2ecf20Sopenharmony_ci	unsigned int   supported;        /* link capabilities */
2078c2ecf20Sopenharmony_ci	unsigned int   advertising;      /* advertised capabilities */
2088c2ecf20Sopenharmony_ci	unsigned short requested_speed;  /* speed user has requested */
2098c2ecf20Sopenharmony_ci	unsigned short speed;            /* actual link speed */
2108c2ecf20Sopenharmony_ci	unsigned char  requested_duplex; /* duplex user has requested */
2118c2ecf20Sopenharmony_ci	unsigned char  duplex;           /* actual link duplex */
2128c2ecf20Sopenharmony_ci	unsigned char  requested_fc;     /* flow control user has requested */
2138c2ecf20Sopenharmony_ci	unsigned char  fc;               /* actual link flow control */
2148c2ecf20Sopenharmony_ci	unsigned char  autoneg;          /* autonegotiating? */
2158c2ecf20Sopenharmony_ci};
2168c2ecf20Sopenharmony_ci
2178c2ecf20Sopenharmony_cistruct cmac;
2188c2ecf20Sopenharmony_cistruct cphy;
2198c2ecf20Sopenharmony_ci
2208c2ecf20Sopenharmony_cistruct port_info {
2218c2ecf20Sopenharmony_ci	struct net_device *dev;
2228c2ecf20Sopenharmony_ci	struct cmac *mac;
2238c2ecf20Sopenharmony_ci	struct cphy *phy;
2248c2ecf20Sopenharmony_ci	struct link_config link_config;
2258c2ecf20Sopenharmony_ci};
2268c2ecf20Sopenharmony_ci
2278c2ecf20Sopenharmony_cistruct sge;
2288c2ecf20Sopenharmony_cistruct peespi;
2298c2ecf20Sopenharmony_ci
2308c2ecf20Sopenharmony_cistruct adapter {
2318c2ecf20Sopenharmony_ci	u8 __iomem *regs;
2328c2ecf20Sopenharmony_ci	struct pci_dev *pdev;
2338c2ecf20Sopenharmony_ci	unsigned long registered_device_map;
2348c2ecf20Sopenharmony_ci	unsigned long open_device_map;
2358c2ecf20Sopenharmony_ci	unsigned long flags;
2368c2ecf20Sopenharmony_ci
2378c2ecf20Sopenharmony_ci	const char *name;
2388c2ecf20Sopenharmony_ci	int msg_enable;
2398c2ecf20Sopenharmony_ci	u32 mmio_len;
2408c2ecf20Sopenharmony_ci
2418c2ecf20Sopenharmony_ci	struct work_struct ext_intr_handler_task;
2428c2ecf20Sopenharmony_ci	struct adapter_params params;
2438c2ecf20Sopenharmony_ci
2448c2ecf20Sopenharmony_ci	/* Terminator modules. */
2458c2ecf20Sopenharmony_ci	struct sge    *sge;
2468c2ecf20Sopenharmony_ci	struct peespi *espi;
2478c2ecf20Sopenharmony_ci	struct petp   *tp;
2488c2ecf20Sopenharmony_ci
2498c2ecf20Sopenharmony_ci	struct napi_struct napi;
2508c2ecf20Sopenharmony_ci	struct port_info port[MAX_NPORTS];
2518c2ecf20Sopenharmony_ci	struct delayed_work stats_update_task;
2528c2ecf20Sopenharmony_ci	struct timer_list stats_update_timer;
2538c2ecf20Sopenharmony_ci
2548c2ecf20Sopenharmony_ci	spinlock_t tpi_lock;
2558c2ecf20Sopenharmony_ci	spinlock_t work_lock;
2568c2ecf20Sopenharmony_ci	spinlock_t mac_lock;
2578c2ecf20Sopenharmony_ci
2588c2ecf20Sopenharmony_ci	/* guards async operations */
2598c2ecf20Sopenharmony_ci	spinlock_t async_lock ____cacheline_aligned;
2608c2ecf20Sopenharmony_ci	u32 slow_intr_mask;
2618c2ecf20Sopenharmony_ci	int t1powersave;
2628c2ecf20Sopenharmony_ci};
2638c2ecf20Sopenharmony_ci
2648c2ecf20Sopenharmony_cienum {                                           /* adapter flags */
2658c2ecf20Sopenharmony_ci	FULL_INIT_DONE        = 1 << 0,
2668c2ecf20Sopenharmony_ci};
2678c2ecf20Sopenharmony_ci
2688c2ecf20Sopenharmony_cistruct mdio_ops;
2698c2ecf20Sopenharmony_cistruct gmac;
2708c2ecf20Sopenharmony_cistruct gphy;
2718c2ecf20Sopenharmony_ci
2728c2ecf20Sopenharmony_cistruct board_info {
2738c2ecf20Sopenharmony_ci	unsigned char           board;
2748c2ecf20Sopenharmony_ci	unsigned char           port_number;
2758c2ecf20Sopenharmony_ci	unsigned long           caps;
2768c2ecf20Sopenharmony_ci	unsigned char           chip_term;
2778c2ecf20Sopenharmony_ci	unsigned char           chip_mac;
2788c2ecf20Sopenharmony_ci	unsigned char           chip_phy;
2798c2ecf20Sopenharmony_ci	unsigned int            clock_core;
2808c2ecf20Sopenharmony_ci	unsigned int            clock_mc3;
2818c2ecf20Sopenharmony_ci	unsigned int            clock_mc4;
2828c2ecf20Sopenharmony_ci	unsigned int            espi_nports;
2838c2ecf20Sopenharmony_ci	unsigned int            clock_elmer0;
2848c2ecf20Sopenharmony_ci	unsigned char           mdio_mdien;
2858c2ecf20Sopenharmony_ci	unsigned char           mdio_mdiinv;
2868c2ecf20Sopenharmony_ci	unsigned char           mdio_mdc;
2878c2ecf20Sopenharmony_ci	unsigned char           mdio_phybaseaddr;
2888c2ecf20Sopenharmony_ci	const struct gmac      *gmac;
2898c2ecf20Sopenharmony_ci	const struct gphy      *gphy;
2908c2ecf20Sopenharmony_ci	const struct mdio_ops  *mdio_ops;
2918c2ecf20Sopenharmony_ci	const char             *desc;
2928c2ecf20Sopenharmony_ci};
2938c2ecf20Sopenharmony_ci
2948c2ecf20Sopenharmony_cistatic inline int t1_is_asic(const adapter_t *adapter)
2958c2ecf20Sopenharmony_ci{
2968c2ecf20Sopenharmony_ci	return adapter->params.is_asic;
2978c2ecf20Sopenharmony_ci}
2988c2ecf20Sopenharmony_ci
2998c2ecf20Sopenharmony_ciextern const struct pci_device_id t1_pci_tbl[];
3008c2ecf20Sopenharmony_ci
3018c2ecf20Sopenharmony_cistatic inline int adapter_matches_type(const adapter_t *adapter,
3028c2ecf20Sopenharmony_ci				       int version, int revision)
3038c2ecf20Sopenharmony_ci{
3048c2ecf20Sopenharmony_ci	return adapter->params.chip_version == version &&
3058c2ecf20Sopenharmony_ci	       adapter->params.chip_revision == revision;
3068c2ecf20Sopenharmony_ci}
3078c2ecf20Sopenharmony_ci
3088c2ecf20Sopenharmony_ci#define t1_is_T1B(adap) adapter_matches_type(adap, CHBT_TERM_T1, TERM_T1B)
3098c2ecf20Sopenharmony_ci#define is_T2(adap)     adapter_matches_type(adap, CHBT_TERM_T2, TERM_T2)
3108c2ecf20Sopenharmony_ci
3118c2ecf20Sopenharmony_ci/* Returns true if an adapter supports VLAN acceleration and TSO */
3128c2ecf20Sopenharmony_cistatic inline int vlan_tso_capable(const adapter_t *adapter)
3138c2ecf20Sopenharmony_ci{
3148c2ecf20Sopenharmony_ci	return !t1_is_T1B(adapter);
3158c2ecf20Sopenharmony_ci}
3168c2ecf20Sopenharmony_ci
3178c2ecf20Sopenharmony_ci#define for_each_port(adapter, iter) \
3188c2ecf20Sopenharmony_ci	for (iter = 0; iter < (adapter)->params.nports; ++iter)
3198c2ecf20Sopenharmony_ci
3208c2ecf20Sopenharmony_ci#define board_info(adapter) ((adapter)->params.brd_info)
3218c2ecf20Sopenharmony_ci#define is_10G(adapter) (board_info(adapter)->caps & SUPPORTED_10000baseT_Full)
3228c2ecf20Sopenharmony_ci
3238c2ecf20Sopenharmony_cistatic inline unsigned int core_ticks_per_usec(const adapter_t *adap)
3248c2ecf20Sopenharmony_ci{
3258c2ecf20Sopenharmony_ci	return board_info(adap)->clock_core / 1000000;
3268c2ecf20Sopenharmony_ci}
3278c2ecf20Sopenharmony_ci
3288c2ecf20Sopenharmony_ciint __t1_tpi_read(adapter_t *adapter, u32 addr, u32 *valp);
3298c2ecf20Sopenharmony_ciint __t1_tpi_write(adapter_t *adapter, u32 addr, u32 value);
3308c2ecf20Sopenharmony_ciint t1_tpi_write(adapter_t *adapter, u32 addr, u32 value);
3318c2ecf20Sopenharmony_ciint t1_tpi_read(adapter_t *adapter, u32 addr, u32 *value);
3328c2ecf20Sopenharmony_ci
3338c2ecf20Sopenharmony_civoid t1_interrupts_enable(adapter_t *adapter);
3348c2ecf20Sopenharmony_civoid t1_interrupts_disable(adapter_t *adapter);
3358c2ecf20Sopenharmony_civoid t1_interrupts_clear(adapter_t *adapter);
3368c2ecf20Sopenharmony_ciint t1_elmer0_ext_intr_handler(adapter_t *adapter);
3378c2ecf20Sopenharmony_civoid t1_elmer0_ext_intr(adapter_t *adapter);
3388c2ecf20Sopenharmony_ciint t1_slow_intr_handler(adapter_t *adapter);
3398c2ecf20Sopenharmony_ci
3408c2ecf20Sopenharmony_ciint t1_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc);
3418c2ecf20Sopenharmony_ciconst struct board_info *t1_get_board_info(unsigned int board_id);
3428c2ecf20Sopenharmony_ciconst struct board_info *t1_get_board_info_from_ids(unsigned int devid,
3438c2ecf20Sopenharmony_ci						    unsigned short ssid);
3448c2ecf20Sopenharmony_ciint t1_seeprom_read(adapter_t *adapter, u32 addr, __le32 *data);
3458c2ecf20Sopenharmony_ciint t1_get_board_rev(adapter_t *adapter, const struct board_info *bi,
3468c2ecf20Sopenharmony_ci		     struct adapter_params *p);
3478c2ecf20Sopenharmony_ciint t1_init_hw_modules(adapter_t *adapter);
3488c2ecf20Sopenharmony_ciint t1_init_sw_modules(adapter_t *adapter, const struct board_info *bi);
3498c2ecf20Sopenharmony_civoid t1_free_sw_modules(adapter_t *adapter);
3508c2ecf20Sopenharmony_civoid t1_fatal_err(adapter_t *adapter);
3518c2ecf20Sopenharmony_civoid t1_link_changed(adapter_t *adapter, int port_id);
3528c2ecf20Sopenharmony_civoid t1_link_negotiated(adapter_t *adapter, int port_id, int link_stat,
3538c2ecf20Sopenharmony_ci			    int speed, int duplex, int pause);
3548c2ecf20Sopenharmony_ci#endif /* _CXGB_COMMON_H_ */
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