1/********************************************************************** 2 * Author: Cavium, Inc. 3 * 4 * Contact: support@cavium.com 5 * Please include "LiquidIO" in the subject. 6 * 7 * Copyright (c) 2003-2016 Cavium, Inc. 8 * 9 * This file is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License, Version 2, as 11 * published by the Free Software Foundation. 12 * 13 * This file is distributed in the hope that it will be useful, but 14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 16 * NONINFRINGEMENT. See the GNU General Public License for more details. 17 ***********************************************************************/ 18#include <linux/module.h> 19#include <linux/interrupt.h> 20#include <linux/pci.h> 21#include <linux/firmware.h> 22#include <net/vxlan.h> 23#include <linux/kthread.h> 24#include "liquidio_common.h" 25#include "octeon_droq.h" 26#include "octeon_iq.h" 27#include "response_manager.h" 28#include "octeon_device.h" 29#include "octeon_nic.h" 30#include "octeon_main.h" 31#include "octeon_network.h" 32#include "cn66xx_regs.h" 33#include "cn66xx_device.h" 34#include "cn68xx_device.h" 35#include "cn23xx_pf_device.h" 36#include "liquidio_image.h" 37#include "lio_vf_rep.h" 38 39MODULE_AUTHOR("Cavium Networks, <support@cavium.com>"); 40MODULE_DESCRIPTION("Cavium LiquidIO Intelligent Server Adapter Driver"); 41MODULE_LICENSE("GPL"); 42MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_210SV_NAME 43 "_" LIO_FW_NAME_TYPE_NIC LIO_FW_NAME_SUFFIX); 44MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_210NV_NAME 45 "_" LIO_FW_NAME_TYPE_NIC LIO_FW_NAME_SUFFIX); 46MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_410NV_NAME 47 "_" LIO_FW_NAME_TYPE_NIC LIO_FW_NAME_SUFFIX); 48MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_23XX_NAME 49 "_" LIO_FW_NAME_TYPE_NIC LIO_FW_NAME_SUFFIX); 50 51static int ddr_timeout = 10000; 52module_param(ddr_timeout, int, 0644); 53MODULE_PARM_DESC(ddr_timeout, 54 "Number of milliseconds to wait for DDR initialization. 0 waits for ddr_timeout to be set to non-zero value before starting to check"); 55 56#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 57 58static int debug = -1; 59module_param(debug, int, 0644); 60MODULE_PARM_DESC(debug, "NETIF_MSG debug bits"); 61 62static char fw_type[LIO_MAX_FW_TYPE_LEN] = LIO_FW_NAME_TYPE_AUTO; 63module_param_string(fw_type, fw_type, sizeof(fw_type), 0444); 64MODULE_PARM_DESC(fw_type, "Type of firmware to be loaded (default is \"auto\"), which uses firmware in flash, if present, else loads \"nic\"."); 65 66static u32 console_bitmask; 67module_param(console_bitmask, int, 0644); 68MODULE_PARM_DESC(console_bitmask, 69 "Bitmask indicating which consoles have debug output redirected to syslog."); 70 71/** 72 * octeon_console_debug_enabled - determines if a given console has debug enabled. 73 * @console: console to check 74 * Return: 1 = enabled. 0 otherwise 75 */ 76static int octeon_console_debug_enabled(u32 console) 77{ 78 return (console_bitmask >> (console)) & 0x1; 79} 80 81/* Polling interval for determining when NIC application is alive */ 82#define LIQUIDIO_STARTER_POLL_INTERVAL_MS 100 83 84/* runtime link query interval */ 85#define LIQUIDIO_LINK_QUERY_INTERVAL_MS 1000 86/* update localtime to octeon firmware every 60 seconds. 87 * make firmware to use same time reference, so that it will be easy to 88 * correlate firmware logged events/errors with host events, for debugging. 89 */ 90#define LIO_SYNC_OCTEON_TIME_INTERVAL_MS 60000 91 92/* time to wait for possible in-flight requests in milliseconds */ 93#define WAIT_INFLIGHT_REQUEST msecs_to_jiffies(1000) 94 95struct lio_trusted_vf_ctx { 96 struct completion complete; 97 int status; 98}; 99 100struct oct_link_status_resp { 101 u64 rh; 102 struct oct_link_info link_info; 103 u64 status; 104}; 105 106struct oct_timestamp_resp { 107 u64 rh; 108 u64 timestamp; 109 u64 status; 110}; 111 112#define OCT_TIMESTAMP_RESP_SIZE (sizeof(struct oct_timestamp_resp)) 113 114union tx_info { 115 u64 u64; 116 struct { 117#ifdef __BIG_ENDIAN_BITFIELD 118 u16 gso_size; 119 u16 gso_segs; 120 u32 reserved; 121#else 122 u32 reserved; 123 u16 gso_segs; 124 u16 gso_size; 125#endif 126 } s; 127}; 128 129/* Octeon device properties to be used by the NIC module. 130 * Each octeon device in the system will be represented 131 * by this structure in the NIC module. 132 */ 133 134#define OCTNIC_GSO_MAX_HEADER_SIZE 128 135#define OCTNIC_GSO_MAX_SIZE \ 136 (CN23XX_DEFAULT_INPUT_JABBER - OCTNIC_GSO_MAX_HEADER_SIZE) 137 138struct handshake { 139 struct completion init; 140 struct completion started; 141 struct pci_dev *pci_dev; 142 int init_ok; 143 int started_ok; 144}; 145 146#ifdef CONFIG_PCI_IOV 147static int liquidio_enable_sriov(struct pci_dev *dev, int num_vfs); 148#endif 149 150static int octeon_dbg_console_print(struct octeon_device *oct, u32 console_num, 151 char *prefix, char *suffix); 152 153static int octeon_device_init(struct octeon_device *); 154static int liquidio_stop(struct net_device *netdev); 155static void liquidio_remove(struct pci_dev *pdev); 156static int liquidio_probe(struct pci_dev *pdev, 157 const struct pci_device_id *ent); 158static int liquidio_set_vf_link_state(struct net_device *netdev, int vfidx, 159 int linkstate); 160 161static struct handshake handshake[MAX_OCTEON_DEVICES]; 162static struct completion first_stage; 163 164static void octeon_droq_bh(struct tasklet_struct *t) 165{ 166 int q_no; 167 int reschedule = 0; 168 struct octeon_device_priv *oct_priv = from_tasklet(oct_priv, t, 169 droq_tasklet); 170 struct octeon_device *oct = oct_priv->dev; 171 172 for (q_no = 0; q_no < MAX_OCTEON_OUTPUT_QUEUES(oct); q_no++) { 173 if (!(oct->io_qmask.oq & BIT_ULL(q_no))) 174 continue; 175 reschedule |= octeon_droq_process_packets(oct, oct->droq[q_no], 176 MAX_PACKET_BUDGET); 177 lio_enable_irq(oct->droq[q_no], NULL); 178 179 if (OCTEON_CN23XX_PF(oct) && oct->msix_on) { 180 /* set time and cnt interrupt thresholds for this DROQ 181 * for NAPI 182 */ 183 int adjusted_q_no = q_no + oct->sriov_info.pf_srn; 184 185 octeon_write_csr64( 186 oct, CN23XX_SLI_OQ_PKT_INT_LEVELS(adjusted_q_no), 187 0x5700000040ULL); 188 octeon_write_csr64( 189 oct, CN23XX_SLI_OQ_PKTS_SENT(adjusted_q_no), 0); 190 } 191 } 192 193 if (reschedule) 194 tasklet_schedule(&oct_priv->droq_tasklet); 195} 196 197static int lio_wait_for_oq_pkts(struct octeon_device *oct) 198{ 199 struct octeon_device_priv *oct_priv = 200 (struct octeon_device_priv *)oct->priv; 201 int retry = 100, pkt_cnt = 0, pending_pkts = 0; 202 int i; 203 204 do { 205 pending_pkts = 0; 206 207 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) { 208 if (!(oct->io_qmask.oq & BIT_ULL(i))) 209 continue; 210 pkt_cnt += octeon_droq_check_hw_for_pkts(oct->droq[i]); 211 } 212 if (pkt_cnt > 0) { 213 pending_pkts += pkt_cnt; 214 tasklet_schedule(&oct_priv->droq_tasklet); 215 } 216 pkt_cnt = 0; 217 schedule_timeout_uninterruptible(1); 218 219 } while (retry-- && pending_pkts); 220 221 return pkt_cnt; 222} 223 224/** 225 * force_io_queues_off - Forces all IO queues off on a given device 226 * @oct: Pointer to Octeon device 227 */ 228static void force_io_queues_off(struct octeon_device *oct) 229{ 230 if ((oct->chip_id == OCTEON_CN66XX) || 231 (oct->chip_id == OCTEON_CN68XX)) { 232 /* Reset the Enable bits for Input Queues. */ 233 octeon_write_csr(oct, CN6XXX_SLI_PKT_INSTR_ENB, 0); 234 235 /* Reset the Enable bits for Output Queues. */ 236 octeon_write_csr(oct, CN6XXX_SLI_PKT_OUT_ENB, 0); 237 } 238} 239 240/** 241 * pcierror_quiesce_device - Cause device to go quiet so it can be safely removed/reset/etc 242 * @oct: Pointer to Octeon device 243 */ 244static inline void pcierror_quiesce_device(struct octeon_device *oct) 245{ 246 int i; 247 248 /* Disable the input and output queues now. No more packets will 249 * arrive from Octeon, but we should wait for all packet processing 250 * to finish. 251 */ 252 force_io_queues_off(oct); 253 254 /* To allow for in-flight requests */ 255 schedule_timeout_uninterruptible(WAIT_INFLIGHT_REQUEST); 256 257 if (wait_for_pending_requests(oct)) 258 dev_err(&oct->pci_dev->dev, "There were pending requests\n"); 259 260 /* Force all requests waiting to be fetched by OCTEON to complete. */ 261 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) { 262 struct octeon_instr_queue *iq; 263 264 if (!(oct->io_qmask.iq & BIT_ULL(i))) 265 continue; 266 iq = oct->instr_queue[i]; 267 268 if (atomic_read(&iq->instr_pending)) { 269 spin_lock_bh(&iq->lock); 270 iq->fill_cnt = 0; 271 iq->octeon_read_index = iq->host_write_index; 272 iq->stats.instr_processed += 273 atomic_read(&iq->instr_pending); 274 lio_process_iq_request_list(oct, iq, 0); 275 spin_unlock_bh(&iq->lock); 276 } 277 } 278 279 /* Force all pending ordered list requests to time out. */ 280 lio_process_ordered_list(oct, 1); 281 282 /* We do not need to wait for output queue packets to be processed. */ 283} 284 285/** 286 * cleanup_aer_uncorrect_error_status - Cleanup PCI AER uncorrectable error status 287 * @dev: Pointer to PCI device 288 */ 289static void cleanup_aer_uncorrect_error_status(struct pci_dev *dev) 290{ 291 int pos = 0x100; 292 u32 status, mask; 293 294 pr_info("%s :\n", __func__); 295 296 pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status); 297 pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &mask); 298 if (dev->error_state == pci_channel_io_normal) 299 status &= ~mask; /* Clear corresponding nonfatal bits */ 300 else 301 status &= mask; /* Clear corresponding fatal bits */ 302 pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status); 303} 304 305/** 306 * stop_pci_io - Stop all PCI IO to a given device 307 * @oct: Pointer to Octeon device 308 */ 309static void stop_pci_io(struct octeon_device *oct) 310{ 311 /* No more instructions will be forwarded. */ 312 atomic_set(&oct->status, OCT_DEV_IN_RESET); 313 314 pci_disable_device(oct->pci_dev); 315 316 /* Disable interrupts */ 317 oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR); 318 319 pcierror_quiesce_device(oct); 320 321 /* Release the interrupt line */ 322 free_irq(oct->pci_dev->irq, oct); 323 324 if (oct->flags & LIO_FLAG_MSI_ENABLED) 325 pci_disable_msi(oct->pci_dev); 326 327 dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n", 328 lio_get_state_string(&oct->status)); 329 330 /* making it a common function for all OCTEON models */ 331 cleanup_aer_uncorrect_error_status(oct->pci_dev); 332} 333 334/** 335 * liquidio_pcie_error_detected - called when PCI error is detected 336 * @pdev: Pointer to PCI device 337 * @state: The current pci connection state 338 * 339 * This function is called after a PCI bus error affecting 340 * this device has been detected. 341 */ 342static pci_ers_result_t liquidio_pcie_error_detected(struct pci_dev *pdev, 343 pci_channel_state_t state) 344{ 345 struct octeon_device *oct = pci_get_drvdata(pdev); 346 347 /* Non-correctable Non-fatal errors */ 348 if (state == pci_channel_io_normal) { 349 dev_err(&oct->pci_dev->dev, "Non-correctable non-fatal error reported:\n"); 350 cleanup_aer_uncorrect_error_status(oct->pci_dev); 351 return PCI_ERS_RESULT_CAN_RECOVER; 352 } 353 354 /* Non-correctable Fatal errors */ 355 dev_err(&oct->pci_dev->dev, "Non-correctable FATAL reported by PCI AER driver\n"); 356 stop_pci_io(oct); 357 358 /* Always return a DISCONNECT. There is no support for recovery but only 359 * for a clean shutdown. 360 */ 361 return PCI_ERS_RESULT_DISCONNECT; 362} 363 364/** 365 * liquidio_pcie_mmio_enabled - mmio handler 366 * @pdev: Pointer to PCI device 367 */ 368static pci_ers_result_t liquidio_pcie_mmio_enabled(struct pci_dev __maybe_unused *pdev) 369{ 370 /* We should never hit this since we never ask for a reset for a Fatal 371 * Error. We always return DISCONNECT in io_error above. 372 * But play safe and return RECOVERED for now. 373 */ 374 return PCI_ERS_RESULT_RECOVERED; 375} 376 377/** 378 * liquidio_pcie_slot_reset - called after the pci bus has been reset. 379 * @pdev: Pointer to PCI device 380 * 381 * Restart the card from scratch, as if from a cold-boot. Implementation 382 * resembles the first-half of the octeon_resume routine. 383 */ 384static pci_ers_result_t liquidio_pcie_slot_reset(struct pci_dev __maybe_unused *pdev) 385{ 386 /* We should never hit this since we never ask for a reset for a Fatal 387 * Error. We always return DISCONNECT in io_error above. 388 * But play safe and return RECOVERED for now. 389 */ 390 return PCI_ERS_RESULT_RECOVERED; 391} 392 393/** 394 * liquidio_pcie_resume - called when traffic can start flowing again. 395 * @pdev: Pointer to PCI device 396 * 397 * This callback is called when the error recovery driver tells us that 398 * its OK to resume normal operation. Implementation resembles the 399 * second-half of the octeon_resume routine. 400 */ 401static void liquidio_pcie_resume(struct pci_dev __maybe_unused *pdev) 402{ 403 /* Nothing to be done here. */ 404} 405 406#define liquidio_suspend NULL 407#define liquidio_resume NULL 408 409/* For PCI-E Advanced Error Recovery (AER) Interface */ 410static const struct pci_error_handlers liquidio_err_handler = { 411 .error_detected = liquidio_pcie_error_detected, 412 .mmio_enabled = liquidio_pcie_mmio_enabled, 413 .slot_reset = liquidio_pcie_slot_reset, 414 .resume = liquidio_pcie_resume, 415}; 416 417static const struct pci_device_id liquidio_pci_tbl[] = { 418 { /* 68xx */ 419 PCI_VENDOR_ID_CAVIUM, 0x91, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 420 }, 421 { /* 66xx */ 422 PCI_VENDOR_ID_CAVIUM, 0x92, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 423 }, 424 { /* 23xx pf */ 425 PCI_VENDOR_ID_CAVIUM, 0x9702, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 426 }, 427 { 428 0, 0, 0, 0, 0, 0, 0 429 } 430}; 431MODULE_DEVICE_TABLE(pci, liquidio_pci_tbl); 432 433static SIMPLE_DEV_PM_OPS(liquidio_pm_ops, liquidio_suspend, liquidio_resume); 434 435static struct pci_driver liquidio_pci_driver = { 436 .name = "LiquidIO", 437 .id_table = liquidio_pci_tbl, 438 .probe = liquidio_probe, 439 .remove = liquidio_remove, 440 .err_handler = &liquidio_err_handler, /* For AER */ 441 .driver.pm = &liquidio_pm_ops, 442#ifdef CONFIG_PCI_IOV 443 .sriov_configure = liquidio_enable_sriov, 444#endif 445}; 446 447/** 448 * liquidio_init_pci - register PCI driver 449 */ 450static int liquidio_init_pci(void) 451{ 452 return pci_register_driver(&liquidio_pci_driver); 453} 454 455/** 456 * liquidio_deinit_pci - unregister PCI driver 457 */ 458static void liquidio_deinit_pci(void) 459{ 460 pci_unregister_driver(&liquidio_pci_driver); 461} 462 463/** 464 * check_txq_status - Check Tx queue status, and take appropriate action 465 * @lio: per-network private data 466 * Return: 0 if full, number of queues woken up otherwise 467 */ 468static inline int check_txq_status(struct lio *lio) 469{ 470 int numqs = lio->netdev->real_num_tx_queues; 471 int ret_val = 0; 472 int q, iq; 473 474 /* check each sub-queue state */ 475 for (q = 0; q < numqs; q++) { 476 iq = lio->linfo.txpciq[q % 477 lio->oct_dev->num_iqs].s.q_no; 478 if (octnet_iq_is_full(lio->oct_dev, iq)) 479 continue; 480 if (__netif_subqueue_stopped(lio->netdev, q)) { 481 netif_wake_subqueue(lio->netdev, q); 482 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, iq, 483 tx_restart, 1); 484 ret_val++; 485 } 486 } 487 488 return ret_val; 489} 490 491/** 492 * print_link_info - Print link information 493 * @netdev: network device 494 */ 495static void print_link_info(struct net_device *netdev) 496{ 497 struct lio *lio = GET_LIO(netdev); 498 499 if (!ifstate_check(lio, LIO_IFSTATE_RESETTING) && 500 ifstate_check(lio, LIO_IFSTATE_REGISTERED)) { 501 struct oct_link_info *linfo = &lio->linfo; 502 503 if (linfo->link.s.link_up) { 504 netif_info(lio, link, lio->netdev, "%d Mbps %s Duplex UP\n", 505 linfo->link.s.speed, 506 (linfo->link.s.duplex) ? "Full" : "Half"); 507 } else { 508 netif_info(lio, link, lio->netdev, "Link Down\n"); 509 } 510 } 511} 512 513/** 514 * octnet_link_status_change - Routine to notify MTU change 515 * @work: work_struct data structure 516 */ 517static void octnet_link_status_change(struct work_struct *work) 518{ 519 struct cavium_wk *wk = (struct cavium_wk *)work; 520 struct lio *lio = (struct lio *)wk->ctxptr; 521 522 /* lio->linfo.link.s.mtu always contains max MTU of the lio interface. 523 * this API is invoked only when new max-MTU of the interface is 524 * less than current MTU. 525 */ 526 rtnl_lock(); 527 dev_set_mtu(lio->netdev, lio->linfo.link.s.mtu); 528 rtnl_unlock(); 529} 530 531/** 532 * setup_link_status_change_wq - Sets up the mtu status change work 533 * @netdev: network device 534 */ 535static inline int setup_link_status_change_wq(struct net_device *netdev) 536{ 537 struct lio *lio = GET_LIO(netdev); 538 struct octeon_device *oct = lio->oct_dev; 539 540 lio->link_status_wq.wq = alloc_workqueue("link-status", 541 WQ_MEM_RECLAIM, 0); 542 if (!lio->link_status_wq.wq) { 543 dev_err(&oct->pci_dev->dev, "unable to create cavium link status wq\n"); 544 return -1; 545 } 546 INIT_DELAYED_WORK(&lio->link_status_wq.wk.work, 547 octnet_link_status_change); 548 lio->link_status_wq.wk.ctxptr = lio; 549 550 return 0; 551} 552 553static inline void cleanup_link_status_change_wq(struct net_device *netdev) 554{ 555 struct lio *lio = GET_LIO(netdev); 556 557 if (lio->link_status_wq.wq) { 558 cancel_delayed_work_sync(&lio->link_status_wq.wk.work); 559 destroy_workqueue(lio->link_status_wq.wq); 560 } 561} 562 563/** 564 * update_link_status - Update link status 565 * @netdev: network device 566 * @ls: link status structure 567 * 568 * Called on receipt of a link status response from the core application to 569 * update each interface's link status. 570 */ 571static inline void update_link_status(struct net_device *netdev, 572 union oct_link_status *ls) 573{ 574 struct lio *lio = GET_LIO(netdev); 575 int changed = (lio->linfo.link.u64 != ls->u64); 576 int current_max_mtu = lio->linfo.link.s.mtu; 577 struct octeon_device *oct = lio->oct_dev; 578 579 dev_dbg(&oct->pci_dev->dev, "%s: lio->linfo.link.u64=%llx, ls->u64=%llx\n", 580 __func__, lio->linfo.link.u64, ls->u64); 581 lio->linfo.link.u64 = ls->u64; 582 583 if ((lio->intf_open) && (changed)) { 584 print_link_info(netdev); 585 lio->link_changes++; 586 587 if (lio->linfo.link.s.link_up) { 588 dev_dbg(&oct->pci_dev->dev, "%s: link_up", __func__); 589 netif_carrier_on(netdev); 590 wake_txqs(netdev); 591 } else { 592 dev_dbg(&oct->pci_dev->dev, "%s: link_off", __func__); 593 netif_carrier_off(netdev); 594 stop_txqs(netdev); 595 } 596 if (lio->linfo.link.s.mtu != current_max_mtu) { 597 netif_info(lio, probe, lio->netdev, "Max MTU changed from %d to %d\n", 598 current_max_mtu, lio->linfo.link.s.mtu); 599 netdev->max_mtu = lio->linfo.link.s.mtu; 600 } 601 if (lio->linfo.link.s.mtu < netdev->mtu) { 602 dev_warn(&oct->pci_dev->dev, 603 "Current MTU is higher than new max MTU; Reducing the current mtu from %d to %d\n", 604 netdev->mtu, lio->linfo.link.s.mtu); 605 queue_delayed_work(lio->link_status_wq.wq, 606 &lio->link_status_wq.wk.work, 0); 607 } 608 } 609} 610 611/** 612 * lio_sync_octeon_time - send latest localtime to octeon firmware so that 613 * firmware will correct it's time, in case there is a time skew 614 * 615 * @work: work scheduled to send time update to octeon firmware 616 **/ 617static void lio_sync_octeon_time(struct work_struct *work) 618{ 619 struct cavium_wk *wk = (struct cavium_wk *)work; 620 struct lio *lio = (struct lio *)wk->ctxptr; 621 struct octeon_device *oct = lio->oct_dev; 622 struct octeon_soft_command *sc; 623 struct timespec64 ts; 624 struct lio_time *lt; 625 int ret; 626 627 sc = octeon_alloc_soft_command(oct, sizeof(struct lio_time), 16, 0); 628 if (!sc) { 629 dev_err(&oct->pci_dev->dev, 630 "Failed to sync time to octeon: soft command allocation failed\n"); 631 return; 632 } 633 634 lt = (struct lio_time *)sc->virtdptr; 635 636 /* Get time of the day */ 637 ktime_get_real_ts64(&ts); 638 lt->sec = ts.tv_sec; 639 lt->nsec = ts.tv_nsec; 640 octeon_swap_8B_data((u64 *)lt, (sizeof(struct lio_time)) / 8); 641 642 sc->iq_no = lio->linfo.txpciq[0].s.q_no; 643 octeon_prepare_soft_command(oct, sc, OPCODE_NIC, 644 OPCODE_NIC_SYNC_OCTEON_TIME, 0, 0, 0); 645 646 init_completion(&sc->complete); 647 sc->sc_status = OCTEON_REQUEST_PENDING; 648 649 ret = octeon_send_soft_command(oct, sc); 650 if (ret == IQ_SEND_FAILED) { 651 dev_err(&oct->pci_dev->dev, 652 "Failed to sync time to octeon: failed to send soft command\n"); 653 octeon_free_soft_command(oct, sc); 654 } else { 655 WRITE_ONCE(sc->caller_is_done, true); 656 } 657 658 queue_delayed_work(lio->sync_octeon_time_wq.wq, 659 &lio->sync_octeon_time_wq.wk.work, 660 msecs_to_jiffies(LIO_SYNC_OCTEON_TIME_INTERVAL_MS)); 661} 662 663/** 664 * setup_sync_octeon_time_wq - prepare work to periodically update local time to octeon firmware 665 * 666 * @netdev: network device which should send time update to firmware 667 **/ 668static inline int setup_sync_octeon_time_wq(struct net_device *netdev) 669{ 670 struct lio *lio = GET_LIO(netdev); 671 struct octeon_device *oct = lio->oct_dev; 672 673 lio->sync_octeon_time_wq.wq = 674 alloc_workqueue("update-octeon-time", WQ_MEM_RECLAIM, 0); 675 if (!lio->sync_octeon_time_wq.wq) { 676 dev_err(&oct->pci_dev->dev, "Unable to create wq to update octeon time\n"); 677 return -1; 678 } 679 INIT_DELAYED_WORK(&lio->sync_octeon_time_wq.wk.work, 680 lio_sync_octeon_time); 681 lio->sync_octeon_time_wq.wk.ctxptr = lio; 682 queue_delayed_work(lio->sync_octeon_time_wq.wq, 683 &lio->sync_octeon_time_wq.wk.work, 684 msecs_to_jiffies(LIO_SYNC_OCTEON_TIME_INTERVAL_MS)); 685 686 return 0; 687} 688 689/** 690 * cleanup_sync_octeon_time_wq - destroy wq 691 * 692 * @netdev: network device which should send time update to firmware 693 * 694 * Stop scheduling and destroy the work created to periodically update local 695 * time to octeon firmware. 696 **/ 697static inline void cleanup_sync_octeon_time_wq(struct net_device *netdev) 698{ 699 struct lio *lio = GET_LIO(netdev); 700 struct cavium_wq *time_wq = &lio->sync_octeon_time_wq; 701 702 if (time_wq->wq) { 703 cancel_delayed_work_sync(&time_wq->wk.work); 704 destroy_workqueue(time_wq->wq); 705 } 706} 707 708static struct octeon_device *get_other_octeon_device(struct octeon_device *oct) 709{ 710 struct octeon_device *other_oct; 711 712 other_oct = lio_get_device(oct->octeon_id + 1); 713 714 if (other_oct && other_oct->pci_dev) { 715 int oct_busnum, other_oct_busnum; 716 717 oct_busnum = oct->pci_dev->bus->number; 718 other_oct_busnum = other_oct->pci_dev->bus->number; 719 720 if (oct_busnum == other_oct_busnum) { 721 int oct_slot, other_oct_slot; 722 723 oct_slot = PCI_SLOT(oct->pci_dev->devfn); 724 other_oct_slot = PCI_SLOT(other_oct->pci_dev->devfn); 725 726 if (oct_slot == other_oct_slot) 727 return other_oct; 728 } 729 } 730 731 return NULL; 732} 733 734static void disable_all_vf_links(struct octeon_device *oct) 735{ 736 struct net_device *netdev; 737 int max_vfs, vf, i; 738 739 if (!oct) 740 return; 741 742 max_vfs = oct->sriov_info.max_vfs; 743 744 for (i = 0; i < oct->ifcount; i++) { 745 netdev = oct->props[i].netdev; 746 if (!netdev) 747 continue; 748 749 for (vf = 0; vf < max_vfs; vf++) 750 liquidio_set_vf_link_state(netdev, vf, 751 IFLA_VF_LINK_STATE_DISABLE); 752 } 753} 754 755static int liquidio_watchdog(void *param) 756{ 757 bool err_msg_was_printed[LIO_MAX_CORES]; 758 u16 mask_of_crashed_or_stuck_cores = 0; 759 bool all_vf_links_are_disabled = false; 760 struct octeon_device *oct = param; 761 struct octeon_device *other_oct; 762#ifdef CONFIG_MODULE_UNLOAD 763 long refcount, vfs_referencing_pf; 764 u64 vfs_mask1, vfs_mask2; 765#endif 766 int core; 767 768 memset(err_msg_was_printed, 0, sizeof(err_msg_was_printed)); 769 770 while (!kthread_should_stop()) { 771 /* sleep for a couple of seconds so that we don't hog the CPU */ 772 set_current_state(TASK_INTERRUPTIBLE); 773 schedule_timeout(msecs_to_jiffies(2000)); 774 775 mask_of_crashed_or_stuck_cores = 776 (u16)octeon_read_csr64(oct, CN23XX_SLI_SCRATCH2); 777 778 if (!mask_of_crashed_or_stuck_cores) 779 continue; 780 781 WRITE_ONCE(oct->cores_crashed, true); 782 other_oct = get_other_octeon_device(oct); 783 if (other_oct) 784 WRITE_ONCE(other_oct->cores_crashed, true); 785 786 for (core = 0; core < LIO_MAX_CORES; core++) { 787 bool core_crashed_or_got_stuck; 788 789 core_crashed_or_got_stuck = 790 (mask_of_crashed_or_stuck_cores 791 >> core) & 1; 792 793 if (core_crashed_or_got_stuck && 794 !err_msg_was_printed[core]) { 795 dev_err(&oct->pci_dev->dev, 796 "ERROR: Octeon core %d crashed or got stuck! See oct-fwdump for details.\n", 797 core); 798 err_msg_was_printed[core] = true; 799 } 800 } 801 802 if (all_vf_links_are_disabled) 803 continue; 804 805 disable_all_vf_links(oct); 806 disable_all_vf_links(other_oct); 807 all_vf_links_are_disabled = true; 808 809#ifdef CONFIG_MODULE_UNLOAD 810 vfs_mask1 = READ_ONCE(oct->sriov_info.vf_drv_loaded_mask); 811 vfs_mask2 = READ_ONCE(other_oct->sriov_info.vf_drv_loaded_mask); 812 813 vfs_referencing_pf = hweight64(vfs_mask1); 814 vfs_referencing_pf += hweight64(vfs_mask2); 815 816 refcount = module_refcount(THIS_MODULE); 817 if (refcount >= vfs_referencing_pf) { 818 while (vfs_referencing_pf) { 819 module_put(THIS_MODULE); 820 vfs_referencing_pf--; 821 } 822 } 823#endif 824 } 825 826 return 0; 827} 828 829/** 830 * liquidio_probe - PCI probe handler 831 * @pdev: PCI device structure 832 * @ent: unused 833 */ 834static int 835liquidio_probe(struct pci_dev *pdev, const struct pci_device_id __maybe_unused *ent) 836{ 837 struct octeon_device *oct_dev = NULL; 838 struct handshake *hs; 839 840 oct_dev = octeon_allocate_device(pdev->device, 841 sizeof(struct octeon_device_priv)); 842 if (!oct_dev) { 843 dev_err(&pdev->dev, "Unable to allocate device\n"); 844 return -ENOMEM; 845 } 846 847 if (pdev->device == OCTEON_CN23XX_PF_VID) 848 oct_dev->msix_on = LIO_FLAG_MSIX_ENABLED; 849 850 /* Enable PTP for 6XXX Device */ 851 if (((pdev->device == OCTEON_CN66XX) || 852 (pdev->device == OCTEON_CN68XX))) 853 oct_dev->ptp_enable = true; 854 else 855 oct_dev->ptp_enable = false; 856 857 dev_info(&pdev->dev, "Initializing device %x:%x.\n", 858 (u32)pdev->vendor, (u32)pdev->device); 859 860 /* Assign octeon_device for this device to the private data area. */ 861 pci_set_drvdata(pdev, oct_dev); 862 863 /* set linux specific device pointer */ 864 oct_dev->pci_dev = (void *)pdev; 865 866 oct_dev->subsystem_id = pdev->subsystem_vendor | 867 (pdev->subsystem_device << 16); 868 869 hs = &handshake[oct_dev->octeon_id]; 870 init_completion(&hs->init); 871 init_completion(&hs->started); 872 hs->pci_dev = pdev; 873 874 if (oct_dev->octeon_id == 0) 875 /* first LiquidIO NIC is detected */ 876 complete(&first_stage); 877 878 if (octeon_device_init(oct_dev)) { 879 complete(&hs->init); 880 liquidio_remove(pdev); 881 return -ENOMEM; 882 } 883 884 if (OCTEON_CN23XX_PF(oct_dev)) { 885 u8 bus, device, function; 886 887 if (atomic_read(oct_dev->adapter_refcount) == 1) { 888 /* Each NIC gets one watchdog kernel thread. The first 889 * PF (of each NIC) that gets pci_driver->probe()'d 890 * creates that thread. 891 */ 892 bus = pdev->bus->number; 893 device = PCI_SLOT(pdev->devfn); 894 function = PCI_FUNC(pdev->devfn); 895 oct_dev->watchdog_task = kthread_create( 896 liquidio_watchdog, oct_dev, 897 "liowd/%02hhx:%02hhx.%hhx", bus, device, function); 898 if (!IS_ERR(oct_dev->watchdog_task)) { 899 wake_up_process(oct_dev->watchdog_task); 900 } else { 901 oct_dev->watchdog_task = NULL; 902 dev_err(&oct_dev->pci_dev->dev, 903 "failed to create kernel_thread\n"); 904 liquidio_remove(pdev); 905 return -1; 906 } 907 } 908 } 909 910 oct_dev->rx_pause = 1; 911 oct_dev->tx_pause = 1; 912 913 dev_dbg(&oct_dev->pci_dev->dev, "Device is ready\n"); 914 915 return 0; 916} 917 918static bool fw_type_is_auto(void) 919{ 920 return strncmp(fw_type, LIO_FW_NAME_TYPE_AUTO, 921 sizeof(LIO_FW_NAME_TYPE_AUTO)) == 0; 922} 923 924/** 925 * octeon_pci_flr - PCI FLR for each Octeon device. 926 * @oct: octeon device 927 */ 928static void octeon_pci_flr(struct octeon_device *oct) 929{ 930 int rc; 931 932 pci_save_state(oct->pci_dev); 933 934 pci_cfg_access_lock(oct->pci_dev); 935 936 /* Quiesce the device completely */ 937 pci_write_config_word(oct->pci_dev, PCI_COMMAND, 938 PCI_COMMAND_INTX_DISABLE); 939 940 rc = __pci_reset_function_locked(oct->pci_dev); 941 942 if (rc != 0) 943 dev_err(&oct->pci_dev->dev, "Error %d resetting PCI function %d\n", 944 rc, oct->pf_num); 945 946 pci_cfg_access_unlock(oct->pci_dev); 947 948 pci_restore_state(oct->pci_dev); 949} 950 951/** 952 * octeon_destroy_resources - Destroy resources associated with octeon device 953 * @oct: octeon device 954 */ 955static void octeon_destroy_resources(struct octeon_device *oct) 956{ 957 int i, refcount; 958 struct msix_entry *msix_entries; 959 struct octeon_device_priv *oct_priv = 960 (struct octeon_device_priv *)oct->priv; 961 962 struct handshake *hs; 963 964 switch (atomic_read(&oct->status)) { 965 case OCT_DEV_RUNNING: 966 case OCT_DEV_CORE_OK: 967 968 /* No more instructions will be forwarded. */ 969 atomic_set(&oct->status, OCT_DEV_IN_RESET); 970 971 oct->app_mode = CVM_DRV_INVALID_APP; 972 dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n", 973 lio_get_state_string(&oct->status)); 974 975 schedule_timeout_uninterruptible(HZ / 10); 976 977 fallthrough; 978 case OCT_DEV_HOST_OK: 979 980 case OCT_DEV_CONSOLE_INIT_DONE: 981 /* Remove any consoles */ 982 octeon_remove_consoles(oct); 983 984 fallthrough; 985 case OCT_DEV_IO_QUEUES_DONE: 986 if (lio_wait_for_instr_fetch(oct)) 987 dev_err(&oct->pci_dev->dev, "IQ had pending instructions\n"); 988 989 if (wait_for_pending_requests(oct)) 990 dev_err(&oct->pci_dev->dev, "There were pending requests\n"); 991 992 /* Disable the input and output queues now. No more packets will 993 * arrive from Octeon, but we should wait for all packet 994 * processing to finish. 995 */ 996 oct->fn_list.disable_io_queues(oct); 997 998 if (lio_wait_for_oq_pkts(oct)) 999 dev_err(&oct->pci_dev->dev, "OQ had pending packets\n"); 1000 1001 /* Force all requests waiting to be fetched by OCTEON to 1002 * complete. 1003 */ 1004 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) { 1005 struct octeon_instr_queue *iq; 1006 1007 if (!(oct->io_qmask.iq & BIT_ULL(i))) 1008 continue; 1009 iq = oct->instr_queue[i]; 1010 1011 if (atomic_read(&iq->instr_pending)) { 1012 spin_lock_bh(&iq->lock); 1013 iq->fill_cnt = 0; 1014 iq->octeon_read_index = iq->host_write_index; 1015 iq->stats.instr_processed += 1016 atomic_read(&iq->instr_pending); 1017 lio_process_iq_request_list(oct, iq, 0); 1018 spin_unlock_bh(&iq->lock); 1019 } 1020 } 1021 1022 lio_process_ordered_list(oct, 1); 1023 octeon_free_sc_done_list(oct); 1024 octeon_free_sc_zombie_list(oct); 1025 1026 fallthrough; 1027 case OCT_DEV_INTR_SET_DONE: 1028 /* Disable interrupts */ 1029 oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR); 1030 1031 if (oct->msix_on) { 1032 msix_entries = (struct msix_entry *)oct->msix_entries; 1033 for (i = 0; i < oct->num_msix_irqs - 1; i++) { 1034 if (oct->ioq_vector[i].vector) { 1035 /* clear the affinity_cpumask */ 1036 irq_set_affinity_hint( 1037 msix_entries[i].vector, 1038 NULL); 1039 free_irq(msix_entries[i].vector, 1040 &oct->ioq_vector[i]); 1041 oct->ioq_vector[i].vector = 0; 1042 } 1043 } 1044 /* non-iov vector's argument is oct struct */ 1045 free_irq(msix_entries[i].vector, oct); 1046 1047 pci_disable_msix(oct->pci_dev); 1048 kfree(oct->msix_entries); 1049 oct->msix_entries = NULL; 1050 } else { 1051 /* Release the interrupt line */ 1052 free_irq(oct->pci_dev->irq, oct); 1053 1054 if (oct->flags & LIO_FLAG_MSI_ENABLED) 1055 pci_disable_msi(oct->pci_dev); 1056 } 1057 1058 kfree(oct->irq_name_storage); 1059 oct->irq_name_storage = NULL; 1060 1061 fallthrough; 1062 case OCT_DEV_MSIX_ALLOC_VECTOR_DONE: 1063 if (OCTEON_CN23XX_PF(oct)) 1064 octeon_free_ioq_vector(oct); 1065 1066 fallthrough; 1067 case OCT_DEV_MBOX_SETUP_DONE: 1068 if (OCTEON_CN23XX_PF(oct)) 1069 oct->fn_list.free_mbox(oct); 1070 1071 fallthrough; 1072 case OCT_DEV_IN_RESET: 1073 case OCT_DEV_DROQ_INIT_DONE: 1074 /* Wait for any pending operations */ 1075 mdelay(100); 1076 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) { 1077 if (!(oct->io_qmask.oq & BIT_ULL(i))) 1078 continue; 1079 octeon_delete_droq(oct, i); 1080 } 1081 1082 /* Force any pending handshakes to complete */ 1083 for (i = 0; i < MAX_OCTEON_DEVICES; i++) { 1084 hs = &handshake[i]; 1085 1086 if (hs->pci_dev) { 1087 handshake[oct->octeon_id].init_ok = 0; 1088 complete(&handshake[oct->octeon_id].init); 1089 handshake[oct->octeon_id].started_ok = 0; 1090 complete(&handshake[oct->octeon_id].started); 1091 } 1092 } 1093 1094 fallthrough; 1095 case OCT_DEV_RESP_LIST_INIT_DONE: 1096 octeon_delete_response_list(oct); 1097 1098 fallthrough; 1099 case OCT_DEV_INSTR_QUEUE_INIT_DONE: 1100 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) { 1101 if (!(oct->io_qmask.iq & BIT_ULL(i))) 1102 continue; 1103 octeon_delete_instr_queue(oct, i); 1104 } 1105#ifdef CONFIG_PCI_IOV 1106 if (oct->sriov_info.sriov_enabled) 1107 pci_disable_sriov(oct->pci_dev); 1108#endif 1109 fallthrough; 1110 case OCT_DEV_SC_BUFF_POOL_INIT_DONE: 1111 octeon_free_sc_buffer_pool(oct); 1112 1113 fallthrough; 1114 case OCT_DEV_DISPATCH_INIT_DONE: 1115 octeon_delete_dispatch_list(oct); 1116 cancel_delayed_work_sync(&oct->nic_poll_work.work); 1117 1118 fallthrough; 1119 case OCT_DEV_PCI_MAP_DONE: 1120 refcount = octeon_deregister_device(oct); 1121 1122 /* Soft reset the octeon device before exiting. 1123 * However, if fw was loaded from card (i.e. autoboot), 1124 * perform an FLR instead. 1125 * Implementation note: only soft-reset the device 1126 * if it is a CN6XXX OR the LAST CN23XX device. 1127 */ 1128 if (atomic_read(oct->adapter_fw_state) == FW_IS_PRELOADED) 1129 octeon_pci_flr(oct); 1130 else if (OCTEON_CN6XXX(oct) || !refcount) 1131 oct->fn_list.soft_reset(oct); 1132 1133 octeon_unmap_pci_barx(oct, 0); 1134 octeon_unmap_pci_barx(oct, 1); 1135 1136 fallthrough; 1137 case OCT_DEV_PCI_ENABLE_DONE: 1138 pci_clear_master(oct->pci_dev); 1139 /* Disable the device, releasing the PCI INT */ 1140 pci_disable_device(oct->pci_dev); 1141 1142 fallthrough; 1143 case OCT_DEV_BEGIN_STATE: 1144 /* Nothing to be done here either */ 1145 break; 1146 } /* end switch (oct->status) */ 1147 1148 tasklet_kill(&oct_priv->droq_tasklet); 1149} 1150 1151/** 1152 * send_rx_ctrl_cmd - Send Rx control command 1153 * @lio: per-network private data 1154 * @start_stop: whether to start or stop 1155 */ 1156static int send_rx_ctrl_cmd(struct lio *lio, int start_stop) 1157{ 1158 struct octeon_soft_command *sc; 1159 union octnet_cmd *ncmd; 1160 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1161 int retval; 1162 1163 if (oct->props[lio->ifidx].rx_on == start_stop) 1164 return 0; 1165 1166 sc = (struct octeon_soft_command *) 1167 octeon_alloc_soft_command(oct, OCTNET_CMD_SIZE, 1168 16, 0); 1169 if (!sc) { 1170 netif_info(lio, rx_err, lio->netdev, 1171 "Failed to allocate octeon_soft_command struct\n"); 1172 return -ENOMEM; 1173 } 1174 1175 ncmd = (union octnet_cmd *)sc->virtdptr; 1176 1177 ncmd->u64 = 0; 1178 ncmd->s.cmd = OCTNET_CMD_RX_CTL; 1179 ncmd->s.param1 = start_stop; 1180 1181 octeon_swap_8B_data((u64 *)ncmd, (OCTNET_CMD_SIZE >> 3)); 1182 1183 sc->iq_no = lio->linfo.txpciq[0].s.q_no; 1184 1185 octeon_prepare_soft_command(oct, sc, OPCODE_NIC, 1186 OPCODE_NIC_CMD, 0, 0, 0); 1187 1188 init_completion(&sc->complete); 1189 sc->sc_status = OCTEON_REQUEST_PENDING; 1190 1191 retval = octeon_send_soft_command(oct, sc); 1192 if (retval == IQ_SEND_FAILED) { 1193 netif_info(lio, rx_err, lio->netdev, "Failed to send RX Control message\n"); 1194 octeon_free_soft_command(oct, sc); 1195 } else { 1196 /* Sleep on a wait queue till the cond flag indicates that the 1197 * response arrived or timed-out. 1198 */ 1199 retval = wait_for_sc_completion_timeout(oct, sc, 0); 1200 if (retval) 1201 return retval; 1202 1203 oct->props[lio->ifidx].rx_on = start_stop; 1204 WRITE_ONCE(sc->caller_is_done, true); 1205 } 1206 1207 return retval; 1208} 1209 1210/** 1211 * liquidio_destroy_nic_device - Destroy NIC device interface 1212 * @oct: octeon device 1213 * @ifidx: which interface to destroy 1214 * 1215 * Cleanup associated with each interface for an Octeon device when NIC 1216 * module is being unloaded or if initialization fails during load. 1217 */ 1218static void liquidio_destroy_nic_device(struct octeon_device *oct, int ifidx) 1219{ 1220 struct net_device *netdev = oct->props[ifidx].netdev; 1221 struct octeon_device_priv *oct_priv = 1222 (struct octeon_device_priv *)oct->priv; 1223 struct napi_struct *napi, *n; 1224 struct lio *lio; 1225 1226 if (!netdev) { 1227 dev_err(&oct->pci_dev->dev, "%s No netdevice ptr for index %d\n", 1228 __func__, ifidx); 1229 return; 1230 } 1231 1232 lio = GET_LIO(netdev); 1233 1234 dev_dbg(&oct->pci_dev->dev, "NIC device cleanup\n"); 1235 1236 if (atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING) 1237 liquidio_stop(netdev); 1238 1239 if (oct->props[lio->ifidx].napi_enabled == 1) { 1240 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1241 napi_disable(napi); 1242 1243 oct->props[lio->ifidx].napi_enabled = 0; 1244 1245 if (OCTEON_CN23XX_PF(oct)) 1246 oct->droq[0]->ops.poll_mode = 0; 1247 } 1248 1249 /* Delete NAPI */ 1250 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1251 netif_napi_del(napi); 1252 1253 tasklet_enable(&oct_priv->droq_tasklet); 1254 1255 if (atomic_read(&lio->ifstate) & LIO_IFSTATE_REGISTERED) 1256 unregister_netdev(netdev); 1257 1258 cleanup_sync_octeon_time_wq(netdev); 1259 cleanup_link_status_change_wq(netdev); 1260 1261 cleanup_rx_oom_poll_fn(netdev); 1262 1263 lio_delete_glists(lio); 1264 1265 free_netdev(netdev); 1266 1267 oct->props[ifidx].gmxport = -1; 1268 1269 oct->props[ifidx].netdev = NULL; 1270} 1271 1272/** 1273 * liquidio_stop_nic_module - Stop complete NIC functionality 1274 * @oct: octeon device 1275 */ 1276static int liquidio_stop_nic_module(struct octeon_device *oct) 1277{ 1278 int i, j; 1279 struct lio *lio; 1280 1281 dev_dbg(&oct->pci_dev->dev, "Stopping network interfaces\n"); 1282 if (!oct->ifcount) { 1283 dev_err(&oct->pci_dev->dev, "Init for Octeon was not completed\n"); 1284 return 1; 1285 } 1286 1287 spin_lock_bh(&oct->cmd_resp_wqlock); 1288 oct->cmd_resp_state = OCT_DRV_OFFLINE; 1289 spin_unlock_bh(&oct->cmd_resp_wqlock); 1290 1291 lio_vf_rep_destroy(oct); 1292 1293 for (i = 0; i < oct->ifcount; i++) { 1294 lio = GET_LIO(oct->props[i].netdev); 1295 for (j = 0; j < oct->num_oqs; j++) 1296 octeon_unregister_droq_ops(oct, 1297 lio->linfo.rxpciq[j].s.q_no); 1298 } 1299 1300 for (i = 0; i < oct->ifcount; i++) 1301 liquidio_destroy_nic_device(oct, i); 1302 1303 if (oct->devlink) { 1304 devlink_unregister(oct->devlink); 1305 devlink_free(oct->devlink); 1306 oct->devlink = NULL; 1307 } 1308 1309 dev_dbg(&oct->pci_dev->dev, "Network interfaces stopped\n"); 1310 return 0; 1311} 1312 1313/** 1314 * liquidio_remove - Cleans up resources at unload time 1315 * @pdev: PCI device structure 1316 */ 1317static void liquidio_remove(struct pci_dev *pdev) 1318{ 1319 struct octeon_device *oct_dev = pci_get_drvdata(pdev); 1320 1321 dev_dbg(&oct_dev->pci_dev->dev, "Stopping device\n"); 1322 1323 if (oct_dev->watchdog_task) 1324 kthread_stop(oct_dev->watchdog_task); 1325 1326 if (!oct_dev->octeon_id && 1327 oct_dev->fw_info.app_cap_flags & LIQUIDIO_SWITCHDEV_CAP) 1328 lio_vf_rep_modexit(); 1329 1330 if (oct_dev->app_mode && (oct_dev->app_mode == CVM_DRV_NIC_APP)) 1331 liquidio_stop_nic_module(oct_dev); 1332 1333 /* Reset the octeon device and cleanup all memory allocated for 1334 * the octeon device by driver. 1335 */ 1336 octeon_destroy_resources(oct_dev); 1337 1338 dev_info(&oct_dev->pci_dev->dev, "Device removed\n"); 1339 1340 /* This octeon device has been removed. Update the global 1341 * data structure to reflect this. Free the device structure. 1342 */ 1343 octeon_free_device_mem(oct_dev); 1344} 1345 1346/** 1347 * octeon_chip_specific_setup - Identify the Octeon device and to map the BAR address space 1348 * @oct: octeon device 1349 */ 1350static int octeon_chip_specific_setup(struct octeon_device *oct) 1351{ 1352 u32 dev_id, rev_id; 1353 int ret = 1; 1354 1355 pci_read_config_dword(oct->pci_dev, 0, &dev_id); 1356 pci_read_config_dword(oct->pci_dev, 8, &rev_id); 1357 oct->rev_id = rev_id & 0xff; 1358 1359 switch (dev_id) { 1360 case OCTEON_CN68XX_PCIID: 1361 oct->chip_id = OCTEON_CN68XX; 1362 ret = lio_setup_cn68xx_octeon_device(oct); 1363 break; 1364 1365 case OCTEON_CN66XX_PCIID: 1366 oct->chip_id = OCTEON_CN66XX; 1367 ret = lio_setup_cn66xx_octeon_device(oct); 1368 break; 1369 1370 case OCTEON_CN23XX_PCIID_PF: 1371 oct->chip_id = OCTEON_CN23XX_PF_VID; 1372 ret = setup_cn23xx_octeon_pf_device(oct); 1373 if (ret) 1374 break; 1375#ifdef CONFIG_PCI_IOV 1376 if (!ret) 1377 pci_sriov_set_totalvfs(oct->pci_dev, 1378 oct->sriov_info.max_vfs); 1379#endif 1380 break; 1381 1382 default: 1383 dev_err(&oct->pci_dev->dev, "Unknown device found (dev_id: %x)\n", 1384 dev_id); 1385 } 1386 1387 return ret; 1388} 1389 1390/** 1391 * octeon_pci_os_setup - PCI initialization for each Octeon device. 1392 * @oct: octeon device 1393 */ 1394static int octeon_pci_os_setup(struct octeon_device *oct) 1395{ 1396 /* setup PCI stuff first */ 1397 if (pci_enable_device(oct->pci_dev)) { 1398 dev_err(&oct->pci_dev->dev, "pci_enable_device failed\n"); 1399 return 1; 1400 } 1401 1402 if (dma_set_mask_and_coherent(&oct->pci_dev->dev, DMA_BIT_MASK(64))) { 1403 dev_err(&oct->pci_dev->dev, "Unexpected DMA device capability\n"); 1404 pci_disable_device(oct->pci_dev); 1405 return 1; 1406 } 1407 1408 /* Enable PCI DMA Master. */ 1409 pci_set_master(oct->pci_dev); 1410 1411 return 0; 1412} 1413 1414/** 1415 * free_netbuf - Unmap and free network buffer 1416 * @buf: buffer 1417 */ 1418static void free_netbuf(void *buf) 1419{ 1420 struct sk_buff *skb; 1421 struct octnet_buf_free_info *finfo; 1422 struct lio *lio; 1423 1424 finfo = (struct octnet_buf_free_info *)buf; 1425 skb = finfo->skb; 1426 lio = finfo->lio; 1427 1428 dma_unmap_single(&lio->oct_dev->pci_dev->dev, finfo->dptr, skb->len, 1429 DMA_TO_DEVICE); 1430 1431 tx_buffer_free(skb); 1432} 1433 1434/** 1435 * free_netsgbuf - Unmap and free gather buffer 1436 * @buf: buffer 1437 */ 1438static void free_netsgbuf(void *buf) 1439{ 1440 struct octnet_buf_free_info *finfo; 1441 struct sk_buff *skb; 1442 struct lio *lio; 1443 struct octnic_gather *g; 1444 int i, frags, iq; 1445 1446 finfo = (struct octnet_buf_free_info *)buf; 1447 skb = finfo->skb; 1448 lio = finfo->lio; 1449 g = finfo->g; 1450 frags = skb_shinfo(skb)->nr_frags; 1451 1452 dma_unmap_single(&lio->oct_dev->pci_dev->dev, 1453 g->sg[0].ptr[0], (skb->len - skb->data_len), 1454 DMA_TO_DEVICE); 1455 1456 i = 1; 1457 while (frags--) { 1458 skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1]; 1459 1460 pci_unmap_page((lio->oct_dev)->pci_dev, 1461 g->sg[(i >> 2)].ptr[(i & 3)], 1462 skb_frag_size(frag), DMA_TO_DEVICE); 1463 i++; 1464 } 1465 1466 iq = skb_iq(lio->oct_dev, skb); 1467 spin_lock(&lio->glist_lock[iq]); 1468 list_add_tail(&g->list, &lio->glist[iq]); 1469 spin_unlock(&lio->glist_lock[iq]); 1470 1471 tx_buffer_free(skb); 1472} 1473 1474/** 1475 * free_netsgbuf_with_resp - Unmap and free gather buffer with response 1476 * @buf: buffer 1477 */ 1478static void free_netsgbuf_with_resp(void *buf) 1479{ 1480 struct octeon_soft_command *sc; 1481 struct octnet_buf_free_info *finfo; 1482 struct sk_buff *skb; 1483 struct lio *lio; 1484 struct octnic_gather *g; 1485 int i, frags, iq; 1486 1487 sc = (struct octeon_soft_command *)buf; 1488 skb = (struct sk_buff *)sc->callback_arg; 1489 finfo = (struct octnet_buf_free_info *)&skb->cb; 1490 1491 lio = finfo->lio; 1492 g = finfo->g; 1493 frags = skb_shinfo(skb)->nr_frags; 1494 1495 dma_unmap_single(&lio->oct_dev->pci_dev->dev, 1496 g->sg[0].ptr[0], (skb->len - skb->data_len), 1497 DMA_TO_DEVICE); 1498 1499 i = 1; 1500 while (frags--) { 1501 skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1]; 1502 1503 pci_unmap_page((lio->oct_dev)->pci_dev, 1504 g->sg[(i >> 2)].ptr[(i & 3)], 1505 skb_frag_size(frag), DMA_TO_DEVICE); 1506 i++; 1507 } 1508 1509 iq = skb_iq(lio->oct_dev, skb); 1510 1511 spin_lock(&lio->glist_lock[iq]); 1512 list_add_tail(&g->list, &lio->glist[iq]); 1513 spin_unlock(&lio->glist_lock[iq]); 1514 1515 /* Don't free the skb yet */ 1516} 1517 1518/** 1519 * liquidio_ptp_adjfreq - Adjust ptp frequency 1520 * @ptp: PTP clock info 1521 * @ppb: how much to adjust by, in parts-per-billion 1522 */ 1523static int liquidio_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) 1524{ 1525 struct lio *lio = container_of(ptp, struct lio, ptp_info); 1526 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1527 u64 comp, delta; 1528 unsigned long flags; 1529 bool neg_adj = false; 1530 1531 if (ppb < 0) { 1532 neg_adj = true; 1533 ppb = -ppb; 1534 } 1535 1536 /* The hardware adds the clock compensation value to the 1537 * PTP clock on every coprocessor clock cycle, so we 1538 * compute the delta in terms of coprocessor clocks. 1539 */ 1540 delta = (u64)ppb << 32; 1541 do_div(delta, oct->coproc_clock_rate); 1542 1543 spin_lock_irqsave(&lio->ptp_lock, flags); 1544 comp = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_COMP); 1545 if (neg_adj) 1546 comp -= delta; 1547 else 1548 comp += delta; 1549 lio_pci_writeq(oct, comp, CN6XXX_MIO_PTP_CLOCK_COMP); 1550 spin_unlock_irqrestore(&lio->ptp_lock, flags); 1551 1552 return 0; 1553} 1554 1555/** 1556 * liquidio_ptp_adjtime - Adjust ptp time 1557 * @ptp: PTP clock info 1558 * @delta: how much to adjust by, in nanosecs 1559 */ 1560static int liquidio_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) 1561{ 1562 unsigned long flags; 1563 struct lio *lio = container_of(ptp, struct lio, ptp_info); 1564 1565 spin_lock_irqsave(&lio->ptp_lock, flags); 1566 lio->ptp_adjust += delta; 1567 spin_unlock_irqrestore(&lio->ptp_lock, flags); 1568 1569 return 0; 1570} 1571 1572/** 1573 * liquidio_ptp_gettime - Get hardware clock time, including any adjustment 1574 * @ptp: PTP clock info 1575 * @ts: timespec 1576 */ 1577static int liquidio_ptp_gettime(struct ptp_clock_info *ptp, 1578 struct timespec64 *ts) 1579{ 1580 u64 ns; 1581 unsigned long flags; 1582 struct lio *lio = container_of(ptp, struct lio, ptp_info); 1583 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1584 1585 spin_lock_irqsave(&lio->ptp_lock, flags); 1586 ns = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_HI); 1587 ns += lio->ptp_adjust; 1588 spin_unlock_irqrestore(&lio->ptp_lock, flags); 1589 1590 *ts = ns_to_timespec64(ns); 1591 1592 return 0; 1593} 1594 1595/** 1596 * liquidio_ptp_settime - Set hardware clock time. Reset adjustment 1597 * @ptp: PTP clock info 1598 * @ts: timespec 1599 */ 1600static int liquidio_ptp_settime(struct ptp_clock_info *ptp, 1601 const struct timespec64 *ts) 1602{ 1603 u64 ns; 1604 unsigned long flags; 1605 struct lio *lio = container_of(ptp, struct lio, ptp_info); 1606 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1607 1608 ns = timespec64_to_ns(ts); 1609 1610 spin_lock_irqsave(&lio->ptp_lock, flags); 1611 lio_pci_writeq(oct, ns, CN6XXX_MIO_PTP_CLOCK_HI); 1612 lio->ptp_adjust = 0; 1613 spin_unlock_irqrestore(&lio->ptp_lock, flags); 1614 1615 return 0; 1616} 1617 1618/** 1619 * liquidio_ptp_enable - Check if PTP is enabled 1620 * @ptp: PTP clock info 1621 * @rq: request 1622 * @on: is it on 1623 */ 1624static int 1625liquidio_ptp_enable(struct ptp_clock_info __maybe_unused *ptp, 1626 struct ptp_clock_request __maybe_unused *rq, 1627 int __maybe_unused on) 1628{ 1629 return -EOPNOTSUPP; 1630} 1631 1632/** 1633 * oct_ptp_open - Open PTP clock source 1634 * @netdev: network device 1635 */ 1636static void oct_ptp_open(struct net_device *netdev) 1637{ 1638 struct lio *lio = GET_LIO(netdev); 1639 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1640 1641 spin_lock_init(&lio->ptp_lock); 1642 1643 snprintf(lio->ptp_info.name, 16, "%s", netdev->name); 1644 lio->ptp_info.owner = THIS_MODULE; 1645 lio->ptp_info.max_adj = 250000000; 1646 lio->ptp_info.n_alarm = 0; 1647 lio->ptp_info.n_ext_ts = 0; 1648 lio->ptp_info.n_per_out = 0; 1649 lio->ptp_info.pps = 0; 1650 lio->ptp_info.adjfreq = liquidio_ptp_adjfreq; 1651 lio->ptp_info.adjtime = liquidio_ptp_adjtime; 1652 lio->ptp_info.gettime64 = liquidio_ptp_gettime; 1653 lio->ptp_info.settime64 = liquidio_ptp_settime; 1654 lio->ptp_info.enable = liquidio_ptp_enable; 1655 1656 lio->ptp_adjust = 0; 1657 1658 lio->ptp_clock = ptp_clock_register(&lio->ptp_info, 1659 &oct->pci_dev->dev); 1660 1661 if (IS_ERR(lio->ptp_clock)) 1662 lio->ptp_clock = NULL; 1663} 1664 1665/** 1666 * liquidio_ptp_init - Init PTP clock 1667 * @oct: octeon device 1668 */ 1669static void liquidio_ptp_init(struct octeon_device *oct) 1670{ 1671 u64 clock_comp, cfg; 1672 1673 clock_comp = (u64)NSEC_PER_SEC << 32; 1674 do_div(clock_comp, oct->coproc_clock_rate); 1675 lio_pci_writeq(oct, clock_comp, CN6XXX_MIO_PTP_CLOCK_COMP); 1676 1677 /* Enable */ 1678 cfg = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_CFG); 1679 lio_pci_writeq(oct, cfg | 0x01, CN6XXX_MIO_PTP_CLOCK_CFG); 1680} 1681 1682/** 1683 * load_firmware - Load firmware to device 1684 * @oct: octeon device 1685 * 1686 * Maps device to firmware filename, requests firmware, and downloads it 1687 */ 1688static int load_firmware(struct octeon_device *oct) 1689{ 1690 int ret = 0; 1691 const struct firmware *fw; 1692 char fw_name[LIO_MAX_FW_FILENAME_LEN]; 1693 char *tmp_fw_type; 1694 1695 if (fw_type_is_auto()) { 1696 tmp_fw_type = LIO_FW_NAME_TYPE_NIC; 1697 strncpy(fw_type, tmp_fw_type, sizeof(fw_type)); 1698 } else { 1699 tmp_fw_type = fw_type; 1700 } 1701 1702 sprintf(fw_name, "%s%s%s_%s%s", LIO_FW_DIR, LIO_FW_BASE_NAME, 1703 octeon_get_conf(oct)->card_name, tmp_fw_type, 1704 LIO_FW_NAME_SUFFIX); 1705 1706 ret = request_firmware(&fw, fw_name, &oct->pci_dev->dev); 1707 if (ret) { 1708 dev_err(&oct->pci_dev->dev, "Request firmware failed. Could not find file %s.\n", 1709 fw_name); 1710 release_firmware(fw); 1711 return ret; 1712 } 1713 1714 ret = octeon_download_firmware(oct, fw->data, fw->size); 1715 1716 release_firmware(fw); 1717 1718 return ret; 1719} 1720 1721/** 1722 * octnet_poll_check_txq_status - Poll routine for checking transmit queue status 1723 * @work: work_struct data structure 1724 */ 1725static void octnet_poll_check_txq_status(struct work_struct *work) 1726{ 1727 struct cavium_wk *wk = (struct cavium_wk *)work; 1728 struct lio *lio = (struct lio *)wk->ctxptr; 1729 1730 if (!ifstate_check(lio, LIO_IFSTATE_RUNNING)) 1731 return; 1732 1733 check_txq_status(lio); 1734 queue_delayed_work(lio->txq_status_wq.wq, 1735 &lio->txq_status_wq.wk.work, msecs_to_jiffies(1)); 1736} 1737 1738/** 1739 * setup_tx_poll_fn - Sets up the txq poll check 1740 * @netdev: network device 1741 */ 1742static inline int setup_tx_poll_fn(struct net_device *netdev) 1743{ 1744 struct lio *lio = GET_LIO(netdev); 1745 struct octeon_device *oct = lio->oct_dev; 1746 1747 lio->txq_status_wq.wq = alloc_workqueue("txq-status", 1748 WQ_MEM_RECLAIM, 0); 1749 if (!lio->txq_status_wq.wq) { 1750 dev_err(&oct->pci_dev->dev, "unable to create cavium txq status wq\n"); 1751 return -1; 1752 } 1753 INIT_DELAYED_WORK(&lio->txq_status_wq.wk.work, 1754 octnet_poll_check_txq_status); 1755 lio->txq_status_wq.wk.ctxptr = lio; 1756 queue_delayed_work(lio->txq_status_wq.wq, 1757 &lio->txq_status_wq.wk.work, msecs_to_jiffies(1)); 1758 return 0; 1759} 1760 1761static inline void cleanup_tx_poll_fn(struct net_device *netdev) 1762{ 1763 struct lio *lio = GET_LIO(netdev); 1764 1765 if (lio->txq_status_wq.wq) { 1766 cancel_delayed_work_sync(&lio->txq_status_wq.wk.work); 1767 destroy_workqueue(lio->txq_status_wq.wq); 1768 } 1769} 1770 1771/** 1772 * liquidio_open - Net device open for LiquidIO 1773 * @netdev: network device 1774 */ 1775static int liquidio_open(struct net_device *netdev) 1776{ 1777 struct lio *lio = GET_LIO(netdev); 1778 struct octeon_device *oct = lio->oct_dev; 1779 struct octeon_device_priv *oct_priv = 1780 (struct octeon_device_priv *)oct->priv; 1781 struct napi_struct *napi, *n; 1782 int ret = 0; 1783 1784 if (oct->props[lio->ifidx].napi_enabled == 0) { 1785 tasklet_disable(&oct_priv->droq_tasklet); 1786 1787 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1788 napi_enable(napi); 1789 1790 oct->props[lio->ifidx].napi_enabled = 1; 1791 1792 if (OCTEON_CN23XX_PF(oct)) 1793 oct->droq[0]->ops.poll_mode = 1; 1794 } 1795 1796 if (oct->ptp_enable) 1797 oct_ptp_open(netdev); 1798 1799 ifstate_set(lio, LIO_IFSTATE_RUNNING); 1800 1801 if (!OCTEON_CN23XX_PF(oct) || !oct->msix_on) { 1802 ret = setup_tx_poll_fn(netdev); 1803 if (ret) 1804 goto err_poll; 1805 } 1806 1807 netif_tx_start_all_queues(netdev); 1808 1809 /* Ready for link status updates */ 1810 lio->intf_open = 1; 1811 1812 netif_info(lio, ifup, lio->netdev, "Interface Open, ready for traffic\n"); 1813 1814 /* tell Octeon to start forwarding packets to host */ 1815 ret = send_rx_ctrl_cmd(lio, 1); 1816 if (ret) 1817 goto err_rx_ctrl; 1818 1819 /* start periodical statistics fetch */ 1820 INIT_DELAYED_WORK(&lio->stats_wk.work, lio_fetch_stats); 1821 lio->stats_wk.ctxptr = lio; 1822 schedule_delayed_work(&lio->stats_wk.work, msecs_to_jiffies 1823 (LIQUIDIO_NDEV_STATS_POLL_TIME_MS)); 1824 1825 dev_info(&oct->pci_dev->dev, "%s interface is opened\n", 1826 netdev->name); 1827 1828 return 0; 1829 1830err_rx_ctrl: 1831 if (!OCTEON_CN23XX_PF(oct) || !oct->msix_on) 1832 cleanup_tx_poll_fn(netdev); 1833err_poll: 1834 if (lio->ptp_clock) { 1835 ptp_clock_unregister(lio->ptp_clock); 1836 lio->ptp_clock = NULL; 1837 } 1838 1839 if (oct->props[lio->ifidx].napi_enabled == 1) { 1840 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1841 napi_disable(napi); 1842 1843 oct->props[lio->ifidx].napi_enabled = 0; 1844 1845 if (OCTEON_CN23XX_PF(oct)) 1846 oct->droq[0]->ops.poll_mode = 0; 1847 } 1848 1849 return ret; 1850} 1851 1852/** 1853 * liquidio_stop - Net device stop for LiquidIO 1854 * @netdev: network device 1855 */ 1856static int liquidio_stop(struct net_device *netdev) 1857{ 1858 struct lio *lio = GET_LIO(netdev); 1859 struct octeon_device *oct = lio->oct_dev; 1860 struct octeon_device_priv *oct_priv = 1861 (struct octeon_device_priv *)oct->priv; 1862 struct napi_struct *napi, *n; 1863 int ret = 0; 1864 1865 ifstate_reset(lio, LIO_IFSTATE_RUNNING); 1866 1867 /* Stop any link updates */ 1868 lio->intf_open = 0; 1869 1870 stop_txqs(netdev); 1871 1872 /* Inform that netif carrier is down */ 1873 netif_carrier_off(netdev); 1874 netif_tx_disable(netdev); 1875 1876 lio->linfo.link.s.link_up = 0; 1877 lio->link_changes++; 1878 1879 /* Tell Octeon that nic interface is down. */ 1880 ret = send_rx_ctrl_cmd(lio, 0); 1881 if (ret) 1882 return ret; 1883 1884 if (OCTEON_CN23XX_PF(oct)) { 1885 if (!oct->msix_on) 1886 cleanup_tx_poll_fn(netdev); 1887 } else { 1888 cleanup_tx_poll_fn(netdev); 1889 } 1890 1891 cancel_delayed_work_sync(&lio->stats_wk.work); 1892 1893 if (lio->ptp_clock) { 1894 ptp_clock_unregister(lio->ptp_clock); 1895 lio->ptp_clock = NULL; 1896 } 1897 1898 /* Wait for any pending Rx descriptors */ 1899 if (lio_wait_for_clean_oq(oct)) 1900 netif_info(lio, rx_err, lio->netdev, 1901 "Proceeding with stop interface after partial RX desc processing\n"); 1902 1903 if (oct->props[lio->ifidx].napi_enabled == 1) { 1904 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1905 napi_disable(napi); 1906 1907 oct->props[lio->ifidx].napi_enabled = 0; 1908 1909 if (OCTEON_CN23XX_PF(oct)) 1910 oct->droq[0]->ops.poll_mode = 0; 1911 1912 tasklet_enable(&oct_priv->droq_tasklet); 1913 } 1914 1915 dev_info(&oct->pci_dev->dev, "%s interface is stopped\n", netdev->name); 1916 1917 return ret; 1918} 1919 1920/** 1921 * get_new_flags - Converts a mask based on net device flags 1922 * @netdev: network device 1923 * 1924 * This routine generates a octnet_ifflags mask from the net device flags 1925 * received from the OS. 1926 */ 1927static inline enum octnet_ifflags get_new_flags(struct net_device *netdev) 1928{ 1929 enum octnet_ifflags f = OCTNET_IFFLAG_UNICAST; 1930 1931 if (netdev->flags & IFF_PROMISC) 1932 f |= OCTNET_IFFLAG_PROMISC; 1933 1934 if (netdev->flags & IFF_ALLMULTI) 1935 f |= OCTNET_IFFLAG_ALLMULTI; 1936 1937 if (netdev->flags & IFF_MULTICAST) { 1938 f |= OCTNET_IFFLAG_MULTICAST; 1939 1940 /* Accept all multicast addresses if there are more than we 1941 * can handle 1942 */ 1943 if (netdev_mc_count(netdev) > MAX_OCTEON_MULTICAST_ADDR) 1944 f |= OCTNET_IFFLAG_ALLMULTI; 1945 } 1946 1947 if (netdev->flags & IFF_BROADCAST) 1948 f |= OCTNET_IFFLAG_BROADCAST; 1949 1950 return f; 1951} 1952 1953/** 1954 * liquidio_set_mcast_list - Net device set_multicast_list 1955 * @netdev: network device 1956 */ 1957static void liquidio_set_mcast_list(struct net_device *netdev) 1958{ 1959 struct lio *lio = GET_LIO(netdev); 1960 struct octeon_device *oct = lio->oct_dev; 1961 struct octnic_ctrl_pkt nctrl; 1962 struct netdev_hw_addr *ha; 1963 u64 *mc; 1964 int ret; 1965 int mc_count = min(netdev_mc_count(netdev), MAX_OCTEON_MULTICAST_ADDR); 1966 1967 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 1968 1969 /* Create a ctrl pkt command to be sent to core app. */ 1970 nctrl.ncmd.u64 = 0; 1971 nctrl.ncmd.s.cmd = OCTNET_CMD_SET_MULTI_LIST; 1972 nctrl.ncmd.s.param1 = get_new_flags(netdev); 1973 nctrl.ncmd.s.param2 = mc_count; 1974 nctrl.ncmd.s.more = mc_count; 1975 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 1976 nctrl.netpndev = (u64)netdev; 1977 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 1978 1979 /* copy all the addresses into the udd */ 1980 mc = &nctrl.udd[0]; 1981 netdev_for_each_mc_addr(ha, netdev) { 1982 *mc = 0; 1983 memcpy(((u8 *)mc) + 2, ha->addr, ETH_ALEN); 1984 /* no need to swap bytes */ 1985 1986 if (++mc > &nctrl.udd[mc_count]) 1987 break; 1988 } 1989 1990 /* Apparently, any activity in this call from the kernel has to 1991 * be atomic. So we won't wait for response. 1992 */ 1993 1994 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 1995 if (ret) { 1996 dev_err(&oct->pci_dev->dev, "DEVFLAGS change failed in core (ret: 0x%x)\n", 1997 ret); 1998 } 1999} 2000 2001/** 2002 * liquidio_set_mac - Net device set_mac_address 2003 * @netdev: network device 2004 * @p: pointer to sockaddr 2005 */ 2006static int liquidio_set_mac(struct net_device *netdev, void *p) 2007{ 2008 int ret = 0; 2009 struct lio *lio = GET_LIO(netdev); 2010 struct octeon_device *oct = lio->oct_dev; 2011 struct sockaddr *addr = (struct sockaddr *)p; 2012 struct octnic_ctrl_pkt nctrl; 2013 2014 if (!is_valid_ether_addr(addr->sa_data)) 2015 return -EADDRNOTAVAIL; 2016 2017 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2018 2019 nctrl.ncmd.u64 = 0; 2020 nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MACADDR; 2021 nctrl.ncmd.s.param1 = 0; 2022 nctrl.ncmd.s.more = 1; 2023 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2024 nctrl.netpndev = (u64)netdev; 2025 2026 nctrl.udd[0] = 0; 2027 /* The MAC Address is presented in network byte order. */ 2028 memcpy((u8 *)&nctrl.udd[0] + 2, addr->sa_data, ETH_ALEN); 2029 2030 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2031 if (ret < 0) { 2032 dev_err(&oct->pci_dev->dev, "MAC Address change failed\n"); 2033 return -ENOMEM; 2034 } 2035 2036 if (nctrl.sc_status) { 2037 dev_err(&oct->pci_dev->dev, 2038 "%s: MAC Address change failed. sc return=%x\n", 2039 __func__, nctrl.sc_status); 2040 return -EIO; 2041 } 2042 2043 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 2044 memcpy(((u8 *)&lio->linfo.hw_addr) + 2, addr->sa_data, ETH_ALEN); 2045 2046 return 0; 2047} 2048 2049static void 2050liquidio_get_stats64(struct net_device *netdev, 2051 struct rtnl_link_stats64 *lstats) 2052{ 2053 struct lio *lio = GET_LIO(netdev); 2054 struct octeon_device *oct; 2055 u64 pkts = 0, drop = 0, bytes = 0; 2056 struct oct_droq_stats *oq_stats; 2057 struct oct_iq_stats *iq_stats; 2058 int i, iq_no, oq_no; 2059 2060 oct = lio->oct_dev; 2061 2062 if (ifstate_check(lio, LIO_IFSTATE_RESETTING)) 2063 return; 2064 2065 for (i = 0; i < oct->num_iqs; i++) { 2066 iq_no = lio->linfo.txpciq[i].s.q_no; 2067 iq_stats = &oct->instr_queue[iq_no]->stats; 2068 pkts += iq_stats->tx_done; 2069 drop += iq_stats->tx_dropped; 2070 bytes += iq_stats->tx_tot_bytes; 2071 } 2072 2073 lstats->tx_packets = pkts; 2074 lstats->tx_bytes = bytes; 2075 lstats->tx_dropped = drop; 2076 2077 pkts = 0; 2078 drop = 0; 2079 bytes = 0; 2080 2081 for (i = 0; i < oct->num_oqs; i++) { 2082 oq_no = lio->linfo.rxpciq[i].s.q_no; 2083 oq_stats = &oct->droq[oq_no]->stats; 2084 pkts += oq_stats->rx_pkts_received; 2085 drop += (oq_stats->rx_dropped + 2086 oq_stats->dropped_nodispatch + 2087 oq_stats->dropped_toomany + 2088 oq_stats->dropped_nomem); 2089 bytes += oq_stats->rx_bytes_received; 2090 } 2091 2092 lstats->rx_bytes = bytes; 2093 lstats->rx_packets = pkts; 2094 lstats->rx_dropped = drop; 2095 2096 lstats->multicast = oct->link_stats.fromwire.fw_total_mcast; 2097 lstats->collisions = oct->link_stats.fromhost.total_collisions; 2098 2099 /* detailed rx_errors: */ 2100 lstats->rx_length_errors = oct->link_stats.fromwire.l2_err; 2101 /* recved pkt with crc error */ 2102 lstats->rx_crc_errors = oct->link_stats.fromwire.fcs_err; 2103 /* recv'd frame alignment error */ 2104 lstats->rx_frame_errors = oct->link_stats.fromwire.frame_err; 2105 /* recv'r fifo overrun */ 2106 lstats->rx_fifo_errors = oct->link_stats.fromwire.fifo_err; 2107 2108 lstats->rx_errors = lstats->rx_length_errors + lstats->rx_crc_errors + 2109 lstats->rx_frame_errors + lstats->rx_fifo_errors; 2110 2111 /* detailed tx_errors */ 2112 lstats->tx_aborted_errors = oct->link_stats.fromhost.fw_err_pko; 2113 lstats->tx_carrier_errors = oct->link_stats.fromhost.fw_err_link; 2114 lstats->tx_fifo_errors = oct->link_stats.fromhost.fifo_err; 2115 2116 lstats->tx_errors = lstats->tx_aborted_errors + 2117 lstats->tx_carrier_errors + 2118 lstats->tx_fifo_errors; 2119} 2120 2121/** 2122 * hwtstamp_ioctl - Handler for SIOCSHWTSTAMP ioctl 2123 * @netdev: network device 2124 * @ifr: interface request 2125 */ 2126static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr) 2127{ 2128 struct hwtstamp_config conf; 2129 struct lio *lio = GET_LIO(netdev); 2130 2131 if (copy_from_user(&conf, ifr->ifr_data, sizeof(conf))) 2132 return -EFAULT; 2133 2134 if (conf.flags) 2135 return -EINVAL; 2136 2137 switch (conf.tx_type) { 2138 case HWTSTAMP_TX_ON: 2139 case HWTSTAMP_TX_OFF: 2140 break; 2141 default: 2142 return -ERANGE; 2143 } 2144 2145 switch (conf.rx_filter) { 2146 case HWTSTAMP_FILTER_NONE: 2147 break; 2148 case HWTSTAMP_FILTER_ALL: 2149 case HWTSTAMP_FILTER_SOME: 2150 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 2151 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 2152 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 2153 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 2154 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 2155 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 2156 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 2157 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 2158 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 2159 case HWTSTAMP_FILTER_PTP_V2_EVENT: 2160 case HWTSTAMP_FILTER_PTP_V2_SYNC: 2161 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 2162 case HWTSTAMP_FILTER_NTP_ALL: 2163 conf.rx_filter = HWTSTAMP_FILTER_ALL; 2164 break; 2165 default: 2166 return -ERANGE; 2167 } 2168 2169 if (conf.rx_filter == HWTSTAMP_FILTER_ALL) 2170 ifstate_set(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED); 2171 2172 else 2173 ifstate_reset(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED); 2174 2175 return copy_to_user(ifr->ifr_data, &conf, sizeof(conf)) ? -EFAULT : 0; 2176} 2177 2178/** 2179 * liquidio_ioctl - ioctl handler 2180 * @netdev: network device 2181 * @ifr: interface request 2182 * @cmd: command 2183 */ 2184static int liquidio_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 2185{ 2186 struct lio *lio = GET_LIO(netdev); 2187 2188 switch (cmd) { 2189 case SIOCSHWTSTAMP: 2190 if (lio->oct_dev->ptp_enable) 2191 return hwtstamp_ioctl(netdev, ifr); 2192 fallthrough; 2193 default: 2194 return -EOPNOTSUPP; 2195 } 2196} 2197 2198/** 2199 * handle_timestamp - handle a Tx timestamp response 2200 * @oct: octeon device 2201 * @status: response status 2202 * @buf: pointer to skb 2203 */ 2204static void handle_timestamp(struct octeon_device *oct, 2205 u32 status, 2206 void *buf) 2207{ 2208 struct octnet_buf_free_info *finfo; 2209 struct octeon_soft_command *sc; 2210 struct oct_timestamp_resp *resp; 2211 struct lio *lio; 2212 struct sk_buff *skb = (struct sk_buff *)buf; 2213 2214 finfo = (struct octnet_buf_free_info *)skb->cb; 2215 lio = finfo->lio; 2216 sc = finfo->sc; 2217 oct = lio->oct_dev; 2218 resp = (struct oct_timestamp_resp *)sc->virtrptr; 2219 2220 if (status != OCTEON_REQUEST_DONE) { 2221 dev_err(&oct->pci_dev->dev, "Tx timestamp instruction failed. Status: %llx\n", 2222 CVM_CAST64(status)); 2223 resp->timestamp = 0; 2224 } 2225 2226 octeon_swap_8B_data(&resp->timestamp, 1); 2227 2228 if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS) != 0)) { 2229 struct skb_shared_hwtstamps ts; 2230 u64 ns = resp->timestamp; 2231 2232 netif_info(lio, tx_done, lio->netdev, 2233 "Got resulting SKBTX_HW_TSTAMP skb=%p ns=%016llu\n", 2234 skb, (unsigned long long)ns); 2235 ts.hwtstamp = ns_to_ktime(ns + lio->ptp_adjust); 2236 skb_tstamp_tx(skb, &ts); 2237 } 2238 2239 octeon_free_soft_command(oct, sc); 2240 tx_buffer_free(skb); 2241} 2242 2243/** 2244 * send_nic_timestamp_pkt - Send a data packet that will be timestamped 2245 * @oct: octeon device 2246 * @ndata: pointer to network data 2247 * @finfo: pointer to private network data 2248 * @xmit_more: more is coming 2249 */ 2250static inline int send_nic_timestamp_pkt(struct octeon_device *oct, 2251 struct octnic_data_pkt *ndata, 2252 struct octnet_buf_free_info *finfo, 2253 int xmit_more) 2254{ 2255 int retval; 2256 struct octeon_soft_command *sc; 2257 struct lio *lio; 2258 int ring_doorbell; 2259 u32 len; 2260 2261 lio = finfo->lio; 2262 2263 sc = octeon_alloc_soft_command_resp(oct, &ndata->cmd, 2264 sizeof(struct oct_timestamp_resp)); 2265 finfo->sc = sc; 2266 2267 if (!sc) { 2268 dev_err(&oct->pci_dev->dev, "No memory for timestamped data packet\n"); 2269 return IQ_SEND_FAILED; 2270 } 2271 2272 if (ndata->reqtype == REQTYPE_NORESP_NET) 2273 ndata->reqtype = REQTYPE_RESP_NET; 2274 else if (ndata->reqtype == REQTYPE_NORESP_NET_SG) 2275 ndata->reqtype = REQTYPE_RESP_NET_SG; 2276 2277 sc->callback = handle_timestamp; 2278 sc->callback_arg = finfo->skb; 2279 sc->iq_no = ndata->q_no; 2280 2281 if (OCTEON_CN23XX_PF(oct)) 2282 len = (u32)((struct octeon_instr_ih3 *) 2283 (&sc->cmd.cmd3.ih3))->dlengsz; 2284 else 2285 len = (u32)((struct octeon_instr_ih2 *) 2286 (&sc->cmd.cmd2.ih2))->dlengsz; 2287 2288 ring_doorbell = !xmit_more; 2289 2290 retval = octeon_send_command(oct, sc->iq_no, ring_doorbell, &sc->cmd, 2291 sc, len, ndata->reqtype); 2292 2293 if (retval == IQ_SEND_FAILED) { 2294 dev_err(&oct->pci_dev->dev, "timestamp data packet failed status: %x\n", 2295 retval); 2296 octeon_free_soft_command(oct, sc); 2297 } else { 2298 netif_info(lio, tx_queued, lio->netdev, "Queued timestamp packet\n"); 2299 } 2300 2301 return retval; 2302} 2303 2304/** 2305 * liquidio_xmit - Transmit networks packets to the Octeon interface 2306 * @skb: skbuff struct to be passed to network layer. 2307 * @netdev: pointer to network device 2308 * 2309 * Return: whether the packet was transmitted to the device okay or not 2310 * (NETDEV_TX_OK or NETDEV_TX_BUSY) 2311 */ 2312static netdev_tx_t liquidio_xmit(struct sk_buff *skb, struct net_device *netdev) 2313{ 2314 struct lio *lio; 2315 struct octnet_buf_free_info *finfo; 2316 union octnic_cmd_setup cmdsetup; 2317 struct octnic_data_pkt ndata; 2318 struct octeon_device *oct; 2319 struct oct_iq_stats *stats; 2320 struct octeon_instr_irh *irh; 2321 union tx_info *tx_info; 2322 int status = 0; 2323 int q_idx = 0, iq_no = 0; 2324 int j, xmit_more = 0; 2325 u64 dptr = 0; 2326 u32 tag = 0; 2327 2328 lio = GET_LIO(netdev); 2329 oct = lio->oct_dev; 2330 2331 q_idx = skb_iq(oct, skb); 2332 tag = q_idx; 2333 iq_no = lio->linfo.txpciq[q_idx].s.q_no; 2334 2335 stats = &oct->instr_queue[iq_no]->stats; 2336 2337 /* Check for all conditions in which the current packet cannot be 2338 * transmitted. 2339 */ 2340 if (!(atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING) || 2341 (!lio->linfo.link.s.link_up) || 2342 (skb->len <= 0)) { 2343 netif_info(lio, tx_err, lio->netdev, 2344 "Transmit failed link_status : %d\n", 2345 lio->linfo.link.s.link_up); 2346 goto lio_xmit_failed; 2347 } 2348 2349 /* Use space in skb->cb to store info used to unmap and 2350 * free the buffers. 2351 */ 2352 finfo = (struct octnet_buf_free_info *)skb->cb; 2353 finfo->lio = lio; 2354 finfo->skb = skb; 2355 finfo->sc = NULL; 2356 2357 /* Prepare the attributes for the data to be passed to OSI. */ 2358 memset(&ndata, 0, sizeof(struct octnic_data_pkt)); 2359 2360 ndata.buf = (void *)finfo; 2361 2362 ndata.q_no = iq_no; 2363 2364 if (octnet_iq_is_full(oct, ndata.q_no)) { 2365 /* defer sending if queue is full */ 2366 netif_info(lio, tx_err, lio->netdev, "Transmit failed iq:%d full\n", 2367 ndata.q_no); 2368 stats->tx_iq_busy++; 2369 return NETDEV_TX_BUSY; 2370 } 2371 2372 /* pr_info(" XMIT - valid Qs: %d, 1st Q no: %d, cpu: %d, q_no:%d\n", 2373 * lio->linfo.num_txpciq, lio->txq, cpu, ndata.q_no); 2374 */ 2375 2376 ndata.datasize = skb->len; 2377 2378 cmdsetup.u64 = 0; 2379 cmdsetup.s.iq_no = iq_no; 2380 2381 if (skb->ip_summed == CHECKSUM_PARTIAL) { 2382 if (skb->encapsulation) { 2383 cmdsetup.s.tnl_csum = 1; 2384 stats->tx_vxlan++; 2385 } else { 2386 cmdsetup.s.transport_csum = 1; 2387 } 2388 } 2389 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) { 2390 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 2391 cmdsetup.s.timestamp = 1; 2392 } 2393 2394 if (skb_shinfo(skb)->nr_frags == 0) { 2395 cmdsetup.s.u.datasize = skb->len; 2396 octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag); 2397 2398 /* Offload checksum calculation for TCP/UDP packets */ 2399 dptr = dma_map_single(&oct->pci_dev->dev, 2400 skb->data, 2401 skb->len, 2402 DMA_TO_DEVICE); 2403 if (dma_mapping_error(&oct->pci_dev->dev, dptr)) { 2404 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 1\n", 2405 __func__); 2406 stats->tx_dmamap_fail++; 2407 return NETDEV_TX_BUSY; 2408 } 2409 2410 if (OCTEON_CN23XX_PF(oct)) 2411 ndata.cmd.cmd3.dptr = dptr; 2412 else 2413 ndata.cmd.cmd2.dptr = dptr; 2414 finfo->dptr = dptr; 2415 ndata.reqtype = REQTYPE_NORESP_NET; 2416 2417 } else { 2418 int i, frags; 2419 skb_frag_t *frag; 2420 struct octnic_gather *g; 2421 2422 spin_lock(&lio->glist_lock[q_idx]); 2423 g = (struct octnic_gather *) 2424 lio_list_delete_head(&lio->glist[q_idx]); 2425 spin_unlock(&lio->glist_lock[q_idx]); 2426 2427 if (!g) { 2428 netif_info(lio, tx_err, lio->netdev, 2429 "Transmit scatter gather: glist null!\n"); 2430 goto lio_xmit_failed; 2431 } 2432 2433 cmdsetup.s.gather = 1; 2434 cmdsetup.s.u.gatherptrs = (skb_shinfo(skb)->nr_frags + 1); 2435 octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag); 2436 2437 memset(g->sg, 0, g->sg_size); 2438 2439 g->sg[0].ptr[0] = dma_map_single(&oct->pci_dev->dev, 2440 skb->data, 2441 (skb->len - skb->data_len), 2442 DMA_TO_DEVICE); 2443 if (dma_mapping_error(&oct->pci_dev->dev, g->sg[0].ptr[0])) { 2444 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 2\n", 2445 __func__); 2446 stats->tx_dmamap_fail++; 2447 return NETDEV_TX_BUSY; 2448 } 2449 add_sg_size(&g->sg[0], (skb->len - skb->data_len), 0); 2450 2451 frags = skb_shinfo(skb)->nr_frags; 2452 i = 1; 2453 while (frags--) { 2454 frag = &skb_shinfo(skb)->frags[i - 1]; 2455 2456 g->sg[(i >> 2)].ptr[(i & 3)] = 2457 skb_frag_dma_map(&oct->pci_dev->dev, 2458 frag, 0, skb_frag_size(frag), 2459 DMA_TO_DEVICE); 2460 2461 if (dma_mapping_error(&oct->pci_dev->dev, 2462 g->sg[i >> 2].ptr[i & 3])) { 2463 dma_unmap_single(&oct->pci_dev->dev, 2464 g->sg[0].ptr[0], 2465 skb->len - skb->data_len, 2466 DMA_TO_DEVICE); 2467 for (j = 1; j < i; j++) { 2468 frag = &skb_shinfo(skb)->frags[j - 1]; 2469 dma_unmap_page(&oct->pci_dev->dev, 2470 g->sg[j >> 2].ptr[j & 3], 2471 skb_frag_size(frag), 2472 DMA_TO_DEVICE); 2473 } 2474 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 3\n", 2475 __func__); 2476 return NETDEV_TX_BUSY; 2477 } 2478 2479 add_sg_size(&g->sg[(i >> 2)], skb_frag_size(frag), 2480 (i & 3)); 2481 i++; 2482 } 2483 2484 dptr = g->sg_dma_ptr; 2485 2486 if (OCTEON_CN23XX_PF(oct)) 2487 ndata.cmd.cmd3.dptr = dptr; 2488 else 2489 ndata.cmd.cmd2.dptr = dptr; 2490 finfo->dptr = dptr; 2491 finfo->g = g; 2492 2493 ndata.reqtype = REQTYPE_NORESP_NET_SG; 2494 } 2495 2496 if (OCTEON_CN23XX_PF(oct)) { 2497 irh = (struct octeon_instr_irh *)&ndata.cmd.cmd3.irh; 2498 tx_info = (union tx_info *)&ndata.cmd.cmd3.ossp[0]; 2499 } else { 2500 irh = (struct octeon_instr_irh *)&ndata.cmd.cmd2.irh; 2501 tx_info = (union tx_info *)&ndata.cmd.cmd2.ossp[0]; 2502 } 2503 2504 if (skb_shinfo(skb)->gso_size) { 2505 tx_info->s.gso_size = skb_shinfo(skb)->gso_size; 2506 tx_info->s.gso_segs = skb_shinfo(skb)->gso_segs; 2507 stats->tx_gso++; 2508 } 2509 2510 /* HW insert VLAN tag */ 2511 if (skb_vlan_tag_present(skb)) { 2512 irh->priority = skb_vlan_tag_get(skb) >> 13; 2513 irh->vlan = skb_vlan_tag_get(skb) & 0xfff; 2514 } 2515 2516 xmit_more = netdev_xmit_more(); 2517 2518 if (unlikely(cmdsetup.s.timestamp)) 2519 status = send_nic_timestamp_pkt(oct, &ndata, finfo, xmit_more); 2520 else 2521 status = octnet_send_nic_data_pkt(oct, &ndata, xmit_more); 2522 if (status == IQ_SEND_FAILED) 2523 goto lio_xmit_failed; 2524 2525 netif_info(lio, tx_queued, lio->netdev, "Transmit queued successfully\n"); 2526 2527 if (status == IQ_SEND_STOP) 2528 netif_stop_subqueue(netdev, q_idx); 2529 2530 netif_trans_update(netdev); 2531 2532 if (tx_info->s.gso_segs) 2533 stats->tx_done += tx_info->s.gso_segs; 2534 else 2535 stats->tx_done++; 2536 stats->tx_tot_bytes += ndata.datasize; 2537 2538 return NETDEV_TX_OK; 2539 2540lio_xmit_failed: 2541 stats->tx_dropped++; 2542 netif_info(lio, tx_err, lio->netdev, "IQ%d Transmit dropped:%llu\n", 2543 iq_no, stats->tx_dropped); 2544 if (dptr) 2545 dma_unmap_single(&oct->pci_dev->dev, dptr, 2546 ndata.datasize, DMA_TO_DEVICE); 2547 2548 octeon_ring_doorbell_locked(oct, iq_no); 2549 2550 tx_buffer_free(skb); 2551 return NETDEV_TX_OK; 2552} 2553 2554/** 2555 * liquidio_tx_timeout - Network device Tx timeout 2556 * @netdev: pointer to network device 2557 * @txqueue: index of the hung transmit queue 2558 */ 2559static void liquidio_tx_timeout(struct net_device *netdev, unsigned int txqueue) 2560{ 2561 struct lio *lio; 2562 2563 lio = GET_LIO(netdev); 2564 2565 netif_info(lio, tx_err, lio->netdev, 2566 "Transmit timeout tx_dropped:%ld, waking up queues now!!\n", 2567 netdev->stats.tx_dropped); 2568 netif_trans_update(netdev); 2569 wake_txqs(netdev); 2570} 2571 2572static int liquidio_vlan_rx_add_vid(struct net_device *netdev, 2573 __be16 proto __attribute__((unused)), 2574 u16 vid) 2575{ 2576 struct lio *lio = GET_LIO(netdev); 2577 struct octeon_device *oct = lio->oct_dev; 2578 struct octnic_ctrl_pkt nctrl; 2579 int ret = 0; 2580 2581 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2582 2583 nctrl.ncmd.u64 = 0; 2584 nctrl.ncmd.s.cmd = OCTNET_CMD_ADD_VLAN_FILTER; 2585 nctrl.ncmd.s.param1 = vid; 2586 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2587 nctrl.netpndev = (u64)netdev; 2588 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2589 2590 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2591 if (ret) { 2592 dev_err(&oct->pci_dev->dev, "Add VLAN filter failed in core (ret: 0x%x)\n", 2593 ret); 2594 if (ret > 0) 2595 ret = -EIO; 2596 } 2597 2598 return ret; 2599} 2600 2601static int liquidio_vlan_rx_kill_vid(struct net_device *netdev, 2602 __be16 proto __attribute__((unused)), 2603 u16 vid) 2604{ 2605 struct lio *lio = GET_LIO(netdev); 2606 struct octeon_device *oct = lio->oct_dev; 2607 struct octnic_ctrl_pkt nctrl; 2608 int ret = 0; 2609 2610 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2611 2612 nctrl.ncmd.u64 = 0; 2613 nctrl.ncmd.s.cmd = OCTNET_CMD_DEL_VLAN_FILTER; 2614 nctrl.ncmd.s.param1 = vid; 2615 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2616 nctrl.netpndev = (u64)netdev; 2617 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2618 2619 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2620 if (ret) { 2621 dev_err(&oct->pci_dev->dev, "Del VLAN filter failed in core (ret: 0x%x)\n", 2622 ret); 2623 if (ret > 0) 2624 ret = -EIO; 2625 } 2626 return ret; 2627} 2628 2629/** 2630 * liquidio_set_rxcsum_command - Sending command to enable/disable RX checksum offload 2631 * @netdev: pointer to network device 2632 * @command: OCTNET_CMD_TNL_RX_CSUM_CTL 2633 * @rx_cmd: OCTNET_CMD_RXCSUM_ENABLE/OCTNET_CMD_RXCSUM_DISABLE 2634 * Returns: SUCCESS or FAILURE 2635 */ 2636static int liquidio_set_rxcsum_command(struct net_device *netdev, int command, 2637 u8 rx_cmd) 2638{ 2639 struct lio *lio = GET_LIO(netdev); 2640 struct octeon_device *oct = lio->oct_dev; 2641 struct octnic_ctrl_pkt nctrl; 2642 int ret = 0; 2643 2644 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2645 2646 nctrl.ncmd.u64 = 0; 2647 nctrl.ncmd.s.cmd = command; 2648 nctrl.ncmd.s.param1 = rx_cmd; 2649 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2650 nctrl.netpndev = (u64)netdev; 2651 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2652 2653 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2654 if (ret) { 2655 dev_err(&oct->pci_dev->dev, 2656 "DEVFLAGS RXCSUM change failed in core(ret:0x%x)\n", 2657 ret); 2658 if (ret > 0) 2659 ret = -EIO; 2660 } 2661 return ret; 2662} 2663 2664/** 2665 * liquidio_vxlan_port_command - Sending command to add/delete VxLAN UDP port to firmware 2666 * @netdev: pointer to network device 2667 * @command: OCTNET_CMD_VXLAN_PORT_CONFIG 2668 * @vxlan_port: VxLAN port to be added or deleted 2669 * @vxlan_cmd_bit: OCTNET_CMD_VXLAN_PORT_ADD, 2670 * OCTNET_CMD_VXLAN_PORT_DEL 2671 * Return: SUCCESS or FAILURE 2672 */ 2673static int liquidio_vxlan_port_command(struct net_device *netdev, int command, 2674 u16 vxlan_port, u8 vxlan_cmd_bit) 2675{ 2676 struct lio *lio = GET_LIO(netdev); 2677 struct octeon_device *oct = lio->oct_dev; 2678 struct octnic_ctrl_pkt nctrl; 2679 int ret = 0; 2680 2681 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2682 2683 nctrl.ncmd.u64 = 0; 2684 nctrl.ncmd.s.cmd = command; 2685 nctrl.ncmd.s.more = vxlan_cmd_bit; 2686 nctrl.ncmd.s.param1 = vxlan_port; 2687 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2688 nctrl.netpndev = (u64)netdev; 2689 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2690 2691 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2692 if (ret) { 2693 dev_err(&oct->pci_dev->dev, 2694 "VxLAN port add/delete failed in core (ret:0x%x)\n", 2695 ret); 2696 if (ret > 0) 2697 ret = -EIO; 2698 } 2699 return ret; 2700} 2701 2702static int liquidio_udp_tunnel_set_port(struct net_device *netdev, 2703 unsigned int table, unsigned int entry, 2704 struct udp_tunnel_info *ti) 2705{ 2706 return liquidio_vxlan_port_command(netdev, 2707 OCTNET_CMD_VXLAN_PORT_CONFIG, 2708 htons(ti->port), 2709 OCTNET_CMD_VXLAN_PORT_ADD); 2710} 2711 2712static int liquidio_udp_tunnel_unset_port(struct net_device *netdev, 2713 unsigned int table, 2714 unsigned int entry, 2715 struct udp_tunnel_info *ti) 2716{ 2717 return liquidio_vxlan_port_command(netdev, 2718 OCTNET_CMD_VXLAN_PORT_CONFIG, 2719 htons(ti->port), 2720 OCTNET_CMD_VXLAN_PORT_DEL); 2721} 2722 2723static const struct udp_tunnel_nic_info liquidio_udp_tunnels = { 2724 .set_port = liquidio_udp_tunnel_set_port, 2725 .unset_port = liquidio_udp_tunnel_unset_port, 2726 .tables = { 2727 { .n_entries = 1024, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, }, 2728 }, 2729}; 2730 2731/** 2732 * liquidio_fix_features - Net device fix features 2733 * @netdev: pointer to network device 2734 * @request: features requested 2735 * Return: updated features list 2736 */ 2737static netdev_features_t liquidio_fix_features(struct net_device *netdev, 2738 netdev_features_t request) 2739{ 2740 struct lio *lio = netdev_priv(netdev); 2741 2742 if ((request & NETIF_F_RXCSUM) && 2743 !(lio->dev_capability & NETIF_F_RXCSUM)) 2744 request &= ~NETIF_F_RXCSUM; 2745 2746 if ((request & NETIF_F_HW_CSUM) && 2747 !(lio->dev_capability & NETIF_F_HW_CSUM)) 2748 request &= ~NETIF_F_HW_CSUM; 2749 2750 if ((request & NETIF_F_TSO) && !(lio->dev_capability & NETIF_F_TSO)) 2751 request &= ~NETIF_F_TSO; 2752 2753 if ((request & NETIF_F_TSO6) && !(lio->dev_capability & NETIF_F_TSO6)) 2754 request &= ~NETIF_F_TSO6; 2755 2756 if ((request & NETIF_F_LRO) && !(lio->dev_capability & NETIF_F_LRO)) 2757 request &= ~NETIF_F_LRO; 2758 2759 /*Disable LRO if RXCSUM is off */ 2760 if (!(request & NETIF_F_RXCSUM) && (netdev->features & NETIF_F_LRO) && 2761 (lio->dev_capability & NETIF_F_LRO)) 2762 request &= ~NETIF_F_LRO; 2763 2764 if ((request & NETIF_F_HW_VLAN_CTAG_FILTER) && 2765 !(lio->dev_capability & NETIF_F_HW_VLAN_CTAG_FILTER)) 2766 request &= ~NETIF_F_HW_VLAN_CTAG_FILTER; 2767 2768 return request; 2769} 2770 2771/** 2772 * liquidio_set_features - Net device set features 2773 * @netdev: pointer to network device 2774 * @features: features to enable/disable 2775 */ 2776static int liquidio_set_features(struct net_device *netdev, 2777 netdev_features_t features) 2778{ 2779 struct lio *lio = netdev_priv(netdev); 2780 2781 if ((features & NETIF_F_LRO) && 2782 (lio->dev_capability & NETIF_F_LRO) && 2783 !(netdev->features & NETIF_F_LRO)) 2784 liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE, 2785 OCTNIC_LROIPV4 | OCTNIC_LROIPV6); 2786 else if (!(features & NETIF_F_LRO) && 2787 (lio->dev_capability & NETIF_F_LRO) && 2788 (netdev->features & NETIF_F_LRO)) 2789 liquidio_set_feature(netdev, OCTNET_CMD_LRO_DISABLE, 2790 OCTNIC_LROIPV4 | OCTNIC_LROIPV6); 2791 2792 /* Sending command to firmware to enable/disable RX checksum 2793 * offload settings using ethtool 2794 */ 2795 if (!(netdev->features & NETIF_F_RXCSUM) && 2796 (lio->enc_dev_capability & NETIF_F_RXCSUM) && 2797 (features & NETIF_F_RXCSUM)) 2798 liquidio_set_rxcsum_command(netdev, 2799 OCTNET_CMD_TNL_RX_CSUM_CTL, 2800 OCTNET_CMD_RXCSUM_ENABLE); 2801 else if ((netdev->features & NETIF_F_RXCSUM) && 2802 (lio->enc_dev_capability & NETIF_F_RXCSUM) && 2803 !(features & NETIF_F_RXCSUM)) 2804 liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL, 2805 OCTNET_CMD_RXCSUM_DISABLE); 2806 2807 if ((features & NETIF_F_HW_VLAN_CTAG_FILTER) && 2808 (lio->dev_capability & NETIF_F_HW_VLAN_CTAG_FILTER) && 2809 !(netdev->features & NETIF_F_HW_VLAN_CTAG_FILTER)) 2810 liquidio_set_feature(netdev, OCTNET_CMD_VLAN_FILTER_CTL, 2811 OCTNET_CMD_VLAN_FILTER_ENABLE); 2812 else if (!(features & NETIF_F_HW_VLAN_CTAG_FILTER) && 2813 (lio->dev_capability & NETIF_F_HW_VLAN_CTAG_FILTER) && 2814 (netdev->features & NETIF_F_HW_VLAN_CTAG_FILTER)) 2815 liquidio_set_feature(netdev, OCTNET_CMD_VLAN_FILTER_CTL, 2816 OCTNET_CMD_VLAN_FILTER_DISABLE); 2817 2818 return 0; 2819} 2820 2821static int __liquidio_set_vf_mac(struct net_device *netdev, int vfidx, 2822 u8 *mac, bool is_admin_assigned) 2823{ 2824 struct lio *lio = GET_LIO(netdev); 2825 struct octeon_device *oct = lio->oct_dev; 2826 struct octnic_ctrl_pkt nctrl; 2827 int ret = 0; 2828 2829 if (!is_valid_ether_addr(mac)) 2830 return -EINVAL; 2831 2832 if (vfidx < 0 || vfidx >= oct->sriov_info.max_vfs) 2833 return -EINVAL; 2834 2835 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2836 2837 nctrl.ncmd.u64 = 0; 2838 nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MACADDR; 2839 /* vfidx is 0 based, but vf_num (param1) is 1 based */ 2840 nctrl.ncmd.s.param1 = vfidx + 1; 2841 nctrl.ncmd.s.more = 1; 2842 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2843 nctrl.netpndev = (u64)netdev; 2844 if (is_admin_assigned) { 2845 nctrl.ncmd.s.param2 = true; 2846 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2847 } 2848 2849 nctrl.udd[0] = 0; 2850 /* The MAC Address is presented in network byte order. */ 2851 ether_addr_copy((u8 *)&nctrl.udd[0] + 2, mac); 2852 2853 oct->sriov_info.vf_macaddr[vfidx] = nctrl.udd[0]; 2854 2855 ret = octnet_send_nic_ctrl_pkt(oct, &nctrl); 2856 if (ret > 0) 2857 ret = -EIO; 2858 2859 return ret; 2860} 2861 2862static int liquidio_set_vf_mac(struct net_device *netdev, int vfidx, u8 *mac) 2863{ 2864 struct lio *lio = GET_LIO(netdev); 2865 struct octeon_device *oct = lio->oct_dev; 2866 int retval; 2867 2868 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 2869 return -EINVAL; 2870 2871 retval = __liquidio_set_vf_mac(netdev, vfidx, mac, true); 2872 if (!retval) 2873 cn23xx_tell_vf_its_macaddr_changed(oct, vfidx, mac); 2874 2875 return retval; 2876} 2877 2878static int liquidio_set_vf_spoofchk(struct net_device *netdev, int vfidx, 2879 bool enable) 2880{ 2881 struct lio *lio = GET_LIO(netdev); 2882 struct octeon_device *oct = lio->oct_dev; 2883 struct octnic_ctrl_pkt nctrl; 2884 int retval; 2885 2886 if (!(oct->fw_info.app_cap_flags & LIQUIDIO_SPOOFCHK_CAP)) { 2887 netif_info(lio, drv, lio->netdev, 2888 "firmware does not support spoofchk\n"); 2889 return -EOPNOTSUPP; 2890 } 2891 2892 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) { 2893 netif_info(lio, drv, lio->netdev, "Invalid vfidx %d\n", vfidx); 2894 return -EINVAL; 2895 } 2896 2897 if (enable) { 2898 if (oct->sriov_info.vf_spoofchk[vfidx]) 2899 return 0; 2900 } else { 2901 /* Clear */ 2902 if (!oct->sriov_info.vf_spoofchk[vfidx]) 2903 return 0; 2904 } 2905 2906 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2907 nctrl.ncmd.s.cmdgroup = OCTNET_CMD_GROUP1; 2908 nctrl.ncmd.s.cmd = OCTNET_CMD_SET_VF_SPOOFCHK; 2909 nctrl.ncmd.s.param1 = 2910 vfidx + 1; /* vfidx is 0 based, 2911 * but vf_num (param1) is 1 based 2912 */ 2913 nctrl.ncmd.s.param2 = enable; 2914 nctrl.ncmd.s.more = 0; 2915 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2916 nctrl.cb_fn = NULL; 2917 2918 retval = octnet_send_nic_ctrl_pkt(oct, &nctrl); 2919 2920 if (retval) { 2921 netif_info(lio, drv, lio->netdev, 2922 "Failed to set VF %d spoofchk %s\n", vfidx, 2923 enable ? "on" : "off"); 2924 return -1; 2925 } 2926 2927 oct->sriov_info.vf_spoofchk[vfidx] = enable; 2928 netif_info(lio, drv, lio->netdev, "VF %u spoofchk is %s\n", vfidx, 2929 enable ? "on" : "off"); 2930 2931 return 0; 2932} 2933 2934static int liquidio_set_vf_vlan(struct net_device *netdev, int vfidx, 2935 u16 vlan, u8 qos, __be16 vlan_proto) 2936{ 2937 struct lio *lio = GET_LIO(netdev); 2938 struct octeon_device *oct = lio->oct_dev; 2939 struct octnic_ctrl_pkt nctrl; 2940 u16 vlantci; 2941 int ret = 0; 2942 2943 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 2944 return -EINVAL; 2945 2946 if (vlan_proto != htons(ETH_P_8021Q)) 2947 return -EPROTONOSUPPORT; 2948 2949 if (vlan >= VLAN_N_VID || qos > 7) 2950 return -EINVAL; 2951 2952 if (vlan) 2953 vlantci = vlan | (u16)qos << VLAN_PRIO_SHIFT; 2954 else 2955 vlantci = 0; 2956 2957 if (oct->sriov_info.vf_vlantci[vfidx] == vlantci) 2958 return 0; 2959 2960 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2961 2962 if (vlan) 2963 nctrl.ncmd.s.cmd = OCTNET_CMD_ADD_VLAN_FILTER; 2964 else 2965 nctrl.ncmd.s.cmd = OCTNET_CMD_DEL_VLAN_FILTER; 2966 2967 nctrl.ncmd.s.param1 = vlantci; 2968 nctrl.ncmd.s.param2 = 2969 vfidx + 1; /* vfidx is 0 based, but vf_num (param2) is 1 based */ 2970 nctrl.ncmd.s.more = 0; 2971 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2972 nctrl.cb_fn = NULL; 2973 2974 ret = octnet_send_nic_ctrl_pkt(oct, &nctrl); 2975 if (ret) { 2976 if (ret > 0) 2977 ret = -EIO; 2978 return ret; 2979 } 2980 2981 oct->sriov_info.vf_vlantci[vfidx] = vlantci; 2982 2983 return ret; 2984} 2985 2986static int liquidio_get_vf_config(struct net_device *netdev, int vfidx, 2987 struct ifla_vf_info *ivi) 2988{ 2989 struct lio *lio = GET_LIO(netdev); 2990 struct octeon_device *oct = lio->oct_dev; 2991 u8 *macaddr; 2992 2993 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 2994 return -EINVAL; 2995 2996 memset(ivi, 0, sizeof(struct ifla_vf_info)); 2997 2998 ivi->vf = vfidx; 2999 macaddr = 2 + (u8 *)&oct->sriov_info.vf_macaddr[vfidx]; 3000 ether_addr_copy(&ivi->mac[0], macaddr); 3001 ivi->vlan = oct->sriov_info.vf_vlantci[vfidx] & VLAN_VID_MASK; 3002 ivi->qos = oct->sriov_info.vf_vlantci[vfidx] >> VLAN_PRIO_SHIFT; 3003 if (oct->sriov_info.trusted_vf.active && 3004 oct->sriov_info.trusted_vf.id == vfidx) 3005 ivi->trusted = true; 3006 else 3007 ivi->trusted = false; 3008 ivi->linkstate = oct->sriov_info.vf_linkstate[vfidx]; 3009 ivi->spoofchk = oct->sriov_info.vf_spoofchk[vfidx]; 3010 ivi->max_tx_rate = lio->linfo.link.s.speed; 3011 ivi->min_tx_rate = 0; 3012 3013 return 0; 3014} 3015 3016static int liquidio_send_vf_trust_cmd(struct lio *lio, int vfidx, bool trusted) 3017{ 3018 struct octeon_device *oct = lio->oct_dev; 3019 struct octeon_soft_command *sc; 3020 int retval; 3021 3022 sc = octeon_alloc_soft_command(oct, 0, 16, 0); 3023 if (!sc) 3024 return -ENOMEM; 3025 3026 sc->iq_no = lio->linfo.txpciq[0].s.q_no; 3027 3028 /* vfidx is 0 based, but vf_num (param1) is 1 based */ 3029 octeon_prepare_soft_command(oct, sc, OPCODE_NIC, 3030 OPCODE_NIC_SET_TRUSTED_VF, 0, vfidx + 1, 3031 trusted); 3032 3033 init_completion(&sc->complete); 3034 sc->sc_status = OCTEON_REQUEST_PENDING; 3035 3036 retval = octeon_send_soft_command(oct, sc); 3037 if (retval == IQ_SEND_FAILED) { 3038 octeon_free_soft_command(oct, sc); 3039 retval = -1; 3040 } else { 3041 /* Wait for response or timeout */ 3042 retval = wait_for_sc_completion_timeout(oct, sc, 0); 3043 if (retval) 3044 return (retval); 3045 3046 WRITE_ONCE(sc->caller_is_done, true); 3047 } 3048 3049 return retval; 3050} 3051 3052static int liquidio_set_vf_trust(struct net_device *netdev, int vfidx, 3053 bool setting) 3054{ 3055 struct lio *lio = GET_LIO(netdev); 3056 struct octeon_device *oct = lio->oct_dev; 3057 3058 if (strcmp(oct->fw_info.liquidio_firmware_version, "1.7.1") < 0) { 3059 /* trusted vf is not supported by firmware older than 1.7.1 */ 3060 return -EOPNOTSUPP; 3061 } 3062 3063 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) { 3064 netif_info(lio, drv, lio->netdev, "Invalid vfidx %d\n", vfidx); 3065 return -EINVAL; 3066 } 3067 3068 if (setting) { 3069 /* Set */ 3070 3071 if (oct->sriov_info.trusted_vf.active && 3072 oct->sriov_info.trusted_vf.id == vfidx) 3073 return 0; 3074 3075 if (oct->sriov_info.trusted_vf.active) { 3076 netif_info(lio, drv, lio->netdev, "More than one trusted VF is not allowed\n"); 3077 return -EPERM; 3078 } 3079 } else { 3080 /* Clear */ 3081 3082 if (!oct->sriov_info.trusted_vf.active) 3083 return 0; 3084 } 3085 3086 if (!liquidio_send_vf_trust_cmd(lio, vfidx, setting)) { 3087 if (setting) { 3088 oct->sriov_info.trusted_vf.id = vfidx; 3089 oct->sriov_info.trusted_vf.active = true; 3090 } else { 3091 oct->sriov_info.trusted_vf.active = false; 3092 } 3093 3094 netif_info(lio, drv, lio->netdev, "VF %u is %strusted\n", vfidx, 3095 setting ? "" : "not "); 3096 } else { 3097 netif_info(lio, drv, lio->netdev, "Failed to set VF trusted\n"); 3098 return -1; 3099 } 3100 3101 return 0; 3102} 3103 3104static int liquidio_set_vf_link_state(struct net_device *netdev, int vfidx, 3105 int linkstate) 3106{ 3107 struct lio *lio = GET_LIO(netdev); 3108 struct octeon_device *oct = lio->oct_dev; 3109 struct octnic_ctrl_pkt nctrl; 3110 int ret = 0; 3111 3112 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 3113 return -EINVAL; 3114 3115 if (oct->sriov_info.vf_linkstate[vfidx] == linkstate) 3116 return 0; 3117 3118 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 3119 nctrl.ncmd.s.cmd = OCTNET_CMD_SET_VF_LINKSTATE; 3120 nctrl.ncmd.s.param1 = 3121 vfidx + 1; /* vfidx is 0 based, but vf_num (param1) is 1 based */ 3122 nctrl.ncmd.s.param2 = linkstate; 3123 nctrl.ncmd.s.more = 0; 3124 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 3125 nctrl.cb_fn = NULL; 3126 3127 ret = octnet_send_nic_ctrl_pkt(oct, &nctrl); 3128 3129 if (!ret) 3130 oct->sriov_info.vf_linkstate[vfidx] = linkstate; 3131 else if (ret > 0) 3132 ret = -EIO; 3133 3134 return ret; 3135} 3136 3137static int 3138liquidio_eswitch_mode_get(struct devlink *devlink, u16 *mode) 3139{ 3140 struct lio_devlink_priv *priv; 3141 struct octeon_device *oct; 3142 3143 priv = devlink_priv(devlink); 3144 oct = priv->oct; 3145 3146 *mode = oct->eswitch_mode; 3147 3148 return 0; 3149} 3150 3151static int 3152liquidio_eswitch_mode_set(struct devlink *devlink, u16 mode, 3153 struct netlink_ext_ack *extack) 3154{ 3155 struct lio_devlink_priv *priv; 3156 struct octeon_device *oct; 3157 int ret = 0; 3158 3159 priv = devlink_priv(devlink); 3160 oct = priv->oct; 3161 3162 if (!(oct->fw_info.app_cap_flags & LIQUIDIO_SWITCHDEV_CAP)) 3163 return -EINVAL; 3164 3165 if (oct->eswitch_mode == mode) 3166 return 0; 3167 3168 switch (mode) { 3169 case DEVLINK_ESWITCH_MODE_SWITCHDEV: 3170 oct->eswitch_mode = mode; 3171 ret = lio_vf_rep_create(oct); 3172 break; 3173 3174 case DEVLINK_ESWITCH_MODE_LEGACY: 3175 lio_vf_rep_destroy(oct); 3176 oct->eswitch_mode = mode; 3177 break; 3178 3179 default: 3180 ret = -EINVAL; 3181 } 3182 3183 return ret; 3184} 3185 3186static const struct devlink_ops liquidio_devlink_ops = { 3187 .eswitch_mode_get = liquidio_eswitch_mode_get, 3188 .eswitch_mode_set = liquidio_eswitch_mode_set, 3189}; 3190 3191static int 3192liquidio_get_port_parent_id(struct net_device *dev, 3193 struct netdev_phys_item_id *ppid) 3194{ 3195 struct lio *lio = GET_LIO(dev); 3196 struct octeon_device *oct = lio->oct_dev; 3197 3198 if (oct->eswitch_mode != DEVLINK_ESWITCH_MODE_SWITCHDEV) 3199 return -EOPNOTSUPP; 3200 3201 ppid->id_len = ETH_ALEN; 3202 ether_addr_copy(ppid->id, (void *)&lio->linfo.hw_addr + 2); 3203 3204 return 0; 3205} 3206 3207static int liquidio_get_vf_stats(struct net_device *netdev, int vfidx, 3208 struct ifla_vf_stats *vf_stats) 3209{ 3210 struct lio *lio = GET_LIO(netdev); 3211 struct octeon_device *oct = lio->oct_dev; 3212 struct oct_vf_stats stats; 3213 int ret; 3214 3215 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 3216 return -EINVAL; 3217 3218 memset(&stats, 0, sizeof(struct oct_vf_stats)); 3219 ret = cn23xx_get_vf_stats(oct, vfidx, &stats); 3220 if (!ret) { 3221 vf_stats->rx_packets = stats.rx_packets; 3222 vf_stats->tx_packets = stats.tx_packets; 3223 vf_stats->rx_bytes = stats.rx_bytes; 3224 vf_stats->tx_bytes = stats.tx_bytes; 3225 vf_stats->broadcast = stats.broadcast; 3226 vf_stats->multicast = stats.multicast; 3227 } 3228 3229 return ret; 3230} 3231 3232static const struct net_device_ops lionetdevops = { 3233 .ndo_open = liquidio_open, 3234 .ndo_stop = liquidio_stop, 3235 .ndo_start_xmit = liquidio_xmit, 3236 .ndo_get_stats64 = liquidio_get_stats64, 3237 .ndo_set_mac_address = liquidio_set_mac, 3238 .ndo_set_rx_mode = liquidio_set_mcast_list, 3239 .ndo_tx_timeout = liquidio_tx_timeout, 3240 3241 .ndo_vlan_rx_add_vid = liquidio_vlan_rx_add_vid, 3242 .ndo_vlan_rx_kill_vid = liquidio_vlan_rx_kill_vid, 3243 .ndo_change_mtu = liquidio_change_mtu, 3244 .ndo_do_ioctl = liquidio_ioctl, 3245 .ndo_fix_features = liquidio_fix_features, 3246 .ndo_set_features = liquidio_set_features, 3247 .ndo_udp_tunnel_add = udp_tunnel_nic_add_port, 3248 .ndo_udp_tunnel_del = udp_tunnel_nic_del_port, 3249 .ndo_set_vf_mac = liquidio_set_vf_mac, 3250 .ndo_set_vf_vlan = liquidio_set_vf_vlan, 3251 .ndo_get_vf_config = liquidio_get_vf_config, 3252 .ndo_set_vf_spoofchk = liquidio_set_vf_spoofchk, 3253 .ndo_set_vf_trust = liquidio_set_vf_trust, 3254 .ndo_set_vf_link_state = liquidio_set_vf_link_state, 3255 .ndo_get_vf_stats = liquidio_get_vf_stats, 3256 .ndo_get_port_parent_id = liquidio_get_port_parent_id, 3257}; 3258 3259/** 3260 * liquidio_init - Entry point for the liquidio module 3261 */ 3262static int __init liquidio_init(void) 3263{ 3264 int i; 3265 struct handshake *hs; 3266 3267 init_completion(&first_stage); 3268 3269 octeon_init_device_list(OCTEON_CONFIG_TYPE_DEFAULT); 3270 3271 if (liquidio_init_pci()) 3272 return -EINVAL; 3273 3274 wait_for_completion_timeout(&first_stage, msecs_to_jiffies(1000)); 3275 3276 for (i = 0; i < MAX_OCTEON_DEVICES; i++) { 3277 hs = &handshake[i]; 3278 if (hs->pci_dev) { 3279 wait_for_completion(&hs->init); 3280 if (!hs->init_ok) { 3281 /* init handshake failed */ 3282 dev_err(&hs->pci_dev->dev, 3283 "Failed to init device\n"); 3284 liquidio_deinit_pci(); 3285 return -EIO; 3286 } 3287 } 3288 } 3289 3290 for (i = 0; i < MAX_OCTEON_DEVICES; i++) { 3291 hs = &handshake[i]; 3292 if (hs->pci_dev) { 3293 wait_for_completion_timeout(&hs->started, 3294 msecs_to_jiffies(30000)); 3295 if (!hs->started_ok) { 3296 /* starter handshake failed */ 3297 dev_err(&hs->pci_dev->dev, 3298 "Firmware failed to start\n"); 3299 liquidio_deinit_pci(); 3300 return -EIO; 3301 } 3302 } 3303 } 3304 3305 return 0; 3306} 3307 3308static int lio_nic_info(struct octeon_recv_info *recv_info, void *buf) 3309{ 3310 struct octeon_device *oct = (struct octeon_device *)buf; 3311 struct octeon_recv_pkt *recv_pkt = recv_info->recv_pkt; 3312 int gmxport = 0; 3313 union oct_link_status *ls; 3314 int i; 3315 3316 if (recv_pkt->buffer_size[0] != (sizeof(*ls) + OCT_DROQ_INFO_SIZE)) { 3317 dev_err(&oct->pci_dev->dev, "Malformed NIC_INFO, len=%d, ifidx=%d\n", 3318 recv_pkt->buffer_size[0], 3319 recv_pkt->rh.r_nic_info.gmxport); 3320 goto nic_info_err; 3321 } 3322 3323 gmxport = recv_pkt->rh.r_nic_info.gmxport; 3324 ls = (union oct_link_status *)(get_rbd(recv_pkt->buffer_ptr[0]) + 3325 OCT_DROQ_INFO_SIZE); 3326 3327 octeon_swap_8B_data((u64 *)ls, (sizeof(union oct_link_status)) >> 3); 3328 for (i = 0; i < oct->ifcount; i++) { 3329 if (oct->props[i].gmxport == gmxport) { 3330 update_link_status(oct->props[i].netdev, ls); 3331 break; 3332 } 3333 } 3334 3335nic_info_err: 3336 for (i = 0; i < recv_pkt->buffer_count; i++) 3337 recv_buffer_free(recv_pkt->buffer_ptr[i]); 3338 octeon_free_recv_info(recv_info); 3339 return 0; 3340} 3341 3342/** 3343 * setup_nic_devices - Setup network interfaces 3344 * @octeon_dev: octeon device 3345 * 3346 * Called during init time for each device. It assumes the NIC 3347 * is already up and running. The link information for each 3348 * interface is passed in link_info. 3349 */ 3350static int setup_nic_devices(struct octeon_device *octeon_dev) 3351{ 3352 struct lio *lio = NULL; 3353 struct net_device *netdev; 3354 u8 mac[6], i, j, *fw_ver, *micro_ver; 3355 unsigned long micro; 3356 u32 cur_ver; 3357 struct octeon_soft_command *sc; 3358 struct liquidio_if_cfg_resp *resp; 3359 struct octdev_props *props; 3360 int retval, num_iqueues, num_oqueues; 3361 int max_num_queues = 0; 3362 union oct_nic_if_cfg if_cfg; 3363 unsigned int base_queue; 3364 unsigned int gmx_port_id; 3365 u32 resp_size, data_size; 3366 u32 ifidx_or_pfnum; 3367 struct lio_version *vdata; 3368 struct devlink *devlink; 3369 struct lio_devlink_priv *lio_devlink; 3370 3371 /* This is to handle link status changes */ 3372 octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC, 3373 OPCODE_NIC_INFO, 3374 lio_nic_info, octeon_dev); 3375 3376 /* REQTYPE_RESP_NET and REQTYPE_SOFT_COMMAND do not have free functions. 3377 * They are handled directly. 3378 */ 3379 octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET, 3380 free_netbuf); 3381 3382 octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET_SG, 3383 free_netsgbuf); 3384 3385 octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_RESP_NET_SG, 3386 free_netsgbuf_with_resp); 3387 3388 for (i = 0; i < octeon_dev->ifcount; i++) { 3389 resp_size = sizeof(struct liquidio_if_cfg_resp); 3390 data_size = sizeof(struct lio_version); 3391 sc = (struct octeon_soft_command *) 3392 octeon_alloc_soft_command(octeon_dev, data_size, 3393 resp_size, 0); 3394 resp = (struct liquidio_if_cfg_resp *)sc->virtrptr; 3395 vdata = (struct lio_version *)sc->virtdptr; 3396 3397 *((u64 *)vdata) = 0; 3398 vdata->major = cpu_to_be16(LIQUIDIO_BASE_MAJOR_VERSION); 3399 vdata->minor = cpu_to_be16(LIQUIDIO_BASE_MINOR_VERSION); 3400 vdata->micro = cpu_to_be16(LIQUIDIO_BASE_MICRO_VERSION); 3401 3402 if (OCTEON_CN23XX_PF(octeon_dev)) { 3403 num_iqueues = octeon_dev->sriov_info.num_pf_rings; 3404 num_oqueues = octeon_dev->sriov_info.num_pf_rings; 3405 base_queue = octeon_dev->sriov_info.pf_srn; 3406 3407 gmx_port_id = octeon_dev->pf_num; 3408 ifidx_or_pfnum = octeon_dev->pf_num; 3409 } else { 3410 num_iqueues = CFG_GET_NUM_TXQS_NIC_IF( 3411 octeon_get_conf(octeon_dev), i); 3412 num_oqueues = CFG_GET_NUM_RXQS_NIC_IF( 3413 octeon_get_conf(octeon_dev), i); 3414 base_queue = CFG_GET_BASE_QUE_NIC_IF( 3415 octeon_get_conf(octeon_dev), i); 3416 gmx_port_id = CFG_GET_GMXID_NIC_IF( 3417 octeon_get_conf(octeon_dev), i); 3418 ifidx_or_pfnum = i; 3419 } 3420 3421 dev_dbg(&octeon_dev->pci_dev->dev, 3422 "requesting config for interface %d, iqs %d, oqs %d\n", 3423 ifidx_or_pfnum, num_iqueues, num_oqueues); 3424 3425 if_cfg.u64 = 0; 3426 if_cfg.s.num_iqueues = num_iqueues; 3427 if_cfg.s.num_oqueues = num_oqueues; 3428 if_cfg.s.base_queue = base_queue; 3429 if_cfg.s.gmx_port_id = gmx_port_id; 3430 3431 sc->iq_no = 0; 3432 3433 octeon_prepare_soft_command(octeon_dev, sc, OPCODE_NIC, 3434 OPCODE_NIC_IF_CFG, 0, 3435 if_cfg.u64, 0); 3436 3437 init_completion(&sc->complete); 3438 sc->sc_status = OCTEON_REQUEST_PENDING; 3439 3440 retval = octeon_send_soft_command(octeon_dev, sc); 3441 if (retval == IQ_SEND_FAILED) { 3442 dev_err(&octeon_dev->pci_dev->dev, 3443 "iq/oq config failed status: %x\n", 3444 retval); 3445 /* Soft instr is freed by driver in case of failure. */ 3446 octeon_free_soft_command(octeon_dev, sc); 3447 return(-EIO); 3448 } 3449 3450 /* Sleep on a wait queue till the cond flag indicates that the 3451 * response arrived or timed-out. 3452 */ 3453 retval = wait_for_sc_completion_timeout(octeon_dev, sc, 0); 3454 if (retval) 3455 return retval; 3456 3457 retval = resp->status; 3458 if (retval) { 3459 dev_err(&octeon_dev->pci_dev->dev, "iq/oq config failed\n"); 3460 WRITE_ONCE(sc->caller_is_done, true); 3461 goto setup_nic_dev_done; 3462 } 3463 snprintf(octeon_dev->fw_info.liquidio_firmware_version, 3464 32, "%s", 3465 resp->cfg_info.liquidio_firmware_version); 3466 3467 /* Verify f/w version (in case of 'auto' loading from flash) */ 3468 fw_ver = octeon_dev->fw_info.liquidio_firmware_version; 3469 if (memcmp(LIQUIDIO_BASE_VERSION, 3470 fw_ver, 3471 strlen(LIQUIDIO_BASE_VERSION))) { 3472 dev_err(&octeon_dev->pci_dev->dev, 3473 "Unmatched firmware version. Expected %s.x, got %s.\n", 3474 LIQUIDIO_BASE_VERSION, fw_ver); 3475 WRITE_ONCE(sc->caller_is_done, true); 3476 goto setup_nic_dev_done; 3477 } else if (atomic_read(octeon_dev->adapter_fw_state) == 3478 FW_IS_PRELOADED) { 3479 dev_info(&octeon_dev->pci_dev->dev, 3480 "Using auto-loaded firmware version %s.\n", 3481 fw_ver); 3482 } 3483 3484 /* extract micro version field; point past '<maj>.<min>.' */ 3485 micro_ver = fw_ver + strlen(LIQUIDIO_BASE_VERSION) + 1; 3486 if (kstrtoul(micro_ver, 10, µ) != 0) 3487 micro = 0; 3488 octeon_dev->fw_info.ver.maj = LIQUIDIO_BASE_MAJOR_VERSION; 3489 octeon_dev->fw_info.ver.min = LIQUIDIO_BASE_MINOR_VERSION; 3490 octeon_dev->fw_info.ver.rev = micro; 3491 3492 octeon_swap_8B_data((u64 *)(&resp->cfg_info), 3493 (sizeof(struct liquidio_if_cfg_info)) >> 3); 3494 3495 num_iqueues = hweight64(resp->cfg_info.iqmask); 3496 num_oqueues = hweight64(resp->cfg_info.oqmask); 3497 3498 if (!(num_iqueues) || !(num_oqueues)) { 3499 dev_err(&octeon_dev->pci_dev->dev, 3500 "Got bad iqueues (%016llx) or oqueues (%016llx) from firmware.\n", 3501 resp->cfg_info.iqmask, 3502 resp->cfg_info.oqmask); 3503 WRITE_ONCE(sc->caller_is_done, true); 3504 goto setup_nic_dev_done; 3505 } 3506 3507 if (OCTEON_CN6XXX(octeon_dev)) { 3508 max_num_queues = CFG_GET_IQ_MAX_Q(CHIP_CONF(octeon_dev, 3509 cn6xxx)); 3510 } else if (OCTEON_CN23XX_PF(octeon_dev)) { 3511 max_num_queues = CFG_GET_IQ_MAX_Q(CHIP_CONF(octeon_dev, 3512 cn23xx_pf)); 3513 } 3514 3515 dev_dbg(&octeon_dev->pci_dev->dev, 3516 "interface %d, iqmask %016llx, oqmask %016llx, numiqueues %d, numoqueues %d max_num_queues: %d\n", 3517 i, resp->cfg_info.iqmask, resp->cfg_info.oqmask, 3518 num_iqueues, num_oqueues, max_num_queues); 3519 netdev = alloc_etherdev_mq(LIO_SIZE, max_num_queues); 3520 3521 if (!netdev) { 3522 dev_err(&octeon_dev->pci_dev->dev, "Device allocation failed\n"); 3523 WRITE_ONCE(sc->caller_is_done, true); 3524 goto setup_nic_dev_done; 3525 } 3526 3527 SET_NETDEV_DEV(netdev, &octeon_dev->pci_dev->dev); 3528 3529 /* Associate the routines that will handle different 3530 * netdev tasks. 3531 */ 3532 netdev->netdev_ops = &lionetdevops; 3533 3534 retval = netif_set_real_num_rx_queues(netdev, num_oqueues); 3535 if (retval) { 3536 dev_err(&octeon_dev->pci_dev->dev, 3537 "setting real number rx failed\n"); 3538 WRITE_ONCE(sc->caller_is_done, true); 3539 goto setup_nic_dev_free; 3540 } 3541 3542 retval = netif_set_real_num_tx_queues(netdev, num_iqueues); 3543 if (retval) { 3544 dev_err(&octeon_dev->pci_dev->dev, 3545 "setting real number tx failed\n"); 3546 WRITE_ONCE(sc->caller_is_done, true); 3547 goto setup_nic_dev_free; 3548 } 3549 3550 lio = GET_LIO(netdev); 3551 3552 memset(lio, 0, sizeof(struct lio)); 3553 3554 lio->ifidx = ifidx_or_pfnum; 3555 3556 props = &octeon_dev->props[i]; 3557 props->gmxport = resp->cfg_info.linfo.gmxport; 3558 props->netdev = netdev; 3559 3560 lio->linfo.num_rxpciq = num_oqueues; 3561 lio->linfo.num_txpciq = num_iqueues; 3562 for (j = 0; j < num_oqueues; j++) { 3563 lio->linfo.rxpciq[j].u64 = 3564 resp->cfg_info.linfo.rxpciq[j].u64; 3565 } 3566 for (j = 0; j < num_iqueues; j++) { 3567 lio->linfo.txpciq[j].u64 = 3568 resp->cfg_info.linfo.txpciq[j].u64; 3569 } 3570 lio->linfo.hw_addr = resp->cfg_info.linfo.hw_addr; 3571 lio->linfo.gmxport = resp->cfg_info.linfo.gmxport; 3572 lio->linfo.link.u64 = resp->cfg_info.linfo.link.u64; 3573 3574 WRITE_ONCE(sc->caller_is_done, true); 3575 3576 lio->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 3577 3578 if (OCTEON_CN23XX_PF(octeon_dev) || 3579 OCTEON_CN6XXX(octeon_dev)) { 3580 lio->dev_capability = NETIF_F_HIGHDMA 3581 | NETIF_F_IP_CSUM 3582 | NETIF_F_IPV6_CSUM 3583 | NETIF_F_SG | NETIF_F_RXCSUM 3584 | NETIF_F_GRO 3585 | NETIF_F_TSO | NETIF_F_TSO6 3586 | NETIF_F_LRO; 3587 } 3588 netif_set_gso_max_size(netdev, OCTNIC_GSO_MAX_SIZE); 3589 3590 /* Copy of transmit encapsulation capabilities: 3591 * TSO, TSO6, Checksums for this device 3592 */ 3593 lio->enc_dev_capability = NETIF_F_IP_CSUM 3594 | NETIF_F_IPV6_CSUM 3595 | NETIF_F_GSO_UDP_TUNNEL 3596 | NETIF_F_HW_CSUM | NETIF_F_SG 3597 | NETIF_F_RXCSUM 3598 | NETIF_F_TSO | NETIF_F_TSO6 3599 | NETIF_F_LRO; 3600 3601 netdev->hw_enc_features = (lio->enc_dev_capability & 3602 ~NETIF_F_LRO); 3603 3604 netdev->udp_tunnel_nic_info = &liquidio_udp_tunnels; 3605 3606 lio->dev_capability |= NETIF_F_GSO_UDP_TUNNEL; 3607 3608 netdev->vlan_features = lio->dev_capability; 3609 /* Add any unchangeable hw features */ 3610 lio->dev_capability |= NETIF_F_HW_VLAN_CTAG_FILTER | 3611 NETIF_F_HW_VLAN_CTAG_RX | 3612 NETIF_F_HW_VLAN_CTAG_TX; 3613 3614 netdev->features = (lio->dev_capability & ~NETIF_F_LRO); 3615 3616 netdev->hw_features = lio->dev_capability; 3617 /*HW_VLAN_RX and HW_VLAN_FILTER is always on*/ 3618 netdev->hw_features = netdev->hw_features & 3619 ~NETIF_F_HW_VLAN_CTAG_RX; 3620 3621 /* MTU range: 68 - 16000 */ 3622 netdev->min_mtu = LIO_MIN_MTU_SIZE; 3623 netdev->max_mtu = LIO_MAX_MTU_SIZE; 3624 3625 /* Point to the properties for octeon device to which this 3626 * interface belongs. 3627 */ 3628 lio->oct_dev = octeon_dev; 3629 lio->octprops = props; 3630 lio->netdev = netdev; 3631 3632 dev_dbg(&octeon_dev->pci_dev->dev, 3633 "if%d gmx: %d hw_addr: 0x%llx\n", i, 3634 lio->linfo.gmxport, CVM_CAST64(lio->linfo.hw_addr)); 3635 3636 for (j = 0; j < octeon_dev->sriov_info.max_vfs; j++) { 3637 u8 vfmac[ETH_ALEN]; 3638 3639 eth_random_addr(vfmac); 3640 if (__liquidio_set_vf_mac(netdev, j, vfmac, false)) { 3641 dev_err(&octeon_dev->pci_dev->dev, 3642 "Error setting VF%d MAC address\n", 3643 j); 3644 goto setup_nic_dev_free; 3645 } 3646 } 3647 3648 /* 64-bit swap required on LE machines */ 3649 octeon_swap_8B_data(&lio->linfo.hw_addr, 1); 3650 for (j = 0; j < 6; j++) 3651 mac[j] = *((u8 *)(((u8 *)&lio->linfo.hw_addr) + 2 + j)); 3652 3653 /* Copy MAC Address to OS network device structure */ 3654 3655 ether_addr_copy(netdev->dev_addr, mac); 3656 3657 /* By default all interfaces on a single Octeon uses the same 3658 * tx and rx queues 3659 */ 3660 lio->txq = lio->linfo.txpciq[0].s.q_no; 3661 lio->rxq = lio->linfo.rxpciq[0].s.q_no; 3662 if (liquidio_setup_io_queues(octeon_dev, i, 3663 lio->linfo.num_txpciq, 3664 lio->linfo.num_rxpciq)) { 3665 dev_err(&octeon_dev->pci_dev->dev, "I/O queues creation failed\n"); 3666 goto setup_nic_dev_free; 3667 } 3668 3669 ifstate_set(lio, LIO_IFSTATE_DROQ_OPS); 3670 3671 lio->tx_qsize = octeon_get_tx_qsize(octeon_dev, lio->txq); 3672 lio->rx_qsize = octeon_get_rx_qsize(octeon_dev, lio->rxq); 3673 3674 if (lio_setup_glists(octeon_dev, lio, num_iqueues)) { 3675 dev_err(&octeon_dev->pci_dev->dev, 3676 "Gather list allocation failed\n"); 3677 goto setup_nic_dev_free; 3678 } 3679 3680 /* Register ethtool support */ 3681 liquidio_set_ethtool_ops(netdev); 3682 if (lio->oct_dev->chip_id == OCTEON_CN23XX_PF_VID) 3683 octeon_dev->priv_flags = OCT_PRIV_FLAG_DEFAULT; 3684 else 3685 octeon_dev->priv_flags = 0x0; 3686 3687 if (netdev->features & NETIF_F_LRO) 3688 liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE, 3689 OCTNIC_LROIPV4 | OCTNIC_LROIPV6); 3690 3691 liquidio_set_feature(netdev, OCTNET_CMD_VLAN_FILTER_CTL, 3692 OCTNET_CMD_VLAN_FILTER_ENABLE); 3693 3694 if ((debug != -1) && (debug & NETIF_MSG_HW)) 3695 liquidio_set_feature(netdev, 3696 OCTNET_CMD_VERBOSE_ENABLE, 0); 3697 3698 if (setup_link_status_change_wq(netdev)) 3699 goto setup_nic_dev_free; 3700 3701 if ((octeon_dev->fw_info.app_cap_flags & 3702 LIQUIDIO_TIME_SYNC_CAP) && 3703 setup_sync_octeon_time_wq(netdev)) 3704 goto setup_nic_dev_free; 3705 3706 if (setup_rx_oom_poll_fn(netdev)) 3707 goto setup_nic_dev_free; 3708 3709 /* Register the network device with the OS */ 3710 if (register_netdev(netdev)) { 3711 dev_err(&octeon_dev->pci_dev->dev, "Device registration failed\n"); 3712 goto setup_nic_dev_free; 3713 } 3714 3715 dev_dbg(&octeon_dev->pci_dev->dev, 3716 "Setup NIC ifidx:%d mac:%02x%02x%02x%02x%02x%02x\n", 3717 i, mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); 3718 netif_carrier_off(netdev); 3719 lio->link_changes++; 3720 3721 ifstate_set(lio, LIO_IFSTATE_REGISTERED); 3722 3723 /* Sending command to firmware to enable Rx checksum offload 3724 * by default at the time of setup of Liquidio driver for 3725 * this device 3726 */ 3727 liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL, 3728 OCTNET_CMD_RXCSUM_ENABLE); 3729 liquidio_set_feature(netdev, OCTNET_CMD_TNL_TX_CSUM_CTL, 3730 OCTNET_CMD_TXCSUM_ENABLE); 3731 3732 dev_dbg(&octeon_dev->pci_dev->dev, 3733 "NIC ifidx:%d Setup successful\n", i); 3734 3735 if (octeon_dev->subsystem_id == 3736 OCTEON_CN2350_25GB_SUBSYS_ID || 3737 octeon_dev->subsystem_id == 3738 OCTEON_CN2360_25GB_SUBSYS_ID) { 3739 cur_ver = OCT_FW_VER(octeon_dev->fw_info.ver.maj, 3740 octeon_dev->fw_info.ver.min, 3741 octeon_dev->fw_info.ver.rev); 3742 3743 /* speed control unsupported in f/w older than 1.7.2 */ 3744 if (cur_ver < OCT_FW_VER(1, 7, 2)) { 3745 dev_info(&octeon_dev->pci_dev->dev, 3746 "speed setting not supported by f/w."); 3747 octeon_dev->speed_setting = 25; 3748 octeon_dev->no_speed_setting = 1; 3749 } else { 3750 liquidio_get_speed(lio); 3751 } 3752 3753 if (octeon_dev->speed_setting == 0) { 3754 octeon_dev->speed_setting = 25; 3755 octeon_dev->no_speed_setting = 1; 3756 } 3757 } else { 3758 octeon_dev->no_speed_setting = 1; 3759 octeon_dev->speed_setting = 10; 3760 } 3761 octeon_dev->speed_boot = octeon_dev->speed_setting; 3762 3763 /* don't read FEC setting if unsupported by f/w (see above) */ 3764 if (octeon_dev->speed_boot == 25 && 3765 !octeon_dev->no_speed_setting) { 3766 liquidio_get_fec(lio); 3767 octeon_dev->props[lio->ifidx].fec_boot = 3768 octeon_dev->props[lio->ifidx].fec; 3769 } 3770 } 3771 3772 devlink = devlink_alloc(&liquidio_devlink_ops, 3773 sizeof(struct lio_devlink_priv)); 3774 if (!devlink) { 3775 dev_err(&octeon_dev->pci_dev->dev, "devlink alloc failed\n"); 3776 goto setup_nic_dev_free; 3777 } 3778 3779 lio_devlink = devlink_priv(devlink); 3780 lio_devlink->oct = octeon_dev; 3781 3782 if (devlink_register(devlink, &octeon_dev->pci_dev->dev)) { 3783 devlink_free(devlink); 3784 dev_err(&octeon_dev->pci_dev->dev, 3785 "devlink registration failed\n"); 3786 goto setup_nic_dev_free; 3787 } 3788 3789 octeon_dev->devlink = devlink; 3790 octeon_dev->eswitch_mode = DEVLINK_ESWITCH_MODE_LEGACY; 3791 3792 return 0; 3793 3794setup_nic_dev_free: 3795 3796 while (i--) { 3797 dev_err(&octeon_dev->pci_dev->dev, 3798 "NIC ifidx:%d Setup failed\n", i); 3799 liquidio_destroy_nic_device(octeon_dev, i); 3800 } 3801 3802setup_nic_dev_done: 3803 3804 return -ENODEV; 3805} 3806 3807#ifdef CONFIG_PCI_IOV 3808static int octeon_enable_sriov(struct octeon_device *oct) 3809{ 3810 unsigned int num_vfs_alloced = oct->sriov_info.num_vfs_alloced; 3811 struct pci_dev *vfdev; 3812 int err; 3813 u32 u; 3814 3815 if (OCTEON_CN23XX_PF(oct) && num_vfs_alloced) { 3816 err = pci_enable_sriov(oct->pci_dev, 3817 oct->sriov_info.num_vfs_alloced); 3818 if (err) { 3819 dev_err(&oct->pci_dev->dev, 3820 "OCTEON: Failed to enable PCI sriov: %d\n", 3821 err); 3822 oct->sriov_info.num_vfs_alloced = 0; 3823 return err; 3824 } 3825 oct->sriov_info.sriov_enabled = 1; 3826 3827 /* init lookup table that maps DPI ring number to VF pci_dev 3828 * struct pointer 3829 */ 3830 u = 0; 3831 vfdev = pci_get_device(PCI_VENDOR_ID_CAVIUM, 3832 OCTEON_CN23XX_VF_VID, NULL); 3833 while (vfdev) { 3834 if (vfdev->is_virtfn && 3835 (vfdev->physfn == oct->pci_dev)) { 3836 oct->sriov_info.dpiring_to_vfpcidev_lut[u] = 3837 vfdev; 3838 u += oct->sriov_info.rings_per_vf; 3839 } 3840 vfdev = pci_get_device(PCI_VENDOR_ID_CAVIUM, 3841 OCTEON_CN23XX_VF_VID, vfdev); 3842 } 3843 } 3844 3845 return num_vfs_alloced; 3846} 3847 3848static int lio_pci_sriov_disable(struct octeon_device *oct) 3849{ 3850 int u; 3851 3852 if (pci_vfs_assigned(oct->pci_dev)) { 3853 dev_err(&oct->pci_dev->dev, "VFs are still assigned to VMs.\n"); 3854 return -EPERM; 3855 } 3856 3857 pci_disable_sriov(oct->pci_dev); 3858 3859 u = 0; 3860 while (u < MAX_POSSIBLE_VFS) { 3861 oct->sriov_info.dpiring_to_vfpcidev_lut[u] = NULL; 3862 u += oct->sriov_info.rings_per_vf; 3863 } 3864 3865 oct->sriov_info.num_vfs_alloced = 0; 3866 dev_info(&oct->pci_dev->dev, "oct->pf_num:%d disabled VFs\n", 3867 oct->pf_num); 3868 3869 return 0; 3870} 3871 3872static int liquidio_enable_sriov(struct pci_dev *dev, int num_vfs) 3873{ 3874 struct octeon_device *oct = pci_get_drvdata(dev); 3875 int ret = 0; 3876 3877 if ((num_vfs == oct->sriov_info.num_vfs_alloced) && 3878 (oct->sriov_info.sriov_enabled)) { 3879 dev_info(&oct->pci_dev->dev, "oct->pf_num:%d already enabled num_vfs:%d\n", 3880 oct->pf_num, num_vfs); 3881 return 0; 3882 } 3883 3884 if (!num_vfs) { 3885 lio_vf_rep_destroy(oct); 3886 ret = lio_pci_sriov_disable(oct); 3887 } else if (num_vfs > oct->sriov_info.max_vfs) { 3888 dev_err(&oct->pci_dev->dev, 3889 "OCTEON: Max allowed VFs:%d user requested:%d", 3890 oct->sriov_info.max_vfs, num_vfs); 3891 ret = -EPERM; 3892 } else { 3893 oct->sriov_info.num_vfs_alloced = num_vfs; 3894 ret = octeon_enable_sriov(oct); 3895 dev_info(&oct->pci_dev->dev, "oct->pf_num:%d num_vfs:%d\n", 3896 oct->pf_num, num_vfs); 3897 ret = lio_vf_rep_create(oct); 3898 if (ret) 3899 dev_info(&oct->pci_dev->dev, 3900 "vf representor create failed"); 3901 } 3902 3903 return ret; 3904} 3905#endif 3906 3907/** 3908 * liquidio_init_nic_module - initialize the NIC 3909 * @oct: octeon device 3910 * 3911 * This initialization routine is called once the Octeon device application is 3912 * up and running 3913 */ 3914static int liquidio_init_nic_module(struct octeon_device *oct) 3915{ 3916 int i, retval = 0; 3917 int num_nic_ports = CFG_GET_NUM_NIC_PORTS(octeon_get_conf(oct)); 3918 3919 dev_dbg(&oct->pci_dev->dev, "Initializing network interfaces\n"); 3920 3921 /* only default iq and oq were initialized 3922 * initialize the rest as well 3923 */ 3924 /* run port_config command for each port */ 3925 oct->ifcount = num_nic_ports; 3926 3927 memset(oct->props, 0, sizeof(struct octdev_props) * num_nic_ports); 3928 3929 for (i = 0; i < MAX_OCTEON_LINKS; i++) 3930 oct->props[i].gmxport = -1; 3931 3932 retval = setup_nic_devices(oct); 3933 if (retval) { 3934 dev_err(&oct->pci_dev->dev, "Setup NIC devices failed\n"); 3935 goto octnet_init_failure; 3936 } 3937 3938 /* Call vf_rep_modinit if the firmware is switchdev capable 3939 * and do it from the first liquidio function probed. 3940 */ 3941 if (!oct->octeon_id && 3942 oct->fw_info.app_cap_flags & LIQUIDIO_SWITCHDEV_CAP) { 3943 retval = lio_vf_rep_modinit(); 3944 if (retval) { 3945 liquidio_stop_nic_module(oct); 3946 goto octnet_init_failure; 3947 } 3948 } 3949 3950 liquidio_ptp_init(oct); 3951 3952 dev_dbg(&oct->pci_dev->dev, "Network interfaces ready\n"); 3953 3954 return retval; 3955 3956octnet_init_failure: 3957 3958 oct->ifcount = 0; 3959 3960 return retval; 3961} 3962 3963/** 3964 * nic_starter - finish init 3965 * @work: work struct work_struct 3966 * 3967 * starter callback that invokes the remaining initialization work after the NIC is up and running. 3968 */ 3969static void nic_starter(struct work_struct *work) 3970{ 3971 struct octeon_device *oct; 3972 struct cavium_wk *wk = (struct cavium_wk *)work; 3973 3974 oct = (struct octeon_device *)wk->ctxptr; 3975 3976 if (atomic_read(&oct->status) == OCT_DEV_RUNNING) 3977 return; 3978 3979 /* If the status of the device is CORE_OK, the core 3980 * application has reported its application type. Call 3981 * any registered handlers now and move to the RUNNING 3982 * state. 3983 */ 3984 if (atomic_read(&oct->status) != OCT_DEV_CORE_OK) { 3985 schedule_delayed_work(&oct->nic_poll_work.work, 3986 LIQUIDIO_STARTER_POLL_INTERVAL_MS); 3987 return; 3988 } 3989 3990 atomic_set(&oct->status, OCT_DEV_RUNNING); 3991 3992 if (oct->app_mode && oct->app_mode == CVM_DRV_NIC_APP) { 3993 dev_dbg(&oct->pci_dev->dev, "Starting NIC module\n"); 3994 3995 if (liquidio_init_nic_module(oct)) 3996 dev_err(&oct->pci_dev->dev, "NIC initialization failed\n"); 3997 else 3998 handshake[oct->octeon_id].started_ok = 1; 3999 } else { 4000 dev_err(&oct->pci_dev->dev, 4001 "Unexpected application running on NIC (%d). Check firmware.\n", 4002 oct->app_mode); 4003 } 4004 4005 complete(&handshake[oct->octeon_id].started); 4006} 4007 4008static int 4009octeon_recv_vf_drv_notice(struct octeon_recv_info *recv_info, void *buf) 4010{ 4011 struct octeon_device *oct = (struct octeon_device *)buf; 4012 struct octeon_recv_pkt *recv_pkt = recv_info->recv_pkt; 4013 int i, notice, vf_idx; 4014 bool cores_crashed; 4015 u64 *data, vf_num; 4016 4017 notice = recv_pkt->rh.r.ossp; 4018 data = (u64 *)(get_rbd(recv_pkt->buffer_ptr[0]) + OCT_DROQ_INFO_SIZE); 4019 4020 /* the first 64-bit word of data is the vf_num */ 4021 vf_num = data[0]; 4022 octeon_swap_8B_data(&vf_num, 1); 4023 vf_idx = (int)vf_num - 1; 4024 4025 cores_crashed = READ_ONCE(oct->cores_crashed); 4026 4027 if (notice == VF_DRV_LOADED) { 4028 if (!(oct->sriov_info.vf_drv_loaded_mask & BIT_ULL(vf_idx))) { 4029 oct->sriov_info.vf_drv_loaded_mask |= BIT_ULL(vf_idx); 4030 dev_info(&oct->pci_dev->dev, 4031 "driver for VF%d was loaded\n", vf_idx); 4032 if (!cores_crashed) 4033 try_module_get(THIS_MODULE); 4034 } 4035 } else if (notice == VF_DRV_REMOVED) { 4036 if (oct->sriov_info.vf_drv_loaded_mask & BIT_ULL(vf_idx)) { 4037 oct->sriov_info.vf_drv_loaded_mask &= ~BIT_ULL(vf_idx); 4038 dev_info(&oct->pci_dev->dev, 4039 "driver for VF%d was removed\n", vf_idx); 4040 if (!cores_crashed) 4041 module_put(THIS_MODULE); 4042 } 4043 } else if (notice == VF_DRV_MACADDR_CHANGED) { 4044 u8 *b = (u8 *)&data[1]; 4045 4046 oct->sriov_info.vf_macaddr[vf_idx] = data[1]; 4047 dev_info(&oct->pci_dev->dev, 4048 "VF driver changed VF%d's MAC address to %pM\n", 4049 vf_idx, b + 2); 4050 } 4051 4052 for (i = 0; i < recv_pkt->buffer_count; i++) 4053 recv_buffer_free(recv_pkt->buffer_ptr[i]); 4054 octeon_free_recv_info(recv_info); 4055 4056 return 0; 4057} 4058 4059/** 4060 * octeon_device_init - Device initialization for each Octeon device that is probed 4061 * @octeon_dev: octeon device 4062 */ 4063static int octeon_device_init(struct octeon_device *octeon_dev) 4064{ 4065 int j, ret; 4066 char bootcmd[] = "\n"; 4067 char *dbg_enb = NULL; 4068 enum lio_fw_state fw_state; 4069 struct octeon_device_priv *oct_priv = 4070 (struct octeon_device_priv *)octeon_dev->priv; 4071 atomic_set(&octeon_dev->status, OCT_DEV_BEGIN_STATE); 4072 4073 /* Enable access to the octeon device and make its DMA capability 4074 * known to the OS. 4075 */ 4076 if (octeon_pci_os_setup(octeon_dev)) 4077 return 1; 4078 4079 atomic_set(&octeon_dev->status, OCT_DEV_PCI_ENABLE_DONE); 4080 4081 /* Identify the Octeon type and map the BAR address space. */ 4082 if (octeon_chip_specific_setup(octeon_dev)) { 4083 dev_err(&octeon_dev->pci_dev->dev, "Chip specific setup failed\n"); 4084 return 1; 4085 } 4086 4087 atomic_set(&octeon_dev->status, OCT_DEV_PCI_MAP_DONE); 4088 4089 /* Only add a reference after setting status 'OCT_DEV_PCI_MAP_DONE', 4090 * since that is what is required for the reference to be removed 4091 * during de-initialization (see 'octeon_destroy_resources'). 4092 */ 4093 octeon_register_device(octeon_dev, octeon_dev->pci_dev->bus->number, 4094 PCI_SLOT(octeon_dev->pci_dev->devfn), 4095 PCI_FUNC(octeon_dev->pci_dev->devfn), 4096 true); 4097 4098 octeon_dev->app_mode = CVM_DRV_INVALID_APP; 4099 4100 /* CN23XX supports preloaded firmware if the following is true: 4101 * 4102 * The adapter indicates that firmware is currently running AND 4103 * 'fw_type' is 'auto'. 4104 * 4105 * (default state is NEEDS_TO_BE_LOADED, override it if appropriate). 4106 */ 4107 if (OCTEON_CN23XX_PF(octeon_dev) && 4108 cn23xx_fw_loaded(octeon_dev) && fw_type_is_auto()) { 4109 atomic_cmpxchg(octeon_dev->adapter_fw_state, 4110 FW_NEEDS_TO_BE_LOADED, FW_IS_PRELOADED); 4111 } 4112 4113 /* If loading firmware, only first device of adapter needs to do so. */ 4114 fw_state = atomic_cmpxchg(octeon_dev->adapter_fw_state, 4115 FW_NEEDS_TO_BE_LOADED, 4116 FW_IS_BEING_LOADED); 4117 4118 /* Here, [local variable] 'fw_state' is set to one of: 4119 * 4120 * FW_IS_PRELOADED: No firmware is to be loaded (see above) 4121 * FW_NEEDS_TO_BE_LOADED: The driver's first instance will load 4122 * firmware to the adapter. 4123 * FW_IS_BEING_LOADED: The driver's second instance will not load 4124 * firmware to the adapter. 4125 */ 4126 4127 /* Prior to f/w load, perform a soft reset of the Octeon device; 4128 * if error resetting, return w/error. 4129 */ 4130 if (fw_state == FW_NEEDS_TO_BE_LOADED) 4131 if (octeon_dev->fn_list.soft_reset(octeon_dev)) 4132 return 1; 4133 4134 /* Initialize the dispatch mechanism used to push packets arriving on 4135 * Octeon Output queues. 4136 */ 4137 if (octeon_init_dispatch_list(octeon_dev)) 4138 return 1; 4139 4140 octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC, 4141 OPCODE_NIC_CORE_DRV_ACTIVE, 4142 octeon_core_drv_init, 4143 octeon_dev); 4144 4145 octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC, 4146 OPCODE_NIC_VF_DRV_NOTICE, 4147 octeon_recv_vf_drv_notice, octeon_dev); 4148 INIT_DELAYED_WORK(&octeon_dev->nic_poll_work.work, nic_starter); 4149 octeon_dev->nic_poll_work.ctxptr = (void *)octeon_dev; 4150 schedule_delayed_work(&octeon_dev->nic_poll_work.work, 4151 LIQUIDIO_STARTER_POLL_INTERVAL_MS); 4152 4153 atomic_set(&octeon_dev->status, OCT_DEV_DISPATCH_INIT_DONE); 4154 4155 if (octeon_set_io_queues_off(octeon_dev)) { 4156 dev_err(&octeon_dev->pci_dev->dev, "setting io queues off failed\n"); 4157 return 1; 4158 } 4159 4160 if (OCTEON_CN23XX_PF(octeon_dev)) { 4161 ret = octeon_dev->fn_list.setup_device_regs(octeon_dev); 4162 if (ret) { 4163 dev_err(&octeon_dev->pci_dev->dev, "OCTEON: Failed to configure device registers\n"); 4164 return ret; 4165 } 4166 } 4167 4168 /* Initialize soft command buffer pool 4169 */ 4170 if (octeon_setup_sc_buffer_pool(octeon_dev)) { 4171 dev_err(&octeon_dev->pci_dev->dev, "sc buffer pool allocation failed\n"); 4172 return 1; 4173 } 4174 atomic_set(&octeon_dev->status, OCT_DEV_SC_BUFF_POOL_INIT_DONE); 4175 4176 /* Setup the data structures that manage this Octeon's Input queues. */ 4177 if (octeon_setup_instr_queues(octeon_dev)) { 4178 dev_err(&octeon_dev->pci_dev->dev, 4179 "instruction queue initialization failed\n"); 4180 return 1; 4181 } 4182 atomic_set(&octeon_dev->status, OCT_DEV_INSTR_QUEUE_INIT_DONE); 4183 4184 /* Initialize lists to manage the requests of different types that 4185 * arrive from user & kernel applications for this octeon device. 4186 */ 4187 if (octeon_setup_response_list(octeon_dev)) { 4188 dev_err(&octeon_dev->pci_dev->dev, "Response list allocation failed\n"); 4189 return 1; 4190 } 4191 atomic_set(&octeon_dev->status, OCT_DEV_RESP_LIST_INIT_DONE); 4192 4193 if (octeon_setup_output_queues(octeon_dev)) { 4194 dev_err(&octeon_dev->pci_dev->dev, "Output queue initialization failed\n"); 4195 return 1; 4196 } 4197 4198 atomic_set(&octeon_dev->status, OCT_DEV_DROQ_INIT_DONE); 4199 4200 if (OCTEON_CN23XX_PF(octeon_dev)) { 4201 if (octeon_dev->fn_list.setup_mbox(octeon_dev)) { 4202 dev_err(&octeon_dev->pci_dev->dev, "OCTEON: Mailbox setup failed\n"); 4203 return 1; 4204 } 4205 atomic_set(&octeon_dev->status, OCT_DEV_MBOX_SETUP_DONE); 4206 4207 if (octeon_allocate_ioq_vector 4208 (octeon_dev, 4209 octeon_dev->sriov_info.num_pf_rings)) { 4210 dev_err(&octeon_dev->pci_dev->dev, "OCTEON: ioq vector allocation failed\n"); 4211 return 1; 4212 } 4213 atomic_set(&octeon_dev->status, OCT_DEV_MSIX_ALLOC_VECTOR_DONE); 4214 4215 } else { 4216 /* The input and output queue registers were setup earlier (the 4217 * queues were not enabled). Any additional registers 4218 * that need to be programmed should be done now. 4219 */ 4220 ret = octeon_dev->fn_list.setup_device_regs(octeon_dev); 4221 if (ret) { 4222 dev_err(&octeon_dev->pci_dev->dev, 4223 "Failed to configure device registers\n"); 4224 return ret; 4225 } 4226 } 4227 4228 /* Initialize the tasklet that handles output queue packet processing.*/ 4229 dev_dbg(&octeon_dev->pci_dev->dev, "Initializing droq tasklet\n"); 4230 tasklet_setup(&oct_priv->droq_tasklet, octeon_droq_bh); 4231 4232 /* Setup the interrupt handler and record the INT SUM register address 4233 */ 4234 if (octeon_setup_interrupt(octeon_dev, 4235 octeon_dev->sriov_info.num_pf_rings)) 4236 return 1; 4237 4238 /* Enable Octeon device interrupts */ 4239 octeon_dev->fn_list.enable_interrupt(octeon_dev, OCTEON_ALL_INTR); 4240 4241 atomic_set(&octeon_dev->status, OCT_DEV_INTR_SET_DONE); 4242 4243 /* Send Credit for Octeon Output queues. Credits are always sent BEFORE 4244 * the output queue is enabled. 4245 * This ensures that we'll receive the f/w CORE DRV_ACTIVE message in 4246 * case we've configured CN23XX_SLI_GBL_CONTROL[NOPTR_D] = 0. 4247 * Otherwise, it is possible that the DRV_ACTIVE message will be sent 4248 * before any credits have been issued, causing the ring to be reset 4249 * (and the f/w appear to never have started). 4250 */ 4251 for (j = 0; j < octeon_dev->num_oqs; j++) 4252 writel(octeon_dev->droq[j]->max_count, 4253 octeon_dev->droq[j]->pkts_credit_reg); 4254 4255 /* Enable the input and output queues for this Octeon device */ 4256 ret = octeon_dev->fn_list.enable_io_queues(octeon_dev); 4257 if (ret) { 4258 dev_err(&octeon_dev->pci_dev->dev, "Failed to enable input/output queues"); 4259 return ret; 4260 } 4261 4262 atomic_set(&octeon_dev->status, OCT_DEV_IO_QUEUES_DONE); 4263 4264 if (fw_state == FW_NEEDS_TO_BE_LOADED) { 4265 dev_dbg(&octeon_dev->pci_dev->dev, "Waiting for DDR initialization...\n"); 4266 if (!ddr_timeout) { 4267 dev_info(&octeon_dev->pci_dev->dev, 4268 "WAITING. Set ddr_timeout to non-zero value to proceed with initialization.\n"); 4269 } 4270 4271 schedule_timeout_uninterruptible(HZ * LIO_RESET_SECS); 4272 4273 /* Wait for the octeon to initialize DDR after the soft-reset.*/ 4274 while (!ddr_timeout) { 4275 set_current_state(TASK_INTERRUPTIBLE); 4276 if (schedule_timeout(HZ / 10)) { 4277 /* user probably pressed Control-C */ 4278 return 1; 4279 } 4280 } 4281 ret = octeon_wait_for_ddr_init(octeon_dev, &ddr_timeout); 4282 if (ret) { 4283 dev_err(&octeon_dev->pci_dev->dev, 4284 "DDR not initialized. Please confirm that board is configured to boot from Flash, ret: %d\n", 4285 ret); 4286 return 1; 4287 } 4288 4289 if (octeon_wait_for_bootloader(octeon_dev, 1000)) { 4290 dev_err(&octeon_dev->pci_dev->dev, "Board not responding\n"); 4291 return 1; 4292 } 4293 4294 /* Divert uboot to take commands from host instead. */ 4295 ret = octeon_console_send_cmd(octeon_dev, bootcmd, 50); 4296 4297 dev_dbg(&octeon_dev->pci_dev->dev, "Initializing consoles\n"); 4298 ret = octeon_init_consoles(octeon_dev); 4299 if (ret) { 4300 dev_err(&octeon_dev->pci_dev->dev, "Could not access board consoles\n"); 4301 return 1; 4302 } 4303 /* If console debug enabled, specify empty string to use default 4304 * enablement ELSE specify NULL string for 'disabled'. 4305 */ 4306 dbg_enb = octeon_console_debug_enabled(0) ? "" : NULL; 4307 ret = octeon_add_console(octeon_dev, 0, dbg_enb); 4308 if (ret) { 4309 dev_err(&octeon_dev->pci_dev->dev, "Could not access board console\n"); 4310 return 1; 4311 } else if (octeon_console_debug_enabled(0)) { 4312 /* If console was added AND we're logging console output 4313 * then set our console print function. 4314 */ 4315 octeon_dev->console[0].print = octeon_dbg_console_print; 4316 } 4317 4318 atomic_set(&octeon_dev->status, OCT_DEV_CONSOLE_INIT_DONE); 4319 4320 dev_dbg(&octeon_dev->pci_dev->dev, "Loading firmware\n"); 4321 ret = load_firmware(octeon_dev); 4322 if (ret) { 4323 dev_err(&octeon_dev->pci_dev->dev, "Could not load firmware to board\n"); 4324 return 1; 4325 } 4326 4327 atomic_set(octeon_dev->adapter_fw_state, FW_HAS_BEEN_LOADED); 4328 } 4329 4330 handshake[octeon_dev->octeon_id].init_ok = 1; 4331 complete(&handshake[octeon_dev->octeon_id].init); 4332 4333 atomic_set(&octeon_dev->status, OCT_DEV_HOST_OK); 4334 oct_priv->dev = octeon_dev; 4335 4336 return 0; 4337} 4338 4339/** 4340 * octeon_dbg_console_print - Debug console print function 4341 * @oct: octeon device 4342 * @console_num: console number 4343 * @prefix: first portion of line to display 4344 * @suffix: second portion of line to display 4345 * 4346 * The OCTEON debug console outputs entire lines (excluding '\n'). 4347 * Normally, the line will be passed in the 'prefix' parameter. 4348 * However, due to buffering, it is possible for a line to be split into two 4349 * parts, in which case they will be passed as the 'prefix' parameter and 4350 * 'suffix' parameter. 4351 */ 4352static int octeon_dbg_console_print(struct octeon_device *oct, u32 console_num, 4353 char *prefix, char *suffix) 4354{ 4355 if (prefix && suffix) 4356 dev_info(&oct->pci_dev->dev, "%u: %s%s\n", console_num, prefix, 4357 suffix); 4358 else if (prefix) 4359 dev_info(&oct->pci_dev->dev, "%u: %s\n", console_num, prefix); 4360 else if (suffix) 4361 dev_info(&oct->pci_dev->dev, "%u: %s\n", console_num, suffix); 4362 4363 return 0; 4364} 4365 4366/** 4367 * liquidio_exit - Exits the module 4368 */ 4369static void __exit liquidio_exit(void) 4370{ 4371 liquidio_deinit_pci(); 4372 4373 pr_info("LiquidIO network module is now unloaded\n"); 4374} 4375 4376module_init(liquidio_init); 4377module_exit(liquidio_exit); 4378