1/* SPDX-License-Identifier: GPL-2.0-only */
2/* Atlantic Network Driver
3 * Copyright (C) 2020 Marvell International Ltd.
4 */
5
6#ifndef AQ_MACSEC_H
7#define AQ_MACSEC_H
8
9#include <linux/netdevice.h>
10#if IS_ENABLED(CONFIG_MACSEC)
11
12#include "net/macsec.h"
13
14struct aq_nic_s;
15
16#define AQ_MACSEC_MAX_SC 32
17#define AQ_MACSEC_MAX_SA 32
18
19enum aq_macsec_sc_sa {
20	aq_macsec_sa_sc_4sa_8sc,
21	aq_macsec_sa_sc_not_used,
22	aq_macsec_sa_sc_2sa_16sc,
23	aq_macsec_sa_sc_1sa_32sc,
24};
25
26struct aq_macsec_common_stats {
27	/* Ingress Common Counters */
28	struct {
29		u64 ctl_pkts;
30		u64 tagged_miss_pkts;
31		u64 untagged_miss_pkts;
32		u64 notag_pkts;
33		u64 untagged_pkts;
34		u64 bad_tag_pkts;
35		u64 no_sci_pkts;
36		u64 unknown_sci_pkts;
37		u64 ctrl_prt_pass_pkts;
38		u64 unctrl_prt_pass_pkts;
39		u64 ctrl_prt_fail_pkts;
40		u64 unctrl_prt_fail_pkts;
41		u64 too_long_pkts;
42		u64 igpoc_ctl_pkts;
43		u64 ecc_error_pkts;
44		u64 unctrl_hit_drop_redir;
45	} in;
46
47	/* Egress Common Counters */
48	struct {
49		u64 ctl_pkts;
50		u64 unknown_sa_pkts;
51		u64 untagged_pkts;
52		u64 too_long;
53		u64 ecc_error_pkts;
54		u64 unctrl_hit_drop_redir;
55	} out;
56};
57
58/* Ingress SA Counters */
59struct aq_macsec_rx_sa_stats {
60	u64 untagged_hit_pkts;
61	u64 ctrl_hit_drop_redir_pkts;
62	u64 not_using_sa;
63	u64 unused_sa;
64	u64 not_valid_pkts;
65	u64 invalid_pkts;
66	u64 ok_pkts;
67	u64 late_pkts;
68	u64 delayed_pkts;
69	u64 unchecked_pkts;
70	u64 validated_octets;
71	u64 decrypted_octets;
72};
73
74/* Egress SA Counters */
75struct aq_macsec_tx_sa_stats {
76	u64 sa_hit_drop_redirect;
77	u64 sa_protected2_pkts;
78	u64 sa_protected_pkts;
79	u64 sa_encrypted_pkts;
80};
81
82/* Egress SC Counters */
83struct aq_macsec_tx_sc_stats {
84	u64 sc_protected_pkts;
85	u64 sc_encrypted_pkts;
86	u64 sc_protected_octets;
87	u64 sc_encrypted_octets;
88};
89
90struct aq_macsec_txsc {
91	u32 hw_sc_idx;
92	unsigned long tx_sa_idx_busy;
93	const struct macsec_secy *sw_secy;
94	u8 tx_sa_key[MACSEC_NUM_AN][MACSEC_MAX_KEY_LEN];
95	struct aq_macsec_tx_sc_stats stats;
96	struct aq_macsec_tx_sa_stats tx_sa_stats[MACSEC_NUM_AN];
97};
98
99struct aq_macsec_rxsc {
100	u32 hw_sc_idx;
101	unsigned long rx_sa_idx_busy;
102	const struct macsec_secy *sw_secy;
103	const struct macsec_rx_sc *sw_rxsc;
104	u8 rx_sa_key[MACSEC_NUM_AN][MACSEC_MAX_KEY_LEN];
105	struct aq_macsec_rx_sa_stats rx_sa_stats[MACSEC_NUM_AN];
106};
107
108struct aq_macsec_cfg {
109	enum aq_macsec_sc_sa sc_sa;
110	/* Egress channel configuration */
111	unsigned long txsc_idx_busy;
112	struct aq_macsec_txsc aq_txsc[AQ_MACSEC_MAX_SC];
113	/* Ingress channel configuration */
114	unsigned long rxsc_idx_busy;
115	struct aq_macsec_rxsc aq_rxsc[AQ_MACSEC_MAX_SC];
116	/* Statistics / counters */
117	struct aq_macsec_common_stats stats;
118};
119
120extern const struct macsec_ops aq_macsec_ops;
121
122int aq_macsec_init(struct aq_nic_s *nic);
123void aq_macsec_free(struct aq_nic_s *nic);
124int aq_macsec_enable(struct aq_nic_s *nic);
125void aq_macsec_work(struct aq_nic_s *nic);
126u64 *aq_macsec_get_stats(struct aq_nic_s *nic, u64 *data);
127int aq_macsec_rx_sa_cnt(struct aq_nic_s *nic);
128int aq_macsec_tx_sc_cnt(struct aq_nic_s *nic);
129int aq_macsec_tx_sa_cnt(struct aq_nic_s *nic);
130
131#endif
132
133#endif /* AQ_MACSEC_H */
134