1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2007, 2011 Wolfgang Grandegger <wg@grandegger.com> 4 * Copyright (C) 2012 Stephane Grosjean <s.grosjean@peak-system.com> 5 * 6 * Derived from the PCAN project file driver/src/pcan_pci.c: 7 * 8 * Copyright (C) 2001-2006 PEAK System-Technik GmbH 9 */ 10 11#include <linux/kernel.h> 12#include <linux/module.h> 13#include <linux/interrupt.h> 14#include <linux/netdevice.h> 15#include <linux/delay.h> 16#include <linux/pci.h> 17#include <linux/io.h> 18#include <linux/i2c.h> 19#include <linux/i2c-algo-bit.h> 20#include <linux/can.h> 21#include <linux/can/dev.h> 22 23#include "sja1000.h" 24 25MODULE_AUTHOR("Stephane Grosjean <s.grosjean@peak-system.com>"); 26MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCI family cards"); 27MODULE_SUPPORTED_DEVICE("PEAK PCAN PCI/PCIe/PCIeC miniPCI CAN cards"); 28MODULE_SUPPORTED_DEVICE("PEAK PCAN miniPCIe/cPCI PC/104+ PCI/104e CAN Cards"); 29MODULE_LICENSE("GPL v2"); 30 31#define DRV_NAME "peak_pci" 32 33struct peak_pciec_card; 34struct peak_pci_chan { 35 void __iomem *cfg_base; /* Common for all channels */ 36 struct net_device *prev_dev; /* Chain of network devices */ 37 u16 icr_mask; /* Interrupt mask for fast ack */ 38 struct peak_pciec_card *pciec_card; /* only for PCIeC LEDs */ 39}; 40 41#define PEAK_PCI_CAN_CLOCK (16000000 / 2) 42 43#define PEAK_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK) 44#define PEAK_PCI_OCR OCR_TX0_PUSHPULL 45 46/* 47 * Important PITA registers 48 */ 49#define PITA_ICR 0x00 /* Interrupt control register */ 50#define PITA_GPIOICR 0x18 /* GPIO interface control register */ 51#define PITA_MISC 0x1C /* Miscellaneous register */ 52 53#define PEAK_PCI_CFG_SIZE 0x1000 /* Size of the config PCI bar */ 54#define PEAK_PCI_CHAN_SIZE 0x0400 /* Size used by the channel */ 55 56#define PEAK_PCI_VENDOR_ID 0x001C /* The PCI device and vendor IDs */ 57#define PEAK_PCI_DEVICE_ID 0x0001 /* for PCI/PCIe slot cards */ 58#define PEAK_PCIEC_DEVICE_ID 0x0002 /* for ExpressCard slot cards */ 59#define PEAK_PCIE_DEVICE_ID 0x0003 /* for nextgen PCIe slot cards */ 60#define PEAK_CPCI_DEVICE_ID 0x0004 /* for nextgen cPCI slot cards */ 61#define PEAK_MPCI_DEVICE_ID 0x0005 /* for nextgen miniPCI slot cards */ 62#define PEAK_PC_104P_DEVICE_ID 0x0006 /* PCAN-PC/104+ cards */ 63#define PEAK_PCI_104E_DEVICE_ID 0x0007 /* PCAN-PCI/104 Express cards */ 64#define PEAK_MPCIE_DEVICE_ID 0x0008 /* The miniPCIe slot cards */ 65#define PEAK_PCIE_OEM_ID 0x0009 /* PCAN-PCI Express OEM */ 66#define PEAK_PCIEC34_DEVICE_ID 0x000A /* PCAN-PCI Express 34 (one channel) */ 67 68#define PEAK_PCI_CHAN_MAX 4 69 70static const u16 peak_pci_icr_masks[PEAK_PCI_CHAN_MAX] = { 71 0x02, 0x01, 0x40, 0x80 72}; 73 74static const struct pci_device_id peak_pci_tbl[] = { 75 {PEAK_PCI_VENDOR_ID, PEAK_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 76 {PEAK_PCI_VENDOR_ID, PEAK_PCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 77 {PEAK_PCI_VENDOR_ID, PEAK_MPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 78 {PEAK_PCI_VENDOR_ID, PEAK_MPCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 79 {PEAK_PCI_VENDOR_ID, PEAK_PC_104P_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 80 {PEAK_PCI_VENDOR_ID, PEAK_PCI_104E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 81 {PEAK_PCI_VENDOR_ID, PEAK_CPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 82 {PEAK_PCI_VENDOR_ID, PEAK_PCIE_OEM_ID, PCI_ANY_ID, PCI_ANY_ID,}, 83#ifdef CONFIG_CAN_PEAK_PCIEC 84 {PEAK_PCI_VENDOR_ID, PEAK_PCIEC_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 85 {PEAK_PCI_VENDOR_ID, PEAK_PCIEC34_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 86#endif 87 {0,} 88}; 89 90MODULE_DEVICE_TABLE(pci, peak_pci_tbl); 91 92#ifdef CONFIG_CAN_PEAK_PCIEC 93/* 94 * PCAN-ExpressCard needs I2C bit-banging configuration option. 95 */ 96 97/* GPIOICR byte access offsets */ 98#define PITA_GPOUT 0x18 /* GPx output value */ 99#define PITA_GPIN 0x19 /* GPx input value */ 100#define PITA_GPOEN 0x1A /* configure GPx as output pin */ 101 102/* I2C GP bits */ 103#define PITA_GPIN_SCL 0x01 /* Serial Clock Line */ 104#define PITA_GPIN_SDA 0x04 /* Serial DAta line */ 105 106#define PCA9553_1_SLAVEADDR (0xC4 >> 1) 107 108/* PCA9553 LS0 fields values */ 109enum { 110 PCA9553_LOW, 111 PCA9553_HIGHZ, 112 PCA9553_PWM0, 113 PCA9553_PWM1 114}; 115 116/* LEDs control */ 117#define PCA9553_ON PCA9553_LOW 118#define PCA9553_OFF PCA9553_HIGHZ 119#define PCA9553_SLOW PCA9553_PWM0 120#define PCA9553_FAST PCA9553_PWM1 121 122#define PCA9553_LED(c) (1 << (c)) 123#define PCA9553_LED_STATE(s, c) ((s) << ((c) << 1)) 124 125#define PCA9553_LED_ON(c) PCA9553_LED_STATE(PCA9553_ON, c) 126#define PCA9553_LED_OFF(c) PCA9553_LED_STATE(PCA9553_OFF, c) 127#define PCA9553_LED_SLOW(c) PCA9553_LED_STATE(PCA9553_SLOW, c) 128#define PCA9553_LED_FAST(c) PCA9553_LED_STATE(PCA9553_FAST, c) 129#define PCA9553_LED_MASK(c) PCA9553_LED_STATE(0x03, c) 130 131#define PCA9553_LED_OFF_ALL (PCA9553_LED_OFF(0) | PCA9553_LED_OFF(1)) 132 133#define PCA9553_LS0_INIT 0x40 /* initial value (!= from 0x00) */ 134 135struct peak_pciec_chan { 136 struct net_device *netdev; 137 unsigned long prev_rx_bytes; 138 unsigned long prev_tx_bytes; 139}; 140 141struct peak_pciec_card { 142 void __iomem *cfg_base; /* Common for all channels */ 143 void __iomem *reg_base; /* first channel base address */ 144 u8 led_cache; /* leds state cache */ 145 146 /* PCIExpressCard i2c data */ 147 struct i2c_algo_bit_data i2c_bit; 148 struct i2c_adapter led_chip; 149 struct delayed_work led_work; /* led delayed work */ 150 int chan_count; 151 struct peak_pciec_chan channel[PEAK_PCI_CHAN_MAX]; 152}; 153 154/* "normal" pci register write callback is overloaded for leds control */ 155static void peak_pci_write_reg(const struct sja1000_priv *priv, 156 int port, u8 val); 157 158static inline void pita_set_scl_highz(struct peak_pciec_card *card) 159{ 160 u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SCL; 161 writeb(gp_outen, card->cfg_base + PITA_GPOEN); 162} 163 164static inline void pita_set_sda_highz(struct peak_pciec_card *card) 165{ 166 u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SDA; 167 writeb(gp_outen, card->cfg_base + PITA_GPOEN); 168} 169 170static void peak_pciec_init_pita_gpio(struct peak_pciec_card *card) 171{ 172 /* raise SCL & SDA GPIOs to high-Z */ 173 pita_set_scl_highz(card); 174 pita_set_sda_highz(card); 175} 176 177static void pita_setsda(void *data, int state) 178{ 179 struct peak_pciec_card *card = (struct peak_pciec_card *)data; 180 u8 gp_out, gp_outen; 181 182 /* set output sda always to 0 */ 183 gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SDA; 184 writeb(gp_out, card->cfg_base + PITA_GPOUT); 185 186 /* control output sda with GPOEN */ 187 gp_outen = readb(card->cfg_base + PITA_GPOEN); 188 if (state) 189 gp_outen &= ~PITA_GPIN_SDA; 190 else 191 gp_outen |= PITA_GPIN_SDA; 192 193 writeb(gp_outen, card->cfg_base + PITA_GPOEN); 194} 195 196static void pita_setscl(void *data, int state) 197{ 198 struct peak_pciec_card *card = (struct peak_pciec_card *)data; 199 u8 gp_out, gp_outen; 200 201 /* set output scl always to 0 */ 202 gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SCL; 203 writeb(gp_out, card->cfg_base + PITA_GPOUT); 204 205 /* control output scl with GPOEN */ 206 gp_outen = readb(card->cfg_base + PITA_GPOEN); 207 if (state) 208 gp_outen &= ~PITA_GPIN_SCL; 209 else 210 gp_outen |= PITA_GPIN_SCL; 211 212 writeb(gp_outen, card->cfg_base + PITA_GPOEN); 213} 214 215static int pita_getsda(void *data) 216{ 217 struct peak_pciec_card *card = (struct peak_pciec_card *)data; 218 219 /* set tristate */ 220 pita_set_sda_highz(card); 221 222 return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SDA) ? 1 : 0; 223} 224 225static int pita_getscl(void *data) 226{ 227 struct peak_pciec_card *card = (struct peak_pciec_card *)data; 228 229 /* set tristate */ 230 pita_set_scl_highz(card); 231 232 return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SCL) ? 1 : 0; 233} 234 235/* 236 * write commands to the LED chip though the I2C-bus of the PCAN-PCIeC 237 */ 238static int peak_pciec_write_pca9553(struct peak_pciec_card *card, 239 u8 offset, u8 data) 240{ 241 u8 buffer[2] = { 242 offset, 243 data 244 }; 245 struct i2c_msg msg = { 246 .addr = PCA9553_1_SLAVEADDR, 247 .len = 2, 248 .buf = buffer, 249 }; 250 int ret; 251 252 /* cache led mask */ 253 if ((offset == 5) && (data == card->led_cache)) 254 return 0; 255 256 ret = i2c_transfer(&card->led_chip, &msg, 1); 257 if (ret < 0) 258 return ret; 259 260 if (offset == 5) 261 card->led_cache = data; 262 263 return 0; 264} 265 266/* 267 * delayed work callback used to control the LEDs 268 */ 269static void peak_pciec_led_work(struct work_struct *work) 270{ 271 struct peak_pciec_card *card = 272 container_of(work, struct peak_pciec_card, led_work.work); 273 struct net_device *netdev; 274 u8 new_led = card->led_cache; 275 int i, up_count = 0; 276 277 /* first check what is to do */ 278 for (i = 0; i < card->chan_count; i++) { 279 /* default is: not configured */ 280 new_led &= ~PCA9553_LED_MASK(i); 281 new_led |= PCA9553_LED_ON(i); 282 283 netdev = card->channel[i].netdev; 284 if (!netdev || !(netdev->flags & IFF_UP)) 285 continue; 286 287 up_count++; 288 289 /* no activity (but configured) */ 290 new_led &= ~PCA9553_LED_MASK(i); 291 new_led |= PCA9553_LED_SLOW(i); 292 293 /* if bytes counters changed, set fast blinking led */ 294 if (netdev->stats.rx_bytes != card->channel[i].prev_rx_bytes) { 295 card->channel[i].prev_rx_bytes = netdev->stats.rx_bytes; 296 new_led &= ~PCA9553_LED_MASK(i); 297 new_led |= PCA9553_LED_FAST(i); 298 } 299 if (netdev->stats.tx_bytes != card->channel[i].prev_tx_bytes) { 300 card->channel[i].prev_tx_bytes = netdev->stats.tx_bytes; 301 new_led &= ~PCA9553_LED_MASK(i); 302 new_led |= PCA9553_LED_FAST(i); 303 } 304 } 305 306 /* check if LS0 settings changed, only update i2c if so */ 307 peak_pciec_write_pca9553(card, 5, new_led); 308 309 /* restart timer (except if no more configured channels) */ 310 if (up_count) 311 schedule_delayed_work(&card->led_work, HZ); 312} 313 314/* 315 * set LEDs blinking state 316 */ 317static void peak_pciec_set_leds(struct peak_pciec_card *card, u8 led_mask, u8 s) 318{ 319 u8 new_led = card->led_cache; 320 int i; 321 322 /* first check what is to do */ 323 for (i = 0; i < card->chan_count; i++) 324 if (led_mask & PCA9553_LED(i)) { 325 new_led &= ~PCA9553_LED_MASK(i); 326 new_led |= PCA9553_LED_STATE(s, i); 327 } 328 329 /* check if LS0 settings changed, only update i2c if so */ 330 peak_pciec_write_pca9553(card, 5, new_led); 331} 332 333/* 334 * start one second delayed work to control LEDs 335 */ 336static void peak_pciec_start_led_work(struct peak_pciec_card *card) 337{ 338 schedule_delayed_work(&card->led_work, HZ); 339} 340 341/* 342 * stop LEDs delayed work 343 */ 344static void peak_pciec_stop_led_work(struct peak_pciec_card *card) 345{ 346 cancel_delayed_work_sync(&card->led_work); 347} 348 349/* 350 * initialize the PCA9553 4-bit I2C-bus LED chip 351 */ 352static int peak_pciec_init_leds(struct peak_pciec_card *card) 353{ 354 int err; 355 356 /* prescaler for frequency 0: "SLOW" = 1 Hz = "44" */ 357 err = peak_pciec_write_pca9553(card, 1, 44 / 1); 358 if (err) 359 return err; 360 361 /* duty cycle 0: 50% */ 362 err = peak_pciec_write_pca9553(card, 2, 0x80); 363 if (err) 364 return err; 365 366 /* prescaler for frequency 1: "FAST" = 5 Hz */ 367 err = peak_pciec_write_pca9553(card, 3, 44 / 5); 368 if (err) 369 return err; 370 371 /* duty cycle 1: 50% */ 372 err = peak_pciec_write_pca9553(card, 4, 0x80); 373 if (err) 374 return err; 375 376 /* switch LEDs to initial state */ 377 return peak_pciec_write_pca9553(card, 5, PCA9553_LS0_INIT); 378} 379 380/* 381 * restore LEDs state to off peak_pciec_leds_exit 382 */ 383static void peak_pciec_leds_exit(struct peak_pciec_card *card) 384{ 385 /* switch LEDs to off */ 386 peak_pciec_write_pca9553(card, 5, PCA9553_LED_OFF_ALL); 387} 388 389/* 390 * normal write sja1000 register method overloaded to catch when controller 391 * is started or stopped, to control leds 392 */ 393static void peak_pciec_write_reg(const struct sja1000_priv *priv, 394 int port, u8 val) 395{ 396 struct peak_pci_chan *chan = priv->priv; 397 struct peak_pciec_card *card = chan->pciec_card; 398 int c = (priv->reg_base - card->reg_base) / PEAK_PCI_CHAN_SIZE; 399 400 /* sja1000 register changes control the leds state */ 401 if (port == SJA1000_MOD) 402 switch (val) { 403 case MOD_RM: 404 /* Reset Mode: set led on */ 405 peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_ON); 406 break; 407 case 0x00: 408 /* Normal Mode: led slow blinking and start led timer */ 409 peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_SLOW); 410 peak_pciec_start_led_work(card); 411 break; 412 default: 413 break; 414 } 415 416 /* call base function */ 417 peak_pci_write_reg(priv, port, val); 418} 419 420static const struct i2c_algo_bit_data peak_pciec_i2c_bit_ops = { 421 .setsda = pita_setsda, 422 .setscl = pita_setscl, 423 .getsda = pita_getsda, 424 .getscl = pita_getscl, 425 .udelay = 10, 426 .timeout = HZ, 427}; 428 429static int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev) 430{ 431 struct sja1000_priv *priv = netdev_priv(dev); 432 struct peak_pci_chan *chan = priv->priv; 433 struct peak_pciec_card *card; 434 int err; 435 436 /* copy i2c object address from 1st channel */ 437 if (chan->prev_dev) { 438 struct sja1000_priv *prev_priv = netdev_priv(chan->prev_dev); 439 struct peak_pci_chan *prev_chan = prev_priv->priv; 440 441 card = prev_chan->pciec_card; 442 if (!card) 443 return -ENODEV; 444 445 /* channel is the first one: do the init part */ 446 } else { 447 /* create the bit banging I2C adapter structure */ 448 card = kzalloc(sizeof(struct peak_pciec_card), GFP_KERNEL); 449 if (!card) 450 return -ENOMEM; 451 452 card->cfg_base = chan->cfg_base; 453 card->reg_base = priv->reg_base; 454 455 card->led_chip.owner = THIS_MODULE; 456 card->led_chip.dev.parent = &pdev->dev; 457 card->led_chip.algo_data = &card->i2c_bit; 458 strncpy(card->led_chip.name, "peak_i2c", 459 sizeof(card->led_chip.name)); 460 461 card->i2c_bit = peak_pciec_i2c_bit_ops; 462 card->i2c_bit.udelay = 10; 463 card->i2c_bit.timeout = HZ; 464 card->i2c_bit.data = card; 465 466 peak_pciec_init_pita_gpio(card); 467 468 err = i2c_bit_add_bus(&card->led_chip); 469 if (err) { 470 dev_err(&pdev->dev, "i2c init failed\n"); 471 goto pciec_init_err_1; 472 } 473 474 err = peak_pciec_init_leds(card); 475 if (err) { 476 dev_err(&pdev->dev, "leds hardware init failed\n"); 477 goto pciec_init_err_2; 478 } 479 480 INIT_DELAYED_WORK(&card->led_work, peak_pciec_led_work); 481 /* PCAN-ExpressCard needs its own callback for leds */ 482 priv->write_reg = peak_pciec_write_reg; 483 } 484 485 chan->pciec_card = card; 486 card->channel[card->chan_count++].netdev = dev; 487 488 return 0; 489 490pciec_init_err_2: 491 i2c_del_adapter(&card->led_chip); 492 493pciec_init_err_1: 494 peak_pciec_init_pita_gpio(card); 495 kfree(card); 496 497 return err; 498} 499 500static void peak_pciec_remove(struct peak_pciec_card *card) 501{ 502 peak_pciec_stop_led_work(card); 503 peak_pciec_leds_exit(card); 504 i2c_del_adapter(&card->led_chip); 505 peak_pciec_init_pita_gpio(card); 506 kfree(card); 507} 508 509#else /* CONFIG_CAN_PEAK_PCIEC */ 510 511/* 512 * Placebo functions when PCAN-ExpressCard support is not selected 513 */ 514static inline int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev) 515{ 516 return -ENODEV; 517} 518 519static inline void peak_pciec_remove(struct peak_pciec_card *card) 520{ 521} 522#endif /* CONFIG_CAN_PEAK_PCIEC */ 523 524static u8 peak_pci_read_reg(const struct sja1000_priv *priv, int port) 525{ 526 return readb(priv->reg_base + (port << 2)); 527} 528 529static void peak_pci_write_reg(const struct sja1000_priv *priv, 530 int port, u8 val) 531{ 532 writeb(val, priv->reg_base + (port << 2)); 533} 534 535static void peak_pci_post_irq(const struct sja1000_priv *priv) 536{ 537 struct peak_pci_chan *chan = priv->priv; 538 u16 icr; 539 540 /* Select and clear in PITA stored interrupt */ 541 icr = readw(chan->cfg_base + PITA_ICR); 542 if (icr & chan->icr_mask) 543 writew(chan->icr_mask, chan->cfg_base + PITA_ICR); 544} 545 546static int peak_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 547{ 548 struct sja1000_priv *priv; 549 struct peak_pci_chan *chan; 550 struct net_device *dev, *prev_dev; 551 void __iomem *cfg_base, *reg_base; 552 u16 sub_sys_id, icr; 553 int i, err, channels; 554 555 err = pci_enable_device(pdev); 556 if (err) 557 return err; 558 559 err = pci_request_regions(pdev, DRV_NAME); 560 if (err) 561 goto failure_disable_pci; 562 563 err = pci_read_config_word(pdev, 0x2e, &sub_sys_id); 564 if (err) 565 goto failure_release_regions; 566 567 dev_dbg(&pdev->dev, "probing device %04x:%04x:%04x\n", 568 pdev->vendor, pdev->device, sub_sys_id); 569 570 err = pci_write_config_word(pdev, 0x44, 0); 571 if (err) 572 goto failure_release_regions; 573 574 if (sub_sys_id >= 12) 575 channels = 4; 576 else if (sub_sys_id >= 10) 577 channels = 3; 578 else if (sub_sys_id >= 4) 579 channels = 2; 580 else 581 channels = 1; 582 583 cfg_base = pci_iomap(pdev, 0, PEAK_PCI_CFG_SIZE); 584 if (!cfg_base) { 585 dev_err(&pdev->dev, "failed to map PCI resource #0\n"); 586 err = -ENOMEM; 587 goto failure_release_regions; 588 } 589 590 reg_base = pci_iomap(pdev, 1, PEAK_PCI_CHAN_SIZE * channels); 591 if (!reg_base) { 592 dev_err(&pdev->dev, "failed to map PCI resource #1\n"); 593 err = -ENOMEM; 594 goto failure_unmap_cfg_base; 595 } 596 597 /* Set GPIO control register */ 598 writew(0x0005, cfg_base + PITA_GPIOICR + 2); 599 /* Enable all channels of this card */ 600 writeb(0x00, cfg_base + PITA_GPIOICR); 601 /* Toggle reset */ 602 writeb(0x05, cfg_base + PITA_MISC + 3); 603 usleep_range(5000, 6000); 604 /* Leave parport mux mode */ 605 writeb(0x04, cfg_base + PITA_MISC + 3); 606 607 icr = readw(cfg_base + PITA_ICR + 2); 608 609 for (i = 0; i < channels; i++) { 610 dev = alloc_sja1000dev(sizeof(struct peak_pci_chan)); 611 if (!dev) { 612 err = -ENOMEM; 613 goto failure_remove_channels; 614 } 615 616 priv = netdev_priv(dev); 617 chan = priv->priv; 618 619 chan->cfg_base = cfg_base; 620 priv->reg_base = reg_base + i * PEAK_PCI_CHAN_SIZE; 621 622 priv->read_reg = peak_pci_read_reg; 623 priv->write_reg = peak_pci_write_reg; 624 priv->post_irq = peak_pci_post_irq; 625 626 priv->can.clock.freq = PEAK_PCI_CAN_CLOCK; 627 priv->ocr = PEAK_PCI_OCR; 628 priv->cdr = PEAK_PCI_CDR; 629 /* Neither a slave nor a single device distributes the clock */ 630 if (channels == 1 || i > 0) 631 priv->cdr |= CDR_CLK_OFF; 632 633 /* Setup interrupt handling */ 634 priv->irq_flags = IRQF_SHARED; 635 dev->irq = pdev->irq; 636 637 chan->icr_mask = peak_pci_icr_masks[i]; 638 icr |= chan->icr_mask; 639 640 SET_NETDEV_DEV(dev, &pdev->dev); 641 dev->dev_id = i; 642 643 /* Create chain of SJA1000 devices */ 644 chan->prev_dev = pci_get_drvdata(pdev); 645 pci_set_drvdata(pdev, dev); 646 647 /* 648 * PCAN-ExpressCard needs some additional i2c init. 649 * This must be done *before* register_sja1000dev() but 650 * *after* devices linkage 651 */ 652 if (pdev->device == PEAK_PCIEC_DEVICE_ID || 653 pdev->device == PEAK_PCIEC34_DEVICE_ID) { 654 err = peak_pciec_probe(pdev, dev); 655 if (err) { 656 dev_err(&pdev->dev, 657 "failed to probe device (err %d)\n", 658 err); 659 goto failure_free_dev; 660 } 661 } 662 663 err = register_sja1000dev(dev); 664 if (err) { 665 dev_err(&pdev->dev, "failed to register device\n"); 666 goto failure_free_dev; 667 } 668 669 dev_info(&pdev->dev, 670 "%s at reg_base=0x%p cfg_base=0x%p irq=%d\n", 671 dev->name, priv->reg_base, chan->cfg_base, dev->irq); 672 } 673 674 /* Enable interrupts */ 675 writew(icr, cfg_base + PITA_ICR + 2); 676 677 return 0; 678 679failure_free_dev: 680 pci_set_drvdata(pdev, chan->prev_dev); 681 free_sja1000dev(dev); 682 683failure_remove_channels: 684 /* Disable interrupts */ 685 writew(0x0, cfg_base + PITA_ICR + 2); 686 687 chan = NULL; 688 for (dev = pci_get_drvdata(pdev); dev; dev = prev_dev) { 689 priv = netdev_priv(dev); 690 chan = priv->priv; 691 prev_dev = chan->prev_dev; 692 693 unregister_sja1000dev(dev); 694 free_sja1000dev(dev); 695 } 696 697 /* free any PCIeC resources too */ 698 if (chan && chan->pciec_card) 699 peak_pciec_remove(chan->pciec_card); 700 701 pci_iounmap(pdev, reg_base); 702 703failure_unmap_cfg_base: 704 pci_iounmap(pdev, cfg_base); 705 706failure_release_regions: 707 pci_release_regions(pdev); 708 709failure_disable_pci: 710 pci_disable_device(pdev); 711 712 /* pci_xxx_config_word() return positive PCIBIOS_xxx error codes while 713 * the probe() function must return a negative errno in case of failure 714 * (err is unchanged if negative) */ 715 return pcibios_err_to_errno(err); 716} 717 718static void peak_pci_remove(struct pci_dev *pdev) 719{ 720 struct net_device *dev = pci_get_drvdata(pdev); /* Last device */ 721 struct sja1000_priv *priv = netdev_priv(dev); 722 struct peak_pci_chan *chan = priv->priv; 723 void __iomem *cfg_base = chan->cfg_base; 724 void __iomem *reg_base = priv->reg_base; 725 726 /* Disable interrupts */ 727 writew(0x0, cfg_base + PITA_ICR + 2); 728 729 /* Loop over all registered devices */ 730 while (1) { 731 struct net_device *prev_dev = chan->prev_dev; 732 733 dev_info(&pdev->dev, "removing device %s\n", dev->name); 734 /* do that only for first channel */ 735 if (!prev_dev && chan->pciec_card) 736 peak_pciec_remove(chan->pciec_card); 737 unregister_sja1000dev(dev); 738 free_sja1000dev(dev); 739 dev = prev_dev; 740 741 if (!dev) 742 break; 743 priv = netdev_priv(dev); 744 chan = priv->priv; 745 } 746 747 pci_iounmap(pdev, reg_base); 748 pci_iounmap(pdev, cfg_base); 749 pci_release_regions(pdev); 750 pci_disable_device(pdev); 751} 752 753static struct pci_driver peak_pci_driver = { 754 .name = DRV_NAME, 755 .id_table = peak_pci_tbl, 756 .probe = peak_pci_probe, 757 .remove = peak_pci_remove, 758}; 759 760module_pci_driver(peak_pci_driver); 761