1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Janz MODULbus VMOD-ICAN3 CAN Interface Driver
4 *
5 * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu>
6 */
7
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <linux/interrupt.h>
11#include <linux/delay.h>
12#include <linux/platform_device.h>
13
14#include <linux/netdevice.h>
15#include <linux/can.h>
16#include <linux/can/dev.h>
17#include <linux/can/skb.h>
18#include <linux/can/error.h>
19
20#include <linux/mfd/janz.h>
21#include <asm/io.h>
22
23/* the DPM has 64k of memory, organized into 256x 256 byte pages */
24#define DPM_NUM_PAGES		256
25#define DPM_PAGE_SIZE		256
26#define DPM_PAGE_ADDR(p)	((p) * DPM_PAGE_SIZE)
27
28/* JANZ ICAN3 "old-style" host interface queue page numbers */
29#define QUEUE_OLD_CONTROL	0
30#define QUEUE_OLD_RB0		1
31#define QUEUE_OLD_RB1		2
32#define QUEUE_OLD_WB0		3
33#define QUEUE_OLD_WB1		4
34
35/* Janz ICAN3 "old-style" host interface control registers */
36#define MSYNC_PEER		0x00		/* ICAN only */
37#define MSYNC_LOCL		0x01		/* host only */
38#define TARGET_RUNNING		0x02
39#define FIRMWARE_STAMP		0x60		/* big endian firmware stamp */
40
41#define MSYNC_RB0		0x01
42#define MSYNC_RB1		0x02
43#define MSYNC_RBLW		0x04
44#define MSYNC_RB_MASK		(MSYNC_RB0 | MSYNC_RB1)
45
46#define MSYNC_WB0		0x10
47#define MSYNC_WB1		0x20
48#define MSYNC_WBLW		0x40
49#define MSYNC_WB_MASK		(MSYNC_WB0 | MSYNC_WB1)
50
51/* Janz ICAN3 "new-style" host interface queue page numbers */
52#define QUEUE_TOHOST		5
53#define QUEUE_FROMHOST_MID	6
54#define QUEUE_FROMHOST_HIGH	7
55#define QUEUE_FROMHOST_LOW	8
56
57/* The first free page in the DPM is #9 */
58#define DPM_FREE_START		9
59
60/* Janz ICAN3 "new-style" and "fast" host interface descriptor flags */
61#define DESC_VALID		0x80
62#define DESC_WRAP		0x40
63#define DESC_INTERRUPT		0x20
64#define DESC_IVALID		0x10
65#define DESC_LEN(len)		(len)
66
67/* Janz ICAN3 Firmware Messages */
68#define MSG_CONNECTI		0x02
69#define MSG_DISCONNECT		0x03
70#define MSG_IDVERS		0x04
71#define MSG_MSGLOST		0x05
72#define MSG_NEWHOSTIF		0x08
73#define MSG_INQUIRY		0x0a
74#define MSG_SETAFILMASK		0x10
75#define MSG_INITFDPMQUEUE	0x11
76#define MSG_HWCONF		0x12
77#define MSG_FMSGLOST		0x15
78#define MSG_CEVTIND		0x37
79#define MSG_CBTRREQ		0x41
80#define MSG_COFFREQ		0x42
81#define MSG_CONREQ		0x43
82#define MSG_CCONFREQ		0x47
83#define MSG_NMTS		0xb0
84#define MSG_LMTS		0xb4
85
86/*
87 * Janz ICAN3 CAN Inquiry Message Types
88 *
89 * NOTE: there appears to be a firmware bug here. You must send
90 * NOTE: INQUIRY_STATUS and expect to receive an INQUIRY_EXTENDED
91 * NOTE: response. The controller never responds to a message with
92 * NOTE: the INQUIRY_EXTENDED subspec :(
93 */
94#define INQUIRY_STATUS		0x00
95#define INQUIRY_TERMINATION	0x01
96#define INQUIRY_EXTENDED	0x04
97
98/* Janz ICAN3 CAN Set Acceptance Filter Mask Message Types */
99#define SETAFILMASK_REJECT	0x00
100#define SETAFILMASK_FASTIF	0x02
101
102/* Janz ICAN3 CAN Hardware Configuration Message Types */
103#define HWCONF_TERMINATE_ON	0x01
104#define HWCONF_TERMINATE_OFF	0x00
105
106/* Janz ICAN3 CAN Event Indication Message Types */
107#define CEVTIND_EI		0x01
108#define CEVTIND_DOI		0x02
109#define CEVTIND_LOST		0x04
110#define CEVTIND_FULL		0x08
111#define CEVTIND_BEI		0x10
112
113#define CEVTIND_CHIP_SJA1000	0x02
114
115#define ICAN3_BUSERR_QUOTA_MAX	255
116
117/* Janz ICAN3 CAN Frame Conversion */
118#define ICAN3_SNGL	0x02
119#define ICAN3_ECHO	0x10
120#define ICAN3_EFF_RTR	0x40
121#define ICAN3_SFF_RTR	0x10
122#define ICAN3_EFF	0x80
123
124#define ICAN3_CAN_TYPE_MASK	0x0f
125#define ICAN3_CAN_TYPE_SFF	0x00
126#define ICAN3_CAN_TYPE_EFF	0x01
127
128#define ICAN3_CAN_DLC_MASK	0x0f
129
130/* Janz ICAN3 NMTS subtypes */
131#define NMTS_CREATE_NODE_REQ	0x0
132#define NMTS_SLAVE_STATE_IND	0x8
133#define NMTS_SLAVE_EVENT_IND	0x9
134
135/* Janz ICAN3 LMTS subtypes */
136#define LMTS_BUSON_REQ		0x0
137#define LMTS_BUSOFF_REQ		0x1
138#define LMTS_CAN_CONF_REQ	0x2
139
140/* Janz ICAN3 NMTS Event indications */
141#define NE_LOCAL_OCCURRED	0x3
142#define NE_LOCAL_RESOLVED	0x2
143#define NE_REMOTE_OCCURRED	0xc
144#define NE_REMOTE_RESOLVED	0x8
145
146/*
147 * SJA1000 Status and Error Register Definitions
148 *
149 * Copied from drivers/net/can/sja1000/sja1000.h
150 */
151
152/* status register content */
153#define SR_BS		0x80
154#define SR_ES		0x40
155#define SR_TS		0x20
156#define SR_RS		0x10
157#define SR_TCS		0x08
158#define SR_TBS		0x04
159#define SR_DOS		0x02
160#define SR_RBS		0x01
161
162#define SR_CRIT (SR_BS|SR_ES)
163
164/* ECC register */
165#define ECC_SEG		0x1F
166#define ECC_DIR		0x20
167#define ECC_ERR		6
168#define ECC_BIT		0x00
169#define ECC_FORM	0x40
170#define ECC_STUFF	0x80
171#define ECC_MASK	0xc0
172
173/* Number of buffers for use in the "new-style" host interface */
174#define ICAN3_NEW_BUFFERS	16
175
176/* Number of buffers for use in the "fast" host interface */
177#define ICAN3_TX_BUFFERS	512
178#define ICAN3_RX_BUFFERS	1024
179
180/* SJA1000 Clock Input */
181#define ICAN3_CAN_CLOCK		8000000
182
183/* Janz ICAN3 firmware types */
184enum ican3_fwtype {
185	ICAN3_FWTYPE_ICANOS,
186	ICAN3_FWTYPE_CAL_CANOPEN,
187};
188
189/* Driver Name */
190#define DRV_NAME "janz-ican3"
191
192/* DPM Control Registers -- starts at offset 0x100 in the MODULbus registers */
193struct ican3_dpm_control {
194	/* window address register */
195	u8 window_address;
196	u8 unused1;
197
198	/*
199	 * Read access: clear interrupt from microcontroller
200	 * Write access: send interrupt to microcontroller
201	 */
202	u8 interrupt;
203	u8 unused2;
204
205	/* write-only: reset all hardware on the module */
206	u8 hwreset;
207	u8 unused3;
208
209	/* write-only: generate an interrupt to the TPU */
210	u8 tpuinterrupt;
211};
212
213struct ican3_dev {
214
215	/* must be the first member */
216	struct can_priv can;
217
218	/* CAN network device */
219	struct net_device *ndev;
220	struct napi_struct napi;
221
222	/* module number */
223	unsigned int num;
224
225	/* base address of registers and IRQ */
226	struct janz_cmodio_onboard_regs __iomem *ctrl;
227	struct ican3_dpm_control __iomem *dpmctrl;
228	void __iomem *dpm;
229	int irq;
230
231	/* CAN bus termination status */
232	struct completion termination_comp;
233	bool termination_enabled;
234
235	/* CAN bus error status registers */
236	struct completion buserror_comp;
237	struct can_berr_counter bec;
238
239	/* firmware type */
240	enum ican3_fwtype fwtype;
241	char fwinfo[32];
242
243	/* old and new style host interface */
244	unsigned int iftype;
245
246	/* queue for echo packets */
247	struct sk_buff_head echoq;
248
249	/*
250	 * Any function which changes the current DPM page must hold this
251	 * lock while it is performing data accesses. This ensures that the
252	 * function will not be preempted and end up reading data from a
253	 * different DPM page than it expects.
254	 */
255	spinlock_t lock;
256
257	/* new host interface */
258	unsigned int rx_int;
259	unsigned int rx_num;
260	unsigned int tx_num;
261
262	/* fast host interface */
263	unsigned int fastrx_start;
264	unsigned int fastrx_num;
265	unsigned int fasttx_start;
266	unsigned int fasttx_num;
267
268	/* first free DPM page */
269	unsigned int free_page;
270};
271
272struct ican3_msg {
273	u8 control;
274	u8 spec;
275	__le16 len;
276	u8 data[252];
277};
278
279struct ican3_new_desc {
280	u8 control;
281	u8 pointer;
282};
283
284struct ican3_fast_desc {
285	u8 control;
286	u8 command;
287	u8 data[14];
288};
289
290/* write to the window basic address register */
291static inline void ican3_set_page(struct ican3_dev *mod, unsigned int page)
292{
293	BUG_ON(page >= DPM_NUM_PAGES);
294	iowrite8(page, &mod->dpmctrl->window_address);
295}
296
297/*
298 * ICAN3 "old-style" host interface
299 */
300
301/*
302 * Receive a message from the ICAN3 "old-style" firmware interface
303 *
304 * LOCKING: must hold mod->lock
305 *
306 * returns 0 on success, -ENOMEM when no message exists
307 */
308static int ican3_old_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
309{
310	unsigned int mbox, mbox_page;
311	u8 locl, peer, xord;
312
313	/* get the MSYNC registers */
314	ican3_set_page(mod, QUEUE_OLD_CONTROL);
315	peer = ioread8(mod->dpm + MSYNC_PEER);
316	locl = ioread8(mod->dpm + MSYNC_LOCL);
317	xord = locl ^ peer;
318
319	if ((xord & MSYNC_RB_MASK) == 0x00) {
320		netdev_dbg(mod->ndev, "no mbox for reading\n");
321		return -ENOMEM;
322	}
323
324	/* find the first free mbox to read */
325	if ((xord & MSYNC_RB_MASK) == MSYNC_RB_MASK)
326		mbox = (xord & MSYNC_RBLW) ? MSYNC_RB0 : MSYNC_RB1;
327	else
328		mbox = (xord & MSYNC_RB0) ? MSYNC_RB0 : MSYNC_RB1;
329
330	/* copy the message */
331	mbox_page = (mbox == MSYNC_RB0) ? QUEUE_OLD_RB0 : QUEUE_OLD_RB1;
332	ican3_set_page(mod, mbox_page);
333	memcpy_fromio(msg, mod->dpm, sizeof(*msg));
334
335	/*
336	 * notify the firmware that the read buffer is available
337	 * for it to fill again
338	 */
339	locl ^= mbox;
340
341	ican3_set_page(mod, QUEUE_OLD_CONTROL);
342	iowrite8(locl, mod->dpm + MSYNC_LOCL);
343	return 0;
344}
345
346/*
347 * Send a message through the "old-style" firmware interface
348 *
349 * LOCKING: must hold mod->lock
350 *
351 * returns 0 on success, -ENOMEM when no free space exists
352 */
353static int ican3_old_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
354{
355	unsigned int mbox, mbox_page;
356	u8 locl, peer, xord;
357
358	/* get the MSYNC registers */
359	ican3_set_page(mod, QUEUE_OLD_CONTROL);
360	peer = ioread8(mod->dpm + MSYNC_PEER);
361	locl = ioread8(mod->dpm + MSYNC_LOCL);
362	xord = locl ^ peer;
363
364	if ((xord & MSYNC_WB_MASK) == MSYNC_WB_MASK) {
365		netdev_err(mod->ndev, "no mbox for writing\n");
366		return -ENOMEM;
367	}
368
369	/* calculate a free mbox to use */
370	mbox = (xord & MSYNC_WB0) ? MSYNC_WB1 : MSYNC_WB0;
371
372	/* copy the message to the DPM */
373	mbox_page = (mbox == MSYNC_WB0) ? QUEUE_OLD_WB0 : QUEUE_OLD_WB1;
374	ican3_set_page(mod, mbox_page);
375	memcpy_toio(mod->dpm, msg, sizeof(*msg));
376
377	locl ^= mbox;
378	if (mbox == MSYNC_WB1)
379		locl |= MSYNC_WBLW;
380
381	ican3_set_page(mod, QUEUE_OLD_CONTROL);
382	iowrite8(locl, mod->dpm + MSYNC_LOCL);
383	return 0;
384}
385
386/*
387 * ICAN3 "new-style" Host Interface Setup
388 */
389
390static void ican3_init_new_host_interface(struct ican3_dev *mod)
391{
392	struct ican3_new_desc desc;
393	unsigned long flags;
394	void __iomem *dst;
395	int i;
396
397	spin_lock_irqsave(&mod->lock, flags);
398
399	/* setup the internal datastructures for RX */
400	mod->rx_num = 0;
401	mod->rx_int = 0;
402
403	/* tohost queue descriptors are in page 5 */
404	ican3_set_page(mod, QUEUE_TOHOST);
405	dst = mod->dpm;
406
407	/* initialize the tohost (rx) queue descriptors: pages 9-24 */
408	for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
409		desc.control = DESC_INTERRUPT | DESC_LEN(1); /* I L=1 */
410		desc.pointer = mod->free_page;
411
412		/* set wrap flag on last buffer */
413		if (i == ICAN3_NEW_BUFFERS - 1)
414			desc.control |= DESC_WRAP;
415
416		memcpy_toio(dst, &desc, sizeof(desc));
417		dst += sizeof(desc);
418		mod->free_page++;
419	}
420
421	/* fromhost (tx) mid queue descriptors are in page 6 */
422	ican3_set_page(mod, QUEUE_FROMHOST_MID);
423	dst = mod->dpm;
424
425	/* setup the internal datastructures for TX */
426	mod->tx_num = 0;
427
428	/* initialize the fromhost mid queue descriptors: pages 25-40 */
429	for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
430		desc.control = DESC_VALID | DESC_LEN(1); /* V L=1 */
431		desc.pointer = mod->free_page;
432
433		/* set wrap flag on last buffer */
434		if (i == ICAN3_NEW_BUFFERS - 1)
435			desc.control |= DESC_WRAP;
436
437		memcpy_toio(dst, &desc, sizeof(desc));
438		dst += sizeof(desc);
439		mod->free_page++;
440	}
441
442	/* fromhost hi queue descriptors are in page 7 */
443	ican3_set_page(mod, QUEUE_FROMHOST_HIGH);
444	dst = mod->dpm;
445
446	/* initialize only a single buffer in the fromhost hi queue (unused) */
447	desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
448	desc.pointer = mod->free_page;
449	memcpy_toio(dst, &desc, sizeof(desc));
450	mod->free_page++;
451
452	/* fromhost low queue descriptors are in page 8 */
453	ican3_set_page(mod, QUEUE_FROMHOST_LOW);
454	dst = mod->dpm;
455
456	/* initialize only a single buffer in the fromhost low queue (unused) */
457	desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
458	desc.pointer = mod->free_page;
459	memcpy_toio(dst, &desc, sizeof(desc));
460	mod->free_page++;
461
462	spin_unlock_irqrestore(&mod->lock, flags);
463}
464
465/*
466 * ICAN3 Fast Host Interface Setup
467 */
468
469static void ican3_init_fast_host_interface(struct ican3_dev *mod)
470{
471	struct ican3_fast_desc desc;
472	unsigned long flags;
473	unsigned int addr;
474	void __iomem *dst;
475	int i;
476
477	spin_lock_irqsave(&mod->lock, flags);
478
479	/* save the start recv page */
480	mod->fastrx_start = mod->free_page;
481	mod->fastrx_num = 0;
482
483	/* build a single fast tohost queue descriptor */
484	memset(&desc, 0, sizeof(desc));
485	desc.control = 0x00;
486	desc.command = 1;
487
488	/* build the tohost queue descriptor ring in memory */
489	addr = 0;
490	for (i = 0; i < ICAN3_RX_BUFFERS; i++) {
491
492		/* set the wrap bit on the last buffer */
493		if (i == ICAN3_RX_BUFFERS - 1)
494			desc.control |= DESC_WRAP;
495
496		/* switch to the correct page */
497		ican3_set_page(mod, mod->free_page);
498
499		/* copy the descriptor to the DPM */
500		dst = mod->dpm + addr;
501		memcpy_toio(dst, &desc, sizeof(desc));
502		addr += sizeof(desc);
503
504		/* move to the next page if necessary */
505		if (addr >= DPM_PAGE_SIZE) {
506			addr = 0;
507			mod->free_page++;
508		}
509	}
510
511	/* make sure we page-align the next queue */
512	if (addr != 0)
513		mod->free_page++;
514
515	/* save the start xmit page */
516	mod->fasttx_start = mod->free_page;
517	mod->fasttx_num = 0;
518
519	/* build a single fast fromhost queue descriptor */
520	memset(&desc, 0, sizeof(desc));
521	desc.control = DESC_VALID;
522	desc.command = 1;
523
524	/* build the fromhost queue descriptor ring in memory */
525	addr = 0;
526	for (i = 0; i < ICAN3_TX_BUFFERS; i++) {
527
528		/* set the wrap bit on the last buffer */
529		if (i == ICAN3_TX_BUFFERS - 1)
530			desc.control |= DESC_WRAP;
531
532		/* switch to the correct page */
533		ican3_set_page(mod, mod->free_page);
534
535		/* copy the descriptor to the DPM */
536		dst = mod->dpm + addr;
537		memcpy_toio(dst, &desc, sizeof(desc));
538		addr += sizeof(desc);
539
540		/* move to the next page if necessary */
541		if (addr >= DPM_PAGE_SIZE) {
542			addr = 0;
543			mod->free_page++;
544		}
545	}
546
547	spin_unlock_irqrestore(&mod->lock, flags);
548}
549
550/*
551 * ICAN3 "new-style" Host Interface Message Helpers
552 */
553
554/*
555 * LOCKING: must hold mod->lock
556 */
557static int ican3_new_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
558{
559	struct ican3_new_desc desc;
560	void __iomem *desc_addr = mod->dpm + (mod->tx_num * sizeof(desc));
561
562	/* switch to the fromhost mid queue, and read the buffer descriptor */
563	ican3_set_page(mod, QUEUE_FROMHOST_MID);
564	memcpy_fromio(&desc, desc_addr, sizeof(desc));
565
566	if (!(desc.control & DESC_VALID)) {
567		netdev_dbg(mod->ndev, "%s: no free buffers\n", __func__);
568		return -ENOMEM;
569	}
570
571	/* switch to the data page, copy the data */
572	ican3_set_page(mod, desc.pointer);
573	memcpy_toio(mod->dpm, msg, sizeof(*msg));
574
575	/* switch back to the descriptor, set the valid bit, write it back */
576	ican3_set_page(mod, QUEUE_FROMHOST_MID);
577	desc.control ^= DESC_VALID;
578	memcpy_toio(desc_addr, &desc, sizeof(desc));
579
580	/* update the tx number */
581	mod->tx_num = (desc.control & DESC_WRAP) ? 0 : (mod->tx_num + 1);
582	return 0;
583}
584
585/*
586 * LOCKING: must hold mod->lock
587 */
588static int ican3_new_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
589{
590	struct ican3_new_desc desc;
591	void __iomem *desc_addr = mod->dpm + (mod->rx_num * sizeof(desc));
592
593	/* switch to the tohost queue, and read the buffer descriptor */
594	ican3_set_page(mod, QUEUE_TOHOST);
595	memcpy_fromio(&desc, desc_addr, sizeof(desc));
596
597	if (!(desc.control & DESC_VALID)) {
598		netdev_dbg(mod->ndev, "%s: no buffers to recv\n", __func__);
599		return -ENOMEM;
600	}
601
602	/* switch to the data page, copy the data */
603	ican3_set_page(mod, desc.pointer);
604	memcpy_fromio(msg, mod->dpm, sizeof(*msg));
605
606	/* switch back to the descriptor, toggle the valid bit, write it back */
607	ican3_set_page(mod, QUEUE_TOHOST);
608	desc.control ^= DESC_VALID;
609	memcpy_toio(desc_addr, &desc, sizeof(desc));
610
611	/* update the rx number */
612	mod->rx_num = (desc.control & DESC_WRAP) ? 0 : (mod->rx_num + 1);
613	return 0;
614}
615
616/*
617 * Message Send / Recv Helpers
618 */
619
620static int ican3_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
621{
622	unsigned long flags;
623	int ret;
624
625	spin_lock_irqsave(&mod->lock, flags);
626
627	if (mod->iftype == 0)
628		ret = ican3_old_send_msg(mod, msg);
629	else
630		ret = ican3_new_send_msg(mod, msg);
631
632	spin_unlock_irqrestore(&mod->lock, flags);
633	return ret;
634}
635
636static int ican3_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
637{
638	unsigned long flags;
639	int ret;
640
641	spin_lock_irqsave(&mod->lock, flags);
642
643	if (mod->iftype == 0)
644		ret = ican3_old_recv_msg(mod, msg);
645	else
646		ret = ican3_new_recv_msg(mod, msg);
647
648	spin_unlock_irqrestore(&mod->lock, flags);
649	return ret;
650}
651
652/*
653 * Quick Pre-constructed Messages
654 */
655
656static int ican3_msg_connect(struct ican3_dev *mod)
657{
658	struct ican3_msg msg;
659
660	memset(&msg, 0, sizeof(msg));
661	msg.spec = MSG_CONNECTI;
662	msg.len = cpu_to_le16(0);
663
664	return ican3_send_msg(mod, &msg);
665}
666
667static int ican3_msg_disconnect(struct ican3_dev *mod)
668{
669	struct ican3_msg msg;
670
671	memset(&msg, 0, sizeof(msg));
672	msg.spec = MSG_DISCONNECT;
673	msg.len = cpu_to_le16(0);
674
675	return ican3_send_msg(mod, &msg);
676}
677
678static int ican3_msg_newhostif(struct ican3_dev *mod)
679{
680	struct ican3_msg msg;
681	int ret;
682
683	memset(&msg, 0, sizeof(msg));
684	msg.spec = MSG_NEWHOSTIF;
685	msg.len = cpu_to_le16(0);
686
687	/* If we're not using the old interface, switching seems bogus */
688	WARN_ON(mod->iftype != 0);
689
690	ret = ican3_send_msg(mod, &msg);
691	if (ret)
692		return ret;
693
694	/* mark the module as using the new host interface */
695	mod->iftype = 1;
696	return 0;
697}
698
699static int ican3_msg_fasthostif(struct ican3_dev *mod)
700{
701	struct ican3_msg msg;
702	unsigned int addr;
703
704	memset(&msg, 0, sizeof(msg));
705	msg.spec = MSG_INITFDPMQUEUE;
706	msg.len = cpu_to_le16(8);
707
708	/* write the tohost queue start address */
709	addr = DPM_PAGE_ADDR(mod->fastrx_start);
710	msg.data[0] = addr & 0xff;
711	msg.data[1] = (addr >> 8) & 0xff;
712	msg.data[2] = (addr >> 16) & 0xff;
713	msg.data[3] = (addr >> 24) & 0xff;
714
715	/* write the fromhost queue start address */
716	addr = DPM_PAGE_ADDR(mod->fasttx_start);
717	msg.data[4] = addr & 0xff;
718	msg.data[5] = (addr >> 8) & 0xff;
719	msg.data[6] = (addr >> 16) & 0xff;
720	msg.data[7] = (addr >> 24) & 0xff;
721
722	/* If we're not using the new interface yet, we cannot do this */
723	WARN_ON(mod->iftype != 1);
724
725	return ican3_send_msg(mod, &msg);
726}
727
728/*
729 * Setup the CAN filter to either accept or reject all
730 * messages from the CAN bus.
731 */
732static int ican3_set_id_filter(struct ican3_dev *mod, bool accept)
733{
734	struct ican3_msg msg;
735	int ret;
736
737	/* Standard Frame Format */
738	memset(&msg, 0, sizeof(msg));
739	msg.spec = MSG_SETAFILMASK;
740	msg.len = cpu_to_le16(5);
741	msg.data[0] = 0x00; /* IDLo LSB */
742	msg.data[1] = 0x00; /* IDLo MSB */
743	msg.data[2] = 0xff; /* IDHi LSB */
744	msg.data[3] = 0x07; /* IDHi MSB */
745
746	/* accept all frames for fast host if, or reject all frames */
747	msg.data[4] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
748
749	ret = ican3_send_msg(mod, &msg);
750	if (ret)
751		return ret;
752
753	/* Extended Frame Format */
754	memset(&msg, 0, sizeof(msg));
755	msg.spec = MSG_SETAFILMASK;
756	msg.len = cpu_to_le16(13);
757	msg.data[0] = 0;    /* MUX = 0 */
758	msg.data[1] = 0x00; /* IDLo LSB */
759	msg.data[2] = 0x00;
760	msg.data[3] = 0x00;
761	msg.data[4] = 0x20; /* IDLo MSB */
762	msg.data[5] = 0xff; /* IDHi LSB */
763	msg.data[6] = 0xff;
764	msg.data[7] = 0xff;
765	msg.data[8] = 0x3f; /* IDHi MSB */
766
767	/* accept all frames for fast host if, or reject all frames */
768	msg.data[9] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
769
770	return ican3_send_msg(mod, &msg);
771}
772
773/*
774 * Bring the CAN bus online or offline
775 */
776static int ican3_set_bus_state(struct ican3_dev *mod, bool on)
777{
778	struct can_bittiming *bt = &mod->can.bittiming;
779	struct ican3_msg msg;
780	u8 btr0, btr1;
781	int res;
782
783	/* This algorithm was stolen from drivers/net/can/sja1000/sja1000.c      */
784	/* The bittiming register command for the ICAN3 just sets the bit timing */
785	/* registers on the SJA1000 chip directly                                */
786	btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6);
787	btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) |
788		(((bt->phase_seg2 - 1) & 0x7) << 4);
789	if (mod->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
790		btr1 |= 0x80;
791
792	if (mod->fwtype == ICAN3_FWTYPE_ICANOS) {
793		if (on) {
794			/* set bittiming */
795			memset(&msg, 0, sizeof(msg));
796			msg.spec = MSG_CBTRREQ;
797			msg.len = cpu_to_le16(4);
798			msg.data[0] = 0x00;
799			msg.data[1] = 0x00;
800			msg.data[2] = btr0;
801			msg.data[3] = btr1;
802
803			res = ican3_send_msg(mod, &msg);
804			if (res)
805				return res;
806		}
807
808		/* can-on/off request */
809		memset(&msg, 0, sizeof(msg));
810		msg.spec = on ? MSG_CONREQ : MSG_COFFREQ;
811		msg.len = cpu_to_le16(0);
812
813		return ican3_send_msg(mod, &msg);
814
815	} else if (mod->fwtype == ICAN3_FWTYPE_CAL_CANOPEN) {
816		/* bittiming + can-on/off request */
817		memset(&msg, 0, sizeof(msg));
818		msg.spec = MSG_LMTS;
819		if (on) {
820			msg.len = cpu_to_le16(4);
821			msg.data[0] = LMTS_BUSON_REQ;
822			msg.data[1] = 0;
823			msg.data[2] = btr0;
824			msg.data[3] = btr1;
825		} else {
826			msg.len = cpu_to_le16(2);
827			msg.data[0] = LMTS_BUSOFF_REQ;
828			msg.data[1] = 0;
829		}
830		res = ican3_send_msg(mod, &msg);
831		if (res)
832			return res;
833
834		if (on) {
835			/* create NMT Slave Node for error processing
836			 *   class 2 (with error capability, see CiA/DS203-1)
837			 *   id    1
838			 *   name  locnod1 (must be exactly 7 bytes)
839			 */
840			memset(&msg, 0, sizeof(msg));
841			msg.spec = MSG_NMTS;
842			msg.len = cpu_to_le16(11);
843			msg.data[0] = NMTS_CREATE_NODE_REQ;
844			msg.data[1] = 0;
845			msg.data[2] = 2;                 /* node class */
846			msg.data[3] = 1;                 /* node id */
847			strcpy(msg.data + 4, "locnod1"); /* node name  */
848			return ican3_send_msg(mod, &msg);
849		}
850		return 0;
851	}
852	return -ENOTSUPP;
853}
854
855static int ican3_set_termination(struct ican3_dev *mod, bool on)
856{
857	struct ican3_msg msg;
858
859	memset(&msg, 0, sizeof(msg));
860	msg.spec = MSG_HWCONF;
861	msg.len = cpu_to_le16(2);
862	msg.data[0] = 0x00;
863	msg.data[1] = on ? HWCONF_TERMINATE_ON : HWCONF_TERMINATE_OFF;
864
865	return ican3_send_msg(mod, &msg);
866}
867
868static int ican3_send_inquiry(struct ican3_dev *mod, u8 subspec)
869{
870	struct ican3_msg msg;
871
872	memset(&msg, 0, sizeof(msg));
873	msg.spec = MSG_INQUIRY;
874	msg.len = cpu_to_le16(2);
875	msg.data[0] = subspec;
876	msg.data[1] = 0x00;
877
878	return ican3_send_msg(mod, &msg);
879}
880
881static int ican3_set_buserror(struct ican3_dev *mod, u8 quota)
882{
883	struct ican3_msg msg;
884
885	if (mod->fwtype == ICAN3_FWTYPE_ICANOS) {
886		memset(&msg, 0, sizeof(msg));
887		msg.spec = MSG_CCONFREQ;
888		msg.len = cpu_to_le16(2);
889		msg.data[0] = 0x00;
890		msg.data[1] = quota;
891	} else if (mod->fwtype == ICAN3_FWTYPE_CAL_CANOPEN) {
892		memset(&msg, 0, sizeof(msg));
893		msg.spec = MSG_LMTS;
894		msg.len = cpu_to_le16(4);
895		msg.data[0] = LMTS_CAN_CONF_REQ;
896		msg.data[1] = 0x00;
897		msg.data[2] = 0x00;
898		msg.data[3] = quota;
899	} else {
900		return -ENOTSUPP;
901	}
902	return ican3_send_msg(mod, &msg);
903}
904
905/*
906 * ICAN3 to Linux CAN Frame Conversion
907 */
908
909static void ican3_to_can_frame(struct ican3_dev *mod,
910			       struct ican3_fast_desc *desc,
911			       struct can_frame *cf)
912{
913	if ((desc->command & ICAN3_CAN_TYPE_MASK) == ICAN3_CAN_TYPE_SFF) {
914		if (desc->data[1] & ICAN3_SFF_RTR)
915			cf->can_id |= CAN_RTR_FLAG;
916
917		cf->can_id |= desc->data[0] << 3;
918		cf->can_id |= (desc->data[1] & 0xe0) >> 5;
919		cf->can_dlc = get_can_dlc(desc->data[1] & ICAN3_CAN_DLC_MASK);
920		memcpy(cf->data, &desc->data[2], cf->can_dlc);
921	} else {
922		cf->can_dlc = get_can_dlc(desc->data[0] & ICAN3_CAN_DLC_MASK);
923		if (desc->data[0] & ICAN3_EFF_RTR)
924			cf->can_id |= CAN_RTR_FLAG;
925
926		if (desc->data[0] & ICAN3_EFF) {
927			cf->can_id |= CAN_EFF_FLAG;
928			cf->can_id |= desc->data[2] << 21; /* 28-21 */
929			cf->can_id |= desc->data[3] << 13; /* 20-13 */
930			cf->can_id |= desc->data[4] << 5;  /* 12-5  */
931			cf->can_id |= (desc->data[5] & 0xf8) >> 3;
932		} else {
933			cf->can_id |= desc->data[2] << 3;  /* 10-3  */
934			cf->can_id |= desc->data[3] >> 5;  /* 2-0   */
935		}
936
937		memcpy(cf->data, &desc->data[6], cf->can_dlc);
938	}
939}
940
941static void can_frame_to_ican3(struct ican3_dev *mod,
942			       struct can_frame *cf,
943			       struct ican3_fast_desc *desc)
944{
945	/* clear out any stale data in the descriptor */
946	memset(desc->data, 0, sizeof(desc->data));
947
948	/* we always use the extended format, with the ECHO flag set */
949	desc->command = ICAN3_CAN_TYPE_EFF;
950	desc->data[0] |= cf->can_dlc;
951	desc->data[1] |= ICAN3_ECHO;
952
953	/* support single transmission (no retries) mode */
954	if (mod->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT)
955		desc->data[1] |= ICAN3_SNGL;
956
957	if (cf->can_id & CAN_RTR_FLAG)
958		desc->data[0] |= ICAN3_EFF_RTR;
959
960	/* pack the id into the correct places */
961	if (cf->can_id & CAN_EFF_FLAG) {
962		desc->data[0] |= ICAN3_EFF;
963		desc->data[2] = (cf->can_id & 0x1fe00000) >> 21; /* 28-21 */
964		desc->data[3] = (cf->can_id & 0x001fe000) >> 13; /* 20-13 */
965		desc->data[4] = (cf->can_id & 0x00001fe0) >> 5;  /* 12-5  */
966		desc->data[5] = (cf->can_id & 0x0000001f) << 3;  /* 4-0   */
967	} else {
968		desc->data[2] = (cf->can_id & 0x7F8) >> 3; /* bits 10-3 */
969		desc->data[3] = (cf->can_id & 0x007) << 5; /* bits 2-0  */
970	}
971
972	/* copy the data bits into the descriptor */
973	memcpy(&desc->data[6], cf->data, cf->can_dlc);
974}
975
976/*
977 * Interrupt Handling
978 */
979
980/*
981 * Handle an ID + Version message response from the firmware. We never generate
982 * this message in production code, but it is very useful when debugging to be
983 * able to display this message.
984 */
985static void ican3_handle_idvers(struct ican3_dev *mod, struct ican3_msg *msg)
986{
987	netdev_dbg(mod->ndev, "IDVERS response: %s\n", msg->data);
988}
989
990static void ican3_handle_msglost(struct ican3_dev *mod, struct ican3_msg *msg)
991{
992	struct net_device *dev = mod->ndev;
993	struct net_device_stats *stats = &dev->stats;
994	struct can_frame *cf;
995	struct sk_buff *skb;
996
997	/*
998	 * Report that communication messages with the microcontroller firmware
999	 * are being lost. These are never CAN frames, so we do not generate an
1000	 * error frame for userspace
1001	 */
1002	if (msg->spec == MSG_MSGLOST) {
1003		netdev_err(mod->ndev, "lost %d control messages\n", msg->data[0]);
1004		return;
1005	}
1006
1007	/*
1008	 * Oops, this indicates that we have lost messages in the fast queue,
1009	 * which are exclusively CAN messages. Our driver isn't reading CAN
1010	 * frames fast enough.
1011	 *
1012	 * We'll pretend that the SJA1000 told us that it ran out of buffer
1013	 * space, because there is not a better message for this.
1014	 */
1015	skb = alloc_can_err_skb(dev, &cf);
1016	if (skb) {
1017		cf->can_id |= CAN_ERR_CRTL;
1018		cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
1019		stats->rx_over_errors++;
1020		stats->rx_errors++;
1021		netif_rx(skb);
1022	}
1023}
1024
1025/*
1026 * Handle CAN Event Indication Messages from the firmware
1027 *
1028 * The ICAN3 firmware provides the values of some SJA1000 registers when it
1029 * generates this message. The code below is largely copied from the
1030 * drivers/net/can/sja1000/sja1000.c file, and adapted as necessary
1031 */
1032static int ican3_handle_cevtind(struct ican3_dev *mod, struct ican3_msg *msg)
1033{
1034	struct net_device *dev = mod->ndev;
1035	struct net_device_stats *stats = &dev->stats;
1036	enum can_state state = mod->can.state;
1037	u8 isrc, ecc, status, rxerr, txerr;
1038	struct can_frame *cf;
1039	struct sk_buff *skb;
1040
1041	/* we can only handle the SJA1000 part */
1042	if (msg->data[1] != CEVTIND_CHIP_SJA1000) {
1043		netdev_err(mod->ndev, "unable to handle errors on non-SJA1000\n");
1044		return -ENODEV;
1045	}
1046
1047	/* check the message length for sanity */
1048	if (le16_to_cpu(msg->len) < 6) {
1049		netdev_err(mod->ndev, "error message too short\n");
1050		return -EINVAL;
1051	}
1052
1053	isrc = msg->data[0];
1054	ecc = msg->data[2];
1055	status = msg->data[3];
1056	rxerr = msg->data[4];
1057	txerr = msg->data[5];
1058
1059	/*
1060	 * This hardware lacks any support other than bus error messages to
1061	 * determine if packet transmission has failed.
1062	 *
1063	 * When TX errors happen, one echo skb needs to be dropped from the
1064	 * front of the queue.
1065	 *
1066	 * A small bit of code is duplicated here and below, to avoid error
1067	 * skb allocation when it will just be freed immediately.
1068	 */
1069	if (isrc == CEVTIND_BEI) {
1070		int ret;
1071		netdev_dbg(mod->ndev, "bus error interrupt\n");
1072
1073		/* TX error */
1074		if (!(ecc & ECC_DIR)) {
1075			kfree_skb(skb_dequeue(&mod->echoq));
1076			stats->tx_errors++;
1077		} else {
1078			stats->rx_errors++;
1079		}
1080
1081		/*
1082		 * The controller automatically disables bus-error interrupts
1083		 * and therefore we must re-enable them.
1084		 */
1085		ret = ican3_set_buserror(mod, 1);
1086		if (ret) {
1087			netdev_err(mod->ndev, "unable to re-enable bus-error\n");
1088			return ret;
1089		}
1090
1091		/* bus error reporting is off, return immediately */
1092		if (!(mod->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING))
1093			return 0;
1094	}
1095
1096	skb = alloc_can_err_skb(dev, &cf);
1097	if (skb == NULL)
1098		return -ENOMEM;
1099
1100	/* data overrun interrupt */
1101	if (isrc == CEVTIND_DOI || isrc == CEVTIND_LOST) {
1102		netdev_dbg(mod->ndev, "data overrun interrupt\n");
1103		cf->can_id |= CAN_ERR_CRTL;
1104		cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
1105		stats->rx_over_errors++;
1106		stats->rx_errors++;
1107	}
1108
1109	/* error warning + passive interrupt */
1110	if (isrc == CEVTIND_EI) {
1111		netdev_dbg(mod->ndev, "error warning + passive interrupt\n");
1112		if (status & SR_BS) {
1113			state = CAN_STATE_BUS_OFF;
1114			cf->can_id |= CAN_ERR_BUSOFF;
1115			mod->can.can_stats.bus_off++;
1116			can_bus_off(dev);
1117		} else if (status & SR_ES) {
1118			if (rxerr >= 128 || txerr >= 128)
1119				state = CAN_STATE_ERROR_PASSIVE;
1120			else
1121				state = CAN_STATE_ERROR_WARNING;
1122		} else {
1123			state = CAN_STATE_ERROR_ACTIVE;
1124		}
1125	}
1126
1127	/* bus error interrupt */
1128	if (isrc == CEVTIND_BEI) {
1129		mod->can.can_stats.bus_error++;
1130		cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
1131
1132		switch (ecc & ECC_MASK) {
1133		case ECC_BIT:
1134			cf->data[2] |= CAN_ERR_PROT_BIT;
1135			break;
1136		case ECC_FORM:
1137			cf->data[2] |= CAN_ERR_PROT_FORM;
1138			break;
1139		case ECC_STUFF:
1140			cf->data[2] |= CAN_ERR_PROT_STUFF;
1141			break;
1142		default:
1143			cf->data[3] = ecc & ECC_SEG;
1144			break;
1145		}
1146
1147		if (!(ecc & ECC_DIR))
1148			cf->data[2] |= CAN_ERR_PROT_TX;
1149
1150		cf->data[6] = txerr;
1151		cf->data[7] = rxerr;
1152	}
1153
1154	if (state != mod->can.state && (state == CAN_STATE_ERROR_WARNING ||
1155					state == CAN_STATE_ERROR_PASSIVE)) {
1156		cf->can_id |= CAN_ERR_CRTL;
1157		if (state == CAN_STATE_ERROR_WARNING) {
1158			mod->can.can_stats.error_warning++;
1159			cf->data[1] = (txerr > rxerr) ?
1160				CAN_ERR_CRTL_TX_WARNING :
1161				CAN_ERR_CRTL_RX_WARNING;
1162		} else {
1163			mod->can.can_stats.error_passive++;
1164			cf->data[1] = (txerr > rxerr) ?
1165				CAN_ERR_CRTL_TX_PASSIVE :
1166				CAN_ERR_CRTL_RX_PASSIVE;
1167		}
1168
1169		cf->data[6] = txerr;
1170		cf->data[7] = rxerr;
1171	}
1172
1173	mod->can.state = state;
1174	netif_rx(skb);
1175	return 0;
1176}
1177
1178static void ican3_handle_inquiry(struct ican3_dev *mod, struct ican3_msg *msg)
1179{
1180	switch (msg->data[0]) {
1181	case INQUIRY_STATUS:
1182	case INQUIRY_EXTENDED:
1183		mod->bec.rxerr = msg->data[5];
1184		mod->bec.txerr = msg->data[6];
1185		complete(&mod->buserror_comp);
1186		break;
1187	case INQUIRY_TERMINATION:
1188		mod->termination_enabled = msg->data[6] & HWCONF_TERMINATE_ON;
1189		complete(&mod->termination_comp);
1190		break;
1191	default:
1192		netdev_err(mod->ndev, "received an unknown inquiry response\n");
1193		break;
1194	}
1195}
1196
1197/* Handle NMTS Slave Event Indication Messages from the firmware */
1198static void ican3_handle_nmtsind(struct ican3_dev *mod, struct ican3_msg *msg)
1199{
1200	u16 subspec;
1201
1202	subspec = msg->data[0] + msg->data[1] * 0x100;
1203	if (subspec == NMTS_SLAVE_EVENT_IND) {
1204		switch (msg->data[2]) {
1205		case NE_LOCAL_OCCURRED:
1206		case NE_LOCAL_RESOLVED:
1207			/* now follows the same message as Raw ICANOS CEVTIND
1208			 * shift the data at the same place and call this method
1209			 */
1210			le16_add_cpu(&msg->len, -3);
1211			memmove(msg->data, msg->data + 3, le16_to_cpu(msg->len));
1212			ican3_handle_cevtind(mod, msg);
1213			break;
1214		case NE_REMOTE_OCCURRED:
1215		case NE_REMOTE_RESOLVED:
1216			/* should not occurre, ignore */
1217			break;
1218		default:
1219			netdev_warn(mod->ndev, "unknown NMTS event indication %x\n",
1220				    msg->data[2]);
1221			break;
1222		}
1223	} else if (subspec == NMTS_SLAVE_STATE_IND) {
1224		/* ignore state indications */
1225	} else {
1226		netdev_warn(mod->ndev, "unhandled NMTS indication %x\n",
1227			    subspec);
1228		return;
1229	}
1230}
1231
1232static void ican3_handle_unknown_message(struct ican3_dev *mod,
1233					struct ican3_msg *msg)
1234{
1235	netdev_warn(mod->ndev, "received unknown message: spec 0x%.2x length %d\n",
1236			   msg->spec, le16_to_cpu(msg->len));
1237}
1238
1239/*
1240 * Handle a control message from the firmware
1241 */
1242static void ican3_handle_message(struct ican3_dev *mod, struct ican3_msg *msg)
1243{
1244	netdev_dbg(mod->ndev, "%s: modno %d spec 0x%.2x len %d bytes\n", __func__,
1245			   mod->num, msg->spec, le16_to_cpu(msg->len));
1246
1247	switch (msg->spec) {
1248	case MSG_IDVERS:
1249		ican3_handle_idvers(mod, msg);
1250		break;
1251	case MSG_MSGLOST:
1252	case MSG_FMSGLOST:
1253		ican3_handle_msglost(mod, msg);
1254		break;
1255	case MSG_CEVTIND:
1256		ican3_handle_cevtind(mod, msg);
1257		break;
1258	case MSG_INQUIRY:
1259		ican3_handle_inquiry(mod, msg);
1260		break;
1261	case MSG_NMTS:
1262		ican3_handle_nmtsind(mod, msg);
1263		break;
1264	default:
1265		ican3_handle_unknown_message(mod, msg);
1266		break;
1267	}
1268}
1269
1270/*
1271 * The ican3 needs to store all echo skbs, and therefore cannot
1272 * use the generic infrastructure for this.
1273 */
1274static void ican3_put_echo_skb(struct ican3_dev *mod, struct sk_buff *skb)
1275{
1276	skb = can_create_echo_skb(skb);
1277	if (!skb)
1278		return;
1279
1280	/* save this skb for tx interrupt echo handling */
1281	skb_queue_tail(&mod->echoq, skb);
1282}
1283
1284static unsigned int ican3_get_echo_skb(struct ican3_dev *mod)
1285{
1286	struct sk_buff *skb = skb_dequeue(&mod->echoq);
1287	struct can_frame *cf;
1288	u8 dlc;
1289
1290	/* this should never trigger unless there is a driver bug */
1291	if (!skb) {
1292		netdev_err(mod->ndev, "BUG: echo skb not occupied\n");
1293		return 0;
1294	}
1295
1296	cf = (struct can_frame *)skb->data;
1297	dlc = cf->can_dlc;
1298
1299	/* check flag whether this packet has to be looped back */
1300	if (skb->pkt_type != PACKET_LOOPBACK) {
1301		kfree_skb(skb);
1302		return dlc;
1303	}
1304
1305	skb->protocol = htons(ETH_P_CAN);
1306	skb->pkt_type = PACKET_BROADCAST;
1307	skb->ip_summed = CHECKSUM_UNNECESSARY;
1308	skb->dev = mod->ndev;
1309	netif_receive_skb(skb);
1310	return dlc;
1311}
1312
1313/*
1314 * Compare an skb with an existing echo skb
1315 *
1316 * This function will be used on devices which have a hardware loopback.
1317 * On these devices, this function can be used to compare a received skb
1318 * with the saved echo skbs so that the hardware echo skb can be dropped.
1319 *
1320 * Returns true if the skb's are identical, false otherwise.
1321 */
1322static bool ican3_echo_skb_matches(struct ican3_dev *mod, struct sk_buff *skb)
1323{
1324	struct can_frame *cf = (struct can_frame *)skb->data;
1325	struct sk_buff *echo_skb = skb_peek(&mod->echoq);
1326	struct can_frame *echo_cf;
1327
1328	if (!echo_skb)
1329		return false;
1330
1331	echo_cf = (struct can_frame *)echo_skb->data;
1332	if (cf->can_id != echo_cf->can_id)
1333		return false;
1334
1335	if (cf->can_dlc != echo_cf->can_dlc)
1336		return false;
1337
1338	return memcmp(cf->data, echo_cf->data, cf->can_dlc) == 0;
1339}
1340
1341/*
1342 * Check that there is room in the TX ring to transmit another skb
1343 *
1344 * LOCKING: must hold mod->lock
1345 */
1346static bool ican3_txok(struct ican3_dev *mod)
1347{
1348	struct ican3_fast_desc __iomem *desc;
1349	u8 control;
1350
1351	/* check that we have echo queue space */
1352	if (skb_queue_len(&mod->echoq) >= ICAN3_TX_BUFFERS)
1353		return false;
1354
1355	/* copy the control bits of the descriptor */
1356	ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1357	desc = mod->dpm + ((mod->fasttx_num % 16) * sizeof(*desc));
1358	control = ioread8(&desc->control);
1359
1360	/* if the control bits are not valid, then we have no more space */
1361	if (!(control & DESC_VALID))
1362		return false;
1363
1364	return true;
1365}
1366
1367/*
1368 * Receive one CAN frame from the hardware
1369 *
1370 * CONTEXT: must be called from user context
1371 */
1372static int ican3_recv_skb(struct ican3_dev *mod)
1373{
1374	struct net_device *ndev = mod->ndev;
1375	struct net_device_stats *stats = &ndev->stats;
1376	struct ican3_fast_desc desc;
1377	void __iomem *desc_addr;
1378	struct can_frame *cf;
1379	struct sk_buff *skb;
1380	unsigned long flags;
1381
1382	spin_lock_irqsave(&mod->lock, flags);
1383
1384	/* copy the whole descriptor */
1385	ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1386	desc_addr = mod->dpm + ((mod->fastrx_num % 16) * sizeof(desc));
1387	memcpy_fromio(&desc, desc_addr, sizeof(desc));
1388
1389	spin_unlock_irqrestore(&mod->lock, flags);
1390
1391	/* check that we actually have a CAN frame */
1392	if (!(desc.control & DESC_VALID))
1393		return -ENOBUFS;
1394
1395	/* allocate an skb */
1396	skb = alloc_can_skb(ndev, &cf);
1397	if (unlikely(skb == NULL)) {
1398		stats->rx_dropped++;
1399		goto err_noalloc;
1400	}
1401
1402	/* convert the ICAN3 frame into Linux CAN format */
1403	ican3_to_can_frame(mod, &desc, cf);
1404
1405	/*
1406	 * If this is an ECHO frame received from the hardware loopback
1407	 * feature, use the skb saved in the ECHO stack instead. This allows
1408	 * the Linux CAN core to support CAN_RAW_RECV_OWN_MSGS correctly.
1409	 *
1410	 * Since this is a confirmation of a successfully transmitted packet
1411	 * sent from this host, update the transmit statistics.
1412	 *
1413	 * Also, the netdevice queue needs to be allowed to send packets again.
1414	 */
1415	if (ican3_echo_skb_matches(mod, skb)) {
1416		stats->tx_packets++;
1417		stats->tx_bytes += ican3_get_echo_skb(mod);
1418		kfree_skb(skb);
1419		goto err_noalloc;
1420	}
1421
1422	/* update statistics, receive the skb */
1423	stats->rx_packets++;
1424	stats->rx_bytes += cf->can_dlc;
1425	netif_receive_skb(skb);
1426
1427err_noalloc:
1428	/* toggle the valid bit and return the descriptor to the ring */
1429	desc.control ^= DESC_VALID;
1430
1431	spin_lock_irqsave(&mod->lock, flags);
1432
1433	ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1434	memcpy_toio(desc_addr, &desc, 1);
1435
1436	/* update the next buffer pointer */
1437	mod->fastrx_num = (desc.control & DESC_WRAP) ? 0
1438						     : (mod->fastrx_num + 1);
1439
1440	/* there are still more buffers to process */
1441	spin_unlock_irqrestore(&mod->lock, flags);
1442	return 0;
1443}
1444
1445static int ican3_napi(struct napi_struct *napi, int budget)
1446{
1447	struct ican3_dev *mod = container_of(napi, struct ican3_dev, napi);
1448	unsigned long flags;
1449	int received = 0;
1450	int ret;
1451
1452	/* process all communication messages */
1453	while (true) {
1454		struct ican3_msg msg;
1455		ret = ican3_recv_msg(mod, &msg);
1456		if (ret)
1457			break;
1458
1459		ican3_handle_message(mod, &msg);
1460	}
1461
1462	/* process all CAN frames from the fast interface */
1463	while (received < budget) {
1464		ret = ican3_recv_skb(mod);
1465		if (ret)
1466			break;
1467
1468		received++;
1469	}
1470
1471	/* We have processed all packets that the adapter had, but it
1472	 * was less than our budget, stop polling */
1473	if (received < budget)
1474		napi_complete_done(napi, received);
1475
1476	spin_lock_irqsave(&mod->lock, flags);
1477
1478	/* Wake up the transmit queue if necessary */
1479	if (netif_queue_stopped(mod->ndev) && ican3_txok(mod))
1480		netif_wake_queue(mod->ndev);
1481
1482	spin_unlock_irqrestore(&mod->lock, flags);
1483
1484	/* re-enable interrupt generation */
1485	iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1486	return received;
1487}
1488
1489static irqreturn_t ican3_irq(int irq, void *dev_id)
1490{
1491	struct ican3_dev *mod = dev_id;
1492	u8 stat;
1493
1494	/*
1495	 * The interrupt status register on this device reports interrupts
1496	 * as zeroes instead of using ones like most other devices
1497	 */
1498	stat = ioread8(&mod->ctrl->int_disable) & (1 << mod->num);
1499	if (stat == (1 << mod->num))
1500		return IRQ_NONE;
1501
1502	/* clear the MODULbus interrupt from the microcontroller */
1503	ioread8(&mod->dpmctrl->interrupt);
1504
1505	/* disable interrupt generation, schedule the NAPI poller */
1506	iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1507	napi_schedule(&mod->napi);
1508	return IRQ_HANDLED;
1509}
1510
1511/*
1512 * Firmware reset, startup, and shutdown
1513 */
1514
1515/*
1516 * Reset an ICAN module to its power-on state
1517 *
1518 * CONTEXT: no network device registered
1519 */
1520static int ican3_reset_module(struct ican3_dev *mod)
1521{
1522	unsigned long start;
1523	u8 runold, runnew;
1524
1525	/* disable interrupts so no more work is scheduled */
1526	iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1527
1528	/* the first unallocated page in the DPM is #9 */
1529	mod->free_page = DPM_FREE_START;
1530
1531	ican3_set_page(mod, QUEUE_OLD_CONTROL);
1532	runold = ioread8(mod->dpm + TARGET_RUNNING);
1533
1534	/* reset the module */
1535	iowrite8(0x00, &mod->dpmctrl->hwreset);
1536
1537	/* wait until the module has finished resetting and is running */
1538	start = jiffies;
1539	do {
1540		ican3_set_page(mod, QUEUE_OLD_CONTROL);
1541		runnew = ioread8(mod->dpm + TARGET_RUNNING);
1542		if (runnew == (runold ^ 0xff))
1543			return 0;
1544
1545		msleep(10);
1546	} while (time_before(jiffies, start + HZ / 2));
1547
1548	netdev_err(mod->ndev, "failed to reset CAN module\n");
1549	return -ETIMEDOUT;
1550}
1551
1552static void ican3_shutdown_module(struct ican3_dev *mod)
1553{
1554	ican3_msg_disconnect(mod);
1555	ican3_reset_module(mod);
1556}
1557
1558/*
1559 * Startup an ICAN module, bringing it into fast mode
1560 */
1561static int ican3_startup_module(struct ican3_dev *mod)
1562{
1563	int ret;
1564
1565	ret = ican3_reset_module(mod);
1566	if (ret) {
1567		netdev_err(mod->ndev, "unable to reset module\n");
1568		return ret;
1569	}
1570
1571	/* detect firmware */
1572	memcpy_fromio(mod->fwinfo, mod->dpm + FIRMWARE_STAMP, sizeof(mod->fwinfo) - 1);
1573	if (strncmp(mod->fwinfo, "JANZ-ICAN3", 10)) {
1574		netdev_err(mod->ndev, "ICAN3 not detected (found %s)\n", mod->fwinfo);
1575		return -ENODEV;
1576	}
1577	if (strstr(mod->fwinfo, "CAL/CANopen"))
1578		mod->fwtype = ICAN3_FWTYPE_CAL_CANOPEN;
1579	else
1580		mod->fwtype = ICAN3_FWTYPE_ICANOS;
1581
1582	/* re-enable interrupts so we can send messages */
1583	iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1584
1585	ret = ican3_msg_connect(mod);
1586	if (ret) {
1587		netdev_err(mod->ndev, "unable to connect to module\n");
1588		return ret;
1589	}
1590
1591	ican3_init_new_host_interface(mod);
1592	ret = ican3_msg_newhostif(mod);
1593	if (ret) {
1594		netdev_err(mod->ndev, "unable to switch to new-style interface\n");
1595		return ret;
1596	}
1597
1598	/* default to "termination on" */
1599	ret = ican3_set_termination(mod, true);
1600	if (ret) {
1601		netdev_err(mod->ndev, "unable to enable termination\n");
1602		return ret;
1603	}
1604
1605	/* default to "bus errors enabled" */
1606	ret = ican3_set_buserror(mod, 1);
1607	if (ret) {
1608		netdev_err(mod->ndev, "unable to set bus-error\n");
1609		return ret;
1610	}
1611
1612	ican3_init_fast_host_interface(mod);
1613	ret = ican3_msg_fasthostif(mod);
1614	if (ret) {
1615		netdev_err(mod->ndev, "unable to switch to fast host interface\n");
1616		return ret;
1617	}
1618
1619	ret = ican3_set_id_filter(mod, true);
1620	if (ret) {
1621		netdev_err(mod->ndev, "unable to set acceptance filter\n");
1622		return ret;
1623	}
1624
1625	return 0;
1626}
1627
1628/*
1629 * CAN Network Device
1630 */
1631
1632static int ican3_open(struct net_device *ndev)
1633{
1634	struct ican3_dev *mod = netdev_priv(ndev);
1635	int ret;
1636
1637	/* open the CAN layer */
1638	ret = open_candev(ndev);
1639	if (ret) {
1640		netdev_err(mod->ndev, "unable to start CAN layer\n");
1641		return ret;
1642	}
1643
1644	/* bring the bus online */
1645	ret = ican3_set_bus_state(mod, true);
1646	if (ret) {
1647		netdev_err(mod->ndev, "unable to set bus-on\n");
1648		close_candev(ndev);
1649		return ret;
1650	}
1651
1652	/* start up the network device */
1653	mod->can.state = CAN_STATE_ERROR_ACTIVE;
1654	netif_start_queue(ndev);
1655
1656	return 0;
1657}
1658
1659static int ican3_stop(struct net_device *ndev)
1660{
1661	struct ican3_dev *mod = netdev_priv(ndev);
1662	int ret;
1663
1664	/* stop the network device xmit routine */
1665	netif_stop_queue(ndev);
1666	mod->can.state = CAN_STATE_STOPPED;
1667
1668	/* bring the bus offline, stop receiving packets */
1669	ret = ican3_set_bus_state(mod, false);
1670	if (ret) {
1671		netdev_err(mod->ndev, "unable to set bus-off\n");
1672		return ret;
1673	}
1674
1675	/* drop all outstanding echo skbs */
1676	skb_queue_purge(&mod->echoq);
1677
1678	/* close the CAN layer */
1679	close_candev(ndev);
1680	return 0;
1681}
1682
1683static netdev_tx_t ican3_xmit(struct sk_buff *skb, struct net_device *ndev)
1684{
1685	struct ican3_dev *mod = netdev_priv(ndev);
1686	struct can_frame *cf = (struct can_frame *)skb->data;
1687	struct ican3_fast_desc desc;
1688	void __iomem *desc_addr;
1689	unsigned long flags;
1690
1691	if (can_dropped_invalid_skb(ndev, skb))
1692		return NETDEV_TX_OK;
1693
1694	spin_lock_irqsave(&mod->lock, flags);
1695
1696	/* check that we can actually transmit */
1697	if (!ican3_txok(mod)) {
1698		netdev_err(mod->ndev, "BUG: no free descriptors\n");
1699		spin_unlock_irqrestore(&mod->lock, flags);
1700		return NETDEV_TX_BUSY;
1701	}
1702
1703	/* copy the control bits of the descriptor */
1704	ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1705	desc_addr = mod->dpm + ((mod->fasttx_num % 16) * sizeof(desc));
1706	memset(&desc, 0, sizeof(desc));
1707	memcpy_fromio(&desc, desc_addr, 1);
1708
1709	/* convert the Linux CAN frame into ICAN3 format */
1710	can_frame_to_ican3(mod, cf, &desc);
1711
1712	/*
1713	 * This hardware doesn't have TX-done notifications, so we'll try and
1714	 * emulate it the best we can using ECHO skbs. Add the skb to the ECHO
1715	 * stack. Upon packet reception, check if the ECHO skb and received
1716	 * skb match, and use that to wake the queue.
1717	 */
1718	ican3_put_echo_skb(mod, skb);
1719
1720	/*
1721	 * the programming manual says that you must set the IVALID bit, then
1722	 * interrupt, then set the valid bit. Quite weird, but it seems to be
1723	 * required for this to work
1724	 */
1725	desc.control |= DESC_IVALID;
1726	memcpy_toio(desc_addr, &desc, sizeof(desc));
1727
1728	/* generate a MODULbus interrupt to the microcontroller */
1729	iowrite8(0x01, &mod->dpmctrl->interrupt);
1730
1731	desc.control ^= DESC_VALID;
1732	memcpy_toio(desc_addr, &desc, sizeof(desc));
1733
1734	/* update the next buffer pointer */
1735	mod->fasttx_num = (desc.control & DESC_WRAP) ? 0
1736						     : (mod->fasttx_num + 1);
1737
1738	/* if there is no free descriptor space, stop the transmit queue */
1739	if (!ican3_txok(mod))
1740		netif_stop_queue(ndev);
1741
1742	spin_unlock_irqrestore(&mod->lock, flags);
1743	return NETDEV_TX_OK;
1744}
1745
1746static const struct net_device_ops ican3_netdev_ops = {
1747	.ndo_open	= ican3_open,
1748	.ndo_stop	= ican3_stop,
1749	.ndo_start_xmit	= ican3_xmit,
1750	.ndo_change_mtu = can_change_mtu,
1751};
1752
1753/*
1754 * Low-level CAN Device
1755 */
1756
1757/* This structure was stolen from drivers/net/can/sja1000/sja1000.c */
1758static const struct can_bittiming_const ican3_bittiming_const = {
1759	.name = DRV_NAME,
1760	.tseg1_min = 1,
1761	.tseg1_max = 16,
1762	.tseg2_min = 1,
1763	.tseg2_max = 8,
1764	.sjw_max = 4,
1765	.brp_min = 1,
1766	.brp_max = 64,
1767	.brp_inc = 1,
1768};
1769
1770static int ican3_set_mode(struct net_device *ndev, enum can_mode mode)
1771{
1772	struct ican3_dev *mod = netdev_priv(ndev);
1773	int ret;
1774
1775	if (mode != CAN_MODE_START)
1776		return -ENOTSUPP;
1777
1778	/* bring the bus online */
1779	ret = ican3_set_bus_state(mod, true);
1780	if (ret) {
1781		netdev_err(ndev, "unable to set bus-on\n");
1782		return ret;
1783	}
1784
1785	/* start up the network device */
1786	mod->can.state = CAN_STATE_ERROR_ACTIVE;
1787
1788	if (netif_queue_stopped(ndev))
1789		netif_wake_queue(ndev);
1790
1791	return 0;
1792}
1793
1794static int ican3_get_berr_counter(const struct net_device *ndev,
1795				  struct can_berr_counter *bec)
1796{
1797	struct ican3_dev *mod = netdev_priv(ndev);
1798	int ret;
1799
1800	ret = ican3_send_inquiry(mod, INQUIRY_STATUS);
1801	if (ret)
1802		return ret;
1803
1804	if (!wait_for_completion_timeout(&mod->buserror_comp, HZ)) {
1805		netdev_info(mod->ndev, "%s timed out\n", __func__);
1806		return -ETIMEDOUT;
1807	}
1808
1809	bec->rxerr = mod->bec.rxerr;
1810	bec->txerr = mod->bec.txerr;
1811	return 0;
1812}
1813
1814/*
1815 * Sysfs Attributes
1816 */
1817
1818static ssize_t ican3_sysfs_show_term(struct device *dev,
1819				     struct device_attribute *attr,
1820				     char *buf)
1821{
1822	struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1823	int ret;
1824
1825	ret = ican3_send_inquiry(mod, INQUIRY_TERMINATION);
1826	if (ret)
1827		return ret;
1828
1829	if (!wait_for_completion_timeout(&mod->termination_comp, HZ)) {
1830		netdev_info(mod->ndev, "%s timed out\n", __func__);
1831		return -ETIMEDOUT;
1832	}
1833
1834	return snprintf(buf, PAGE_SIZE, "%u\n", mod->termination_enabled);
1835}
1836
1837static ssize_t ican3_sysfs_set_term(struct device *dev,
1838				    struct device_attribute *attr,
1839				    const char *buf, size_t count)
1840{
1841	struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1842	unsigned long enable;
1843	int ret;
1844
1845	if (kstrtoul(buf, 0, &enable))
1846		return -EINVAL;
1847
1848	ret = ican3_set_termination(mod, enable);
1849	if (ret)
1850		return ret;
1851
1852	return count;
1853}
1854
1855static ssize_t ican3_sysfs_show_fwinfo(struct device *dev,
1856				       struct device_attribute *attr,
1857				       char *buf)
1858{
1859	struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1860
1861	return scnprintf(buf, PAGE_SIZE, "%s\n", mod->fwinfo);
1862}
1863
1864static DEVICE_ATTR(termination, 0644, ican3_sysfs_show_term,
1865		   ican3_sysfs_set_term);
1866static DEVICE_ATTR(fwinfo, 0444, ican3_sysfs_show_fwinfo, NULL);
1867
1868static struct attribute *ican3_sysfs_attrs[] = {
1869	&dev_attr_termination.attr,
1870	&dev_attr_fwinfo.attr,
1871	NULL,
1872};
1873
1874static const struct attribute_group ican3_sysfs_attr_group = {
1875	.attrs = ican3_sysfs_attrs,
1876};
1877
1878/*
1879 * PCI Subsystem
1880 */
1881
1882static int ican3_probe(struct platform_device *pdev)
1883{
1884	struct janz_platform_data *pdata;
1885	struct net_device *ndev;
1886	struct ican3_dev *mod;
1887	struct resource *res;
1888	struct device *dev;
1889	int ret;
1890
1891	pdata = dev_get_platdata(&pdev->dev);
1892	if (!pdata)
1893		return -ENXIO;
1894
1895	dev_dbg(&pdev->dev, "probe: module number %d\n", pdata->modno);
1896
1897	/* save the struct device for printing */
1898	dev = &pdev->dev;
1899
1900	/* allocate the CAN device and private data */
1901	ndev = alloc_candev(sizeof(*mod), 0);
1902	if (!ndev) {
1903		dev_err(dev, "unable to allocate CANdev\n");
1904		ret = -ENOMEM;
1905		goto out_return;
1906	}
1907
1908	platform_set_drvdata(pdev, ndev);
1909	mod = netdev_priv(ndev);
1910	mod->ndev = ndev;
1911	mod->num = pdata->modno;
1912	netif_napi_add(ndev, &mod->napi, ican3_napi, ICAN3_RX_BUFFERS);
1913	skb_queue_head_init(&mod->echoq);
1914	spin_lock_init(&mod->lock);
1915	init_completion(&mod->termination_comp);
1916	init_completion(&mod->buserror_comp);
1917
1918	/* setup device-specific sysfs attributes */
1919	ndev->sysfs_groups[0] = &ican3_sysfs_attr_group;
1920
1921	/* the first unallocated page in the DPM is 9 */
1922	mod->free_page = DPM_FREE_START;
1923
1924	ndev->netdev_ops = &ican3_netdev_ops;
1925	ndev->flags |= IFF_ECHO;
1926	SET_NETDEV_DEV(ndev, &pdev->dev);
1927
1928	mod->can.clock.freq = ICAN3_CAN_CLOCK;
1929	mod->can.bittiming_const = &ican3_bittiming_const;
1930	mod->can.do_set_mode = ican3_set_mode;
1931	mod->can.do_get_berr_counter = ican3_get_berr_counter;
1932	mod->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES
1933				    | CAN_CTRLMODE_BERR_REPORTING
1934				    | CAN_CTRLMODE_ONE_SHOT;
1935
1936	/* find our IRQ number */
1937	mod->irq = platform_get_irq(pdev, 0);
1938	if (mod->irq < 0) {
1939		ret = -ENODEV;
1940		goto out_free_ndev;
1941	}
1942
1943	ndev->irq = mod->irq;
1944
1945	/* get access to the MODULbus registers for this module */
1946	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1947	if (!res) {
1948		dev_err(dev, "MODULbus registers not found\n");
1949		ret = -ENODEV;
1950		goto out_free_ndev;
1951	}
1952
1953	mod->dpm = ioremap(res->start, resource_size(res));
1954	if (!mod->dpm) {
1955		dev_err(dev, "MODULbus registers not ioremap\n");
1956		ret = -ENOMEM;
1957		goto out_free_ndev;
1958	}
1959
1960	mod->dpmctrl = mod->dpm + DPM_PAGE_SIZE;
1961
1962	/* get access to the control registers for this module */
1963	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1964	if (!res) {
1965		dev_err(dev, "CONTROL registers not found\n");
1966		ret = -ENODEV;
1967		goto out_iounmap_dpm;
1968	}
1969
1970	mod->ctrl = ioremap(res->start, resource_size(res));
1971	if (!mod->ctrl) {
1972		dev_err(dev, "CONTROL registers not ioremap\n");
1973		ret = -ENOMEM;
1974		goto out_iounmap_dpm;
1975	}
1976
1977	/* disable our IRQ, then hookup the IRQ handler */
1978	iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1979	ret = request_irq(mod->irq, ican3_irq, IRQF_SHARED, DRV_NAME, mod);
1980	if (ret) {
1981		dev_err(dev, "unable to request IRQ\n");
1982		goto out_iounmap_ctrl;
1983	}
1984
1985	/* reset and initialize the CAN controller into fast mode */
1986	napi_enable(&mod->napi);
1987	ret = ican3_startup_module(mod);
1988	if (ret) {
1989		dev_err(dev, "%s: unable to start CANdev\n", __func__);
1990		goto out_free_irq;
1991	}
1992
1993	/* register with the Linux CAN layer */
1994	ret = register_candev(ndev);
1995	if (ret) {
1996		dev_err(dev, "%s: unable to register CANdev\n", __func__);
1997		goto out_free_irq;
1998	}
1999
2000	netdev_info(mod->ndev, "module %d: registered CAN device\n", pdata->modno);
2001	return 0;
2002
2003out_free_irq:
2004	napi_disable(&mod->napi);
2005	iowrite8(1 << mod->num, &mod->ctrl->int_disable);
2006	free_irq(mod->irq, mod);
2007out_iounmap_ctrl:
2008	iounmap(mod->ctrl);
2009out_iounmap_dpm:
2010	iounmap(mod->dpm);
2011out_free_ndev:
2012	free_candev(ndev);
2013out_return:
2014	return ret;
2015}
2016
2017static int ican3_remove(struct platform_device *pdev)
2018{
2019	struct net_device *ndev = platform_get_drvdata(pdev);
2020	struct ican3_dev *mod = netdev_priv(ndev);
2021
2022	/* unregister the netdevice, stop interrupts */
2023	unregister_netdev(ndev);
2024	napi_disable(&mod->napi);
2025	iowrite8(1 << mod->num, &mod->ctrl->int_disable);
2026	free_irq(mod->irq, mod);
2027
2028	/* put the module into reset */
2029	ican3_shutdown_module(mod);
2030
2031	/* unmap all registers */
2032	iounmap(mod->ctrl);
2033	iounmap(mod->dpm);
2034
2035	free_candev(ndev);
2036
2037	return 0;
2038}
2039
2040static struct platform_driver ican3_driver = {
2041	.driver		= {
2042		.name	= DRV_NAME,
2043	},
2044	.probe		= ican3_probe,
2045	.remove		= ican3_remove,
2046};
2047
2048module_platform_driver(ican3_driver);
2049
2050MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>");
2051MODULE_DESCRIPTION("Janz MODULbus VMOD-ICAN3 Driver");
2052MODULE_LICENSE("GPL");
2053MODULE_ALIAS("platform:janz-ican3");
2054