1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (C) 2005, Intec Automation Inc. 4 * Copyright (C) 2014, Freescale Semiconductor, Inc. 5 */ 6 7#include <linux/slab.h> 8#include <linux/sort.h> 9#include <linux/mtd/spi-nor.h> 10 11#include "core.h" 12 13#define SFDP_PARAM_HEADER_ID(p) (((p)->id_msb << 8) | (p)->id_lsb) 14#define SFDP_PARAM_HEADER_PTP(p) \ 15 (((p)->parameter_table_pointer[2] << 16) | \ 16 ((p)->parameter_table_pointer[1] << 8) | \ 17 ((p)->parameter_table_pointer[0] << 0)) 18 19#define SFDP_BFPT_ID 0xff00 /* Basic Flash Parameter Table */ 20#define SFDP_SECTOR_MAP_ID 0xff81 /* Sector Map Table */ 21#define SFDP_4BAIT_ID 0xff84 /* 4-byte Address Instruction Table */ 22 23#define SFDP_SIGNATURE 0x50444653U 24 25struct sfdp_header { 26 u32 signature; /* Ox50444653U <=> "SFDP" */ 27 u8 minor; 28 u8 major; 29 u8 nph; /* 0-base number of parameter headers */ 30 u8 unused; 31 32 /* Basic Flash Parameter Table. */ 33 struct sfdp_parameter_header bfpt_header; 34}; 35 36/* Fast Read settings. */ 37struct sfdp_bfpt_read { 38 /* The Fast Read x-y-z hardware capability in params->hwcaps.mask. */ 39 u32 hwcaps; 40 41 /* 42 * The <supported_bit> bit in <supported_dword> BFPT DWORD tells us 43 * whether the Fast Read x-y-z command is supported. 44 */ 45 u32 supported_dword; 46 u32 supported_bit; 47 48 /* 49 * The half-word at offset <setting_shift> in <setting_dword> BFPT DWORD 50 * encodes the op code, the number of mode clocks and the number of wait 51 * states to be used by Fast Read x-y-z command. 52 */ 53 u32 settings_dword; 54 u32 settings_shift; 55 56 /* The SPI protocol for this Fast Read x-y-z command. */ 57 enum spi_nor_protocol proto; 58}; 59 60struct sfdp_bfpt_erase { 61 /* 62 * The half-word at offset <shift> in DWORD <dwoard> encodes the 63 * op code and erase sector size to be used by Sector Erase commands. 64 */ 65 u32 dword; 66 u32 shift; 67}; 68 69#define SMPT_CMD_ADDRESS_LEN_MASK GENMASK(23, 22) 70#define SMPT_CMD_ADDRESS_LEN_0 (0x0UL << 22) 71#define SMPT_CMD_ADDRESS_LEN_3 (0x1UL << 22) 72#define SMPT_CMD_ADDRESS_LEN_4 (0x2UL << 22) 73#define SMPT_CMD_ADDRESS_LEN_USE_CURRENT (0x3UL << 22) 74 75#define SMPT_CMD_READ_DUMMY_MASK GENMASK(19, 16) 76#define SMPT_CMD_READ_DUMMY_SHIFT 16 77#define SMPT_CMD_READ_DUMMY(_cmd) \ 78 (((_cmd) & SMPT_CMD_READ_DUMMY_MASK) >> SMPT_CMD_READ_DUMMY_SHIFT) 79#define SMPT_CMD_READ_DUMMY_IS_VARIABLE 0xfUL 80 81#define SMPT_CMD_READ_DATA_MASK GENMASK(31, 24) 82#define SMPT_CMD_READ_DATA_SHIFT 24 83#define SMPT_CMD_READ_DATA(_cmd) \ 84 (((_cmd) & SMPT_CMD_READ_DATA_MASK) >> SMPT_CMD_READ_DATA_SHIFT) 85 86#define SMPT_CMD_OPCODE_MASK GENMASK(15, 8) 87#define SMPT_CMD_OPCODE_SHIFT 8 88#define SMPT_CMD_OPCODE(_cmd) \ 89 (((_cmd) & SMPT_CMD_OPCODE_MASK) >> SMPT_CMD_OPCODE_SHIFT) 90 91#define SMPT_MAP_REGION_COUNT_MASK GENMASK(23, 16) 92#define SMPT_MAP_REGION_COUNT_SHIFT 16 93#define SMPT_MAP_REGION_COUNT(_header) \ 94 ((((_header) & SMPT_MAP_REGION_COUNT_MASK) >> \ 95 SMPT_MAP_REGION_COUNT_SHIFT) + 1) 96 97#define SMPT_MAP_ID_MASK GENMASK(15, 8) 98#define SMPT_MAP_ID_SHIFT 8 99#define SMPT_MAP_ID(_header) \ 100 (((_header) & SMPT_MAP_ID_MASK) >> SMPT_MAP_ID_SHIFT) 101 102#define SMPT_MAP_REGION_SIZE_MASK GENMASK(31, 8) 103#define SMPT_MAP_REGION_SIZE_SHIFT 8 104#define SMPT_MAP_REGION_SIZE(_region) \ 105 (((((_region) & SMPT_MAP_REGION_SIZE_MASK) >> \ 106 SMPT_MAP_REGION_SIZE_SHIFT) + 1) * 256) 107 108#define SMPT_MAP_REGION_ERASE_TYPE_MASK GENMASK(3, 0) 109#define SMPT_MAP_REGION_ERASE_TYPE(_region) \ 110 ((_region) & SMPT_MAP_REGION_ERASE_TYPE_MASK) 111 112#define SMPT_DESC_TYPE_MAP BIT(1) 113#define SMPT_DESC_END BIT(0) 114 115#define SFDP_4BAIT_DWORD_MAX 2 116 117struct sfdp_4bait { 118 /* The hardware capability. */ 119 u32 hwcaps; 120 121 /* 122 * The <supported_bit> bit in DWORD1 of the 4BAIT tells us whether 123 * the associated 4-byte address op code is supported. 124 */ 125 u32 supported_bit; 126}; 127 128/** 129 * spi_nor_read_raw() - raw read of serial flash memory. read_opcode, 130 * addr_width and read_dummy members of the struct spi_nor 131 * should be previously 132 * set. 133 * @nor: pointer to a 'struct spi_nor' 134 * @addr: offset in the serial flash memory 135 * @len: number of bytes to read 136 * @buf: buffer where the data is copied into (dma-safe memory) 137 * 138 * Return: 0 on success, -errno otherwise. 139 */ 140static int spi_nor_read_raw(struct spi_nor *nor, u32 addr, size_t len, u8 *buf) 141{ 142 ssize_t ret; 143 144 while (len) { 145 ret = spi_nor_read_data(nor, addr, len, buf); 146 if (ret < 0) 147 return ret; 148 if (!ret || ret > len) 149 return -EIO; 150 151 buf += ret; 152 addr += ret; 153 len -= ret; 154 } 155 return 0; 156} 157 158/** 159 * spi_nor_read_sfdp() - read Serial Flash Discoverable Parameters. 160 * @nor: pointer to a 'struct spi_nor' 161 * @addr: offset in the SFDP area to start reading data from 162 * @len: number of bytes to read 163 * @buf: buffer where the SFDP data are copied into (dma-safe memory) 164 * 165 * Whatever the actual numbers of bytes for address and dummy cycles are 166 * for (Fast) Read commands, the Read SFDP (5Ah) instruction is always 167 * followed by a 3-byte address and 8 dummy clock cycles. 168 * 169 * Return: 0 on success, -errno otherwise. 170 */ 171static int spi_nor_read_sfdp(struct spi_nor *nor, u32 addr, 172 size_t len, void *buf) 173{ 174 u8 addr_width, read_opcode, read_dummy; 175 int ret; 176 177 read_opcode = nor->read_opcode; 178 addr_width = nor->addr_width; 179 read_dummy = nor->read_dummy; 180 181 nor->read_opcode = SPINOR_OP_RDSFDP; 182 nor->addr_width = 3; 183 nor->read_dummy = 8; 184 185 ret = spi_nor_read_raw(nor, addr, len, buf); 186 187 nor->read_opcode = read_opcode; 188 nor->addr_width = addr_width; 189 nor->read_dummy = read_dummy; 190 191 return ret; 192} 193 194/** 195 * spi_nor_read_sfdp_dma_unsafe() - read Serial Flash Discoverable Parameters. 196 * @nor: pointer to a 'struct spi_nor' 197 * @addr: offset in the SFDP area to start reading data from 198 * @len: number of bytes to read 199 * @buf: buffer where the SFDP data are copied into 200 * 201 * Wrap spi_nor_read_sfdp() using a kmalloc'ed bounce buffer as @buf is now not 202 * guaranteed to be dma-safe. 203 * 204 * Return: -ENOMEM if kmalloc() fails, the return code of spi_nor_read_sfdp() 205 * otherwise. 206 */ 207static int spi_nor_read_sfdp_dma_unsafe(struct spi_nor *nor, u32 addr, 208 size_t len, void *buf) 209{ 210 void *dma_safe_buf; 211 int ret; 212 213 dma_safe_buf = kmalloc(len, GFP_KERNEL); 214 if (!dma_safe_buf) 215 return -ENOMEM; 216 217 ret = spi_nor_read_sfdp(nor, addr, len, dma_safe_buf); 218 memcpy(buf, dma_safe_buf, len); 219 kfree(dma_safe_buf); 220 221 return ret; 222} 223 224static void 225spi_nor_set_read_settings_from_bfpt(struct spi_nor_read_command *read, 226 u16 half, 227 enum spi_nor_protocol proto) 228{ 229 read->num_mode_clocks = (half >> 5) & 0x07; 230 read->num_wait_states = (half >> 0) & 0x1f; 231 read->opcode = (half >> 8) & 0xff; 232 read->proto = proto; 233} 234 235static const struct sfdp_bfpt_read sfdp_bfpt_reads[] = { 236 /* Fast Read 1-1-2 */ 237 { 238 SNOR_HWCAPS_READ_1_1_2, 239 BFPT_DWORD(1), BIT(16), /* Supported bit */ 240 BFPT_DWORD(4), 0, /* Settings */ 241 SNOR_PROTO_1_1_2, 242 }, 243 244 /* Fast Read 1-2-2 */ 245 { 246 SNOR_HWCAPS_READ_1_2_2, 247 BFPT_DWORD(1), BIT(20), /* Supported bit */ 248 BFPT_DWORD(4), 16, /* Settings */ 249 SNOR_PROTO_1_2_2, 250 }, 251 252 /* Fast Read 2-2-2 */ 253 { 254 SNOR_HWCAPS_READ_2_2_2, 255 BFPT_DWORD(5), BIT(0), /* Supported bit */ 256 BFPT_DWORD(6), 16, /* Settings */ 257 SNOR_PROTO_2_2_2, 258 }, 259 260 /* Fast Read 1-1-4 */ 261 { 262 SNOR_HWCAPS_READ_1_1_4, 263 BFPT_DWORD(1), BIT(22), /* Supported bit */ 264 BFPT_DWORD(3), 16, /* Settings */ 265 SNOR_PROTO_1_1_4, 266 }, 267 268 /* Fast Read 1-4-4 */ 269 { 270 SNOR_HWCAPS_READ_1_4_4, 271 BFPT_DWORD(1), BIT(21), /* Supported bit */ 272 BFPT_DWORD(3), 0, /* Settings */ 273 SNOR_PROTO_1_4_4, 274 }, 275 276 /* Fast Read 4-4-4 */ 277 { 278 SNOR_HWCAPS_READ_4_4_4, 279 BFPT_DWORD(5), BIT(4), /* Supported bit */ 280 BFPT_DWORD(7), 16, /* Settings */ 281 SNOR_PROTO_4_4_4, 282 }, 283}; 284 285static const struct sfdp_bfpt_erase sfdp_bfpt_erases[] = { 286 /* Erase Type 1 in DWORD8 bits[15:0] */ 287 {BFPT_DWORD(8), 0}, 288 289 /* Erase Type 2 in DWORD8 bits[31:16] */ 290 {BFPT_DWORD(8), 16}, 291 292 /* Erase Type 3 in DWORD9 bits[15:0] */ 293 {BFPT_DWORD(9), 0}, 294 295 /* Erase Type 4 in DWORD9 bits[31:16] */ 296 {BFPT_DWORD(9), 16}, 297}; 298 299/** 300 * spi_nor_set_erase_settings_from_bfpt() - set erase type settings from BFPT 301 * @erase: pointer to a structure that describes a SPI NOR erase type 302 * @size: the size of the sector/block erased by the erase type 303 * @opcode: the SPI command op code to erase the sector/block 304 * @i: erase type index as sorted in the Basic Flash Parameter Table 305 * 306 * The supported Erase Types will be sorted at init in ascending order, with 307 * the smallest Erase Type size being the first member in the erase_type array 308 * of the spi_nor_erase_map structure. Save the Erase Type index as sorted in 309 * the Basic Flash Parameter Table since it will be used later on to 310 * synchronize with the supported Erase Types defined in SFDP optional tables. 311 */ 312static void 313spi_nor_set_erase_settings_from_bfpt(struct spi_nor_erase_type *erase, 314 u32 size, u8 opcode, u8 i) 315{ 316 erase->idx = i; 317 spi_nor_set_erase_type(erase, size, opcode); 318} 319 320/** 321 * spi_nor_map_cmp_erase_type() - compare the map's erase types by size 322 * @l: member in the left half of the map's erase_type array 323 * @r: member in the right half of the map's erase_type array 324 * 325 * Comparison function used in the sort() call to sort in ascending order the 326 * map's erase types, the smallest erase type size being the first member in the 327 * sorted erase_type array. 328 * 329 * Return: the result of @l->size - @r->size 330 */ 331static int spi_nor_map_cmp_erase_type(const void *l, const void *r) 332{ 333 const struct spi_nor_erase_type *left = l, *right = r; 334 335 return left->size - right->size; 336} 337 338/** 339 * spi_nor_sort_erase_mask() - sort erase mask 340 * @map: the erase map of the SPI NOR 341 * @erase_mask: the erase type mask to be sorted 342 * 343 * Replicate the sort done for the map's erase types in BFPT: sort the erase 344 * mask in ascending order with the smallest erase type size starting from 345 * BIT(0) in the sorted erase mask. 346 * 347 * Return: sorted erase mask. 348 */ 349static u8 spi_nor_sort_erase_mask(struct spi_nor_erase_map *map, u8 erase_mask) 350{ 351 struct spi_nor_erase_type *erase_type = map->erase_type; 352 int i; 353 u8 sorted_erase_mask = 0; 354 355 if (!erase_mask) 356 return 0; 357 358 /* Replicate the sort done for the map's erase types. */ 359 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) 360 if (erase_type[i].size && erase_mask & BIT(erase_type[i].idx)) 361 sorted_erase_mask |= BIT(i); 362 363 return sorted_erase_mask; 364} 365 366/** 367 * spi_nor_regions_sort_erase_types() - sort erase types in each region 368 * @map: the erase map of the SPI NOR 369 * 370 * Function assumes that the erase types defined in the erase map are already 371 * sorted in ascending order, with the smallest erase type size being the first 372 * member in the erase_type array. It replicates the sort done for the map's 373 * erase types. Each region's erase bitmask will indicate which erase types are 374 * supported from the sorted erase types defined in the erase map. 375 * Sort the all region's erase type at init in order to speed up the process of 376 * finding the best erase command at runtime. 377 */ 378static void spi_nor_regions_sort_erase_types(struct spi_nor_erase_map *map) 379{ 380 struct spi_nor_erase_region *region = map->regions; 381 u8 region_erase_mask, sorted_erase_mask; 382 383 while (region) { 384 region_erase_mask = region->offset & SNOR_ERASE_TYPE_MASK; 385 386 sorted_erase_mask = spi_nor_sort_erase_mask(map, 387 region_erase_mask); 388 389 /* Overwrite erase mask. */ 390 region->offset = (region->offset & ~SNOR_ERASE_TYPE_MASK) | 391 sorted_erase_mask; 392 393 region = spi_nor_region_next(region); 394 } 395} 396 397/** 398 * spi_nor_parse_bfpt() - read and parse the Basic Flash Parameter Table. 399 * @nor: pointer to a 'struct spi_nor' 400 * @bfpt_header: pointer to the 'struct sfdp_parameter_header' describing 401 * the Basic Flash Parameter Table length and version 402 * @params: pointer to the 'struct spi_nor_flash_parameter' to be 403 * filled 404 * 405 * The Basic Flash Parameter Table is the main and only mandatory table as 406 * defined by the SFDP (JESD216) specification. 407 * It provides us with the total size (memory density) of the data array and 408 * the number of address bytes for Fast Read, Page Program and Sector Erase 409 * commands. 410 * For Fast READ commands, it also gives the number of mode clock cycles and 411 * wait states (regrouped in the number of dummy clock cycles) for each 412 * supported instruction op code. 413 * For Page Program, the page size is now available since JESD216 rev A, however 414 * the supported instruction op codes are still not provided. 415 * For Sector Erase commands, this table stores the supported instruction op 416 * codes and the associated sector sizes. 417 * Finally, the Quad Enable Requirements (QER) are also available since JESD216 418 * rev A. The QER bits encode the manufacturer dependent procedure to be 419 * executed to set the Quad Enable (QE) bit in some internal register of the 420 * Quad SPI memory. Indeed the QE bit, when it exists, must be set before 421 * sending any Quad SPI command to the memory. Actually, setting the QE bit 422 * tells the memory to reassign its WP# and HOLD#/RESET# pins to functions IO2 423 * and IO3 hence enabling 4 (Quad) I/O lines. 424 * 425 * Return: 0 on success, -errno otherwise. 426 */ 427static int spi_nor_parse_bfpt(struct spi_nor *nor, 428 const struct sfdp_parameter_header *bfpt_header, 429 struct spi_nor_flash_parameter *params) 430{ 431 struct spi_nor_erase_map *map = ¶ms->erase_map; 432 struct spi_nor_erase_type *erase_type = map->erase_type; 433 struct sfdp_bfpt bfpt; 434 size_t len; 435 int i, cmd, err; 436 u32 addr, val; 437 u16 half; 438 u8 erase_mask; 439 440 /* JESD216 Basic Flash Parameter Table length is at least 9 DWORDs. */ 441 if (bfpt_header->length < BFPT_DWORD_MAX_JESD216) 442 return -EINVAL; 443 444 /* Read the Basic Flash Parameter Table. */ 445 len = min_t(size_t, sizeof(bfpt), 446 bfpt_header->length * sizeof(u32)); 447 addr = SFDP_PARAM_HEADER_PTP(bfpt_header); 448 memset(&bfpt, 0, sizeof(bfpt)); 449 err = spi_nor_read_sfdp_dma_unsafe(nor, addr, len, &bfpt); 450 if (err < 0) 451 return err; 452 453 /* Fix endianness of the BFPT DWORDs. */ 454 le32_to_cpu_array(bfpt.dwords, BFPT_DWORD_MAX); 455 456 /* Number of address bytes. */ 457 switch (bfpt.dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) { 458 case BFPT_DWORD1_ADDRESS_BYTES_3_ONLY: 459 case BFPT_DWORD1_ADDRESS_BYTES_3_OR_4: 460 nor->addr_width = 3; 461 break; 462 463 case BFPT_DWORD1_ADDRESS_BYTES_4_ONLY: 464 nor->addr_width = 4; 465 break; 466 467 default: 468 break; 469 } 470 471 /* Flash Memory Density (in bits). */ 472 val = bfpt.dwords[BFPT_DWORD(2)]; 473 if (val & BIT(31)) { 474 val &= ~BIT(31); 475 476 /* 477 * Prevent overflows on params->size. Anyway, a NOR of 2^64 478 * bits is unlikely to exist so this error probably means 479 * the BFPT we are reading is corrupted/wrong. 480 */ 481 if (val > 63) 482 return -EINVAL; 483 484 params->size = 1ULL << val; 485 } else { 486 params->size = val + 1; 487 } 488 params->size >>= 3; /* Convert to bytes. */ 489 490 /* Fast Read settings. */ 491 for (i = 0; i < ARRAY_SIZE(sfdp_bfpt_reads); i++) { 492 const struct sfdp_bfpt_read *rd = &sfdp_bfpt_reads[i]; 493 struct spi_nor_read_command *read; 494 495 if (!(bfpt.dwords[rd->supported_dword] & rd->supported_bit)) { 496 params->hwcaps.mask &= ~rd->hwcaps; 497 continue; 498 } 499 500 params->hwcaps.mask |= rd->hwcaps; 501 cmd = spi_nor_hwcaps_read2cmd(rd->hwcaps); 502 read = ¶ms->reads[cmd]; 503 half = bfpt.dwords[rd->settings_dword] >> rd->settings_shift; 504 spi_nor_set_read_settings_from_bfpt(read, half, rd->proto); 505 } 506 507 /* 508 * Sector Erase settings. Reinitialize the uniform erase map using the 509 * Erase Types defined in the bfpt table. 510 */ 511 erase_mask = 0; 512 memset(¶ms->erase_map, 0, sizeof(params->erase_map)); 513 for (i = 0; i < ARRAY_SIZE(sfdp_bfpt_erases); i++) { 514 const struct sfdp_bfpt_erase *er = &sfdp_bfpt_erases[i]; 515 u32 erasesize; 516 u8 opcode; 517 518 half = bfpt.dwords[er->dword] >> er->shift; 519 erasesize = half & 0xff; 520 521 /* erasesize == 0 means this Erase Type is not supported. */ 522 if (!erasesize) 523 continue; 524 525 erasesize = 1U << erasesize; 526 opcode = (half >> 8) & 0xff; 527 erase_mask |= BIT(i); 528 spi_nor_set_erase_settings_from_bfpt(&erase_type[i], erasesize, 529 opcode, i); 530 } 531 spi_nor_init_uniform_erase_map(map, erase_mask, params->size); 532 /* 533 * Sort all the map's Erase Types in ascending order with the smallest 534 * erase size being the first member in the erase_type array. 535 */ 536 sort(erase_type, SNOR_ERASE_TYPE_MAX, sizeof(erase_type[0]), 537 spi_nor_map_cmp_erase_type, NULL); 538 /* 539 * Sort the erase types in the uniform region in order to update the 540 * uniform_erase_type bitmask. The bitmask will be used later on when 541 * selecting the uniform erase. 542 */ 543 spi_nor_regions_sort_erase_types(map); 544 map->uniform_erase_type = map->uniform_region.offset & 545 SNOR_ERASE_TYPE_MASK; 546 547 /* Stop here if not JESD216 rev A or later. */ 548 if (bfpt_header->length == BFPT_DWORD_MAX_JESD216) 549 return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt, 550 params); 551 552 /* Page size: this field specifies 'N' so the page size = 2^N bytes. */ 553 val = bfpt.dwords[BFPT_DWORD(11)]; 554 val &= BFPT_DWORD11_PAGE_SIZE_MASK; 555 val >>= BFPT_DWORD11_PAGE_SIZE_SHIFT; 556 params->page_size = 1U << val; 557 558 /* Quad Enable Requirements. */ 559 switch (bfpt.dwords[BFPT_DWORD(15)] & BFPT_DWORD15_QER_MASK) { 560 case BFPT_DWORD15_QER_NONE: 561 params->quad_enable = NULL; 562 break; 563 564 case BFPT_DWORD15_QER_SR2_BIT1_BUGGY: 565 /* 566 * Writing only one byte to the Status Register has the 567 * side-effect of clearing Status Register 2. 568 */ 569 case BFPT_DWORD15_QER_SR2_BIT1_NO_RD: 570 /* 571 * Read Configuration Register (35h) instruction is not 572 * supported. 573 */ 574 nor->flags |= SNOR_F_HAS_16BIT_SR | SNOR_F_NO_READ_CR; 575 params->quad_enable = spi_nor_sr2_bit1_quad_enable; 576 break; 577 578 case BFPT_DWORD15_QER_SR1_BIT6: 579 nor->flags &= ~SNOR_F_HAS_16BIT_SR; 580 params->quad_enable = spi_nor_sr1_bit6_quad_enable; 581 break; 582 583 case BFPT_DWORD15_QER_SR2_BIT7: 584 nor->flags &= ~SNOR_F_HAS_16BIT_SR; 585 params->quad_enable = spi_nor_sr2_bit7_quad_enable; 586 break; 587 588 case BFPT_DWORD15_QER_SR2_BIT1: 589 /* 590 * JESD216 rev B or later does not specify if writing only one 591 * byte to the Status Register clears or not the Status 592 * Register 2, so let's be cautious and keep the default 593 * assumption of a 16-bit Write Status (01h) command. 594 */ 595 nor->flags |= SNOR_F_HAS_16BIT_SR; 596 597 params->quad_enable = spi_nor_sr2_bit1_quad_enable; 598 break; 599 600 default: 601 dev_dbg(nor->dev, "BFPT QER reserved value used\n"); 602 break; 603 } 604 605 /* Stop here if not JESD216 rev C or later. */ 606 if (bfpt_header->length == BFPT_DWORD_MAX_JESD216B) 607 return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt, 608 params); 609 610 return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt, params); 611} 612 613/** 614 * spi_nor_smpt_addr_width() - return the address width used in the 615 * configuration detection command. 616 * @nor: pointer to a 'struct spi_nor' 617 * @settings: configuration detection command descriptor, dword1 618 */ 619static u8 spi_nor_smpt_addr_width(const struct spi_nor *nor, const u32 settings) 620{ 621 switch (settings & SMPT_CMD_ADDRESS_LEN_MASK) { 622 case SMPT_CMD_ADDRESS_LEN_0: 623 return 0; 624 case SMPT_CMD_ADDRESS_LEN_3: 625 return 3; 626 case SMPT_CMD_ADDRESS_LEN_4: 627 return 4; 628 case SMPT_CMD_ADDRESS_LEN_USE_CURRENT: 629 default: 630 return nor->addr_width; 631 } 632} 633 634/** 635 * spi_nor_smpt_read_dummy() - return the configuration detection command read 636 * latency, in clock cycles. 637 * @nor: pointer to a 'struct spi_nor' 638 * @settings: configuration detection command descriptor, dword1 639 * 640 * Return: the number of dummy cycles for an SMPT read 641 */ 642static u8 spi_nor_smpt_read_dummy(const struct spi_nor *nor, const u32 settings) 643{ 644 u8 read_dummy = SMPT_CMD_READ_DUMMY(settings); 645 646 if (read_dummy == SMPT_CMD_READ_DUMMY_IS_VARIABLE) 647 return nor->read_dummy; 648 return read_dummy; 649} 650 651/** 652 * spi_nor_get_map_in_use() - get the configuration map in use 653 * @nor: pointer to a 'struct spi_nor' 654 * @smpt: pointer to the sector map parameter table 655 * @smpt_len: sector map parameter table length 656 * 657 * Return: pointer to the map in use, ERR_PTR(-errno) otherwise. 658 */ 659static const u32 *spi_nor_get_map_in_use(struct spi_nor *nor, const u32 *smpt, 660 u8 smpt_len) 661{ 662 const u32 *ret; 663 u8 *buf; 664 u32 addr; 665 int err; 666 u8 i; 667 u8 addr_width, read_opcode, read_dummy; 668 u8 read_data_mask, map_id; 669 670 /* Use a kmalloc'ed bounce buffer to guarantee it is DMA-able. */ 671 buf = kmalloc(sizeof(*buf), GFP_KERNEL); 672 if (!buf) 673 return ERR_PTR(-ENOMEM); 674 675 addr_width = nor->addr_width; 676 read_dummy = nor->read_dummy; 677 read_opcode = nor->read_opcode; 678 679 map_id = 0; 680 /* Determine if there are any optional Detection Command Descriptors */ 681 for (i = 0; i < smpt_len; i += 2) { 682 if (smpt[i] & SMPT_DESC_TYPE_MAP) 683 break; 684 685 read_data_mask = SMPT_CMD_READ_DATA(smpt[i]); 686 nor->addr_width = spi_nor_smpt_addr_width(nor, smpt[i]); 687 nor->read_dummy = spi_nor_smpt_read_dummy(nor, smpt[i]); 688 nor->read_opcode = SMPT_CMD_OPCODE(smpt[i]); 689 addr = smpt[i + 1]; 690 691 err = spi_nor_read_raw(nor, addr, 1, buf); 692 if (err) { 693 ret = ERR_PTR(err); 694 goto out; 695 } 696 697 /* 698 * Build an index value that is used to select the Sector Map 699 * Configuration that is currently in use. 700 */ 701 map_id = map_id << 1 | !!(*buf & read_data_mask); 702 } 703 704 /* 705 * If command descriptors are provided, they always precede map 706 * descriptors in the table. There is no need to start the iteration 707 * over smpt array all over again. 708 * 709 * Find the matching configuration map. 710 */ 711 ret = ERR_PTR(-EINVAL); 712 while (i < smpt_len) { 713 if (SMPT_MAP_ID(smpt[i]) == map_id) { 714 ret = smpt + i; 715 break; 716 } 717 718 /* 719 * If there are no more configuration map descriptors and no 720 * configuration ID matched the configuration identifier, the 721 * sector address map is unknown. 722 */ 723 if (smpt[i] & SMPT_DESC_END) 724 break; 725 726 /* increment the table index to the next map */ 727 i += SMPT_MAP_REGION_COUNT(smpt[i]) + 1; 728 } 729 730 /* fall through */ 731out: 732 kfree(buf); 733 nor->addr_width = addr_width; 734 nor->read_dummy = read_dummy; 735 nor->read_opcode = read_opcode; 736 return ret; 737} 738 739static void spi_nor_region_mark_end(struct spi_nor_erase_region *region) 740{ 741 region->offset |= SNOR_LAST_REGION; 742} 743 744static void spi_nor_region_mark_overlay(struct spi_nor_erase_region *region) 745{ 746 region->offset |= SNOR_OVERLAID_REGION; 747} 748 749/** 750 * spi_nor_region_check_overlay() - set overlay bit when the region is overlaid 751 * @region: pointer to a structure that describes a SPI NOR erase region 752 * @erase: pointer to a structure that describes a SPI NOR erase type 753 * @erase_type: erase type bitmask 754 */ 755static void 756spi_nor_region_check_overlay(struct spi_nor_erase_region *region, 757 const struct spi_nor_erase_type *erase, 758 const u8 erase_type) 759{ 760 int i; 761 762 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) { 763 if (!(erase[i].size && erase_type & BIT(erase[i].idx))) 764 continue; 765 if (region->size & erase[i].size_mask) { 766 spi_nor_region_mark_overlay(region); 767 return; 768 } 769 } 770} 771 772/** 773 * spi_nor_init_non_uniform_erase_map() - initialize the non-uniform erase map 774 * @nor: pointer to a 'struct spi_nor' 775 * @params: pointer to a duplicate 'struct spi_nor_flash_parameter' that is 776 * used for storing SFDP parsed data 777 * @smpt: pointer to the sector map parameter table 778 * 779 * Return: 0 on success, -errno otherwise. 780 */ 781static int 782spi_nor_init_non_uniform_erase_map(struct spi_nor *nor, 783 struct spi_nor_flash_parameter *params, 784 const u32 *smpt) 785{ 786 struct spi_nor_erase_map *map = ¶ms->erase_map; 787 struct spi_nor_erase_type *erase = map->erase_type; 788 struct spi_nor_erase_region *region; 789 u64 offset; 790 u32 region_count; 791 int i, j; 792 u8 uniform_erase_type, save_uniform_erase_type; 793 u8 erase_type, regions_erase_type; 794 795 region_count = SMPT_MAP_REGION_COUNT(*smpt); 796 /* 797 * The regions will be freed when the driver detaches from the 798 * device. 799 */ 800 region = devm_kcalloc(nor->dev, region_count, sizeof(*region), 801 GFP_KERNEL); 802 if (!region) 803 return -ENOMEM; 804 map->regions = region; 805 806 uniform_erase_type = 0xff; 807 regions_erase_type = 0; 808 offset = 0; 809 /* Populate regions. */ 810 for (i = 0; i < region_count; i++) { 811 j = i + 1; /* index for the region dword */ 812 region[i].size = SMPT_MAP_REGION_SIZE(smpt[j]); 813 erase_type = SMPT_MAP_REGION_ERASE_TYPE(smpt[j]); 814 region[i].offset = offset | erase_type; 815 816 spi_nor_region_check_overlay(®ion[i], erase, erase_type); 817 818 /* 819 * Save the erase types that are supported in all regions and 820 * can erase the entire flash memory. 821 */ 822 uniform_erase_type &= erase_type; 823 824 /* 825 * regions_erase_type mask will indicate all the erase types 826 * supported in this configuration map. 827 */ 828 regions_erase_type |= erase_type; 829 830 offset = (region[i].offset & ~SNOR_ERASE_FLAGS_MASK) + 831 region[i].size; 832 } 833 spi_nor_region_mark_end(®ion[i - 1]); 834 835 save_uniform_erase_type = map->uniform_erase_type; 836 map->uniform_erase_type = spi_nor_sort_erase_mask(map, 837 uniform_erase_type); 838 839 if (!regions_erase_type) { 840 /* 841 * Roll back to the previous uniform_erase_type mask, SMPT is 842 * broken. 843 */ 844 map->uniform_erase_type = save_uniform_erase_type; 845 return -EINVAL; 846 } 847 848 /* 849 * BFPT advertises all the erase types supported by all the possible 850 * map configurations. Mask out the erase types that are not supported 851 * by the current map configuration. 852 */ 853 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) 854 if (!(regions_erase_type & BIT(erase[i].idx))) 855 spi_nor_mask_erase_type(&erase[i]); 856 857 return 0; 858} 859 860/** 861 * spi_nor_parse_smpt() - parse Sector Map Parameter Table 862 * @nor: pointer to a 'struct spi_nor' 863 * @smpt_header: sector map parameter table header 864 * @params: pointer to a duplicate 'struct spi_nor_flash_parameter' 865 * that is used for storing SFDP parsed data 866 * 867 * This table is optional, but when available, we parse it to identify the 868 * location and size of sectors within the main data array of the flash memory 869 * device and to identify which Erase Types are supported by each sector. 870 * 871 * Return: 0 on success, -errno otherwise. 872 */ 873static int spi_nor_parse_smpt(struct spi_nor *nor, 874 const struct sfdp_parameter_header *smpt_header, 875 struct spi_nor_flash_parameter *params) 876{ 877 const u32 *sector_map; 878 u32 *smpt; 879 size_t len; 880 u32 addr; 881 int ret; 882 883 /* Read the Sector Map Parameter Table. */ 884 len = smpt_header->length * sizeof(*smpt); 885 smpt = kmalloc(len, GFP_KERNEL); 886 if (!smpt) 887 return -ENOMEM; 888 889 addr = SFDP_PARAM_HEADER_PTP(smpt_header); 890 ret = spi_nor_read_sfdp(nor, addr, len, smpt); 891 if (ret) 892 goto out; 893 894 /* Fix endianness of the SMPT DWORDs. */ 895 le32_to_cpu_array(smpt, smpt_header->length); 896 897 sector_map = spi_nor_get_map_in_use(nor, smpt, smpt_header->length); 898 if (IS_ERR(sector_map)) { 899 ret = PTR_ERR(sector_map); 900 goto out; 901 } 902 903 ret = spi_nor_init_non_uniform_erase_map(nor, params, sector_map); 904 if (ret) 905 goto out; 906 907 spi_nor_regions_sort_erase_types(¶ms->erase_map); 908 /* fall through */ 909out: 910 kfree(smpt); 911 return ret; 912} 913 914/** 915 * spi_nor_parse_4bait() - parse the 4-Byte Address Instruction Table 916 * @nor: pointer to a 'struct spi_nor'. 917 * @param_header: pointer to the 'struct sfdp_parameter_header' describing 918 * the 4-Byte Address Instruction Table length and version. 919 * @params: pointer to the 'struct spi_nor_flash_parameter' to be. 920 * 921 * Return: 0 on success, -errno otherwise. 922 */ 923static int spi_nor_parse_4bait(struct spi_nor *nor, 924 const struct sfdp_parameter_header *param_header, 925 struct spi_nor_flash_parameter *params) 926{ 927 static const struct sfdp_4bait reads[] = { 928 { SNOR_HWCAPS_READ, BIT(0) }, 929 { SNOR_HWCAPS_READ_FAST, BIT(1) }, 930 { SNOR_HWCAPS_READ_1_1_2, BIT(2) }, 931 { SNOR_HWCAPS_READ_1_2_2, BIT(3) }, 932 { SNOR_HWCAPS_READ_1_1_4, BIT(4) }, 933 { SNOR_HWCAPS_READ_1_4_4, BIT(5) }, 934 { SNOR_HWCAPS_READ_1_1_1_DTR, BIT(13) }, 935 { SNOR_HWCAPS_READ_1_2_2_DTR, BIT(14) }, 936 { SNOR_HWCAPS_READ_1_4_4_DTR, BIT(15) }, 937 }; 938 static const struct sfdp_4bait programs[] = { 939 { SNOR_HWCAPS_PP, BIT(6) }, 940 { SNOR_HWCAPS_PP_1_1_4, BIT(7) }, 941 { SNOR_HWCAPS_PP_1_4_4, BIT(8) }, 942 }; 943 static const struct sfdp_4bait erases[SNOR_ERASE_TYPE_MAX] = { 944 { 0u /* not used */, BIT(9) }, 945 { 0u /* not used */, BIT(10) }, 946 { 0u /* not used */, BIT(11) }, 947 { 0u /* not used */, BIT(12) }, 948 }; 949 struct spi_nor_pp_command *params_pp = params->page_programs; 950 struct spi_nor_erase_map *map = ¶ms->erase_map; 951 struct spi_nor_erase_type *erase_type = map->erase_type; 952 u32 *dwords; 953 size_t len; 954 u32 addr, discard_hwcaps, read_hwcaps, pp_hwcaps, erase_mask; 955 int i, ret; 956 957 if (param_header->major != SFDP_JESD216_MAJOR || 958 param_header->length < SFDP_4BAIT_DWORD_MAX) 959 return -EINVAL; 960 961 /* Read the 4-byte Address Instruction Table. */ 962 len = sizeof(*dwords) * SFDP_4BAIT_DWORD_MAX; 963 964 /* Use a kmalloc'ed bounce buffer to guarantee it is DMA-able. */ 965 dwords = kmalloc(len, GFP_KERNEL); 966 if (!dwords) 967 return -ENOMEM; 968 969 addr = SFDP_PARAM_HEADER_PTP(param_header); 970 ret = spi_nor_read_sfdp(nor, addr, len, dwords); 971 if (ret) 972 goto out; 973 974 /* Fix endianness of the 4BAIT DWORDs. */ 975 le32_to_cpu_array(dwords, SFDP_4BAIT_DWORD_MAX); 976 977 /* 978 * Compute the subset of (Fast) Read commands for which the 4-byte 979 * version is supported. 980 */ 981 discard_hwcaps = 0; 982 read_hwcaps = 0; 983 for (i = 0; i < ARRAY_SIZE(reads); i++) { 984 const struct sfdp_4bait *read = &reads[i]; 985 986 discard_hwcaps |= read->hwcaps; 987 if ((params->hwcaps.mask & read->hwcaps) && 988 (dwords[0] & read->supported_bit)) 989 read_hwcaps |= read->hwcaps; 990 } 991 992 /* 993 * Compute the subset of Page Program commands for which the 4-byte 994 * version is supported. 995 */ 996 pp_hwcaps = 0; 997 for (i = 0; i < ARRAY_SIZE(programs); i++) { 998 const struct sfdp_4bait *program = &programs[i]; 999 1000 /* 1001 * The 4 Byte Address Instruction (Optional) Table is the only 1002 * SFDP table that indicates support for Page Program Commands. 1003 * Bypass the params->hwcaps.mask and consider 4BAIT the biggest 1004 * authority for specifying Page Program support. 1005 */ 1006 discard_hwcaps |= program->hwcaps; 1007 if (dwords[0] & program->supported_bit) 1008 pp_hwcaps |= program->hwcaps; 1009 } 1010 1011 /* 1012 * Compute the subset of Sector Erase commands for which the 4-byte 1013 * version is supported. 1014 */ 1015 erase_mask = 0; 1016 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) { 1017 const struct sfdp_4bait *erase = &erases[i]; 1018 1019 if (dwords[0] & erase->supported_bit) 1020 erase_mask |= BIT(i); 1021 } 1022 1023 /* Replicate the sort done for the map's erase types in BFPT. */ 1024 erase_mask = spi_nor_sort_erase_mask(map, erase_mask); 1025 1026 /* 1027 * We need at least one 4-byte op code per read, program and erase 1028 * operation; the .read(), .write() and .erase() hooks share the 1029 * nor->addr_width value. 1030 */ 1031 if (!read_hwcaps || !pp_hwcaps || !erase_mask) 1032 goto out; 1033 1034 /* 1035 * Discard all operations from the 4-byte instruction set which are 1036 * not supported by this memory. 1037 */ 1038 params->hwcaps.mask &= ~discard_hwcaps; 1039 params->hwcaps.mask |= (read_hwcaps | pp_hwcaps); 1040 1041 /* Use the 4-byte address instruction set. */ 1042 for (i = 0; i < SNOR_CMD_READ_MAX; i++) { 1043 struct spi_nor_read_command *read_cmd = ¶ms->reads[i]; 1044 1045 read_cmd->opcode = spi_nor_convert_3to4_read(read_cmd->opcode); 1046 } 1047 1048 /* 4BAIT is the only SFDP table that indicates page program support. */ 1049 if (pp_hwcaps & SNOR_HWCAPS_PP) 1050 spi_nor_set_pp_settings(¶ms_pp[SNOR_CMD_PP], 1051 SPINOR_OP_PP_4B, SNOR_PROTO_1_1_1); 1052 if (pp_hwcaps & SNOR_HWCAPS_PP_1_1_4) 1053 spi_nor_set_pp_settings(¶ms_pp[SNOR_CMD_PP_1_1_4], 1054 SPINOR_OP_PP_1_1_4_4B, 1055 SNOR_PROTO_1_1_4); 1056 if (pp_hwcaps & SNOR_HWCAPS_PP_1_4_4) 1057 spi_nor_set_pp_settings(¶ms_pp[SNOR_CMD_PP_1_4_4], 1058 SPINOR_OP_PP_1_4_4_4B, 1059 SNOR_PROTO_1_4_4); 1060 1061 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) { 1062 if (erase_mask & BIT(i)) 1063 erase_type[i].opcode = (dwords[1] >> 1064 erase_type[i].idx * 8) & 0xFF; 1065 else 1066 spi_nor_mask_erase_type(&erase_type[i]); 1067 } 1068 1069 /* 1070 * We set SNOR_F_HAS_4BAIT in order to skip spi_nor_set_4byte_opcodes() 1071 * later because we already did the conversion to 4byte opcodes. Also, 1072 * this latest function implements a legacy quirk for the erase size of 1073 * Spansion memory. However this quirk is no longer needed with new 1074 * SFDP compliant memories. 1075 */ 1076 nor->addr_width = 4; 1077 nor->flags |= SNOR_F_4B_OPCODES | SNOR_F_HAS_4BAIT; 1078 1079 /* fall through */ 1080out: 1081 kfree(dwords); 1082 return ret; 1083} 1084 1085/** 1086 * spi_nor_parse_sfdp() - parse the Serial Flash Discoverable Parameters. 1087 * @nor: pointer to a 'struct spi_nor' 1088 * @params: pointer to the 'struct spi_nor_flash_parameter' to be 1089 * filled 1090 * 1091 * The Serial Flash Discoverable Parameters are described by the JEDEC JESD216 1092 * specification. This is a standard which tends to supported by almost all 1093 * (Q)SPI memory manufacturers. Those hard-coded tables allow us to learn at 1094 * runtime the main parameters needed to perform basic SPI flash operations such 1095 * as Fast Read, Page Program or Sector Erase commands. 1096 * 1097 * Return: 0 on success, -errno otherwise. 1098 */ 1099int spi_nor_parse_sfdp(struct spi_nor *nor, 1100 struct spi_nor_flash_parameter *params) 1101{ 1102 const struct sfdp_parameter_header *param_header, *bfpt_header; 1103 struct sfdp_parameter_header *param_headers = NULL; 1104 struct sfdp_header header; 1105 struct device *dev = nor->dev; 1106 size_t psize; 1107 int i, err; 1108 1109 /* Get the SFDP header. */ 1110 err = spi_nor_read_sfdp_dma_unsafe(nor, 0, sizeof(header), &header); 1111 if (err < 0) 1112 return err; 1113 1114 /* Check the SFDP header version. */ 1115 if (le32_to_cpu(header.signature) != SFDP_SIGNATURE || 1116 header.major != SFDP_JESD216_MAJOR) 1117 return -EINVAL; 1118 1119 /* 1120 * Verify that the first and only mandatory parameter header is a 1121 * Basic Flash Parameter Table header as specified in JESD216. 1122 */ 1123 bfpt_header = &header.bfpt_header; 1124 if (SFDP_PARAM_HEADER_ID(bfpt_header) != SFDP_BFPT_ID || 1125 bfpt_header->major != SFDP_JESD216_MAJOR) 1126 return -EINVAL; 1127 1128 /* 1129 * Allocate memory then read all parameter headers with a single 1130 * Read SFDP command. These parameter headers will actually be parsed 1131 * twice: a first time to get the latest revision of the basic flash 1132 * parameter table, then a second time to handle the supported optional 1133 * tables. 1134 * Hence we read the parameter headers once for all to reduce the 1135 * processing time. Also we use kmalloc() instead of devm_kmalloc() 1136 * because we don't need to keep these parameter headers: the allocated 1137 * memory is always released with kfree() before exiting this function. 1138 */ 1139 if (header.nph) { 1140 psize = header.nph * sizeof(*param_headers); 1141 1142 param_headers = kmalloc(psize, GFP_KERNEL); 1143 if (!param_headers) 1144 return -ENOMEM; 1145 1146 err = spi_nor_read_sfdp(nor, sizeof(header), 1147 psize, param_headers); 1148 if (err < 0) { 1149 dev_dbg(dev, "failed to read SFDP parameter headers\n"); 1150 goto exit; 1151 } 1152 } 1153 1154 /* 1155 * Check other parameter headers to get the latest revision of 1156 * the basic flash parameter table. 1157 */ 1158 for (i = 0; i < header.nph; i++) { 1159 param_header = ¶m_headers[i]; 1160 1161 if (SFDP_PARAM_HEADER_ID(param_header) == SFDP_BFPT_ID && 1162 param_header->major == SFDP_JESD216_MAJOR && 1163 (param_header->minor > bfpt_header->minor || 1164 (param_header->minor == bfpt_header->minor && 1165 param_header->length > bfpt_header->length))) 1166 bfpt_header = param_header; 1167 } 1168 1169 err = spi_nor_parse_bfpt(nor, bfpt_header, params); 1170 if (err) 1171 goto exit; 1172 1173 /* Parse optional parameter tables. */ 1174 for (i = 0; i < header.nph; i++) { 1175 param_header = ¶m_headers[i]; 1176 1177 switch (SFDP_PARAM_HEADER_ID(param_header)) { 1178 case SFDP_SECTOR_MAP_ID: 1179 err = spi_nor_parse_smpt(nor, param_header, params); 1180 break; 1181 1182 case SFDP_4BAIT_ID: 1183 err = spi_nor_parse_4bait(nor, param_header, params); 1184 break; 1185 1186 default: 1187 break; 1188 } 1189 1190 if (err) { 1191 dev_warn(dev, "Failed to parse optional parameter table: %04x\n", 1192 SFDP_PARAM_HEADER_ID(param_header)); 1193 /* 1194 * Let's not drop all information we extracted so far 1195 * if optional table parsers fail. In case of failing, 1196 * each optional parser is responsible to roll back to 1197 * the previously known spi_nor data. 1198 */ 1199 err = 0; 1200 } 1201 } 1202 1203exit: 1204 kfree(param_headers); 1205 return err; 1206} 1207