1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2004 Richard Purdie 4 * Copyright (C) 2008 Dmitry Baryshkov 5 * 6 * Based on Sharp's NAND driver sharp_sl.c 7 */ 8 9#include <linux/genhd.h> 10#include <linux/slab.h> 11#include <linux/module.h> 12#include <linux/delay.h> 13#include <linux/mtd/mtd.h> 14#include <linux/mtd/rawnand.h> 15#include <linux/mtd/nand_ecc.h> 16#include <linux/mtd/partitions.h> 17#include <linux/mtd/sharpsl.h> 18#include <linux/interrupt.h> 19#include <linux/platform_device.h> 20#include <linux/io.h> 21 22struct sharpsl_nand { 23 struct nand_controller controller; 24 struct nand_chip chip; 25 26 void __iomem *io; 27}; 28 29static inline struct sharpsl_nand *mtd_to_sharpsl(struct mtd_info *mtd) 30{ 31 return container_of(mtd_to_nand(mtd), struct sharpsl_nand, chip); 32} 33 34/* register offset */ 35#define ECCLPLB 0x00 /* line parity 7 - 0 bit */ 36#define ECCLPUB 0x04 /* line parity 15 - 8 bit */ 37#define ECCCP 0x08 /* column parity 5 - 0 bit */ 38#define ECCCNTR 0x0C /* ECC byte counter */ 39#define ECCCLRR 0x10 /* cleare ECC */ 40#define FLASHIO 0x14 /* Flash I/O */ 41#define FLASHCTL 0x18 /* Flash Control */ 42 43/* Flash control bit */ 44#define FLRYBY (1 << 5) 45#define FLCE1 (1 << 4) 46#define FLWP (1 << 3) 47#define FLALE (1 << 2) 48#define FLCLE (1 << 1) 49#define FLCE0 (1 << 0) 50 51/* 52 * hardware specific access to control-lines 53 * ctrl: 54 * NAND_CNE: bit 0 -> ! bit 0 & 4 55 * NAND_CLE: bit 1 -> bit 1 56 * NAND_ALE: bit 2 -> bit 2 57 * 58 */ 59static void sharpsl_nand_hwcontrol(struct nand_chip *chip, int cmd, 60 unsigned int ctrl) 61{ 62 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(nand_to_mtd(chip)); 63 64 if (ctrl & NAND_CTRL_CHANGE) { 65 unsigned char bits = ctrl & 0x07; 66 67 bits |= (ctrl & 0x01) << 4; 68 69 bits ^= 0x11; 70 71 writeb((readb(sharpsl->io + FLASHCTL) & ~0x17) | bits, sharpsl->io + FLASHCTL); 72 } 73 74 if (cmd != NAND_CMD_NONE) 75 writeb(cmd, chip->legacy.IO_ADDR_W); 76} 77 78static int sharpsl_nand_dev_ready(struct nand_chip *chip) 79{ 80 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(nand_to_mtd(chip)); 81 return !((readb(sharpsl->io + FLASHCTL) & FLRYBY) == 0); 82} 83 84static void sharpsl_nand_enable_hwecc(struct nand_chip *chip, int mode) 85{ 86 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(nand_to_mtd(chip)); 87 writeb(0, sharpsl->io + ECCCLRR); 88} 89 90static int sharpsl_nand_calculate_ecc(struct nand_chip *chip, 91 const u_char * dat, u_char * ecc_code) 92{ 93 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(nand_to_mtd(chip)); 94 ecc_code[0] = ~readb(sharpsl->io + ECCLPUB); 95 ecc_code[1] = ~readb(sharpsl->io + ECCLPLB); 96 ecc_code[2] = (~readb(sharpsl->io + ECCCP) << 2) | 0x03; 97 return readb(sharpsl->io + ECCCNTR) != 0; 98} 99 100static int sharpsl_attach_chip(struct nand_chip *chip) 101{ 102 if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST) 103 return 0; 104 105 chip->ecc.size = 256; 106 chip->ecc.bytes = 3; 107 chip->ecc.strength = 1; 108 chip->ecc.hwctl = sharpsl_nand_enable_hwecc; 109 chip->ecc.calculate = sharpsl_nand_calculate_ecc; 110 chip->ecc.correct = nand_correct_data; 111 112 return 0; 113} 114 115static const struct nand_controller_ops sharpsl_ops = { 116 .attach_chip = sharpsl_attach_chip, 117}; 118 119/* 120 * Main initialization routine 121 */ 122static int sharpsl_nand_probe(struct platform_device *pdev) 123{ 124 struct nand_chip *this; 125 struct mtd_info *mtd; 126 struct resource *r; 127 int err = 0; 128 struct sharpsl_nand *sharpsl; 129 struct sharpsl_nand_platform_data *data = dev_get_platdata(&pdev->dev); 130 131 if (!data) { 132 dev_err(&pdev->dev, "no platform data!\n"); 133 return -EINVAL; 134 } 135 136 /* Allocate memory for MTD device structure and private data */ 137 sharpsl = kzalloc(sizeof(struct sharpsl_nand), GFP_KERNEL); 138 if (!sharpsl) 139 return -ENOMEM; 140 141 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 142 if (!r) { 143 dev_err(&pdev->dev, "no io memory resource defined!\n"); 144 err = -ENODEV; 145 goto err_get_res; 146 } 147 148 /* map physical address */ 149 sharpsl->io = ioremap(r->start, resource_size(r)); 150 if (!sharpsl->io) { 151 dev_err(&pdev->dev, "ioremap to access Sharp SL NAND chip failed\n"); 152 err = -EIO; 153 goto err_ioremap; 154 } 155 156 /* Get pointer to private data */ 157 this = (struct nand_chip *)(&sharpsl->chip); 158 159 nand_controller_init(&sharpsl->controller); 160 sharpsl->controller.ops = &sharpsl_ops; 161 this->controller = &sharpsl->controller; 162 163 /* Link the private data with the MTD structure */ 164 mtd = nand_to_mtd(this); 165 mtd->dev.parent = &pdev->dev; 166 mtd_set_ooblayout(mtd, data->ecc_layout); 167 168 platform_set_drvdata(pdev, sharpsl); 169 170 /* 171 * PXA initialize 172 */ 173 writeb(readb(sharpsl->io + FLASHCTL) | FLWP, sharpsl->io + FLASHCTL); 174 175 /* Set address of NAND IO lines */ 176 this->legacy.IO_ADDR_R = sharpsl->io + FLASHIO; 177 this->legacy.IO_ADDR_W = sharpsl->io + FLASHIO; 178 /* Set address of hardware control function */ 179 this->legacy.cmd_ctrl = sharpsl_nand_hwcontrol; 180 this->legacy.dev_ready = sharpsl_nand_dev_ready; 181 /* 15 us command delay time */ 182 this->legacy.chip_delay = 15; 183 this->badblock_pattern = data->badblock_pattern; 184 185 /* Scan to find existence of the device */ 186 err = nand_scan(this, 1); 187 if (err) 188 goto err_scan; 189 190 /* Register the partitions */ 191 mtd->name = "sharpsl-nand"; 192 193 err = mtd_device_parse_register(mtd, data->part_parsers, NULL, 194 data->partitions, data->nr_partitions); 195 if (err) 196 goto err_add; 197 198 /* Return happy */ 199 return 0; 200 201err_add: 202 nand_cleanup(this); 203 204err_scan: 205 iounmap(sharpsl->io); 206err_ioremap: 207err_get_res: 208 kfree(sharpsl); 209 return err; 210} 211 212/* 213 * Clean up routine 214 */ 215static int sharpsl_nand_remove(struct platform_device *pdev) 216{ 217 struct sharpsl_nand *sharpsl = platform_get_drvdata(pdev); 218 struct nand_chip *chip = &sharpsl->chip; 219 int ret; 220 221 /* Unregister device */ 222 ret = mtd_device_unregister(nand_to_mtd(chip)); 223 WARN_ON(ret); 224 225 /* Release resources */ 226 nand_cleanup(chip); 227 228 iounmap(sharpsl->io); 229 230 /* Free the driver's structure */ 231 kfree(sharpsl); 232 233 return 0; 234} 235 236static struct platform_driver sharpsl_nand_driver = { 237 .driver = { 238 .name = "sharpsl-nand", 239 }, 240 .probe = sharpsl_nand_probe, 241 .remove = sharpsl_nand_remove, 242}; 243 244module_platform_driver(sharpsl_nand_driver); 245 246MODULE_LICENSE("GPL"); 247MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>"); 248MODULE_DESCRIPTION("Device specific logic for NAND flash on Sharp SL-C7xx Series"); 249