1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright © 2005-2009 Samsung Electronics 4 * Copyright © 2007 Nokia Corporation 5 * 6 * Kyungmin Park <kyungmin.park@samsung.com> 7 * 8 * Credits: 9 * Adrian Hunter <ext-adrian.hunter@nokia.com>: 10 * auto-placement support, read-while load support, various fixes 11 * 12 * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com> 13 * Flex-OneNAND support 14 * Amul Kumar Saha <amul.saha at samsung.com> 15 * OTP support 16 */ 17 18#include <linux/kernel.h> 19#include <linux/module.h> 20#include <linux/moduleparam.h> 21#include <linux/slab.h> 22#include <linux/sched.h> 23#include <linux/delay.h> 24#include <linux/interrupt.h> 25#include <linux/jiffies.h> 26#include <linux/mtd/mtd.h> 27#include <linux/mtd/onenand.h> 28#include <linux/mtd/partitions.h> 29 30#include <asm/io.h> 31 32/* 33 * Multiblock erase if number of blocks to erase is 2 or more. 34 * Maximum number of blocks for simultaneous erase is 64. 35 */ 36#define MB_ERASE_MIN_BLK_COUNT 2 37#define MB_ERASE_MAX_BLK_COUNT 64 38 39/* Default Flex-OneNAND boundary and lock respectively */ 40static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 }; 41 42module_param_array(flex_bdry, int, NULL, 0400); 43MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND" 44 "Syntax:flex_bdry=DIE_BDRY,LOCK,..." 45 "DIE_BDRY: SLC boundary of the die" 46 "LOCK: Locking information for SLC boundary" 47 " : 0->Set boundary in unlocked status" 48 " : 1->Set boundary in locked status"); 49 50/* Default OneNAND/Flex-OneNAND OTP options*/ 51static int otp; 52 53module_param(otp, int, 0400); 54MODULE_PARM_DESC(otp, "Corresponding behaviour of OneNAND in OTP" 55 "Syntax : otp=LOCK_TYPE" 56 "LOCK_TYPE : Keys issued, for specific OTP Lock type" 57 " : 0 -> Default (No Blocks Locked)" 58 " : 1 -> OTP Block lock" 59 " : 2 -> 1st Block lock" 60 " : 3 -> BOTH OTP Block and 1st Block lock"); 61 62/* 63 * flexonenand_oob_128 - oob info for Flex-Onenand with 4KB page 64 * For now, we expose only 64 out of 80 ecc bytes 65 */ 66static int flexonenand_ooblayout_ecc(struct mtd_info *mtd, int section, 67 struct mtd_oob_region *oobregion) 68{ 69 if (section > 7) 70 return -ERANGE; 71 72 oobregion->offset = (section * 16) + 6; 73 oobregion->length = 10; 74 75 return 0; 76} 77 78static int flexonenand_ooblayout_free(struct mtd_info *mtd, int section, 79 struct mtd_oob_region *oobregion) 80{ 81 if (section > 7) 82 return -ERANGE; 83 84 oobregion->offset = (section * 16) + 2; 85 oobregion->length = 4; 86 87 return 0; 88} 89 90static const struct mtd_ooblayout_ops flexonenand_ooblayout_ops = { 91 .ecc = flexonenand_ooblayout_ecc, 92 .free = flexonenand_ooblayout_free, 93}; 94 95/* 96 * onenand_oob_128 - oob info for OneNAND with 4KB page 97 * 98 * Based on specification: 99 * 4Gb M-die OneNAND Flash (KFM4G16Q4M, KFN8G16Q4M). Rev. 1.3, Apr. 2010 100 * 101 */ 102static int onenand_ooblayout_128_ecc(struct mtd_info *mtd, int section, 103 struct mtd_oob_region *oobregion) 104{ 105 if (section > 7) 106 return -ERANGE; 107 108 oobregion->offset = (section * 16) + 7; 109 oobregion->length = 9; 110 111 return 0; 112} 113 114static int onenand_ooblayout_128_free(struct mtd_info *mtd, int section, 115 struct mtd_oob_region *oobregion) 116{ 117 if (section >= 8) 118 return -ERANGE; 119 120 /* 121 * free bytes are using the spare area fields marked as 122 * "Managed by internal ECC logic for Logical Sector Number area" 123 */ 124 oobregion->offset = (section * 16) + 2; 125 oobregion->length = 3; 126 127 return 0; 128} 129 130static const struct mtd_ooblayout_ops onenand_oob_128_ooblayout_ops = { 131 .ecc = onenand_ooblayout_128_ecc, 132 .free = onenand_ooblayout_128_free, 133}; 134 135/** 136 * onenand_oob_32_64 - oob info for large (2KB) page 137 */ 138static int onenand_ooblayout_32_64_ecc(struct mtd_info *mtd, int section, 139 struct mtd_oob_region *oobregion) 140{ 141 if (section > 3) 142 return -ERANGE; 143 144 oobregion->offset = (section * 16) + 8; 145 oobregion->length = 5; 146 147 return 0; 148} 149 150static int onenand_ooblayout_32_64_free(struct mtd_info *mtd, int section, 151 struct mtd_oob_region *oobregion) 152{ 153 int sections = (mtd->oobsize / 32) * 2; 154 155 if (section >= sections) 156 return -ERANGE; 157 158 if (section & 1) { 159 oobregion->offset = ((section - 1) * 16) + 14; 160 oobregion->length = 2; 161 } else { 162 oobregion->offset = (section * 16) + 2; 163 oobregion->length = 3; 164 } 165 166 return 0; 167} 168 169static const struct mtd_ooblayout_ops onenand_oob_32_64_ooblayout_ops = { 170 .ecc = onenand_ooblayout_32_64_ecc, 171 .free = onenand_ooblayout_32_64_free, 172}; 173 174static const unsigned char ffchars[] = { 175 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 176 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */ 177 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 178 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */ 179 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 180 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */ 181 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 182 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */ 183 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 184 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */ 185 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 186 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */ 187 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 188 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */ 189 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 190 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */ 191}; 192 193/** 194 * onenand_readw - [OneNAND Interface] Read OneNAND register 195 * @param addr address to read 196 * 197 * Read OneNAND register 198 */ 199static unsigned short onenand_readw(void __iomem *addr) 200{ 201 return readw(addr); 202} 203 204/** 205 * onenand_writew - [OneNAND Interface] Write OneNAND register with value 206 * @param value value to write 207 * @param addr address to write 208 * 209 * Write OneNAND register with value 210 */ 211static void onenand_writew(unsigned short value, void __iomem *addr) 212{ 213 writew(value, addr); 214} 215 216/** 217 * onenand_block_address - [DEFAULT] Get block address 218 * @param this onenand chip data structure 219 * @param block the block 220 * @return translated block address if DDP, otherwise same 221 * 222 * Setup Start Address 1 Register (F100h) 223 */ 224static int onenand_block_address(struct onenand_chip *this, int block) 225{ 226 /* Device Flash Core select, NAND Flash Block Address */ 227 if (block & this->density_mask) 228 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask); 229 230 return block; 231} 232 233/** 234 * onenand_bufferram_address - [DEFAULT] Get bufferram address 235 * @param this onenand chip data structure 236 * @param block the block 237 * @return set DBS value if DDP, otherwise 0 238 * 239 * Setup Start Address 2 Register (F101h) for DDP 240 */ 241static int onenand_bufferram_address(struct onenand_chip *this, int block) 242{ 243 /* Device BufferRAM Select */ 244 if (block & this->density_mask) 245 return ONENAND_DDP_CHIP1; 246 247 return ONENAND_DDP_CHIP0; 248} 249 250/** 251 * onenand_page_address - [DEFAULT] Get page address 252 * @param page the page address 253 * @param sector the sector address 254 * @return combined page and sector address 255 * 256 * Setup Start Address 8 Register (F107h) 257 */ 258static int onenand_page_address(int page, int sector) 259{ 260 /* Flash Page Address, Flash Sector Address */ 261 int fpa, fsa; 262 263 fpa = page & ONENAND_FPA_MASK; 264 fsa = sector & ONENAND_FSA_MASK; 265 266 return ((fpa << ONENAND_FPA_SHIFT) | fsa); 267} 268 269/** 270 * onenand_buffer_address - [DEFAULT] Get buffer address 271 * @param dataram1 DataRAM index 272 * @param sectors the sector address 273 * @param count the number of sectors 274 * @return the start buffer value 275 * 276 * Setup Start Buffer Register (F200h) 277 */ 278static int onenand_buffer_address(int dataram1, int sectors, int count) 279{ 280 int bsa, bsc; 281 282 /* BufferRAM Sector Address */ 283 bsa = sectors & ONENAND_BSA_MASK; 284 285 if (dataram1) 286 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */ 287 else 288 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */ 289 290 /* BufferRAM Sector Count */ 291 bsc = count & ONENAND_BSC_MASK; 292 293 return ((bsa << ONENAND_BSA_SHIFT) | bsc); 294} 295 296/** 297 * flexonenand_block- For given address return block number 298 * @param this - OneNAND device structure 299 * @param addr - Address for which block number is needed 300 */ 301static unsigned flexonenand_block(struct onenand_chip *this, loff_t addr) 302{ 303 unsigned boundary, blk, die = 0; 304 305 if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) { 306 die = 1; 307 addr -= this->diesize[0]; 308 } 309 310 boundary = this->boundary[die]; 311 312 blk = addr >> (this->erase_shift - 1); 313 if (blk > boundary) 314 blk = (blk + boundary + 1) >> 1; 315 316 blk += die ? this->density_mask : 0; 317 return blk; 318} 319 320inline unsigned onenand_block(struct onenand_chip *this, loff_t addr) 321{ 322 if (!FLEXONENAND(this)) 323 return addr >> this->erase_shift; 324 return flexonenand_block(this, addr); 325} 326 327/** 328 * flexonenand_addr - Return address of the block 329 * @this: OneNAND device structure 330 * @block: Block number on Flex-OneNAND 331 * 332 * Return address of the block 333 */ 334static loff_t flexonenand_addr(struct onenand_chip *this, int block) 335{ 336 loff_t ofs = 0; 337 int die = 0, boundary; 338 339 if (ONENAND_IS_DDP(this) && block >= this->density_mask) { 340 block -= this->density_mask; 341 die = 1; 342 ofs = this->diesize[0]; 343 } 344 345 boundary = this->boundary[die]; 346 ofs += (loff_t)block << (this->erase_shift - 1); 347 if (block > (boundary + 1)) 348 ofs += (loff_t)(block - boundary - 1) << (this->erase_shift - 1); 349 return ofs; 350} 351 352loff_t onenand_addr(struct onenand_chip *this, int block) 353{ 354 if (!FLEXONENAND(this)) 355 return (loff_t)block << this->erase_shift; 356 return flexonenand_addr(this, block); 357} 358EXPORT_SYMBOL(onenand_addr); 359 360/** 361 * onenand_get_density - [DEFAULT] Get OneNAND density 362 * @param dev_id OneNAND device ID 363 * 364 * Get OneNAND density from device ID 365 */ 366static inline int onenand_get_density(int dev_id) 367{ 368 int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT; 369 return (density & ONENAND_DEVICE_DENSITY_MASK); 370} 371 372/** 373 * flexonenand_region - [Flex-OneNAND] Return erase region of addr 374 * @param mtd MTD device structure 375 * @param addr address whose erase region needs to be identified 376 */ 377int flexonenand_region(struct mtd_info *mtd, loff_t addr) 378{ 379 int i; 380 381 for (i = 0; i < mtd->numeraseregions; i++) 382 if (addr < mtd->eraseregions[i].offset) 383 break; 384 return i - 1; 385} 386EXPORT_SYMBOL(flexonenand_region); 387 388/** 389 * onenand_command - [DEFAULT] Send command to OneNAND device 390 * @param mtd MTD device structure 391 * @param cmd the command to be sent 392 * @param addr offset to read from or write to 393 * @param len number of bytes to read or write 394 * 395 * Send command to OneNAND device. This function is used for middle/large page 396 * devices (1KB/2KB Bytes per page) 397 */ 398static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len) 399{ 400 struct onenand_chip *this = mtd->priv; 401 int value, block, page; 402 403 /* Address translation */ 404 switch (cmd) { 405 case ONENAND_CMD_UNLOCK: 406 case ONENAND_CMD_LOCK: 407 case ONENAND_CMD_LOCK_TIGHT: 408 case ONENAND_CMD_UNLOCK_ALL: 409 block = -1; 410 page = -1; 411 break; 412 413 case FLEXONENAND_CMD_PI_ACCESS: 414 /* addr contains die index */ 415 block = addr * this->density_mask; 416 page = -1; 417 break; 418 419 case ONENAND_CMD_ERASE: 420 case ONENAND_CMD_MULTIBLOCK_ERASE: 421 case ONENAND_CMD_ERASE_VERIFY: 422 case ONENAND_CMD_BUFFERRAM: 423 case ONENAND_CMD_OTP_ACCESS: 424 block = onenand_block(this, addr); 425 page = -1; 426 break; 427 428 case FLEXONENAND_CMD_READ_PI: 429 cmd = ONENAND_CMD_READ; 430 block = addr * this->density_mask; 431 page = 0; 432 break; 433 434 default: 435 block = onenand_block(this, addr); 436 if (FLEXONENAND(this)) 437 page = (int) (addr - onenand_addr(this, block))>>\ 438 this->page_shift; 439 else 440 page = (int) (addr >> this->page_shift); 441 if (ONENAND_IS_2PLANE(this)) { 442 /* Make the even block number */ 443 block &= ~1; 444 /* Is it the odd plane? */ 445 if (addr & this->writesize) 446 block++; 447 page >>= 1; 448 } 449 page &= this->page_mask; 450 break; 451 } 452 453 /* NOTE: The setting order of the registers is very important! */ 454 if (cmd == ONENAND_CMD_BUFFERRAM) { 455 /* Select DataRAM for DDP */ 456 value = onenand_bufferram_address(this, block); 457 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 458 459 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this)) 460 /* It is always BufferRAM0 */ 461 ONENAND_SET_BUFFERRAM0(this); 462 else 463 /* Switch to the next data buffer */ 464 ONENAND_SET_NEXT_BUFFERRAM(this); 465 466 return 0; 467 } 468 469 if (block != -1) { 470 /* Write 'DFS, FBA' of Flash */ 471 value = onenand_block_address(this, block); 472 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 473 474 /* Select DataRAM for DDP */ 475 value = onenand_bufferram_address(this, block); 476 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 477 } 478 479 if (page != -1) { 480 /* Now we use page size operation */ 481 int sectors = 0, count = 0; 482 int dataram; 483 484 switch (cmd) { 485 case FLEXONENAND_CMD_RECOVER_LSB: 486 case ONENAND_CMD_READ: 487 case ONENAND_CMD_READOOB: 488 if (ONENAND_IS_4KB_PAGE(this)) 489 /* It is always BufferRAM0 */ 490 dataram = ONENAND_SET_BUFFERRAM0(this); 491 else 492 dataram = ONENAND_SET_NEXT_BUFFERRAM(this); 493 break; 494 495 default: 496 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG) 497 cmd = ONENAND_CMD_2X_PROG; 498 dataram = ONENAND_CURRENT_BUFFERRAM(this); 499 break; 500 } 501 502 /* Write 'FPA, FSA' of Flash */ 503 value = onenand_page_address(page, sectors); 504 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8); 505 506 /* Write 'BSA, BSC' of DataRAM */ 507 value = onenand_buffer_address(dataram, sectors, count); 508 this->write_word(value, this->base + ONENAND_REG_START_BUFFER); 509 } 510 511 /* Interrupt clear */ 512 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT); 513 514 /* Write command */ 515 this->write_word(cmd, this->base + ONENAND_REG_COMMAND); 516 517 return 0; 518} 519 520/** 521 * onenand_read_ecc - return ecc status 522 * @param this onenand chip structure 523 */ 524static inline int onenand_read_ecc(struct onenand_chip *this) 525{ 526 int ecc, i, result = 0; 527 528 if (!FLEXONENAND(this) && !ONENAND_IS_4KB_PAGE(this)) 529 return this->read_word(this->base + ONENAND_REG_ECC_STATUS); 530 531 for (i = 0; i < 4; i++) { 532 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i*2); 533 if (likely(!ecc)) 534 continue; 535 if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR) 536 return ONENAND_ECC_2BIT_ALL; 537 else 538 result = ONENAND_ECC_1BIT_ALL; 539 } 540 541 return result; 542} 543 544/** 545 * onenand_wait - [DEFAULT] wait until the command is done 546 * @param mtd MTD device structure 547 * @param state state to select the max. timeout value 548 * 549 * Wait for command done. This applies to all OneNAND command 550 * Read can take up to 30us, erase up to 2ms and program up to 350us 551 * according to general OneNAND specs 552 */ 553static int onenand_wait(struct mtd_info *mtd, int state) 554{ 555 struct onenand_chip * this = mtd->priv; 556 unsigned long timeout; 557 unsigned int flags = ONENAND_INT_MASTER; 558 unsigned int interrupt = 0; 559 unsigned int ctrl; 560 561 /* The 20 msec is enough */ 562 timeout = jiffies + msecs_to_jiffies(20); 563 while (time_before(jiffies, timeout)) { 564 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 565 566 if (interrupt & flags) 567 break; 568 569 if (state != FL_READING && state != FL_PREPARING_ERASE) 570 cond_resched(); 571 } 572 /* To get correct interrupt status in timeout case */ 573 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 574 575 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 576 577 /* 578 * In the Spec. it checks the controller status first 579 * However if you get the correct information in case of 580 * power off recovery (POR) test, it should read ECC status first 581 */ 582 if (interrupt & ONENAND_INT_READ) { 583 int ecc = onenand_read_ecc(this); 584 if (ecc) { 585 if (ecc & ONENAND_ECC_2BIT_ALL) { 586 printk(KERN_ERR "%s: ECC error = 0x%04x\n", 587 __func__, ecc); 588 mtd->ecc_stats.failed++; 589 return -EBADMSG; 590 } else if (ecc & ONENAND_ECC_1BIT_ALL) { 591 printk(KERN_DEBUG "%s: correctable ECC error = 0x%04x\n", 592 __func__, ecc); 593 mtd->ecc_stats.corrected++; 594 } 595 } 596 } else if (state == FL_READING) { 597 printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n", 598 __func__, ctrl, interrupt); 599 return -EIO; 600 } 601 602 if (state == FL_PREPARING_ERASE && !(interrupt & ONENAND_INT_ERASE)) { 603 printk(KERN_ERR "%s: mb erase timeout! ctrl=0x%04x intr=0x%04x\n", 604 __func__, ctrl, interrupt); 605 return -EIO; 606 } 607 608 if (!(interrupt & ONENAND_INT_MASTER)) { 609 printk(KERN_ERR "%s: timeout! ctrl=0x%04x intr=0x%04x\n", 610 __func__, ctrl, interrupt); 611 return -EIO; 612 } 613 614 /* If there's controller error, it's a real error */ 615 if (ctrl & ONENAND_CTRL_ERROR) { 616 printk(KERN_ERR "%s: controller error = 0x%04x\n", 617 __func__, ctrl); 618 if (ctrl & ONENAND_CTRL_LOCK) 619 printk(KERN_ERR "%s: it's locked error.\n", __func__); 620 return -EIO; 621 } 622 623 return 0; 624} 625 626/* 627 * onenand_interrupt - [DEFAULT] onenand interrupt handler 628 * @param irq onenand interrupt number 629 * @param dev_id interrupt data 630 * 631 * complete the work 632 */ 633static irqreturn_t onenand_interrupt(int irq, void *data) 634{ 635 struct onenand_chip *this = data; 636 637 /* To handle shared interrupt */ 638 if (!this->complete.done) 639 complete(&this->complete); 640 641 return IRQ_HANDLED; 642} 643 644/* 645 * onenand_interrupt_wait - [DEFAULT] wait until the command is done 646 * @param mtd MTD device structure 647 * @param state state to select the max. timeout value 648 * 649 * Wait for command done. 650 */ 651static int onenand_interrupt_wait(struct mtd_info *mtd, int state) 652{ 653 struct onenand_chip *this = mtd->priv; 654 655 wait_for_completion(&this->complete); 656 657 return onenand_wait(mtd, state); 658} 659 660/* 661 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait 662 * @param mtd MTD device structure 663 * @param state state to select the max. timeout value 664 * 665 * Try interrupt based wait (It is used one-time) 666 */ 667static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state) 668{ 669 struct onenand_chip *this = mtd->priv; 670 unsigned long remain, timeout; 671 672 /* We use interrupt wait first */ 673 this->wait = onenand_interrupt_wait; 674 675 timeout = msecs_to_jiffies(100); 676 remain = wait_for_completion_timeout(&this->complete, timeout); 677 if (!remain) { 678 printk(KERN_INFO "OneNAND: There's no interrupt. " 679 "We use the normal wait\n"); 680 681 /* Release the irq */ 682 free_irq(this->irq, this); 683 684 this->wait = onenand_wait; 685 } 686 687 return onenand_wait(mtd, state); 688} 689 690/* 691 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method 692 * @param mtd MTD device structure 693 * 694 * There's two method to wait onenand work 695 * 1. polling - read interrupt status register 696 * 2. interrupt - use the kernel interrupt method 697 */ 698static void onenand_setup_wait(struct mtd_info *mtd) 699{ 700 struct onenand_chip *this = mtd->priv; 701 int syscfg; 702 703 init_completion(&this->complete); 704 705 if (this->irq <= 0) { 706 this->wait = onenand_wait; 707 return; 708 } 709 710 if (request_irq(this->irq, &onenand_interrupt, 711 IRQF_SHARED, "onenand", this)) { 712 /* If we can't get irq, use the normal wait */ 713 this->wait = onenand_wait; 714 return; 715 } 716 717 /* Enable interrupt */ 718 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); 719 syscfg |= ONENAND_SYS_CFG1_IOBE; 720 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); 721 722 this->wait = onenand_try_interrupt_wait; 723} 724 725/** 726 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset 727 * @param mtd MTD data structure 728 * @param area BufferRAM area 729 * @return offset given area 730 * 731 * Return BufferRAM offset given area 732 */ 733static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area) 734{ 735 struct onenand_chip *this = mtd->priv; 736 737 if (ONENAND_CURRENT_BUFFERRAM(this)) { 738 /* Note: the 'this->writesize' is a real page size */ 739 if (area == ONENAND_DATARAM) 740 return this->writesize; 741 if (area == ONENAND_SPARERAM) 742 return mtd->oobsize; 743 } 744 745 return 0; 746} 747 748/** 749 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area 750 * @param mtd MTD data structure 751 * @param area BufferRAM area 752 * @param buffer the databuffer to put/get data 753 * @param offset offset to read from or write to 754 * @param count number of bytes to read/write 755 * 756 * Read the BufferRAM area 757 */ 758static int onenand_read_bufferram(struct mtd_info *mtd, int area, 759 unsigned char *buffer, int offset, size_t count) 760{ 761 struct onenand_chip *this = mtd->priv; 762 void __iomem *bufferram; 763 764 bufferram = this->base + area; 765 766 bufferram += onenand_bufferram_offset(mtd, area); 767 768 if (ONENAND_CHECK_BYTE_ACCESS(count)) { 769 unsigned short word; 770 771 /* Align with word(16-bit) size */ 772 count--; 773 774 /* Read word and save byte */ 775 word = this->read_word(bufferram + offset + count); 776 buffer[count] = (word & 0xff); 777 } 778 779 memcpy(buffer, bufferram + offset, count); 780 781 return 0; 782} 783 784/** 785 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode 786 * @param mtd MTD data structure 787 * @param area BufferRAM area 788 * @param buffer the databuffer to put/get data 789 * @param offset offset to read from or write to 790 * @param count number of bytes to read/write 791 * 792 * Read the BufferRAM area with Sync. Burst Mode 793 */ 794static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area, 795 unsigned char *buffer, int offset, size_t count) 796{ 797 struct onenand_chip *this = mtd->priv; 798 void __iomem *bufferram; 799 800 bufferram = this->base + area; 801 802 bufferram += onenand_bufferram_offset(mtd, area); 803 804 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ); 805 806 if (ONENAND_CHECK_BYTE_ACCESS(count)) { 807 unsigned short word; 808 809 /* Align with word(16-bit) size */ 810 count--; 811 812 /* Read word and save byte */ 813 word = this->read_word(bufferram + offset + count); 814 buffer[count] = (word & 0xff); 815 } 816 817 memcpy(buffer, bufferram + offset, count); 818 819 this->mmcontrol(mtd, 0); 820 821 return 0; 822} 823 824/** 825 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area 826 * @param mtd MTD data structure 827 * @param area BufferRAM area 828 * @param buffer the databuffer to put/get data 829 * @param offset offset to read from or write to 830 * @param count number of bytes to read/write 831 * 832 * Write the BufferRAM area 833 */ 834static int onenand_write_bufferram(struct mtd_info *mtd, int area, 835 const unsigned char *buffer, int offset, size_t count) 836{ 837 struct onenand_chip *this = mtd->priv; 838 void __iomem *bufferram; 839 840 bufferram = this->base + area; 841 842 bufferram += onenand_bufferram_offset(mtd, area); 843 844 if (ONENAND_CHECK_BYTE_ACCESS(count)) { 845 unsigned short word; 846 int byte_offset; 847 848 /* Align with word(16-bit) size */ 849 count--; 850 851 /* Calculate byte access offset */ 852 byte_offset = offset + count; 853 854 /* Read word and save byte */ 855 word = this->read_word(bufferram + byte_offset); 856 word = (word & ~0xff) | buffer[count]; 857 this->write_word(word, bufferram + byte_offset); 858 } 859 860 memcpy(bufferram + offset, buffer, count); 861 862 return 0; 863} 864 865/** 866 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode 867 * @param mtd MTD data structure 868 * @param addr address to check 869 * @return blockpage address 870 * 871 * Get blockpage address at 2x program mode 872 */ 873static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr) 874{ 875 struct onenand_chip *this = mtd->priv; 876 int blockpage, block, page; 877 878 /* Calculate the even block number */ 879 block = (int) (addr >> this->erase_shift) & ~1; 880 /* Is it the odd plane? */ 881 if (addr & this->writesize) 882 block++; 883 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask; 884 blockpage = (block << 7) | page; 885 886 return blockpage; 887} 888 889/** 890 * onenand_check_bufferram - [GENERIC] Check BufferRAM information 891 * @param mtd MTD data structure 892 * @param addr address to check 893 * @return 1 if there are valid data, otherwise 0 894 * 895 * Check bufferram if there is data we required 896 */ 897static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr) 898{ 899 struct onenand_chip *this = mtd->priv; 900 int blockpage, found = 0; 901 unsigned int i; 902 903 if (ONENAND_IS_2PLANE(this)) 904 blockpage = onenand_get_2x_blockpage(mtd, addr); 905 else 906 blockpage = (int) (addr >> this->page_shift); 907 908 /* Is there valid data? */ 909 i = ONENAND_CURRENT_BUFFERRAM(this); 910 if (this->bufferram[i].blockpage == blockpage) 911 found = 1; 912 else { 913 /* Check another BufferRAM */ 914 i = ONENAND_NEXT_BUFFERRAM(this); 915 if (this->bufferram[i].blockpage == blockpage) { 916 ONENAND_SET_NEXT_BUFFERRAM(this); 917 found = 1; 918 } 919 } 920 921 if (found && ONENAND_IS_DDP(this)) { 922 /* Select DataRAM for DDP */ 923 int block = onenand_block(this, addr); 924 int value = onenand_bufferram_address(this, block); 925 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 926 } 927 928 return found; 929} 930 931/** 932 * onenand_update_bufferram - [GENERIC] Update BufferRAM information 933 * @param mtd MTD data structure 934 * @param addr address to update 935 * @param valid valid flag 936 * 937 * Update BufferRAM information 938 */ 939static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr, 940 int valid) 941{ 942 struct onenand_chip *this = mtd->priv; 943 int blockpage; 944 unsigned int i; 945 946 if (ONENAND_IS_2PLANE(this)) 947 blockpage = onenand_get_2x_blockpage(mtd, addr); 948 else 949 blockpage = (int) (addr >> this->page_shift); 950 951 /* Invalidate another BufferRAM */ 952 i = ONENAND_NEXT_BUFFERRAM(this); 953 if (this->bufferram[i].blockpage == blockpage) 954 this->bufferram[i].blockpage = -1; 955 956 /* Update BufferRAM */ 957 i = ONENAND_CURRENT_BUFFERRAM(this); 958 if (valid) 959 this->bufferram[i].blockpage = blockpage; 960 else 961 this->bufferram[i].blockpage = -1; 962} 963 964/** 965 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information 966 * @param mtd MTD data structure 967 * @param addr start address to invalidate 968 * @param len length to invalidate 969 * 970 * Invalidate BufferRAM information 971 */ 972static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr, 973 unsigned int len) 974{ 975 struct onenand_chip *this = mtd->priv; 976 int i; 977 loff_t end_addr = addr + len; 978 979 /* Invalidate BufferRAM */ 980 for (i = 0; i < MAX_BUFFERRAM; i++) { 981 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift; 982 if (buf_addr >= addr && buf_addr < end_addr) 983 this->bufferram[i].blockpage = -1; 984 } 985} 986 987/** 988 * onenand_get_device - [GENERIC] Get chip for selected access 989 * @param mtd MTD device structure 990 * @param new_state the state which is requested 991 * 992 * Get the device and lock it for exclusive access 993 */ 994static int onenand_get_device(struct mtd_info *mtd, int new_state) 995{ 996 struct onenand_chip *this = mtd->priv; 997 DECLARE_WAITQUEUE(wait, current); 998 999 /* 1000 * Grab the lock and see if the device is available 1001 */ 1002 while (1) { 1003 spin_lock(&this->chip_lock); 1004 if (this->state == FL_READY) { 1005 this->state = new_state; 1006 spin_unlock(&this->chip_lock); 1007 if (new_state != FL_PM_SUSPENDED && this->enable) 1008 this->enable(mtd); 1009 break; 1010 } 1011 if (new_state == FL_PM_SUSPENDED) { 1012 spin_unlock(&this->chip_lock); 1013 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN; 1014 } 1015 set_current_state(TASK_UNINTERRUPTIBLE); 1016 add_wait_queue(&this->wq, &wait); 1017 spin_unlock(&this->chip_lock); 1018 schedule(); 1019 remove_wait_queue(&this->wq, &wait); 1020 } 1021 1022 return 0; 1023} 1024 1025/** 1026 * onenand_release_device - [GENERIC] release chip 1027 * @param mtd MTD device structure 1028 * 1029 * Deselect, release chip lock and wake up anyone waiting on the device 1030 */ 1031static void onenand_release_device(struct mtd_info *mtd) 1032{ 1033 struct onenand_chip *this = mtd->priv; 1034 1035 if (this->state != FL_PM_SUSPENDED && this->disable) 1036 this->disable(mtd); 1037 /* Release the chip */ 1038 spin_lock(&this->chip_lock); 1039 this->state = FL_READY; 1040 wake_up(&this->wq); 1041 spin_unlock(&this->chip_lock); 1042} 1043 1044/** 1045 * onenand_transfer_auto_oob - [INTERN] oob auto-placement transfer 1046 * @param mtd MTD device structure 1047 * @param buf destination address 1048 * @param column oob offset to read from 1049 * @param thislen oob length to read 1050 */ 1051static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column, 1052 int thislen) 1053{ 1054 struct onenand_chip *this = mtd->priv; 1055 1056 this->read_bufferram(mtd, ONENAND_SPARERAM, this->oob_buf, 0, 1057 mtd->oobsize); 1058 return mtd_ooblayout_get_databytes(mtd, buf, this->oob_buf, 1059 column, thislen); 1060} 1061 1062/** 1063 * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data 1064 * @param mtd MTD device structure 1065 * @param addr address to recover 1066 * @param status return value from onenand_wait / onenand_bbt_wait 1067 * 1068 * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has 1069 * lower page address and MSB page has higher page address in paired pages. 1070 * If power off occurs during MSB page program, the paired LSB page data can 1071 * become corrupt. LSB page recovery read is a way to read LSB page though page 1072 * data are corrupted. When uncorrectable error occurs as a result of LSB page 1073 * read after power up, issue LSB page recovery read. 1074 */ 1075static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status) 1076{ 1077 struct onenand_chip *this = mtd->priv; 1078 int i; 1079 1080 /* Recovery is only for Flex-OneNAND */ 1081 if (!FLEXONENAND(this)) 1082 return status; 1083 1084 /* check if we failed due to uncorrectable error */ 1085 if (!mtd_is_eccerr(status) && status != ONENAND_BBT_READ_ECC_ERROR) 1086 return status; 1087 1088 /* check if address lies in MLC region */ 1089 i = flexonenand_region(mtd, addr); 1090 if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift)) 1091 return status; 1092 1093 /* We are attempting to reread, so decrement stats.failed 1094 * which was incremented by onenand_wait due to read failure 1095 */ 1096 printk(KERN_INFO "%s: Attempting to recover from uncorrectable read\n", 1097 __func__); 1098 mtd->ecc_stats.failed--; 1099 1100 /* Issue the LSB page recovery command */ 1101 this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize); 1102 return this->wait(mtd, FL_READING); 1103} 1104 1105/** 1106 * onenand_mlc_read_ops_nolock - MLC OneNAND read main and/or out-of-band 1107 * @param mtd MTD device structure 1108 * @param from offset to read from 1109 * @param ops: oob operation description structure 1110 * 1111 * MLC OneNAND / Flex-OneNAND has 4KB page size and 4KB dataram. 1112 * So, read-while-load is not present. 1113 */ 1114static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from, 1115 struct mtd_oob_ops *ops) 1116{ 1117 struct onenand_chip *this = mtd->priv; 1118 struct mtd_ecc_stats stats; 1119 size_t len = ops->len; 1120 size_t ooblen = ops->ooblen; 1121 u_char *buf = ops->datbuf; 1122 u_char *oobbuf = ops->oobbuf; 1123 int read = 0, column, thislen; 1124 int oobread = 0, oobcolumn, thisooblen, oobsize; 1125 int ret = 0; 1126 int writesize = this->writesize; 1127 1128 pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from, 1129 (int)len); 1130 1131 oobsize = mtd_oobavail(mtd, ops); 1132 oobcolumn = from & (mtd->oobsize - 1); 1133 1134 /* Do not allow reads past end of device */ 1135 if (from + len > mtd->size) { 1136 printk(KERN_ERR "%s: Attempt read beyond end of device\n", 1137 __func__); 1138 ops->retlen = 0; 1139 ops->oobretlen = 0; 1140 return -EINVAL; 1141 } 1142 1143 stats = mtd->ecc_stats; 1144 1145 while (read < len) { 1146 cond_resched(); 1147 1148 thislen = min_t(int, writesize, len - read); 1149 1150 column = from & (writesize - 1); 1151 if (column + thislen > writesize) 1152 thislen = writesize - column; 1153 1154 if (!onenand_check_bufferram(mtd, from)) { 1155 this->command(mtd, ONENAND_CMD_READ, from, writesize); 1156 1157 ret = this->wait(mtd, FL_READING); 1158 if (unlikely(ret)) 1159 ret = onenand_recover_lsb(mtd, from, ret); 1160 onenand_update_bufferram(mtd, from, !ret); 1161 if (mtd_is_eccerr(ret)) 1162 ret = 0; 1163 if (ret) 1164 break; 1165 } 1166 1167 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen); 1168 if (oobbuf) { 1169 thisooblen = oobsize - oobcolumn; 1170 thisooblen = min_t(int, thisooblen, ooblen - oobread); 1171 1172 if (ops->mode == MTD_OPS_AUTO_OOB) 1173 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen); 1174 else 1175 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen); 1176 oobread += thisooblen; 1177 oobbuf += thisooblen; 1178 oobcolumn = 0; 1179 } 1180 1181 read += thislen; 1182 if (read == len) 1183 break; 1184 1185 from += thislen; 1186 buf += thislen; 1187 } 1188 1189 /* 1190 * Return success, if no ECC failures, else -EBADMSG 1191 * fs driver will take care of that, because 1192 * retlen == desired len and result == -EBADMSG 1193 */ 1194 ops->retlen = read; 1195 ops->oobretlen = oobread; 1196 1197 if (ret) 1198 return ret; 1199 1200 if (mtd->ecc_stats.failed - stats.failed) 1201 return -EBADMSG; 1202 1203 /* return max bitflips per ecc step; ONENANDs correct 1 bit only */ 1204 return mtd->ecc_stats.corrected != stats.corrected ? 1 : 0; 1205} 1206 1207/** 1208 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band 1209 * @param mtd MTD device structure 1210 * @param from offset to read from 1211 * @param ops: oob operation description structure 1212 * 1213 * OneNAND read main and/or out-of-band data 1214 */ 1215static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from, 1216 struct mtd_oob_ops *ops) 1217{ 1218 struct onenand_chip *this = mtd->priv; 1219 struct mtd_ecc_stats stats; 1220 size_t len = ops->len; 1221 size_t ooblen = ops->ooblen; 1222 u_char *buf = ops->datbuf; 1223 u_char *oobbuf = ops->oobbuf; 1224 int read = 0, column, thislen; 1225 int oobread = 0, oobcolumn, thisooblen, oobsize; 1226 int ret = 0, boundary = 0; 1227 int writesize = this->writesize; 1228 1229 pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from, 1230 (int)len); 1231 1232 oobsize = mtd_oobavail(mtd, ops); 1233 oobcolumn = from & (mtd->oobsize - 1); 1234 1235 /* Do not allow reads past end of device */ 1236 if ((from + len) > mtd->size) { 1237 printk(KERN_ERR "%s: Attempt read beyond end of device\n", 1238 __func__); 1239 ops->retlen = 0; 1240 ops->oobretlen = 0; 1241 return -EINVAL; 1242 } 1243 1244 stats = mtd->ecc_stats; 1245 1246 /* Read-while-load method */ 1247 1248 /* Do first load to bufferRAM */ 1249 if (read < len) { 1250 if (!onenand_check_bufferram(mtd, from)) { 1251 this->command(mtd, ONENAND_CMD_READ, from, writesize); 1252 ret = this->wait(mtd, FL_READING); 1253 onenand_update_bufferram(mtd, from, !ret); 1254 if (mtd_is_eccerr(ret)) 1255 ret = 0; 1256 } 1257 } 1258 1259 thislen = min_t(int, writesize, len - read); 1260 column = from & (writesize - 1); 1261 if (column + thislen > writesize) 1262 thislen = writesize - column; 1263 1264 while (!ret) { 1265 /* If there is more to load then start next load */ 1266 from += thislen; 1267 if (read + thislen < len) { 1268 this->command(mtd, ONENAND_CMD_READ, from, writesize); 1269 /* 1270 * Chip boundary handling in DDP 1271 * Now we issued chip 1 read and pointed chip 1 1272 * bufferram so we have to point chip 0 bufferram. 1273 */ 1274 if (ONENAND_IS_DDP(this) && 1275 unlikely(from == (this->chipsize >> 1))) { 1276 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2); 1277 boundary = 1; 1278 } else 1279 boundary = 0; 1280 ONENAND_SET_PREV_BUFFERRAM(this); 1281 } 1282 /* While load is going, read from last bufferRAM */ 1283 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen); 1284 1285 /* Read oob area if needed */ 1286 if (oobbuf) { 1287 thisooblen = oobsize - oobcolumn; 1288 thisooblen = min_t(int, thisooblen, ooblen - oobread); 1289 1290 if (ops->mode == MTD_OPS_AUTO_OOB) 1291 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen); 1292 else 1293 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen); 1294 oobread += thisooblen; 1295 oobbuf += thisooblen; 1296 oobcolumn = 0; 1297 } 1298 1299 /* See if we are done */ 1300 read += thislen; 1301 if (read == len) 1302 break; 1303 /* Set up for next read from bufferRAM */ 1304 if (unlikely(boundary)) 1305 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2); 1306 ONENAND_SET_NEXT_BUFFERRAM(this); 1307 buf += thislen; 1308 thislen = min_t(int, writesize, len - read); 1309 column = 0; 1310 cond_resched(); 1311 /* Now wait for load */ 1312 ret = this->wait(mtd, FL_READING); 1313 onenand_update_bufferram(mtd, from, !ret); 1314 if (mtd_is_eccerr(ret)) 1315 ret = 0; 1316 } 1317 1318 /* 1319 * Return success, if no ECC failures, else -EBADMSG 1320 * fs driver will take care of that, because 1321 * retlen == desired len and result == -EBADMSG 1322 */ 1323 ops->retlen = read; 1324 ops->oobretlen = oobread; 1325 1326 if (ret) 1327 return ret; 1328 1329 if (mtd->ecc_stats.failed - stats.failed) 1330 return -EBADMSG; 1331 1332 /* return max bitflips per ecc step; ONENANDs correct 1 bit only */ 1333 return mtd->ecc_stats.corrected != stats.corrected ? 1 : 0; 1334} 1335 1336/** 1337 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band 1338 * @param mtd MTD device structure 1339 * @param from offset to read from 1340 * @param ops: oob operation description structure 1341 * 1342 * OneNAND read out-of-band data from the spare area 1343 */ 1344static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from, 1345 struct mtd_oob_ops *ops) 1346{ 1347 struct onenand_chip *this = mtd->priv; 1348 struct mtd_ecc_stats stats; 1349 int read = 0, thislen, column, oobsize; 1350 size_t len = ops->ooblen; 1351 unsigned int mode = ops->mode; 1352 u_char *buf = ops->oobbuf; 1353 int ret = 0, readcmd; 1354 1355 from += ops->ooboffs; 1356 1357 pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from, 1358 (int)len); 1359 1360 /* Initialize return length value */ 1361 ops->oobretlen = 0; 1362 1363 if (mode == MTD_OPS_AUTO_OOB) 1364 oobsize = mtd->oobavail; 1365 else 1366 oobsize = mtd->oobsize; 1367 1368 column = from & (mtd->oobsize - 1); 1369 1370 if (unlikely(column >= oobsize)) { 1371 printk(KERN_ERR "%s: Attempted to start read outside oob\n", 1372 __func__); 1373 return -EINVAL; 1374 } 1375 1376 stats = mtd->ecc_stats; 1377 1378 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1379 1380 while (read < len) { 1381 cond_resched(); 1382 1383 thislen = oobsize - column; 1384 thislen = min_t(int, thislen, len); 1385 1386 this->command(mtd, readcmd, from, mtd->oobsize); 1387 1388 onenand_update_bufferram(mtd, from, 0); 1389 1390 ret = this->wait(mtd, FL_READING); 1391 if (unlikely(ret)) 1392 ret = onenand_recover_lsb(mtd, from, ret); 1393 1394 if (ret && !mtd_is_eccerr(ret)) { 1395 printk(KERN_ERR "%s: read failed = 0x%x\n", 1396 __func__, ret); 1397 break; 1398 } 1399 1400 if (mode == MTD_OPS_AUTO_OOB) 1401 onenand_transfer_auto_oob(mtd, buf, column, thislen); 1402 else 1403 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen); 1404 1405 read += thislen; 1406 1407 if (read == len) 1408 break; 1409 1410 buf += thislen; 1411 1412 /* Read more? */ 1413 if (read < len) { 1414 /* Page size */ 1415 from += mtd->writesize; 1416 column = 0; 1417 } 1418 } 1419 1420 ops->oobretlen = read; 1421 1422 if (ret) 1423 return ret; 1424 1425 if (mtd->ecc_stats.failed - stats.failed) 1426 return -EBADMSG; 1427 1428 return 0; 1429} 1430 1431/** 1432 * onenand_read_oob - [MTD Interface] Read main and/or out-of-band 1433 * @param mtd: MTD device structure 1434 * @param from: offset to read from 1435 * @param ops: oob operation description structure 1436 1437 * Read main and/or out-of-band 1438 */ 1439static int onenand_read_oob(struct mtd_info *mtd, loff_t from, 1440 struct mtd_oob_ops *ops) 1441{ 1442 struct onenand_chip *this = mtd->priv; 1443 int ret; 1444 1445 switch (ops->mode) { 1446 case MTD_OPS_PLACE_OOB: 1447 case MTD_OPS_AUTO_OOB: 1448 break; 1449 case MTD_OPS_RAW: 1450 /* Not implemented yet */ 1451 default: 1452 return -EINVAL; 1453 } 1454 1455 onenand_get_device(mtd, FL_READING); 1456 if (ops->datbuf) 1457 ret = ONENAND_IS_4KB_PAGE(this) ? 1458 onenand_mlc_read_ops_nolock(mtd, from, ops) : 1459 onenand_read_ops_nolock(mtd, from, ops); 1460 else 1461 ret = onenand_read_oob_nolock(mtd, from, ops); 1462 onenand_release_device(mtd); 1463 1464 return ret; 1465} 1466 1467/** 1468 * onenand_bbt_wait - [DEFAULT] wait until the command is done 1469 * @param mtd MTD device structure 1470 * @param state state to select the max. timeout value 1471 * 1472 * Wait for command done. 1473 */ 1474static int onenand_bbt_wait(struct mtd_info *mtd, int state) 1475{ 1476 struct onenand_chip *this = mtd->priv; 1477 unsigned long timeout; 1478 unsigned int interrupt, ctrl, ecc, addr1, addr8; 1479 1480 /* The 20 msec is enough */ 1481 timeout = jiffies + msecs_to_jiffies(20); 1482 while (time_before(jiffies, timeout)) { 1483 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 1484 if (interrupt & ONENAND_INT_MASTER) 1485 break; 1486 } 1487 /* To get correct interrupt status in timeout case */ 1488 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 1489 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 1490 addr1 = this->read_word(this->base + ONENAND_REG_START_ADDRESS1); 1491 addr8 = this->read_word(this->base + ONENAND_REG_START_ADDRESS8); 1492 1493 if (interrupt & ONENAND_INT_READ) { 1494 ecc = onenand_read_ecc(this); 1495 if (ecc & ONENAND_ECC_2BIT_ALL) { 1496 printk(KERN_DEBUG "%s: ecc 0x%04x ctrl 0x%04x " 1497 "intr 0x%04x addr1 %#x addr8 %#x\n", 1498 __func__, ecc, ctrl, interrupt, addr1, addr8); 1499 return ONENAND_BBT_READ_ECC_ERROR; 1500 } 1501 } else { 1502 printk(KERN_ERR "%s: read timeout! ctrl 0x%04x " 1503 "intr 0x%04x addr1 %#x addr8 %#x\n", 1504 __func__, ctrl, interrupt, addr1, addr8); 1505 return ONENAND_BBT_READ_FATAL_ERROR; 1506 } 1507 1508 /* Initial bad block case: 0x2400 or 0x0400 */ 1509 if (ctrl & ONENAND_CTRL_ERROR) { 1510 printk(KERN_DEBUG "%s: ctrl 0x%04x intr 0x%04x addr1 %#x " 1511 "addr8 %#x\n", __func__, ctrl, interrupt, addr1, addr8); 1512 return ONENAND_BBT_READ_ERROR; 1513 } 1514 1515 return 0; 1516} 1517 1518/** 1519 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan 1520 * @param mtd MTD device structure 1521 * @param from offset to read from 1522 * @param ops oob operation description structure 1523 * 1524 * OneNAND read out-of-band data from the spare area for bbt scan 1525 */ 1526int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from, 1527 struct mtd_oob_ops *ops) 1528{ 1529 struct onenand_chip *this = mtd->priv; 1530 int read = 0, thislen, column; 1531 int ret = 0, readcmd; 1532 size_t len = ops->ooblen; 1533 u_char *buf = ops->oobbuf; 1534 1535 pr_debug("%s: from = 0x%08x, len = %zi\n", __func__, (unsigned int)from, 1536 len); 1537 1538 /* Initialize return value */ 1539 ops->oobretlen = 0; 1540 1541 /* Do not allow reads past end of device */ 1542 if (unlikely((from + len) > mtd->size)) { 1543 printk(KERN_ERR "%s: Attempt read beyond end of device\n", 1544 __func__); 1545 return ONENAND_BBT_READ_FATAL_ERROR; 1546 } 1547 1548 /* Grab the lock and see if the device is available */ 1549 onenand_get_device(mtd, FL_READING); 1550 1551 column = from & (mtd->oobsize - 1); 1552 1553 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1554 1555 while (read < len) { 1556 cond_resched(); 1557 1558 thislen = mtd->oobsize - column; 1559 thislen = min_t(int, thislen, len); 1560 1561 this->command(mtd, readcmd, from, mtd->oobsize); 1562 1563 onenand_update_bufferram(mtd, from, 0); 1564 1565 ret = this->bbt_wait(mtd, FL_READING); 1566 if (unlikely(ret)) 1567 ret = onenand_recover_lsb(mtd, from, ret); 1568 1569 if (ret) 1570 break; 1571 1572 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen); 1573 read += thislen; 1574 if (read == len) 1575 break; 1576 1577 buf += thislen; 1578 1579 /* Read more? */ 1580 if (read < len) { 1581 /* Update Page size */ 1582 from += this->writesize; 1583 column = 0; 1584 } 1585 } 1586 1587 /* Deselect and wake up anyone waiting on the device */ 1588 onenand_release_device(mtd); 1589 1590 ops->oobretlen = read; 1591 return ret; 1592} 1593 1594#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE 1595/** 1596 * onenand_verify_oob - [GENERIC] verify the oob contents after a write 1597 * @param mtd MTD device structure 1598 * @param buf the databuffer to verify 1599 * @param to offset to read from 1600 */ 1601static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to) 1602{ 1603 struct onenand_chip *this = mtd->priv; 1604 u_char *oob_buf = this->oob_buf; 1605 int status, i, readcmd; 1606 1607 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1608 1609 this->command(mtd, readcmd, to, mtd->oobsize); 1610 onenand_update_bufferram(mtd, to, 0); 1611 status = this->wait(mtd, FL_READING); 1612 if (status) 1613 return status; 1614 1615 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize); 1616 for (i = 0; i < mtd->oobsize; i++) 1617 if (buf[i] != 0xFF && buf[i] != oob_buf[i]) 1618 return -EBADMSG; 1619 1620 return 0; 1621} 1622 1623/** 1624 * onenand_verify - [GENERIC] verify the chip contents after a write 1625 * @param mtd MTD device structure 1626 * @param buf the databuffer to verify 1627 * @param addr offset to read from 1628 * @param len number of bytes to read and compare 1629 */ 1630static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len) 1631{ 1632 struct onenand_chip *this = mtd->priv; 1633 int ret = 0; 1634 int thislen, column; 1635 1636 column = addr & (this->writesize - 1); 1637 1638 while (len != 0) { 1639 thislen = min_t(int, this->writesize - column, len); 1640 1641 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize); 1642 1643 onenand_update_bufferram(mtd, addr, 0); 1644 1645 ret = this->wait(mtd, FL_READING); 1646 if (ret) 1647 return ret; 1648 1649 onenand_update_bufferram(mtd, addr, 1); 1650 1651 this->read_bufferram(mtd, ONENAND_DATARAM, this->verify_buf, 0, mtd->writesize); 1652 1653 if (memcmp(buf, this->verify_buf + column, thislen)) 1654 return -EBADMSG; 1655 1656 len -= thislen; 1657 buf += thislen; 1658 addr += thislen; 1659 column = 0; 1660 } 1661 1662 return 0; 1663} 1664#else 1665#define onenand_verify(...) (0) 1666#define onenand_verify_oob(...) (0) 1667#endif 1668 1669#define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0) 1670 1671static void onenand_panic_wait(struct mtd_info *mtd) 1672{ 1673 struct onenand_chip *this = mtd->priv; 1674 unsigned int interrupt; 1675 int i; 1676 1677 for (i = 0; i < 2000; i++) { 1678 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 1679 if (interrupt & ONENAND_INT_MASTER) 1680 break; 1681 udelay(10); 1682 } 1683} 1684 1685/** 1686 * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context 1687 * @param mtd MTD device structure 1688 * @param to offset to write to 1689 * @param len number of bytes to write 1690 * @param retlen pointer to variable to store the number of written bytes 1691 * @param buf the data to write 1692 * 1693 * Write with ECC 1694 */ 1695static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len, 1696 size_t *retlen, const u_char *buf) 1697{ 1698 struct onenand_chip *this = mtd->priv; 1699 int column, subpage; 1700 int written = 0; 1701 1702 if (this->state == FL_PM_SUSPENDED) 1703 return -EBUSY; 1704 1705 /* Wait for any existing operation to clear */ 1706 onenand_panic_wait(mtd); 1707 1708 pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to, 1709 (int)len); 1710 1711 /* Reject writes, which are not page aligned */ 1712 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) { 1713 printk(KERN_ERR "%s: Attempt to write not page aligned data\n", 1714 __func__); 1715 return -EINVAL; 1716 } 1717 1718 column = to & (mtd->writesize - 1); 1719 1720 /* Loop until all data write */ 1721 while (written < len) { 1722 int thislen = min_t(int, mtd->writesize - column, len - written); 1723 u_char *wbuf = (u_char *) buf; 1724 1725 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen); 1726 1727 /* Partial page write */ 1728 subpage = thislen < mtd->writesize; 1729 if (subpage) { 1730 memset(this->page_buf, 0xff, mtd->writesize); 1731 memcpy(this->page_buf + column, buf, thislen); 1732 wbuf = this->page_buf; 1733 } 1734 1735 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize); 1736 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize); 1737 1738 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize); 1739 1740 onenand_panic_wait(mtd); 1741 1742 /* In partial page write we don't update bufferram */ 1743 onenand_update_bufferram(mtd, to, !subpage); 1744 if (ONENAND_IS_2PLANE(this)) { 1745 ONENAND_SET_BUFFERRAM1(this); 1746 onenand_update_bufferram(mtd, to + this->writesize, !subpage); 1747 } 1748 1749 written += thislen; 1750 1751 if (written == len) 1752 break; 1753 1754 column = 0; 1755 to += thislen; 1756 buf += thislen; 1757 } 1758 1759 *retlen = written; 1760 return 0; 1761} 1762 1763/** 1764 * onenand_fill_auto_oob - [INTERN] oob auto-placement transfer 1765 * @param mtd MTD device structure 1766 * @param oob_buf oob buffer 1767 * @param buf source address 1768 * @param column oob offset to write to 1769 * @param thislen oob length to write 1770 */ 1771static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf, 1772 const u_char *buf, int column, int thislen) 1773{ 1774 return mtd_ooblayout_set_databytes(mtd, buf, oob_buf, column, thislen); 1775} 1776 1777/** 1778 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band 1779 * @param mtd MTD device structure 1780 * @param to offset to write to 1781 * @param ops oob operation description structure 1782 * 1783 * Write main and/or oob with ECC 1784 */ 1785static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to, 1786 struct mtd_oob_ops *ops) 1787{ 1788 struct onenand_chip *this = mtd->priv; 1789 int written = 0, column, thislen = 0, subpage = 0; 1790 int prev = 0, prevlen = 0, prev_subpage = 0, first = 1; 1791 int oobwritten = 0, oobcolumn, thisooblen, oobsize; 1792 size_t len = ops->len; 1793 size_t ooblen = ops->ooblen; 1794 const u_char *buf = ops->datbuf; 1795 const u_char *oob = ops->oobbuf; 1796 u_char *oobbuf; 1797 int ret = 0, cmd; 1798 1799 pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to, 1800 (int)len); 1801 1802 /* Initialize retlen, in case of early exit */ 1803 ops->retlen = 0; 1804 ops->oobretlen = 0; 1805 1806 /* Reject writes, which are not page aligned */ 1807 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) { 1808 printk(KERN_ERR "%s: Attempt to write not page aligned data\n", 1809 __func__); 1810 return -EINVAL; 1811 } 1812 1813 /* Check zero length */ 1814 if (!len) 1815 return 0; 1816 oobsize = mtd_oobavail(mtd, ops); 1817 oobcolumn = to & (mtd->oobsize - 1); 1818 1819 column = to & (mtd->writesize - 1); 1820 1821 /* Loop until all data write */ 1822 while (1) { 1823 if (written < len) { 1824 u_char *wbuf = (u_char *) buf; 1825 1826 thislen = min_t(int, mtd->writesize - column, len - written); 1827 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten); 1828 1829 cond_resched(); 1830 1831 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen); 1832 1833 /* Partial page write */ 1834 subpage = thislen < mtd->writesize; 1835 if (subpage) { 1836 memset(this->page_buf, 0xff, mtd->writesize); 1837 memcpy(this->page_buf + column, buf, thislen); 1838 wbuf = this->page_buf; 1839 } 1840 1841 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize); 1842 1843 if (oob) { 1844 oobbuf = this->oob_buf; 1845 1846 /* We send data to spare ram with oobsize 1847 * to prevent byte access */ 1848 memset(oobbuf, 0xff, mtd->oobsize); 1849 if (ops->mode == MTD_OPS_AUTO_OOB) 1850 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen); 1851 else 1852 memcpy(oobbuf + oobcolumn, oob, thisooblen); 1853 1854 oobwritten += thisooblen; 1855 oob += thisooblen; 1856 oobcolumn = 0; 1857 } else 1858 oobbuf = (u_char *) ffchars; 1859 1860 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); 1861 } else 1862 ONENAND_SET_NEXT_BUFFERRAM(this); 1863 1864 /* 1865 * 2 PLANE, MLC, and Flex-OneNAND do not support 1866 * write-while-program feature. 1867 */ 1868 if (!ONENAND_IS_2PLANE(this) && !ONENAND_IS_4KB_PAGE(this) && !first) { 1869 ONENAND_SET_PREV_BUFFERRAM(this); 1870 1871 ret = this->wait(mtd, FL_WRITING); 1872 1873 /* In partial page write we don't update bufferram */ 1874 onenand_update_bufferram(mtd, prev, !ret && !prev_subpage); 1875 if (ret) { 1876 written -= prevlen; 1877 printk(KERN_ERR "%s: write failed %d\n", 1878 __func__, ret); 1879 break; 1880 } 1881 1882 if (written == len) { 1883 /* Only check verify write turn on */ 1884 ret = onenand_verify(mtd, buf - len, to - len, len); 1885 if (ret) 1886 printk(KERN_ERR "%s: verify failed %d\n", 1887 __func__, ret); 1888 break; 1889 } 1890 1891 ONENAND_SET_NEXT_BUFFERRAM(this); 1892 } 1893 1894 this->ongoing = 0; 1895 cmd = ONENAND_CMD_PROG; 1896 1897 /* Exclude 1st OTP and OTP blocks for cache program feature */ 1898 if (ONENAND_IS_CACHE_PROGRAM(this) && 1899 likely(onenand_block(this, to) != 0) && 1900 ONENAND_IS_4KB_PAGE(this) && 1901 ((written + thislen) < len)) { 1902 cmd = ONENAND_CMD_2X_CACHE_PROG; 1903 this->ongoing = 1; 1904 } 1905 1906 this->command(mtd, cmd, to, mtd->writesize); 1907 1908 /* 1909 * 2 PLANE, MLC, and Flex-OneNAND wait here 1910 */ 1911 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this)) { 1912 ret = this->wait(mtd, FL_WRITING); 1913 1914 /* In partial page write we don't update bufferram */ 1915 onenand_update_bufferram(mtd, to, !ret && !subpage); 1916 if (ret) { 1917 printk(KERN_ERR "%s: write failed %d\n", 1918 __func__, ret); 1919 break; 1920 } 1921 1922 /* Only check verify write turn on */ 1923 ret = onenand_verify(mtd, buf, to, thislen); 1924 if (ret) { 1925 printk(KERN_ERR "%s: verify failed %d\n", 1926 __func__, ret); 1927 break; 1928 } 1929 1930 written += thislen; 1931 1932 if (written == len) 1933 break; 1934 1935 } else 1936 written += thislen; 1937 1938 column = 0; 1939 prev_subpage = subpage; 1940 prev = to; 1941 prevlen = thislen; 1942 to += thislen; 1943 buf += thislen; 1944 first = 0; 1945 } 1946 1947 /* In error case, clear all bufferrams */ 1948 if (written != len) 1949 onenand_invalidate_bufferram(mtd, 0, -1); 1950 1951 ops->retlen = written; 1952 ops->oobretlen = oobwritten; 1953 1954 return ret; 1955} 1956 1957 1958/** 1959 * onenand_write_oob_nolock - [INTERN] OneNAND write out-of-band 1960 * @param mtd MTD device structure 1961 * @param to offset to write to 1962 * @param len number of bytes to write 1963 * @param retlen pointer to variable to store the number of written bytes 1964 * @param buf the data to write 1965 * @param mode operation mode 1966 * 1967 * OneNAND write out-of-band 1968 */ 1969static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to, 1970 struct mtd_oob_ops *ops) 1971{ 1972 struct onenand_chip *this = mtd->priv; 1973 int column, ret = 0, oobsize; 1974 int written = 0, oobcmd; 1975 u_char *oobbuf; 1976 size_t len = ops->ooblen; 1977 const u_char *buf = ops->oobbuf; 1978 unsigned int mode = ops->mode; 1979 1980 to += ops->ooboffs; 1981 1982 pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to, 1983 (int)len); 1984 1985 /* Initialize retlen, in case of early exit */ 1986 ops->oobretlen = 0; 1987 1988 if (mode == MTD_OPS_AUTO_OOB) 1989 oobsize = mtd->oobavail; 1990 else 1991 oobsize = mtd->oobsize; 1992 1993 column = to & (mtd->oobsize - 1); 1994 1995 if (unlikely(column >= oobsize)) { 1996 printk(KERN_ERR "%s: Attempted to start write outside oob\n", 1997 __func__); 1998 return -EINVAL; 1999 } 2000 2001 /* For compatibility with NAND: Do not allow write past end of page */ 2002 if (unlikely(column + len > oobsize)) { 2003 printk(KERN_ERR "%s: Attempt to write past end of page\n", 2004 __func__); 2005 return -EINVAL; 2006 } 2007 2008 oobbuf = this->oob_buf; 2009 2010 oobcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB; 2011 2012 /* Loop until all data write */ 2013 while (written < len) { 2014 int thislen = min_t(int, oobsize, len - written); 2015 2016 cond_resched(); 2017 2018 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize); 2019 2020 /* We send data to spare ram with oobsize 2021 * to prevent byte access */ 2022 memset(oobbuf, 0xff, mtd->oobsize); 2023 if (mode == MTD_OPS_AUTO_OOB) 2024 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen); 2025 else 2026 memcpy(oobbuf + column, buf, thislen); 2027 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); 2028 2029 if (ONENAND_IS_4KB_PAGE(this)) { 2030 /* Set main area of DataRAM to 0xff*/ 2031 memset(this->page_buf, 0xff, mtd->writesize); 2032 this->write_bufferram(mtd, ONENAND_DATARAM, 2033 this->page_buf, 0, mtd->writesize); 2034 } 2035 2036 this->command(mtd, oobcmd, to, mtd->oobsize); 2037 2038 onenand_update_bufferram(mtd, to, 0); 2039 if (ONENAND_IS_2PLANE(this)) { 2040 ONENAND_SET_BUFFERRAM1(this); 2041 onenand_update_bufferram(mtd, to + this->writesize, 0); 2042 } 2043 2044 ret = this->wait(mtd, FL_WRITING); 2045 if (ret) { 2046 printk(KERN_ERR "%s: write failed %d\n", __func__, ret); 2047 break; 2048 } 2049 2050 ret = onenand_verify_oob(mtd, oobbuf, to); 2051 if (ret) { 2052 printk(KERN_ERR "%s: verify failed %d\n", 2053 __func__, ret); 2054 break; 2055 } 2056 2057 written += thislen; 2058 if (written == len) 2059 break; 2060 2061 to += mtd->writesize; 2062 buf += thislen; 2063 column = 0; 2064 } 2065 2066 ops->oobretlen = written; 2067 2068 return ret; 2069} 2070 2071/** 2072 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band 2073 * @param mtd: MTD device structure 2074 * @param to: offset to write 2075 * @param ops: oob operation description structure 2076 */ 2077static int onenand_write_oob(struct mtd_info *mtd, loff_t to, 2078 struct mtd_oob_ops *ops) 2079{ 2080 int ret; 2081 2082 switch (ops->mode) { 2083 case MTD_OPS_PLACE_OOB: 2084 case MTD_OPS_AUTO_OOB: 2085 break; 2086 case MTD_OPS_RAW: 2087 /* Not implemented yet */ 2088 default: 2089 return -EINVAL; 2090 } 2091 2092 onenand_get_device(mtd, FL_WRITING); 2093 if (ops->datbuf) 2094 ret = onenand_write_ops_nolock(mtd, to, ops); 2095 else 2096 ret = onenand_write_oob_nolock(mtd, to, ops); 2097 onenand_release_device(mtd); 2098 2099 return ret; 2100} 2101 2102/** 2103 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad 2104 * @param mtd MTD device structure 2105 * @param ofs offset from device start 2106 * @param allowbbt 1, if its allowed to access the bbt area 2107 * 2108 * Check, if the block is bad. Either by reading the bad block table or 2109 * calling of the scan function. 2110 */ 2111static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt) 2112{ 2113 struct onenand_chip *this = mtd->priv; 2114 struct bbm_info *bbm = this->bbm; 2115 2116 /* Return info from the table */ 2117 return bbm->isbad_bbt(mtd, ofs, allowbbt); 2118} 2119 2120 2121static int onenand_multiblock_erase_verify(struct mtd_info *mtd, 2122 struct erase_info *instr) 2123{ 2124 struct onenand_chip *this = mtd->priv; 2125 loff_t addr = instr->addr; 2126 int len = instr->len; 2127 unsigned int block_size = (1 << this->erase_shift); 2128 int ret = 0; 2129 2130 while (len) { 2131 this->command(mtd, ONENAND_CMD_ERASE_VERIFY, addr, block_size); 2132 ret = this->wait(mtd, FL_VERIFYING_ERASE); 2133 if (ret) { 2134 printk(KERN_ERR "%s: Failed verify, block %d\n", 2135 __func__, onenand_block(this, addr)); 2136 instr->fail_addr = addr; 2137 return -1; 2138 } 2139 len -= block_size; 2140 addr += block_size; 2141 } 2142 return 0; 2143} 2144 2145/** 2146 * onenand_multiblock_erase - [INTERN] erase block(s) using multiblock erase 2147 * @param mtd MTD device structure 2148 * @param instr erase instruction 2149 * @param region erase region 2150 * 2151 * Erase one or more blocks up to 64 block at a time 2152 */ 2153static int onenand_multiblock_erase(struct mtd_info *mtd, 2154 struct erase_info *instr, 2155 unsigned int block_size) 2156{ 2157 struct onenand_chip *this = mtd->priv; 2158 loff_t addr = instr->addr; 2159 int len = instr->len; 2160 int eb_count = 0; 2161 int ret = 0; 2162 int bdry_block = 0; 2163 2164 if (ONENAND_IS_DDP(this)) { 2165 loff_t bdry_addr = this->chipsize >> 1; 2166 if (addr < bdry_addr && (addr + len) > bdry_addr) 2167 bdry_block = bdry_addr >> this->erase_shift; 2168 } 2169 2170 /* Pre-check bbs */ 2171 while (len) { 2172 /* Check if we have a bad block, we do not erase bad blocks */ 2173 if (onenand_block_isbad_nolock(mtd, addr, 0)) { 2174 printk(KERN_WARNING "%s: attempt to erase a bad block " 2175 "at addr 0x%012llx\n", 2176 __func__, (unsigned long long) addr); 2177 return -EIO; 2178 } 2179 len -= block_size; 2180 addr += block_size; 2181 } 2182 2183 len = instr->len; 2184 addr = instr->addr; 2185 2186 /* loop over 64 eb batches */ 2187 while (len) { 2188 struct erase_info verify_instr = *instr; 2189 int max_eb_count = MB_ERASE_MAX_BLK_COUNT; 2190 2191 verify_instr.addr = addr; 2192 verify_instr.len = 0; 2193 2194 /* do not cross chip boundary */ 2195 if (bdry_block) { 2196 int this_block = (addr >> this->erase_shift); 2197 2198 if (this_block < bdry_block) { 2199 max_eb_count = min(max_eb_count, 2200 (bdry_block - this_block)); 2201 } 2202 } 2203 2204 eb_count = 0; 2205 2206 while (len > block_size && eb_count < (max_eb_count - 1)) { 2207 this->command(mtd, ONENAND_CMD_MULTIBLOCK_ERASE, 2208 addr, block_size); 2209 onenand_invalidate_bufferram(mtd, addr, block_size); 2210 2211 ret = this->wait(mtd, FL_PREPARING_ERASE); 2212 if (ret) { 2213 printk(KERN_ERR "%s: Failed multiblock erase, " 2214 "block %d\n", __func__, 2215 onenand_block(this, addr)); 2216 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN; 2217 return -EIO; 2218 } 2219 2220 len -= block_size; 2221 addr += block_size; 2222 eb_count++; 2223 } 2224 2225 /* last block of 64-eb series */ 2226 cond_resched(); 2227 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); 2228 onenand_invalidate_bufferram(mtd, addr, block_size); 2229 2230 ret = this->wait(mtd, FL_ERASING); 2231 /* Check if it is write protected */ 2232 if (ret) { 2233 printk(KERN_ERR "%s: Failed erase, block %d\n", 2234 __func__, onenand_block(this, addr)); 2235 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN; 2236 return -EIO; 2237 } 2238 2239 len -= block_size; 2240 addr += block_size; 2241 eb_count++; 2242 2243 /* verify */ 2244 verify_instr.len = eb_count * block_size; 2245 if (onenand_multiblock_erase_verify(mtd, &verify_instr)) { 2246 instr->fail_addr = verify_instr.fail_addr; 2247 return -EIO; 2248 } 2249 2250 } 2251 return 0; 2252} 2253 2254 2255/** 2256 * onenand_block_by_block_erase - [INTERN] erase block(s) using regular erase 2257 * @param mtd MTD device structure 2258 * @param instr erase instruction 2259 * @param region erase region 2260 * @param block_size erase block size 2261 * 2262 * Erase one or more blocks one block at a time 2263 */ 2264static int onenand_block_by_block_erase(struct mtd_info *mtd, 2265 struct erase_info *instr, 2266 struct mtd_erase_region_info *region, 2267 unsigned int block_size) 2268{ 2269 struct onenand_chip *this = mtd->priv; 2270 loff_t addr = instr->addr; 2271 int len = instr->len; 2272 loff_t region_end = 0; 2273 int ret = 0; 2274 2275 if (region) { 2276 /* region is set for Flex-OneNAND */ 2277 region_end = region->offset + region->erasesize * region->numblocks; 2278 } 2279 2280 /* Loop through the blocks */ 2281 while (len) { 2282 cond_resched(); 2283 2284 /* Check if we have a bad block, we do not erase bad blocks */ 2285 if (onenand_block_isbad_nolock(mtd, addr, 0)) { 2286 printk(KERN_WARNING "%s: attempt to erase a bad block " 2287 "at addr 0x%012llx\n", 2288 __func__, (unsigned long long) addr); 2289 return -EIO; 2290 } 2291 2292 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); 2293 2294 onenand_invalidate_bufferram(mtd, addr, block_size); 2295 2296 ret = this->wait(mtd, FL_ERASING); 2297 /* Check, if it is write protected */ 2298 if (ret) { 2299 printk(KERN_ERR "%s: Failed erase, block %d\n", 2300 __func__, onenand_block(this, addr)); 2301 instr->fail_addr = addr; 2302 return -EIO; 2303 } 2304 2305 len -= block_size; 2306 addr += block_size; 2307 2308 if (region && addr == region_end) { 2309 if (!len) 2310 break; 2311 region++; 2312 2313 block_size = region->erasesize; 2314 region_end = region->offset + region->erasesize * region->numblocks; 2315 2316 if (len & (block_size - 1)) { 2317 /* FIXME: This should be handled at MTD partitioning level. */ 2318 printk(KERN_ERR "%s: Unaligned address\n", 2319 __func__); 2320 return -EIO; 2321 } 2322 } 2323 } 2324 return 0; 2325} 2326 2327/** 2328 * onenand_erase - [MTD Interface] erase block(s) 2329 * @param mtd MTD device structure 2330 * @param instr erase instruction 2331 * 2332 * Erase one or more blocks 2333 */ 2334static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr) 2335{ 2336 struct onenand_chip *this = mtd->priv; 2337 unsigned int block_size; 2338 loff_t addr = instr->addr; 2339 loff_t len = instr->len; 2340 int ret = 0; 2341 struct mtd_erase_region_info *region = NULL; 2342 loff_t region_offset = 0; 2343 2344 pr_debug("%s: start=0x%012llx, len=%llu\n", __func__, 2345 (unsigned long long)instr->addr, 2346 (unsigned long long)instr->len); 2347 2348 if (FLEXONENAND(this)) { 2349 /* Find the eraseregion of this address */ 2350 int i = flexonenand_region(mtd, addr); 2351 2352 region = &mtd->eraseregions[i]; 2353 block_size = region->erasesize; 2354 2355 /* Start address within region must align on block boundary. 2356 * Erase region's start offset is always block start address. 2357 */ 2358 region_offset = region->offset; 2359 } else 2360 block_size = 1 << this->erase_shift; 2361 2362 /* Start address must align on block boundary */ 2363 if (unlikely((addr - region_offset) & (block_size - 1))) { 2364 printk(KERN_ERR "%s: Unaligned address\n", __func__); 2365 return -EINVAL; 2366 } 2367 2368 /* Length must align on block boundary */ 2369 if (unlikely(len & (block_size - 1))) { 2370 printk(KERN_ERR "%s: Length not block aligned\n", __func__); 2371 return -EINVAL; 2372 } 2373 2374 /* Grab the lock and see if the device is available */ 2375 onenand_get_device(mtd, FL_ERASING); 2376 2377 if (ONENAND_IS_4KB_PAGE(this) || region || 2378 instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) { 2379 /* region is set for Flex-OneNAND (no mb erase) */ 2380 ret = onenand_block_by_block_erase(mtd, instr, 2381 region, block_size); 2382 } else { 2383 ret = onenand_multiblock_erase(mtd, instr, block_size); 2384 } 2385 2386 /* Deselect and wake up anyone waiting on the device */ 2387 onenand_release_device(mtd); 2388 2389 return ret; 2390} 2391 2392/** 2393 * onenand_sync - [MTD Interface] sync 2394 * @param mtd MTD device structure 2395 * 2396 * Sync is actually a wait for chip ready function 2397 */ 2398static void onenand_sync(struct mtd_info *mtd) 2399{ 2400 pr_debug("%s: called\n", __func__); 2401 2402 /* Grab the lock and see if the device is available */ 2403 onenand_get_device(mtd, FL_SYNCING); 2404 2405 /* Release it and go back */ 2406 onenand_release_device(mtd); 2407} 2408 2409/** 2410 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad 2411 * @param mtd MTD device structure 2412 * @param ofs offset relative to mtd start 2413 * 2414 * Check whether the block is bad 2415 */ 2416static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs) 2417{ 2418 int ret; 2419 2420 onenand_get_device(mtd, FL_READING); 2421 ret = onenand_block_isbad_nolock(mtd, ofs, 0); 2422 onenand_release_device(mtd); 2423 return ret; 2424} 2425 2426/** 2427 * onenand_default_block_markbad - [DEFAULT] mark a block bad 2428 * @param mtd MTD device structure 2429 * @param ofs offset from device start 2430 * 2431 * This is the default implementation, which can be overridden by 2432 * a hardware specific driver. 2433 */ 2434static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) 2435{ 2436 struct onenand_chip *this = mtd->priv; 2437 struct bbm_info *bbm = this->bbm; 2438 u_char buf[2] = {0, 0}; 2439 struct mtd_oob_ops ops = { 2440 .mode = MTD_OPS_PLACE_OOB, 2441 .ooblen = 2, 2442 .oobbuf = buf, 2443 .ooboffs = 0, 2444 }; 2445 int block; 2446 2447 /* Get block number */ 2448 block = onenand_block(this, ofs); 2449 if (bbm->bbt) 2450 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); 2451 2452 /* We write two bytes, so we don't have to mess with 16-bit access */ 2453 ofs += mtd->oobsize + (this->badblockpos & ~0x01); 2454 /* FIXME : What to do when marking SLC block in partition 2455 * with MLC erasesize? For now, it is not advisable to 2456 * create partitions containing both SLC and MLC regions. 2457 */ 2458 return onenand_write_oob_nolock(mtd, ofs, &ops); 2459} 2460 2461/** 2462 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad 2463 * @param mtd MTD device structure 2464 * @param ofs offset relative to mtd start 2465 * 2466 * Mark the block as bad 2467 */ 2468static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs) 2469{ 2470 struct onenand_chip *this = mtd->priv; 2471 int ret; 2472 2473 ret = onenand_block_isbad(mtd, ofs); 2474 if (ret) { 2475 /* If it was bad already, return success and do nothing */ 2476 if (ret > 0) 2477 return 0; 2478 return ret; 2479 } 2480 2481 onenand_get_device(mtd, FL_WRITING); 2482 ret = this->block_markbad(mtd, ofs); 2483 onenand_release_device(mtd); 2484 return ret; 2485} 2486 2487/** 2488 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s) 2489 * @param mtd MTD device structure 2490 * @param ofs offset relative to mtd start 2491 * @param len number of bytes to lock or unlock 2492 * @param cmd lock or unlock command 2493 * 2494 * Lock or unlock one or more blocks 2495 */ 2496static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd) 2497{ 2498 struct onenand_chip *this = mtd->priv; 2499 int start, end, block, value, status; 2500 int wp_status_mask; 2501 2502 start = onenand_block(this, ofs); 2503 end = onenand_block(this, ofs + len) - 1; 2504 2505 if (cmd == ONENAND_CMD_LOCK) 2506 wp_status_mask = ONENAND_WP_LS; 2507 else 2508 wp_status_mask = ONENAND_WP_US; 2509 2510 /* Continuous lock scheme */ 2511 if (this->options & ONENAND_HAS_CONT_LOCK) { 2512 /* Set start block address */ 2513 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2514 /* Set end block address */ 2515 this->write_word(end, this->base + ONENAND_REG_END_BLOCK_ADDRESS); 2516 /* Write lock command */ 2517 this->command(mtd, cmd, 0, 0); 2518 2519 /* There's no return value */ 2520 this->wait(mtd, FL_LOCKING); 2521 2522 /* Sanity check */ 2523 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 2524 & ONENAND_CTRL_ONGO) 2525 continue; 2526 2527 /* Check lock status */ 2528 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 2529 if (!(status & wp_status_mask)) 2530 printk(KERN_ERR "%s: wp status = 0x%x\n", 2531 __func__, status); 2532 2533 return 0; 2534 } 2535 2536 /* Block lock scheme */ 2537 for (block = start; block < end + 1; block++) { 2538 /* Set block address */ 2539 value = onenand_block_address(this, block); 2540 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 2541 /* Select DataRAM for DDP */ 2542 value = onenand_bufferram_address(this, block); 2543 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 2544 /* Set start block address */ 2545 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2546 /* Write lock command */ 2547 this->command(mtd, cmd, 0, 0); 2548 2549 /* There's no return value */ 2550 this->wait(mtd, FL_LOCKING); 2551 2552 /* Sanity check */ 2553 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 2554 & ONENAND_CTRL_ONGO) 2555 continue; 2556 2557 /* Check lock status */ 2558 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 2559 if (!(status & wp_status_mask)) 2560 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n", 2561 __func__, block, status); 2562 } 2563 2564 return 0; 2565} 2566 2567/** 2568 * onenand_lock - [MTD Interface] Lock block(s) 2569 * @param mtd MTD device structure 2570 * @param ofs offset relative to mtd start 2571 * @param len number of bytes to unlock 2572 * 2573 * Lock one or more blocks 2574 */ 2575static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) 2576{ 2577 int ret; 2578 2579 onenand_get_device(mtd, FL_LOCKING); 2580 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK); 2581 onenand_release_device(mtd); 2582 return ret; 2583} 2584 2585/** 2586 * onenand_unlock - [MTD Interface] Unlock block(s) 2587 * @param mtd MTD device structure 2588 * @param ofs offset relative to mtd start 2589 * @param len number of bytes to unlock 2590 * 2591 * Unlock one or more blocks 2592 */ 2593static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) 2594{ 2595 int ret; 2596 2597 onenand_get_device(mtd, FL_LOCKING); 2598 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK); 2599 onenand_release_device(mtd); 2600 return ret; 2601} 2602 2603/** 2604 * onenand_check_lock_status - [OneNAND Interface] Check lock status 2605 * @param this onenand chip data structure 2606 * 2607 * Check lock status 2608 */ 2609static int onenand_check_lock_status(struct onenand_chip *this) 2610{ 2611 unsigned int value, block, status; 2612 unsigned int end; 2613 2614 end = this->chipsize >> this->erase_shift; 2615 for (block = 0; block < end; block++) { 2616 /* Set block address */ 2617 value = onenand_block_address(this, block); 2618 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 2619 /* Select DataRAM for DDP */ 2620 value = onenand_bufferram_address(this, block); 2621 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 2622 /* Set start block address */ 2623 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2624 2625 /* Check lock status */ 2626 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 2627 if (!(status & ONENAND_WP_US)) { 2628 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n", 2629 __func__, block, status); 2630 return 0; 2631 } 2632 } 2633 2634 return 1; 2635} 2636 2637/** 2638 * onenand_unlock_all - [OneNAND Interface] unlock all blocks 2639 * @param mtd MTD device structure 2640 * 2641 * Unlock all blocks 2642 */ 2643static void onenand_unlock_all(struct mtd_info *mtd) 2644{ 2645 struct onenand_chip *this = mtd->priv; 2646 loff_t ofs = 0; 2647 loff_t len = mtd->size; 2648 2649 if (this->options & ONENAND_HAS_UNLOCK_ALL) { 2650 /* Set start block address */ 2651 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2652 /* Write unlock command */ 2653 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0); 2654 2655 /* There's no return value */ 2656 this->wait(mtd, FL_LOCKING); 2657 2658 /* Sanity check */ 2659 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 2660 & ONENAND_CTRL_ONGO) 2661 continue; 2662 2663 /* Don't check lock status */ 2664 if (this->options & ONENAND_SKIP_UNLOCK_CHECK) 2665 return; 2666 2667 /* Check lock status */ 2668 if (onenand_check_lock_status(this)) 2669 return; 2670 2671 /* Workaround for all block unlock in DDP */ 2672 if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) { 2673 /* All blocks on another chip */ 2674 ofs = this->chipsize >> 1; 2675 len = this->chipsize >> 1; 2676 } 2677 } 2678 2679 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK); 2680} 2681 2682#ifdef CONFIG_MTD_ONENAND_OTP 2683 2684/** 2685 * onenand_otp_command - Send OTP specific command to OneNAND device 2686 * @param mtd MTD device structure 2687 * @param cmd the command to be sent 2688 * @param addr offset to read from or write to 2689 * @param len number of bytes to read or write 2690 */ 2691static int onenand_otp_command(struct mtd_info *mtd, int cmd, loff_t addr, 2692 size_t len) 2693{ 2694 struct onenand_chip *this = mtd->priv; 2695 int value, block, page; 2696 2697 /* Address translation */ 2698 switch (cmd) { 2699 case ONENAND_CMD_OTP_ACCESS: 2700 block = (int) (addr >> this->erase_shift); 2701 page = -1; 2702 break; 2703 2704 default: 2705 block = (int) (addr >> this->erase_shift); 2706 page = (int) (addr >> this->page_shift); 2707 2708 if (ONENAND_IS_2PLANE(this)) { 2709 /* Make the even block number */ 2710 block &= ~1; 2711 /* Is it the odd plane? */ 2712 if (addr & this->writesize) 2713 block++; 2714 page >>= 1; 2715 } 2716 page &= this->page_mask; 2717 break; 2718 } 2719 2720 if (block != -1) { 2721 /* Write 'DFS, FBA' of Flash */ 2722 value = onenand_block_address(this, block); 2723 this->write_word(value, this->base + 2724 ONENAND_REG_START_ADDRESS1); 2725 } 2726 2727 if (page != -1) { 2728 /* Now we use page size operation */ 2729 int sectors = 4, count = 4; 2730 int dataram; 2731 2732 switch (cmd) { 2733 default: 2734 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG) 2735 cmd = ONENAND_CMD_2X_PROG; 2736 dataram = ONENAND_CURRENT_BUFFERRAM(this); 2737 break; 2738 } 2739 2740 /* Write 'FPA, FSA' of Flash */ 2741 value = onenand_page_address(page, sectors); 2742 this->write_word(value, this->base + 2743 ONENAND_REG_START_ADDRESS8); 2744 2745 /* Write 'BSA, BSC' of DataRAM */ 2746 value = onenand_buffer_address(dataram, sectors, count); 2747 this->write_word(value, this->base + ONENAND_REG_START_BUFFER); 2748 } 2749 2750 /* Interrupt clear */ 2751 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT); 2752 2753 /* Write command */ 2754 this->write_word(cmd, this->base + ONENAND_REG_COMMAND); 2755 2756 return 0; 2757} 2758 2759/** 2760 * onenand_otp_write_oob_nolock - [INTERN] OneNAND write out-of-band, specific to OTP 2761 * @param mtd MTD device structure 2762 * @param to offset to write to 2763 * @param len number of bytes to write 2764 * @param retlen pointer to variable to store the number of written bytes 2765 * @param buf the data to write 2766 * 2767 * OneNAND write out-of-band only for OTP 2768 */ 2769static int onenand_otp_write_oob_nolock(struct mtd_info *mtd, loff_t to, 2770 struct mtd_oob_ops *ops) 2771{ 2772 struct onenand_chip *this = mtd->priv; 2773 int column, ret = 0, oobsize; 2774 int written = 0; 2775 u_char *oobbuf; 2776 size_t len = ops->ooblen; 2777 const u_char *buf = ops->oobbuf; 2778 int block, value, status; 2779 2780 to += ops->ooboffs; 2781 2782 /* Initialize retlen, in case of early exit */ 2783 ops->oobretlen = 0; 2784 2785 oobsize = mtd->oobsize; 2786 2787 column = to & (mtd->oobsize - 1); 2788 2789 oobbuf = this->oob_buf; 2790 2791 /* Loop until all data write */ 2792 while (written < len) { 2793 int thislen = min_t(int, oobsize, len - written); 2794 2795 cond_resched(); 2796 2797 block = (int) (to >> this->erase_shift); 2798 /* 2799 * Write 'DFS, FBA' of Flash 2800 * Add: F100h DQ=DFS, FBA 2801 */ 2802 2803 value = onenand_block_address(this, block); 2804 this->write_word(value, this->base + 2805 ONENAND_REG_START_ADDRESS1); 2806 2807 /* 2808 * Select DataRAM for DDP 2809 * Add: F101h DQ=DBS 2810 */ 2811 2812 value = onenand_bufferram_address(this, block); 2813 this->write_word(value, this->base + 2814 ONENAND_REG_START_ADDRESS2); 2815 ONENAND_SET_NEXT_BUFFERRAM(this); 2816 2817 /* 2818 * Enter OTP access mode 2819 */ 2820 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 2821 this->wait(mtd, FL_OTPING); 2822 2823 /* We send data to spare ram with oobsize 2824 * to prevent byte access */ 2825 memcpy(oobbuf + column, buf, thislen); 2826 2827 /* 2828 * Write Data into DataRAM 2829 * Add: 8th Word 2830 * in sector0/spare/page0 2831 * DQ=XXFCh 2832 */ 2833 this->write_bufferram(mtd, ONENAND_SPARERAM, 2834 oobbuf, 0, mtd->oobsize); 2835 2836 onenand_otp_command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize); 2837 onenand_update_bufferram(mtd, to, 0); 2838 if (ONENAND_IS_2PLANE(this)) { 2839 ONENAND_SET_BUFFERRAM1(this); 2840 onenand_update_bufferram(mtd, to + this->writesize, 0); 2841 } 2842 2843 ret = this->wait(mtd, FL_WRITING); 2844 if (ret) { 2845 printk(KERN_ERR "%s: write failed %d\n", __func__, ret); 2846 break; 2847 } 2848 2849 /* Exit OTP access mode */ 2850 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 2851 this->wait(mtd, FL_RESETTING); 2852 2853 status = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 2854 status &= 0x60; 2855 2856 if (status == 0x60) { 2857 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n"); 2858 printk(KERN_DEBUG "1st Block\tLOCKED\n"); 2859 printk(KERN_DEBUG "OTP Block\tLOCKED\n"); 2860 } else if (status == 0x20) { 2861 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n"); 2862 printk(KERN_DEBUG "1st Block\tLOCKED\n"); 2863 printk(KERN_DEBUG "OTP Block\tUN-LOCKED\n"); 2864 } else if (status == 0x40) { 2865 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n"); 2866 printk(KERN_DEBUG "1st Block\tUN-LOCKED\n"); 2867 printk(KERN_DEBUG "OTP Block\tLOCKED\n"); 2868 } else { 2869 printk(KERN_DEBUG "Reboot to check\n"); 2870 } 2871 2872 written += thislen; 2873 if (written == len) 2874 break; 2875 2876 to += mtd->writesize; 2877 buf += thislen; 2878 column = 0; 2879 } 2880 2881 ops->oobretlen = written; 2882 2883 return ret; 2884} 2885 2886/* Internal OTP operation */ 2887typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len, 2888 size_t *retlen, u_char *buf); 2889 2890/** 2891 * do_otp_read - [DEFAULT] Read OTP block area 2892 * @param mtd MTD device structure 2893 * @param from The offset to read 2894 * @param len number of bytes to read 2895 * @param retlen pointer to variable to store the number of readbytes 2896 * @param buf the databuffer to put/get data 2897 * 2898 * Read OTP block area. 2899 */ 2900static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len, 2901 size_t *retlen, u_char *buf) 2902{ 2903 struct onenand_chip *this = mtd->priv; 2904 struct mtd_oob_ops ops = { 2905 .len = len, 2906 .ooblen = 0, 2907 .datbuf = buf, 2908 .oobbuf = NULL, 2909 }; 2910 int ret; 2911 2912 /* Enter OTP access mode */ 2913 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 2914 this->wait(mtd, FL_OTPING); 2915 2916 ret = ONENAND_IS_4KB_PAGE(this) ? 2917 onenand_mlc_read_ops_nolock(mtd, from, &ops) : 2918 onenand_read_ops_nolock(mtd, from, &ops); 2919 2920 /* Exit OTP access mode */ 2921 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 2922 this->wait(mtd, FL_RESETTING); 2923 2924 return ret; 2925} 2926 2927/** 2928 * do_otp_write - [DEFAULT] Write OTP block area 2929 * @param mtd MTD device structure 2930 * @param to The offset to write 2931 * @param len number of bytes to write 2932 * @param retlen pointer to variable to store the number of write bytes 2933 * @param buf the databuffer to put/get data 2934 * 2935 * Write OTP block area. 2936 */ 2937static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len, 2938 size_t *retlen, u_char *buf) 2939{ 2940 struct onenand_chip *this = mtd->priv; 2941 unsigned char *pbuf = buf; 2942 int ret; 2943 struct mtd_oob_ops ops; 2944 2945 /* Force buffer page aligned */ 2946 if (len < mtd->writesize) { 2947 memcpy(this->page_buf, buf, len); 2948 memset(this->page_buf + len, 0xff, mtd->writesize - len); 2949 pbuf = this->page_buf; 2950 len = mtd->writesize; 2951 } 2952 2953 /* Enter OTP access mode */ 2954 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 2955 this->wait(mtd, FL_OTPING); 2956 2957 ops.len = len; 2958 ops.ooblen = 0; 2959 ops.datbuf = pbuf; 2960 ops.oobbuf = NULL; 2961 ret = onenand_write_ops_nolock(mtd, to, &ops); 2962 *retlen = ops.retlen; 2963 2964 /* Exit OTP access mode */ 2965 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 2966 this->wait(mtd, FL_RESETTING); 2967 2968 return ret; 2969} 2970 2971/** 2972 * do_otp_lock - [DEFAULT] Lock OTP block area 2973 * @param mtd MTD device structure 2974 * @param from The offset to lock 2975 * @param len number of bytes to lock 2976 * @param retlen pointer to variable to store the number of lock bytes 2977 * @param buf the databuffer to put/get data 2978 * 2979 * Lock OTP block area. 2980 */ 2981static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len, 2982 size_t *retlen, u_char *buf) 2983{ 2984 struct onenand_chip *this = mtd->priv; 2985 struct mtd_oob_ops ops; 2986 int ret; 2987 2988 if (FLEXONENAND(this)) { 2989 2990 /* Enter OTP access mode */ 2991 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 2992 this->wait(mtd, FL_OTPING); 2993 /* 2994 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of 2995 * main area of page 49. 2996 */ 2997 ops.len = mtd->writesize; 2998 ops.ooblen = 0; 2999 ops.datbuf = buf; 3000 ops.oobbuf = NULL; 3001 ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops); 3002 *retlen = ops.retlen; 3003 3004 /* Exit OTP access mode */ 3005 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 3006 this->wait(mtd, FL_RESETTING); 3007 } else { 3008 ops.mode = MTD_OPS_PLACE_OOB; 3009 ops.ooblen = len; 3010 ops.oobbuf = buf; 3011 ops.ooboffs = 0; 3012 ret = onenand_otp_write_oob_nolock(mtd, from, &ops); 3013 *retlen = ops.oobretlen; 3014 } 3015 3016 return ret; 3017} 3018 3019/** 3020 * onenand_otp_walk - [DEFAULT] Handle OTP operation 3021 * @param mtd MTD device structure 3022 * @param from The offset to read/write 3023 * @param len number of bytes to read/write 3024 * @param retlen pointer to variable to store the number of read bytes 3025 * @param buf the databuffer to put/get data 3026 * @param action do given action 3027 * @param mode specify user and factory 3028 * 3029 * Handle OTP operation. 3030 */ 3031static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len, 3032 size_t *retlen, u_char *buf, 3033 otp_op_t action, int mode) 3034{ 3035 struct onenand_chip *this = mtd->priv; 3036 int otp_pages; 3037 int density; 3038 int ret = 0; 3039 3040 *retlen = 0; 3041 3042 density = onenand_get_density(this->device_id); 3043 if (density < ONENAND_DEVICE_DENSITY_512Mb) 3044 otp_pages = 20; 3045 else 3046 otp_pages = 50; 3047 3048 if (mode == MTD_OTP_FACTORY) { 3049 from += mtd->writesize * otp_pages; 3050 otp_pages = ONENAND_PAGES_PER_BLOCK - otp_pages; 3051 } 3052 3053 /* Check User/Factory boundary */ 3054 if (mode == MTD_OTP_USER) { 3055 if (mtd->writesize * otp_pages < from + len) 3056 return 0; 3057 } else { 3058 if (mtd->writesize * otp_pages < len) 3059 return 0; 3060 } 3061 3062 onenand_get_device(mtd, FL_OTPING); 3063 while (len > 0 && otp_pages > 0) { 3064 if (!action) { /* OTP Info functions */ 3065 struct otp_info *otpinfo; 3066 3067 len -= sizeof(struct otp_info); 3068 if (len <= 0) { 3069 ret = -ENOSPC; 3070 break; 3071 } 3072 3073 otpinfo = (struct otp_info *) buf; 3074 otpinfo->start = from; 3075 otpinfo->length = mtd->writesize; 3076 otpinfo->locked = 0; 3077 3078 from += mtd->writesize; 3079 buf += sizeof(struct otp_info); 3080 *retlen += sizeof(struct otp_info); 3081 } else { 3082 size_t tmp_retlen; 3083 3084 ret = action(mtd, from, len, &tmp_retlen, buf); 3085 if (ret) 3086 break; 3087 3088 buf += tmp_retlen; 3089 len -= tmp_retlen; 3090 *retlen += tmp_retlen; 3091 3092 } 3093 otp_pages--; 3094 } 3095 onenand_release_device(mtd); 3096 3097 return ret; 3098} 3099 3100/** 3101 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info 3102 * @param mtd MTD device structure 3103 * @param len number of bytes to read 3104 * @param retlen pointer to variable to store the number of read bytes 3105 * @param buf the databuffer to put/get data 3106 * 3107 * Read factory OTP info. 3108 */ 3109static int onenand_get_fact_prot_info(struct mtd_info *mtd, size_t len, 3110 size_t *retlen, struct otp_info *buf) 3111{ 3112 return onenand_otp_walk(mtd, 0, len, retlen, (u_char *) buf, NULL, 3113 MTD_OTP_FACTORY); 3114} 3115 3116/** 3117 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area 3118 * @param mtd MTD device structure 3119 * @param from The offset to read 3120 * @param len number of bytes to read 3121 * @param retlen pointer to variable to store the number of read bytes 3122 * @param buf the databuffer to put/get data 3123 * 3124 * Read factory OTP area. 3125 */ 3126static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from, 3127 size_t len, size_t *retlen, u_char *buf) 3128{ 3129 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY); 3130} 3131 3132/** 3133 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info 3134 * @param mtd MTD device structure 3135 * @param retlen pointer to variable to store the number of read bytes 3136 * @param len number of bytes to read 3137 * @param buf the databuffer to put/get data 3138 * 3139 * Read user OTP info. 3140 */ 3141static int onenand_get_user_prot_info(struct mtd_info *mtd, size_t len, 3142 size_t *retlen, struct otp_info *buf) 3143{ 3144 return onenand_otp_walk(mtd, 0, len, retlen, (u_char *) buf, NULL, 3145 MTD_OTP_USER); 3146} 3147 3148/** 3149 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area 3150 * @param mtd MTD device structure 3151 * @param from The offset to read 3152 * @param len number of bytes to read 3153 * @param retlen pointer to variable to store the number of read bytes 3154 * @param buf the databuffer to put/get data 3155 * 3156 * Read user OTP area. 3157 */ 3158static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from, 3159 size_t len, size_t *retlen, u_char *buf) 3160{ 3161 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER); 3162} 3163 3164/** 3165 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area 3166 * @param mtd MTD device structure 3167 * @param from The offset to write 3168 * @param len number of bytes to write 3169 * @param retlen pointer to variable to store the number of write bytes 3170 * @param buf the databuffer to put/get data 3171 * 3172 * Write user OTP area. 3173 */ 3174static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from, 3175 size_t len, size_t *retlen, u_char *buf) 3176{ 3177 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER); 3178} 3179 3180/** 3181 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area 3182 * @param mtd MTD device structure 3183 * @param from The offset to lock 3184 * @param len number of bytes to unlock 3185 * 3186 * Write lock mark on spare area in page 0 in OTP block 3187 */ 3188static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from, 3189 size_t len) 3190{ 3191 struct onenand_chip *this = mtd->priv; 3192 u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf; 3193 size_t retlen; 3194 int ret; 3195 unsigned int otp_lock_offset = ONENAND_OTP_LOCK_OFFSET; 3196 3197 memset(buf, 0xff, FLEXONENAND(this) ? this->writesize 3198 : mtd->oobsize); 3199 /* 3200 * Write lock mark to 8th word of sector0 of page0 of the spare0. 3201 * We write 16 bytes spare area instead of 2 bytes. 3202 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of 3203 * main area of page 49. 3204 */ 3205 3206 from = 0; 3207 len = FLEXONENAND(this) ? mtd->writesize : 16; 3208 3209 /* 3210 * Note: OTP lock operation 3211 * OTP block : 0xXXFC XX 1111 1100 3212 * 1st block : 0xXXF3 (If chip support) XX 1111 0011 3213 * Both : 0xXXF0 (If chip support) XX 1111 0000 3214 */ 3215 if (FLEXONENAND(this)) 3216 otp_lock_offset = FLEXONENAND_OTP_LOCK_OFFSET; 3217 3218 /* ONENAND_OTP_AREA | ONENAND_OTP_BLOCK0 | ONENAND_OTP_AREA_BLOCK0 */ 3219 if (otp == 1) 3220 buf[otp_lock_offset] = 0xFC; 3221 else if (otp == 2) 3222 buf[otp_lock_offset] = 0xF3; 3223 else if (otp == 3) 3224 buf[otp_lock_offset] = 0xF0; 3225 else if (otp != 0) 3226 printk(KERN_DEBUG "[OneNAND] Invalid option selected for OTP\n"); 3227 3228 ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER); 3229 3230 return ret ? : retlen; 3231} 3232 3233#endif /* CONFIG_MTD_ONENAND_OTP */ 3234 3235/** 3236 * onenand_check_features - Check and set OneNAND features 3237 * @param mtd MTD data structure 3238 * 3239 * Check and set OneNAND features 3240 * - lock scheme 3241 * - two plane 3242 */ 3243static void onenand_check_features(struct mtd_info *mtd) 3244{ 3245 struct onenand_chip *this = mtd->priv; 3246 unsigned int density, process, numbufs; 3247 3248 /* Lock scheme depends on density and process */ 3249 density = onenand_get_density(this->device_id); 3250 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT; 3251 numbufs = this->read_word(this->base + ONENAND_REG_NUM_BUFFERS) >> 8; 3252 3253 /* Lock scheme */ 3254 switch (density) { 3255 case ONENAND_DEVICE_DENSITY_8Gb: 3256 this->options |= ONENAND_HAS_NOP_1; 3257 fallthrough; 3258 case ONENAND_DEVICE_DENSITY_4Gb: 3259 if (ONENAND_IS_DDP(this)) 3260 this->options |= ONENAND_HAS_2PLANE; 3261 else if (numbufs == 1) { 3262 this->options |= ONENAND_HAS_4KB_PAGE; 3263 this->options |= ONENAND_HAS_CACHE_PROGRAM; 3264 /* 3265 * There are two different 4KiB pagesize chips 3266 * and no way to detect it by H/W config values. 3267 * 3268 * To detect the correct NOP for each chips, 3269 * It should check the version ID as workaround. 3270 * 3271 * Now it has as following 3272 * KFM4G16Q4M has NOP 4 with version ID 0x0131 3273 * KFM4G16Q5M has NOP 1 with versoin ID 0x013e 3274 */ 3275 if ((this->version_id & 0xf) == 0xe) 3276 this->options |= ONENAND_HAS_NOP_1; 3277 } 3278 this->options |= ONENAND_HAS_UNLOCK_ALL; 3279 break; 3280 3281 case ONENAND_DEVICE_DENSITY_2Gb: 3282 /* 2Gb DDP does not have 2 plane */ 3283 if (!ONENAND_IS_DDP(this)) 3284 this->options |= ONENAND_HAS_2PLANE; 3285 this->options |= ONENAND_HAS_UNLOCK_ALL; 3286 break; 3287 3288 case ONENAND_DEVICE_DENSITY_1Gb: 3289 /* A-Die has all block unlock */ 3290 if (process) 3291 this->options |= ONENAND_HAS_UNLOCK_ALL; 3292 break; 3293 3294 default: 3295 /* Some OneNAND has continuous lock scheme */ 3296 if (!process) 3297 this->options |= ONENAND_HAS_CONT_LOCK; 3298 break; 3299 } 3300 3301 /* The MLC has 4KiB pagesize. */ 3302 if (ONENAND_IS_MLC(this)) 3303 this->options |= ONENAND_HAS_4KB_PAGE; 3304 3305 if (ONENAND_IS_4KB_PAGE(this)) 3306 this->options &= ~ONENAND_HAS_2PLANE; 3307 3308 if (FLEXONENAND(this)) { 3309 this->options &= ~ONENAND_HAS_CONT_LOCK; 3310 this->options |= ONENAND_HAS_UNLOCK_ALL; 3311 } 3312 3313 if (this->options & ONENAND_HAS_CONT_LOCK) 3314 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n"); 3315 if (this->options & ONENAND_HAS_UNLOCK_ALL) 3316 printk(KERN_DEBUG "Chip support all block unlock\n"); 3317 if (this->options & ONENAND_HAS_2PLANE) 3318 printk(KERN_DEBUG "Chip has 2 plane\n"); 3319 if (this->options & ONENAND_HAS_4KB_PAGE) 3320 printk(KERN_DEBUG "Chip has 4KiB pagesize\n"); 3321 if (this->options & ONENAND_HAS_CACHE_PROGRAM) 3322 printk(KERN_DEBUG "Chip has cache program feature\n"); 3323} 3324 3325/** 3326 * onenand_print_device_info - Print device & version ID 3327 * @param device device ID 3328 * @param version version ID 3329 * 3330 * Print device & version ID 3331 */ 3332static void onenand_print_device_info(int device, int version) 3333{ 3334 int vcc, demuxed, ddp, density, flexonenand; 3335 3336 vcc = device & ONENAND_DEVICE_VCC_MASK; 3337 demuxed = device & ONENAND_DEVICE_IS_DEMUX; 3338 ddp = device & ONENAND_DEVICE_IS_DDP; 3339 density = onenand_get_density(device); 3340 flexonenand = device & DEVICE_IS_FLEXONENAND; 3341 printk(KERN_INFO "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n", 3342 demuxed ? "" : "Muxed ", 3343 flexonenand ? "Flex-" : "", 3344 ddp ? "(DDP)" : "", 3345 (16 << density), 3346 vcc ? "2.65/3.3" : "1.8", 3347 device); 3348 printk(KERN_INFO "OneNAND version = 0x%04x\n", version); 3349} 3350 3351static const struct onenand_manufacturers onenand_manuf_ids[] = { 3352 {ONENAND_MFR_SAMSUNG, "Samsung"}, 3353 {ONENAND_MFR_NUMONYX, "Numonyx"}, 3354}; 3355 3356/** 3357 * onenand_check_maf - Check manufacturer ID 3358 * @param manuf manufacturer ID 3359 * 3360 * Check manufacturer ID 3361 */ 3362static int onenand_check_maf(int manuf) 3363{ 3364 int size = ARRAY_SIZE(onenand_manuf_ids); 3365 char *name; 3366 int i; 3367 3368 for (i = 0; i < size; i++) 3369 if (manuf == onenand_manuf_ids[i].id) 3370 break; 3371 3372 if (i < size) 3373 name = onenand_manuf_ids[i].name; 3374 else 3375 name = "Unknown"; 3376 3377 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf); 3378 3379 return (i == size); 3380} 3381 3382/** 3383* flexonenand_get_boundary - Reads the SLC boundary 3384* @param onenand_info - onenand info structure 3385**/ 3386static int flexonenand_get_boundary(struct mtd_info *mtd) 3387{ 3388 struct onenand_chip *this = mtd->priv; 3389 unsigned die, bdry; 3390 int syscfg, locked; 3391 3392 /* Disable ECC */ 3393 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); 3394 this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1); 3395 3396 for (die = 0; die < this->dies; die++) { 3397 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0); 3398 this->wait(mtd, FL_SYNCING); 3399 3400 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0); 3401 this->wait(mtd, FL_READING); 3402 3403 bdry = this->read_word(this->base + ONENAND_DATARAM); 3404 if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3) 3405 locked = 0; 3406 else 3407 locked = 1; 3408 this->boundary[die] = bdry & FLEXONENAND_PI_MASK; 3409 3410 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 3411 this->wait(mtd, FL_RESETTING); 3412 3413 printk(KERN_INFO "Die %d boundary: %d%s\n", die, 3414 this->boundary[die], locked ? "(Locked)" : "(Unlocked)"); 3415 } 3416 3417 /* Enable ECC */ 3418 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); 3419 return 0; 3420} 3421 3422/** 3423 * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info 3424 * boundary[], diesize[], mtd->size, mtd->erasesize 3425 * @param mtd - MTD device structure 3426 */ 3427static void flexonenand_get_size(struct mtd_info *mtd) 3428{ 3429 struct onenand_chip *this = mtd->priv; 3430 int die, i, eraseshift, density; 3431 int blksperdie, maxbdry; 3432 loff_t ofs; 3433 3434 density = onenand_get_density(this->device_id); 3435 blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift); 3436 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0; 3437 maxbdry = blksperdie - 1; 3438 eraseshift = this->erase_shift - 1; 3439 3440 mtd->numeraseregions = this->dies << 1; 3441 3442 /* This fills up the device boundary */ 3443 flexonenand_get_boundary(mtd); 3444 die = ofs = 0; 3445 i = -1; 3446 for (; die < this->dies; die++) { 3447 if (!die || this->boundary[die-1] != maxbdry) { 3448 i++; 3449 mtd->eraseregions[i].offset = ofs; 3450 mtd->eraseregions[i].erasesize = 1 << eraseshift; 3451 mtd->eraseregions[i].numblocks = 3452 this->boundary[die] + 1; 3453 ofs += mtd->eraseregions[i].numblocks << eraseshift; 3454 eraseshift++; 3455 } else { 3456 mtd->numeraseregions -= 1; 3457 mtd->eraseregions[i].numblocks += 3458 this->boundary[die] + 1; 3459 ofs += (this->boundary[die] + 1) << (eraseshift - 1); 3460 } 3461 if (this->boundary[die] != maxbdry) { 3462 i++; 3463 mtd->eraseregions[i].offset = ofs; 3464 mtd->eraseregions[i].erasesize = 1 << eraseshift; 3465 mtd->eraseregions[i].numblocks = maxbdry ^ 3466 this->boundary[die]; 3467 ofs += mtd->eraseregions[i].numblocks << eraseshift; 3468 eraseshift--; 3469 } else 3470 mtd->numeraseregions -= 1; 3471 } 3472 3473 /* Expose MLC erase size except when all blocks are SLC */ 3474 mtd->erasesize = 1 << this->erase_shift; 3475 if (mtd->numeraseregions == 1) 3476 mtd->erasesize >>= 1; 3477 3478 printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions); 3479 for (i = 0; i < mtd->numeraseregions; i++) 3480 printk(KERN_INFO "[offset: 0x%08x, erasesize: 0x%05x," 3481 " numblocks: %04u]\n", 3482 (unsigned int) mtd->eraseregions[i].offset, 3483 mtd->eraseregions[i].erasesize, 3484 mtd->eraseregions[i].numblocks); 3485 3486 for (die = 0, mtd->size = 0; die < this->dies; die++) { 3487 this->diesize[die] = (loff_t)blksperdie << this->erase_shift; 3488 this->diesize[die] -= (loff_t)(this->boundary[die] + 1) 3489 << (this->erase_shift - 1); 3490 mtd->size += this->diesize[die]; 3491 } 3492} 3493 3494/** 3495 * flexonenand_check_blocks_erased - Check if blocks are erased 3496 * @param mtd_info - mtd info structure 3497 * @param start - first erase block to check 3498 * @param end - last erase block to check 3499 * 3500 * Converting an unerased block from MLC to SLC 3501 * causes byte values to change. Since both data and its ECC 3502 * have changed, reads on the block give uncorrectable error. 3503 * This might lead to the block being detected as bad. 3504 * 3505 * Avoid this by ensuring that the block to be converted is 3506 * erased. 3507 */ 3508static int flexonenand_check_blocks_erased(struct mtd_info *mtd, int start, int end) 3509{ 3510 struct onenand_chip *this = mtd->priv; 3511 int i, ret; 3512 int block; 3513 struct mtd_oob_ops ops = { 3514 .mode = MTD_OPS_PLACE_OOB, 3515 .ooboffs = 0, 3516 .ooblen = mtd->oobsize, 3517 .datbuf = NULL, 3518 .oobbuf = this->oob_buf, 3519 }; 3520 loff_t addr; 3521 3522 printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end); 3523 3524 for (block = start; block <= end; block++) { 3525 addr = flexonenand_addr(this, block); 3526 if (onenand_block_isbad_nolock(mtd, addr, 0)) 3527 continue; 3528 3529 /* 3530 * Since main area write results in ECC write to spare, 3531 * it is sufficient to check only ECC bytes for change. 3532 */ 3533 ret = onenand_read_oob_nolock(mtd, addr, &ops); 3534 if (ret) 3535 return ret; 3536 3537 for (i = 0; i < mtd->oobsize; i++) 3538 if (this->oob_buf[i] != 0xff) 3539 break; 3540 3541 if (i != mtd->oobsize) { 3542 printk(KERN_WARNING "%s: Block %d not erased.\n", 3543 __func__, block); 3544 return 1; 3545 } 3546 } 3547 3548 return 0; 3549} 3550 3551/** 3552 * flexonenand_set_boundary - Writes the SLC boundary 3553 * @param mtd - mtd info structure 3554 */ 3555static int flexonenand_set_boundary(struct mtd_info *mtd, int die, 3556 int boundary, int lock) 3557{ 3558 struct onenand_chip *this = mtd->priv; 3559 int ret, density, blksperdie, old, new, thisboundary; 3560 loff_t addr; 3561 3562 /* Change only once for SDP Flex-OneNAND */ 3563 if (die && (!ONENAND_IS_DDP(this))) 3564 return 0; 3565 3566 /* boundary value of -1 indicates no required change */ 3567 if (boundary < 0 || boundary == this->boundary[die]) 3568 return 0; 3569 3570 density = onenand_get_density(this->device_id); 3571 blksperdie = ((16 << density) << 20) >> this->erase_shift; 3572 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0; 3573 3574 if (boundary >= blksperdie) { 3575 printk(KERN_ERR "%s: Invalid boundary value. " 3576 "Boundary not changed.\n", __func__); 3577 return -EINVAL; 3578 } 3579 3580 /* Check if converting blocks are erased */ 3581 old = this->boundary[die] + (die * this->density_mask); 3582 new = boundary + (die * this->density_mask); 3583 ret = flexonenand_check_blocks_erased(mtd, min(old, new) + 1, max(old, new)); 3584 if (ret) { 3585 printk(KERN_ERR "%s: Please erase blocks " 3586 "before boundary change\n", __func__); 3587 return ret; 3588 } 3589 3590 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0); 3591 this->wait(mtd, FL_SYNCING); 3592 3593 /* Check is boundary is locked */ 3594 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0); 3595 this->wait(mtd, FL_READING); 3596 3597 thisboundary = this->read_word(this->base + ONENAND_DATARAM); 3598 if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) { 3599 printk(KERN_ERR "%s: boundary locked\n", __func__); 3600 ret = 1; 3601 goto out; 3602 } 3603 3604 printk(KERN_INFO "Changing die %d boundary: %d%s\n", 3605 die, boundary, lock ? "(Locked)" : "(Unlocked)"); 3606 3607 addr = die ? this->diesize[0] : 0; 3608 3609 boundary &= FLEXONENAND_PI_MASK; 3610 boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT); 3611 3612 this->command(mtd, ONENAND_CMD_ERASE, addr, 0); 3613 ret = this->wait(mtd, FL_ERASING); 3614 if (ret) { 3615 printk(KERN_ERR "%s: Failed PI erase for Die %d\n", 3616 __func__, die); 3617 goto out; 3618 } 3619 3620 this->write_word(boundary, this->base + ONENAND_DATARAM); 3621 this->command(mtd, ONENAND_CMD_PROG, addr, 0); 3622 ret = this->wait(mtd, FL_WRITING); 3623 if (ret) { 3624 printk(KERN_ERR "%s: Failed PI write for Die %d\n", 3625 __func__, die); 3626 goto out; 3627 } 3628 3629 this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0); 3630 ret = this->wait(mtd, FL_WRITING); 3631out: 3632 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND); 3633 this->wait(mtd, FL_RESETTING); 3634 if (!ret) 3635 /* Recalculate device size on boundary change*/ 3636 flexonenand_get_size(mtd); 3637 3638 return ret; 3639} 3640 3641/** 3642 * onenand_chip_probe - [OneNAND Interface] The generic chip probe 3643 * @param mtd MTD device structure 3644 * 3645 * OneNAND detection method: 3646 * Compare the values from command with ones from register 3647 */ 3648static int onenand_chip_probe(struct mtd_info *mtd) 3649{ 3650 struct onenand_chip *this = mtd->priv; 3651 int bram_maf_id, bram_dev_id, maf_id, dev_id; 3652 int syscfg; 3653 3654 /* Save system configuration 1 */ 3655 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); 3656 /* Clear Sync. Burst Read mode to read BootRAM */ 3657 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE), this->base + ONENAND_REG_SYS_CFG1); 3658 3659 /* Send the command for reading device ID from BootRAM */ 3660 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM); 3661 3662 /* Read manufacturer and device IDs from BootRAM */ 3663 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0); 3664 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2); 3665 3666 /* Reset OneNAND to read default register values */ 3667 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM); 3668 /* Wait reset */ 3669 this->wait(mtd, FL_RESETTING); 3670 3671 /* Restore system configuration 1 */ 3672 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); 3673 3674 /* Check manufacturer ID */ 3675 if (onenand_check_maf(bram_maf_id)) 3676 return -ENXIO; 3677 3678 /* Read manufacturer and device IDs from Register */ 3679 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); 3680 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); 3681 3682 /* Check OneNAND device */ 3683 if (maf_id != bram_maf_id || dev_id != bram_dev_id) 3684 return -ENXIO; 3685 3686 return 0; 3687} 3688 3689/** 3690 * onenand_probe - [OneNAND Interface] Probe the OneNAND device 3691 * @param mtd MTD device structure 3692 */ 3693static int onenand_probe(struct mtd_info *mtd) 3694{ 3695 struct onenand_chip *this = mtd->priv; 3696 int dev_id, ver_id; 3697 int density; 3698 int ret; 3699 3700 ret = this->chip_probe(mtd); 3701 if (ret) 3702 return ret; 3703 3704 /* Device and version IDs from Register */ 3705 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); 3706 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID); 3707 this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY); 3708 3709 /* Flash device information */ 3710 onenand_print_device_info(dev_id, ver_id); 3711 this->device_id = dev_id; 3712 this->version_id = ver_id; 3713 3714 /* Check OneNAND features */ 3715 onenand_check_features(mtd); 3716 3717 density = onenand_get_density(dev_id); 3718 if (FLEXONENAND(this)) { 3719 this->dies = ONENAND_IS_DDP(this) ? 2 : 1; 3720 /* Maximum possible erase regions */ 3721 mtd->numeraseregions = this->dies << 1; 3722 mtd->eraseregions = 3723 kcalloc(this->dies << 1, 3724 sizeof(struct mtd_erase_region_info), 3725 GFP_KERNEL); 3726 if (!mtd->eraseregions) 3727 return -ENOMEM; 3728 } 3729 3730 /* 3731 * For Flex-OneNAND, chipsize represents maximum possible device size. 3732 * mtd->size represents the actual device size. 3733 */ 3734 this->chipsize = (16 << density) << 20; 3735 3736 /* OneNAND page size & block size */ 3737 /* The data buffer size is equal to page size */ 3738 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE); 3739 /* We use the full BufferRAM */ 3740 if (ONENAND_IS_4KB_PAGE(this)) 3741 mtd->writesize <<= 1; 3742 3743 mtd->oobsize = mtd->writesize >> 5; 3744 /* Pages per a block are always 64 in OneNAND */ 3745 mtd->erasesize = mtd->writesize << 6; 3746 /* 3747 * Flex-OneNAND SLC area has 64 pages per block. 3748 * Flex-OneNAND MLC area has 128 pages per block. 3749 * Expose MLC erase size to find erase_shift and page_mask. 3750 */ 3751 if (FLEXONENAND(this)) 3752 mtd->erasesize <<= 1; 3753 3754 this->erase_shift = ffs(mtd->erasesize) - 1; 3755 this->page_shift = ffs(mtd->writesize) - 1; 3756 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1; 3757 /* Set density mask. it is used for DDP */ 3758 if (ONENAND_IS_DDP(this)) 3759 this->density_mask = this->chipsize >> (this->erase_shift + 1); 3760 /* It's real page size */ 3761 this->writesize = mtd->writesize; 3762 3763 /* REVISIT: Multichip handling */ 3764 3765 if (FLEXONENAND(this)) 3766 flexonenand_get_size(mtd); 3767 else 3768 mtd->size = this->chipsize; 3769 3770 /* 3771 * We emulate the 4KiB page and 256KiB erase block size 3772 * But oobsize is still 64 bytes. 3773 * It is only valid if you turn on 2X program support, 3774 * Otherwise it will be ignored by compiler. 3775 */ 3776 if (ONENAND_IS_2PLANE(this)) { 3777 mtd->writesize <<= 1; 3778 mtd->erasesize <<= 1; 3779 } 3780 3781 return 0; 3782} 3783 3784/** 3785 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash 3786 * @param mtd MTD device structure 3787 */ 3788static int onenand_suspend(struct mtd_info *mtd) 3789{ 3790 return onenand_get_device(mtd, FL_PM_SUSPENDED); 3791} 3792 3793/** 3794 * onenand_resume - [MTD Interface] Resume the OneNAND flash 3795 * @param mtd MTD device structure 3796 */ 3797static void onenand_resume(struct mtd_info *mtd) 3798{ 3799 struct onenand_chip *this = mtd->priv; 3800 3801 if (this->state == FL_PM_SUSPENDED) 3802 onenand_release_device(mtd); 3803 else 3804 printk(KERN_ERR "%s: resume() called for the chip which is not " 3805 "in suspended state\n", __func__); 3806} 3807 3808/** 3809 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device 3810 * @param mtd MTD device structure 3811 * @param maxchips Number of chips to scan for 3812 * 3813 * This fills out all the not initialized function pointers 3814 * with the defaults. 3815 * The flash ID is read and the mtd/chip structures are 3816 * filled with the appropriate values. 3817 */ 3818int onenand_scan(struct mtd_info *mtd, int maxchips) 3819{ 3820 int i, ret; 3821 struct onenand_chip *this = mtd->priv; 3822 3823 if (!this->read_word) 3824 this->read_word = onenand_readw; 3825 if (!this->write_word) 3826 this->write_word = onenand_writew; 3827 3828 if (!this->command) 3829 this->command = onenand_command; 3830 if (!this->wait) 3831 onenand_setup_wait(mtd); 3832 if (!this->bbt_wait) 3833 this->bbt_wait = onenand_bbt_wait; 3834 if (!this->unlock_all) 3835 this->unlock_all = onenand_unlock_all; 3836 3837 if (!this->chip_probe) 3838 this->chip_probe = onenand_chip_probe; 3839 3840 if (!this->read_bufferram) 3841 this->read_bufferram = onenand_read_bufferram; 3842 if (!this->write_bufferram) 3843 this->write_bufferram = onenand_write_bufferram; 3844 3845 if (!this->block_markbad) 3846 this->block_markbad = onenand_default_block_markbad; 3847 if (!this->scan_bbt) 3848 this->scan_bbt = onenand_default_bbt; 3849 3850 if (onenand_probe(mtd)) 3851 return -ENXIO; 3852 3853 /* Set Sync. Burst Read after probing */ 3854 if (this->mmcontrol) { 3855 printk(KERN_INFO "OneNAND Sync. Burst Read support\n"); 3856 this->read_bufferram = onenand_sync_read_bufferram; 3857 } 3858 3859 /* Allocate buffers, if necessary */ 3860 if (!this->page_buf) { 3861 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL); 3862 if (!this->page_buf) 3863 return -ENOMEM; 3864#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE 3865 this->verify_buf = kzalloc(mtd->writesize, GFP_KERNEL); 3866 if (!this->verify_buf) { 3867 kfree(this->page_buf); 3868 return -ENOMEM; 3869 } 3870#endif 3871 this->options |= ONENAND_PAGEBUF_ALLOC; 3872 } 3873 if (!this->oob_buf) { 3874 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL); 3875 if (!this->oob_buf) { 3876 if (this->options & ONENAND_PAGEBUF_ALLOC) { 3877 this->options &= ~ONENAND_PAGEBUF_ALLOC; 3878#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE 3879 kfree(this->verify_buf); 3880#endif 3881 kfree(this->page_buf); 3882 } 3883 return -ENOMEM; 3884 } 3885 this->options |= ONENAND_OOBBUF_ALLOC; 3886 } 3887 3888 this->state = FL_READY; 3889 init_waitqueue_head(&this->wq); 3890 spin_lock_init(&this->chip_lock); 3891 3892 /* 3893 * Allow subpage writes up to oobsize. 3894 */ 3895 switch (mtd->oobsize) { 3896 case 128: 3897 if (FLEXONENAND(this)) { 3898 mtd_set_ooblayout(mtd, &flexonenand_ooblayout_ops); 3899 mtd->subpage_sft = 0; 3900 } else { 3901 mtd_set_ooblayout(mtd, &onenand_oob_128_ooblayout_ops); 3902 mtd->subpage_sft = 2; 3903 } 3904 if (ONENAND_IS_NOP_1(this)) 3905 mtd->subpage_sft = 0; 3906 break; 3907 case 64: 3908 mtd_set_ooblayout(mtd, &onenand_oob_32_64_ooblayout_ops); 3909 mtd->subpage_sft = 2; 3910 break; 3911 3912 case 32: 3913 mtd_set_ooblayout(mtd, &onenand_oob_32_64_ooblayout_ops); 3914 mtd->subpage_sft = 1; 3915 break; 3916 3917 default: 3918 printk(KERN_WARNING "%s: No OOB scheme defined for oobsize %d\n", 3919 __func__, mtd->oobsize); 3920 mtd->subpage_sft = 0; 3921 /* To prevent kernel oops */ 3922 mtd_set_ooblayout(mtd, &onenand_oob_32_64_ooblayout_ops); 3923 break; 3924 } 3925 3926 this->subpagesize = mtd->writesize >> mtd->subpage_sft; 3927 3928 /* 3929 * The number of bytes available for a client to place data into 3930 * the out of band area 3931 */ 3932 ret = mtd_ooblayout_count_freebytes(mtd); 3933 if (ret < 0) 3934 ret = 0; 3935 3936 mtd->oobavail = ret; 3937 3938 mtd->ecc_strength = 1; 3939 3940 /* Fill in remaining MTD driver data */ 3941 mtd->type = ONENAND_IS_MLC(this) ? MTD_MLCNANDFLASH : MTD_NANDFLASH; 3942 mtd->flags = MTD_CAP_NANDFLASH; 3943 mtd->_erase = onenand_erase; 3944 mtd->_point = NULL; 3945 mtd->_unpoint = NULL; 3946 mtd->_read_oob = onenand_read_oob; 3947 mtd->_write_oob = onenand_write_oob; 3948 mtd->_panic_write = onenand_panic_write; 3949#ifdef CONFIG_MTD_ONENAND_OTP 3950 mtd->_get_fact_prot_info = onenand_get_fact_prot_info; 3951 mtd->_read_fact_prot_reg = onenand_read_fact_prot_reg; 3952 mtd->_get_user_prot_info = onenand_get_user_prot_info; 3953 mtd->_read_user_prot_reg = onenand_read_user_prot_reg; 3954 mtd->_write_user_prot_reg = onenand_write_user_prot_reg; 3955 mtd->_lock_user_prot_reg = onenand_lock_user_prot_reg; 3956#endif 3957 mtd->_sync = onenand_sync; 3958 mtd->_lock = onenand_lock; 3959 mtd->_unlock = onenand_unlock; 3960 mtd->_suspend = onenand_suspend; 3961 mtd->_resume = onenand_resume; 3962 mtd->_block_isbad = onenand_block_isbad; 3963 mtd->_block_markbad = onenand_block_markbad; 3964 mtd->owner = THIS_MODULE; 3965 mtd->writebufsize = mtd->writesize; 3966 3967 /* Unlock whole block */ 3968 if (!(this->options & ONENAND_SKIP_INITIAL_UNLOCKING)) 3969 this->unlock_all(mtd); 3970 3971 /* Set the bad block marker position */ 3972 this->badblockpos = ONENAND_BADBLOCK_POS; 3973 3974 ret = this->scan_bbt(mtd); 3975 if ((!FLEXONENAND(this)) || ret) 3976 return ret; 3977 3978 /* Change Flex-OneNAND boundaries if required */ 3979 for (i = 0; i < MAX_DIES; i++) 3980 flexonenand_set_boundary(mtd, i, flex_bdry[2 * i], 3981 flex_bdry[(2 * i) + 1]); 3982 3983 return 0; 3984} 3985 3986/** 3987 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device 3988 * @param mtd MTD device structure 3989 */ 3990void onenand_release(struct mtd_info *mtd) 3991{ 3992 struct onenand_chip *this = mtd->priv; 3993 3994 /* Deregister partitions */ 3995 mtd_device_unregister(mtd); 3996 3997 /* Free bad block table memory, if allocated */ 3998 if (this->bbm) { 3999 struct bbm_info *bbm = this->bbm; 4000 kfree(bbm->bbt); 4001 kfree(this->bbm); 4002 } 4003 /* Buffers allocated by onenand_scan */ 4004 if (this->options & ONENAND_PAGEBUF_ALLOC) { 4005 kfree(this->page_buf); 4006#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE 4007 kfree(this->verify_buf); 4008#endif 4009 } 4010 if (this->options & ONENAND_OOBBUF_ALLOC) 4011 kfree(this->oob_buf); 4012 kfree(mtd->eraseregions); 4013} 4014 4015EXPORT_SYMBOL_GPL(onenand_scan); 4016EXPORT_SYMBOL_GPL(onenand_release); 4017 4018MODULE_LICENSE("GPL"); 4019MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>"); 4020MODULE_DESCRIPTION("Generic OneNAND flash driver code"); 4021