1/*
2   Common Flash Interface probe code.
3   (C) 2000 Red Hat. GPL'd.
4*/
5
6#include <linux/module.h>
7#include <linux/types.h>
8#include <linux/kernel.h>
9#include <linux/init.h>
10#include <asm/io.h>
11#include <asm/byteorder.h>
12#include <linux/errno.h>
13#include <linux/slab.h>
14#include <linux/interrupt.h>
15
16#include <linux/mtd/xip.h>
17#include <linux/mtd/map.h>
18#include <linux/mtd/cfi.h>
19#include <linux/mtd/gen_probe.h>
20
21//#define DEBUG_CFI
22
23#ifdef DEBUG_CFI
24static void print_cfi_ident(struct cfi_ident *);
25#endif
26
27static int cfi_probe_chip(struct map_info *map, __u32 base,
28			  unsigned long *chip_map, struct cfi_private *cfi);
29static int cfi_chip_setup(struct map_info *map, struct cfi_private *cfi);
30
31struct mtd_info *cfi_probe(struct map_info *map);
32
33#ifdef CONFIG_MTD_XIP
34
35/* only needed for short periods, so this is rather simple */
36#define xip_disable()	local_irq_disable()
37
38#define xip_allowed(base, map) \
39do { \
40	(void) map_read(map, base); \
41	xip_iprefetch(); \
42	local_irq_enable(); \
43} while (0)
44
45#define xip_enable(base, map, cfi) \
46do { \
47	cfi_qry_mode_off(base, map, cfi);		\
48	xip_allowed(base, map); \
49} while (0)
50
51#define xip_disable_qry(base, map, cfi) \
52do { \
53	xip_disable(); \
54	cfi_qry_mode_on(base, map, cfi); \
55} while (0)
56
57#else
58
59#define xip_disable()			do { } while (0)
60#define xip_allowed(base, map)		do { } while (0)
61#define xip_enable(base, map, cfi)	do { } while (0)
62#define xip_disable_qry(base, map, cfi) do { } while (0)
63
64#endif
65
66/*
67 * This fixup occurs immediately after reading the CFI structure and can affect
68 * the number of chips detected, unlike cfi_fixup, which occurs after an
69 * mtd_info structure has been created for the chip.
70 */
71struct cfi_early_fixup {
72	uint16_t mfr;
73	uint16_t id;
74	void (*fixup)(struct cfi_private *cfi);
75};
76
77static void cfi_early_fixup(struct cfi_private *cfi,
78			    const struct cfi_early_fixup *fixups)
79{
80	const struct cfi_early_fixup *f;
81
82	for (f = fixups; f->fixup; f++) {
83		if (((f->mfr == CFI_MFR_ANY) || (f->mfr == cfi->mfr)) &&
84		    ((f->id == CFI_ID_ANY) || (f->id == cfi->id))) {
85			f->fixup(cfi);
86		}
87	}
88}
89
90/* check for QRY.
91   in: interleave,type,mode
92   ret: table index, <0 for error
93 */
94
95static int __xipram cfi_probe_chip(struct map_info *map, __u32 base,
96				   unsigned long *chip_map, struct cfi_private *cfi)
97{
98	int i;
99
100	if ((base + 0) >= map->size) {
101		printk(KERN_NOTICE
102			"Probe at base[0x00](0x%08lx) past the end of the map(0x%08lx)\n",
103			(unsigned long)base, map->size -1);
104		return 0;
105	}
106	if ((base + 0xff) >= map->size) {
107		printk(KERN_NOTICE
108			"Probe at base[0x55](0x%08lx) past the end of the map(0x%08lx)\n",
109			(unsigned long)base + 0x55, map->size -1);
110		return 0;
111	}
112
113	xip_disable();
114	if (!cfi_qry_mode_on(base, map, cfi)) {
115		xip_enable(base, map, cfi);
116		return 0;
117	}
118
119	if (!cfi->numchips) {
120		/* This is the first time we're called. Set up the CFI
121		   stuff accordingly and return */
122		return cfi_chip_setup(map, cfi);
123	}
124
125	/* Check each previous chip to see if it's an alias */
126 	for (i=0; i < (base >> cfi->chipshift); i++) {
127 		unsigned long start;
128 		if(!test_bit(i, chip_map)) {
129			/* Skip location; no valid chip at this address */
130 			continue;
131 		}
132 		start = i << cfi->chipshift;
133		/* This chip should be in read mode if it's one
134		   we've already touched. */
135		if (cfi_qry_present(map, start, cfi)) {
136			/* Eep. This chip also had the QRY marker.
137			 * Is it an alias for the new one? */
138			cfi_qry_mode_off(start, map, cfi);
139
140			/* If the QRY marker goes away, it's an alias */
141			if (!cfi_qry_present(map, start, cfi)) {
142				xip_allowed(base, map);
143				printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
144				       map->name, base, start);
145				return 0;
146			}
147			/* Yes, it's actually got QRY for data. Most
148			 * unfortunate. Stick the new chip in read mode
149			 * too and if it's the same, assume it's an alias. */
150			/* FIXME: Use other modes to do a proper check */
151			cfi_qry_mode_off(base, map, cfi);
152
153			if (cfi_qry_present(map, base, cfi)) {
154				xip_allowed(base, map);
155				printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
156				       map->name, base, start);
157				return 0;
158			}
159		}
160	}
161
162	/* OK, if we got to here, then none of the previous chips appear to
163	   be aliases for the current one. */
164	set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */
165	cfi->numchips++;
166
167	/* Put it back into Read Mode */
168	cfi_qry_mode_off(base, map, cfi);
169	xip_allowed(base, map);
170
171	printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n",
172	       map->name, cfi->interleave, cfi->device_type*8, base,
173	       map->bankwidth*8);
174
175	return 1;
176}
177
178static void fixup_s70gl02gs_chips(struct cfi_private *cfi)
179{
180	/*
181	 * S70GL02GS flash reports a single 256 MiB chip, but is really made up
182	 * of two 128 MiB chips with 1024 sectors each.
183	 */
184	cfi->cfiq->DevSize = 27;
185	cfi->cfiq->EraseRegionInfo[0] = 0x20003ff;
186	pr_warn("Bad S70GL02GS CFI data; adjust to detect 2 chips\n");
187}
188
189static const struct cfi_early_fixup cfi_early_fixup_table[] = {
190	{ CFI_MFR_AMD, 0x4801, fixup_s70gl02gs_chips },
191	{ },
192};
193
194static int __xipram cfi_chip_setup(struct map_info *map,
195				   struct cfi_private *cfi)
196{
197	int ofs_factor = cfi->interleave*cfi->device_type;
198	__u32 base = 0;
199	int num_erase_regions = cfi_read_query(map, base + (0x10 + 28)*ofs_factor);
200	int i;
201	int addr_unlock1 = 0x555, addr_unlock2 = 0x2AA;
202
203	xip_enable(base, map, cfi);
204#ifdef DEBUG_CFI
205	printk("Number of erase regions: %d\n", num_erase_regions);
206#endif
207	if (!num_erase_regions)
208		return 0;
209
210	cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL);
211	if (!cfi->cfiq)
212		return 0;
213
214	memset(cfi->cfiq,0,sizeof(struct cfi_ident));
215
216	cfi->cfi_mode = CFI_MODE_CFI;
217
218	cfi->sector_erase_cmd = CMD(0x30);
219
220	/* Read the CFI info structure */
221	xip_disable_qry(base, map, cfi);
222	for (i=0; i<(sizeof(struct cfi_ident) + num_erase_regions * 4); i++)
223		((unsigned char *)cfi->cfiq)[i] = cfi_read_query(map,base + (0x10 + i)*ofs_factor);
224
225	/* Do any necessary byteswapping */
226	cfi->cfiq->P_ID = le16_to_cpu(cfi->cfiq->P_ID);
227
228	cfi->cfiq->P_ADR = le16_to_cpu(cfi->cfiq->P_ADR);
229	cfi->cfiq->A_ID = le16_to_cpu(cfi->cfiq->A_ID);
230	cfi->cfiq->A_ADR = le16_to_cpu(cfi->cfiq->A_ADR);
231	cfi->cfiq->InterfaceDesc = le16_to_cpu(cfi->cfiq->InterfaceDesc);
232	cfi->cfiq->MaxBufWriteSize = le16_to_cpu(cfi->cfiq->MaxBufWriteSize);
233
234#ifdef DEBUG_CFI
235	/* Dump the information therein */
236	print_cfi_ident(cfi->cfiq);
237#endif
238
239	for (i=0; i<cfi->cfiq->NumEraseRegions; i++) {
240		cfi->cfiq->EraseRegionInfo[i] = le32_to_cpu(cfi->cfiq->EraseRegionInfo[i]);
241
242#ifdef DEBUG_CFI
243		printk("  Erase Region #%d: BlockSize 0x%4.4X bytes, %d blocks\n",
244		       i, (cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff,
245		       (cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1);
246#endif
247	}
248
249	if (cfi->cfiq->P_ID == P_ID_SST_OLD) {
250		addr_unlock1 = 0x5555;
251		addr_unlock2 = 0x2AAA;
252	}
253
254	/*
255	 * Note we put the device back into Read Mode BEFORE going into Auto
256	 * Select Mode, as some devices support nesting of modes, others
257	 * don't. This way should always work.
258	 * On cmdset 0001 the writes of 0xaa and 0x55 are not needed, and
259	 * so should be treated as nops or illegal (and so put the device
260	 * back into Read Mode, which is a nop in this case).
261	 */
262	cfi_send_gen_cmd(0xf0,     0, base, map, cfi, cfi->device_type, NULL);
263	cfi_send_gen_cmd(0xaa, addr_unlock1, base, map, cfi, cfi->device_type, NULL);
264	cfi_send_gen_cmd(0x55, addr_unlock2, base, map, cfi, cfi->device_type, NULL);
265	cfi_send_gen_cmd(0x90, addr_unlock1, base, map, cfi, cfi->device_type, NULL);
266	cfi->mfr = cfi_read_query16(map, base);
267	cfi->id = cfi_read_query16(map, base + ofs_factor);
268
269	/* Get AMD/Spansion extended JEDEC ID */
270	if (cfi->mfr == CFI_MFR_AMD && (cfi->id & 0xff) == 0x7e)
271		cfi->id = cfi_read_query(map, base + 0xe * ofs_factor) << 8 |
272			  cfi_read_query(map, base + 0xf * ofs_factor);
273
274	/* Put it back into Read Mode */
275	cfi_qry_mode_off(base, map, cfi);
276	xip_allowed(base, map);
277
278	cfi_early_fixup(cfi, cfi_early_fixup_table);
279
280	printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank. Manufacturer ID %#08x Chip ID %#08x\n",
281	       map->name, cfi->interleave, cfi->device_type*8, base,
282	       map->bankwidth*8, cfi->mfr, cfi->id);
283
284	return 1;
285}
286
287#ifdef DEBUG_CFI
288static char *vendorname(__u16 vendor)
289{
290	switch (vendor) {
291	case P_ID_NONE:
292		return "None";
293
294	case P_ID_INTEL_EXT:
295		return "Intel/Sharp Extended";
296
297	case P_ID_AMD_STD:
298		return "AMD/Fujitsu Standard";
299
300	case P_ID_INTEL_STD:
301		return "Intel/Sharp Standard";
302
303	case P_ID_AMD_EXT:
304		return "AMD/Fujitsu Extended";
305
306	case P_ID_WINBOND:
307		return "Winbond Standard";
308
309	case P_ID_ST_ADV:
310		return "ST Advanced";
311
312	case P_ID_MITSUBISHI_STD:
313		return "Mitsubishi Standard";
314
315	case P_ID_MITSUBISHI_EXT:
316		return "Mitsubishi Extended";
317
318	case P_ID_SST_PAGE:
319		return "SST Page Write";
320
321	case P_ID_SST_OLD:
322		return "SST 39VF160x/39VF320x";
323
324	case P_ID_INTEL_PERFORMANCE:
325		return "Intel Performance Code";
326
327	case P_ID_INTEL_DATA:
328		return "Intel Data";
329
330	case P_ID_RESERVED:
331		return "Not Allowed / Reserved for Future Use";
332
333	default:
334		return "Unknown";
335	}
336}
337
338
339static void print_cfi_ident(struct cfi_ident *cfip)
340{
341#if 0
342	if (cfip->qry[0] != 'Q' || cfip->qry[1] != 'R' || cfip->qry[2] != 'Y') {
343		printk("Invalid CFI ident structure.\n");
344		return;
345	}
346#endif
347	printk("Primary Vendor Command Set: %4.4X (%s)\n", cfip->P_ID, vendorname(cfip->P_ID));
348	if (cfip->P_ADR)
349		printk("Primary Algorithm Table at %4.4X\n", cfip->P_ADR);
350	else
351		printk("No Primary Algorithm Table\n");
352
353	printk("Alternative Vendor Command Set: %4.4X (%s)\n", cfip->A_ID, vendorname(cfip->A_ID));
354	if (cfip->A_ADR)
355		printk("Alternate Algorithm Table at %4.4X\n", cfip->A_ADR);
356	else
357		printk("No Alternate Algorithm Table\n");
358
359
360	printk("Vcc Minimum: %2d.%d V\n", cfip->VccMin >> 4, cfip->VccMin & 0xf);
361	printk("Vcc Maximum: %2d.%d V\n", cfip->VccMax >> 4, cfip->VccMax & 0xf);
362	if (cfip->VppMin) {
363		printk("Vpp Minimum: %2d.%d V\n", cfip->VppMin >> 4, cfip->VppMin & 0xf);
364		printk("Vpp Maximum: %2d.%d V\n", cfip->VppMax >> 4, cfip->VppMax & 0xf);
365	}
366	else
367		printk("No Vpp line\n");
368
369	printk("Typical byte/word write timeout: %d µs\n", 1<<cfip->WordWriteTimeoutTyp);
370	printk("Maximum byte/word write timeout: %d µs\n", (1<<cfip->WordWriteTimeoutMax) * (1<<cfip->WordWriteTimeoutTyp));
371
372	if (cfip->BufWriteTimeoutTyp || cfip->BufWriteTimeoutMax) {
373		printk("Typical full buffer write timeout: %d µs\n", 1<<cfip->BufWriteTimeoutTyp);
374		printk("Maximum full buffer write timeout: %d µs\n", (1<<cfip->BufWriteTimeoutMax) * (1<<cfip->BufWriteTimeoutTyp));
375	}
376	else
377		printk("Full buffer write not supported\n");
378
379	printk("Typical block erase timeout: %d ms\n", 1<<cfip->BlockEraseTimeoutTyp);
380	printk("Maximum block erase timeout: %d ms\n", (1<<cfip->BlockEraseTimeoutMax) * (1<<cfip->BlockEraseTimeoutTyp));
381	if (cfip->ChipEraseTimeoutTyp || cfip->ChipEraseTimeoutMax) {
382		printk("Typical chip erase timeout: %d ms\n", 1<<cfip->ChipEraseTimeoutTyp);
383		printk("Maximum chip erase timeout: %d ms\n", (1<<cfip->ChipEraseTimeoutMax) * (1<<cfip->ChipEraseTimeoutTyp));
384	}
385	else
386		printk("Chip erase not supported\n");
387
388	printk("Device size: 0x%X bytes (%d MiB)\n", 1 << cfip->DevSize, 1<< (cfip->DevSize - 20));
389	printk("Flash Device Interface description: 0x%4.4X\n", cfip->InterfaceDesc);
390	switch(cfip->InterfaceDesc) {
391	case CFI_INTERFACE_X8_ASYNC:
392		printk("  - x8-only asynchronous interface\n");
393		break;
394
395	case CFI_INTERFACE_X16_ASYNC:
396		printk("  - x16-only asynchronous interface\n");
397		break;
398
399	case CFI_INTERFACE_X8_BY_X16_ASYNC:
400		printk("  - supports x8 and x16 via BYTE# with asynchronous interface\n");
401		break;
402
403	case CFI_INTERFACE_X32_ASYNC:
404		printk("  - x32-only asynchronous interface\n");
405		break;
406
407	case CFI_INTERFACE_X16_BY_X32_ASYNC:
408		printk("  - supports x16 and x32 via Word# with asynchronous interface\n");
409		break;
410
411	case CFI_INTERFACE_NOT_ALLOWED:
412		printk("  - Not Allowed / Reserved\n");
413		break;
414
415	default:
416		printk("  - Unknown\n");
417		break;
418	}
419
420	printk("Max. bytes in buffer write: 0x%x\n", 1<< cfip->MaxBufWriteSize);
421	printk("Number of Erase Block Regions: %d\n", cfip->NumEraseRegions);
422
423}
424#endif /* DEBUG_CFI */
425
426static struct chip_probe cfi_chip_probe = {
427	.name		= "CFI",
428	.probe_chip	= cfi_probe_chip
429};
430
431struct mtd_info *cfi_probe(struct map_info *map)
432{
433	/*
434	 * Just use the generic probe stuff to call our CFI-specific
435	 * chip_probe routine in all the possible permutations, etc.
436	 */
437	return mtd_do_chip_probe(map, &cfi_chip_probe);
438}
439
440static struct mtd_chip_driver cfi_chipdrv = {
441	.probe		= cfi_probe,
442	.name		= "cfi_probe",
443	.module		= THIS_MODULE
444};
445
446static int __init cfi_probe_init(void)
447{
448	register_mtd_chip_driver(&cfi_chipdrv);
449	return 0;
450}
451
452static void __exit cfi_probe_exit(void)
453{
454	unregister_mtd_chip_driver(&cfi_chipdrv);
455}
456
457module_init(cfi_probe_init);
458module_exit(cfi_probe_exit);
459
460MODULE_LICENSE("GPL");
461MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
462MODULE_DESCRIPTION("Probe code for CFI-compliant flash chips");
463