18c2ecf20Sopenharmony_ci/* 28c2ecf20Sopenharmony_ci Common Flash Interface probe code. 38c2ecf20Sopenharmony_ci (C) 2000 Red Hat. GPL'd. 48c2ecf20Sopenharmony_ci*/ 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ci#include <linux/module.h> 78c2ecf20Sopenharmony_ci#include <linux/types.h> 88c2ecf20Sopenharmony_ci#include <linux/kernel.h> 98c2ecf20Sopenharmony_ci#include <linux/init.h> 108c2ecf20Sopenharmony_ci#include <asm/io.h> 118c2ecf20Sopenharmony_ci#include <asm/byteorder.h> 128c2ecf20Sopenharmony_ci#include <linux/errno.h> 138c2ecf20Sopenharmony_ci#include <linux/slab.h> 148c2ecf20Sopenharmony_ci#include <linux/interrupt.h> 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci#include <linux/mtd/xip.h> 178c2ecf20Sopenharmony_ci#include <linux/mtd/map.h> 188c2ecf20Sopenharmony_ci#include <linux/mtd/cfi.h> 198c2ecf20Sopenharmony_ci#include <linux/mtd/gen_probe.h> 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci//#define DEBUG_CFI 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ci#ifdef DEBUG_CFI 248c2ecf20Sopenharmony_cistatic void print_cfi_ident(struct cfi_ident *); 258c2ecf20Sopenharmony_ci#endif 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_cistatic int cfi_probe_chip(struct map_info *map, __u32 base, 288c2ecf20Sopenharmony_ci unsigned long *chip_map, struct cfi_private *cfi); 298c2ecf20Sopenharmony_cistatic int cfi_chip_setup(struct map_info *map, struct cfi_private *cfi); 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_cistruct mtd_info *cfi_probe(struct map_info *map); 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci#ifdef CONFIG_MTD_XIP 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ci/* only needed for short periods, so this is rather simple */ 368c2ecf20Sopenharmony_ci#define xip_disable() local_irq_disable() 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_ci#define xip_allowed(base, map) \ 398c2ecf20Sopenharmony_cido { \ 408c2ecf20Sopenharmony_ci (void) map_read(map, base); \ 418c2ecf20Sopenharmony_ci xip_iprefetch(); \ 428c2ecf20Sopenharmony_ci local_irq_enable(); \ 438c2ecf20Sopenharmony_ci} while (0) 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci#define xip_enable(base, map, cfi) \ 468c2ecf20Sopenharmony_cido { \ 478c2ecf20Sopenharmony_ci cfi_qry_mode_off(base, map, cfi); \ 488c2ecf20Sopenharmony_ci xip_allowed(base, map); \ 498c2ecf20Sopenharmony_ci} while (0) 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_ci#define xip_disable_qry(base, map, cfi) \ 528c2ecf20Sopenharmony_cido { \ 538c2ecf20Sopenharmony_ci xip_disable(); \ 548c2ecf20Sopenharmony_ci cfi_qry_mode_on(base, map, cfi); \ 558c2ecf20Sopenharmony_ci} while (0) 568c2ecf20Sopenharmony_ci 578c2ecf20Sopenharmony_ci#else 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_ci#define xip_disable() do { } while (0) 608c2ecf20Sopenharmony_ci#define xip_allowed(base, map) do { } while (0) 618c2ecf20Sopenharmony_ci#define xip_enable(base, map, cfi) do { } while (0) 628c2ecf20Sopenharmony_ci#define xip_disable_qry(base, map, cfi) do { } while (0) 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_ci#endif 658c2ecf20Sopenharmony_ci 668c2ecf20Sopenharmony_ci/* 678c2ecf20Sopenharmony_ci * This fixup occurs immediately after reading the CFI structure and can affect 688c2ecf20Sopenharmony_ci * the number of chips detected, unlike cfi_fixup, which occurs after an 698c2ecf20Sopenharmony_ci * mtd_info structure has been created for the chip. 708c2ecf20Sopenharmony_ci */ 718c2ecf20Sopenharmony_cistruct cfi_early_fixup { 728c2ecf20Sopenharmony_ci uint16_t mfr; 738c2ecf20Sopenharmony_ci uint16_t id; 748c2ecf20Sopenharmony_ci void (*fixup)(struct cfi_private *cfi); 758c2ecf20Sopenharmony_ci}; 768c2ecf20Sopenharmony_ci 778c2ecf20Sopenharmony_cistatic void cfi_early_fixup(struct cfi_private *cfi, 788c2ecf20Sopenharmony_ci const struct cfi_early_fixup *fixups) 798c2ecf20Sopenharmony_ci{ 808c2ecf20Sopenharmony_ci const struct cfi_early_fixup *f; 818c2ecf20Sopenharmony_ci 828c2ecf20Sopenharmony_ci for (f = fixups; f->fixup; f++) { 838c2ecf20Sopenharmony_ci if (((f->mfr == CFI_MFR_ANY) || (f->mfr == cfi->mfr)) && 848c2ecf20Sopenharmony_ci ((f->id == CFI_ID_ANY) || (f->id == cfi->id))) { 858c2ecf20Sopenharmony_ci f->fixup(cfi); 868c2ecf20Sopenharmony_ci } 878c2ecf20Sopenharmony_ci } 888c2ecf20Sopenharmony_ci} 898c2ecf20Sopenharmony_ci 908c2ecf20Sopenharmony_ci/* check for QRY. 918c2ecf20Sopenharmony_ci in: interleave,type,mode 928c2ecf20Sopenharmony_ci ret: table index, <0 for error 938c2ecf20Sopenharmony_ci */ 948c2ecf20Sopenharmony_ci 958c2ecf20Sopenharmony_cistatic int __xipram cfi_probe_chip(struct map_info *map, __u32 base, 968c2ecf20Sopenharmony_ci unsigned long *chip_map, struct cfi_private *cfi) 978c2ecf20Sopenharmony_ci{ 988c2ecf20Sopenharmony_ci int i; 998c2ecf20Sopenharmony_ci 1008c2ecf20Sopenharmony_ci if ((base + 0) >= map->size) { 1018c2ecf20Sopenharmony_ci printk(KERN_NOTICE 1028c2ecf20Sopenharmony_ci "Probe at base[0x00](0x%08lx) past the end of the map(0x%08lx)\n", 1038c2ecf20Sopenharmony_ci (unsigned long)base, map->size -1); 1048c2ecf20Sopenharmony_ci return 0; 1058c2ecf20Sopenharmony_ci } 1068c2ecf20Sopenharmony_ci if ((base + 0xff) >= map->size) { 1078c2ecf20Sopenharmony_ci printk(KERN_NOTICE 1088c2ecf20Sopenharmony_ci "Probe at base[0x55](0x%08lx) past the end of the map(0x%08lx)\n", 1098c2ecf20Sopenharmony_ci (unsigned long)base + 0x55, map->size -1); 1108c2ecf20Sopenharmony_ci return 0; 1118c2ecf20Sopenharmony_ci } 1128c2ecf20Sopenharmony_ci 1138c2ecf20Sopenharmony_ci xip_disable(); 1148c2ecf20Sopenharmony_ci if (!cfi_qry_mode_on(base, map, cfi)) { 1158c2ecf20Sopenharmony_ci xip_enable(base, map, cfi); 1168c2ecf20Sopenharmony_ci return 0; 1178c2ecf20Sopenharmony_ci } 1188c2ecf20Sopenharmony_ci 1198c2ecf20Sopenharmony_ci if (!cfi->numchips) { 1208c2ecf20Sopenharmony_ci /* This is the first time we're called. Set up the CFI 1218c2ecf20Sopenharmony_ci stuff accordingly and return */ 1228c2ecf20Sopenharmony_ci return cfi_chip_setup(map, cfi); 1238c2ecf20Sopenharmony_ci } 1248c2ecf20Sopenharmony_ci 1258c2ecf20Sopenharmony_ci /* Check each previous chip to see if it's an alias */ 1268c2ecf20Sopenharmony_ci for (i=0; i < (base >> cfi->chipshift); i++) { 1278c2ecf20Sopenharmony_ci unsigned long start; 1288c2ecf20Sopenharmony_ci if(!test_bit(i, chip_map)) { 1298c2ecf20Sopenharmony_ci /* Skip location; no valid chip at this address */ 1308c2ecf20Sopenharmony_ci continue; 1318c2ecf20Sopenharmony_ci } 1328c2ecf20Sopenharmony_ci start = i << cfi->chipshift; 1338c2ecf20Sopenharmony_ci /* This chip should be in read mode if it's one 1348c2ecf20Sopenharmony_ci we've already touched. */ 1358c2ecf20Sopenharmony_ci if (cfi_qry_present(map, start, cfi)) { 1368c2ecf20Sopenharmony_ci /* Eep. This chip also had the QRY marker. 1378c2ecf20Sopenharmony_ci * Is it an alias for the new one? */ 1388c2ecf20Sopenharmony_ci cfi_qry_mode_off(start, map, cfi); 1398c2ecf20Sopenharmony_ci 1408c2ecf20Sopenharmony_ci /* If the QRY marker goes away, it's an alias */ 1418c2ecf20Sopenharmony_ci if (!cfi_qry_present(map, start, cfi)) { 1428c2ecf20Sopenharmony_ci xip_allowed(base, map); 1438c2ecf20Sopenharmony_ci printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n", 1448c2ecf20Sopenharmony_ci map->name, base, start); 1458c2ecf20Sopenharmony_ci return 0; 1468c2ecf20Sopenharmony_ci } 1478c2ecf20Sopenharmony_ci /* Yes, it's actually got QRY for data. Most 1488c2ecf20Sopenharmony_ci * unfortunate. Stick the new chip in read mode 1498c2ecf20Sopenharmony_ci * too and if it's the same, assume it's an alias. */ 1508c2ecf20Sopenharmony_ci /* FIXME: Use other modes to do a proper check */ 1518c2ecf20Sopenharmony_ci cfi_qry_mode_off(base, map, cfi); 1528c2ecf20Sopenharmony_ci 1538c2ecf20Sopenharmony_ci if (cfi_qry_present(map, base, cfi)) { 1548c2ecf20Sopenharmony_ci xip_allowed(base, map); 1558c2ecf20Sopenharmony_ci printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n", 1568c2ecf20Sopenharmony_ci map->name, base, start); 1578c2ecf20Sopenharmony_ci return 0; 1588c2ecf20Sopenharmony_ci } 1598c2ecf20Sopenharmony_ci } 1608c2ecf20Sopenharmony_ci } 1618c2ecf20Sopenharmony_ci 1628c2ecf20Sopenharmony_ci /* OK, if we got to here, then none of the previous chips appear to 1638c2ecf20Sopenharmony_ci be aliases for the current one. */ 1648c2ecf20Sopenharmony_ci set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */ 1658c2ecf20Sopenharmony_ci cfi->numchips++; 1668c2ecf20Sopenharmony_ci 1678c2ecf20Sopenharmony_ci /* Put it back into Read Mode */ 1688c2ecf20Sopenharmony_ci cfi_qry_mode_off(base, map, cfi); 1698c2ecf20Sopenharmony_ci xip_allowed(base, map); 1708c2ecf20Sopenharmony_ci 1718c2ecf20Sopenharmony_ci printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n", 1728c2ecf20Sopenharmony_ci map->name, cfi->interleave, cfi->device_type*8, base, 1738c2ecf20Sopenharmony_ci map->bankwidth*8); 1748c2ecf20Sopenharmony_ci 1758c2ecf20Sopenharmony_ci return 1; 1768c2ecf20Sopenharmony_ci} 1778c2ecf20Sopenharmony_ci 1788c2ecf20Sopenharmony_cistatic void fixup_s70gl02gs_chips(struct cfi_private *cfi) 1798c2ecf20Sopenharmony_ci{ 1808c2ecf20Sopenharmony_ci /* 1818c2ecf20Sopenharmony_ci * S70GL02GS flash reports a single 256 MiB chip, but is really made up 1828c2ecf20Sopenharmony_ci * of two 128 MiB chips with 1024 sectors each. 1838c2ecf20Sopenharmony_ci */ 1848c2ecf20Sopenharmony_ci cfi->cfiq->DevSize = 27; 1858c2ecf20Sopenharmony_ci cfi->cfiq->EraseRegionInfo[0] = 0x20003ff; 1868c2ecf20Sopenharmony_ci pr_warn("Bad S70GL02GS CFI data; adjust to detect 2 chips\n"); 1878c2ecf20Sopenharmony_ci} 1888c2ecf20Sopenharmony_ci 1898c2ecf20Sopenharmony_cistatic const struct cfi_early_fixup cfi_early_fixup_table[] = { 1908c2ecf20Sopenharmony_ci { CFI_MFR_AMD, 0x4801, fixup_s70gl02gs_chips }, 1918c2ecf20Sopenharmony_ci { }, 1928c2ecf20Sopenharmony_ci}; 1938c2ecf20Sopenharmony_ci 1948c2ecf20Sopenharmony_cistatic int __xipram cfi_chip_setup(struct map_info *map, 1958c2ecf20Sopenharmony_ci struct cfi_private *cfi) 1968c2ecf20Sopenharmony_ci{ 1978c2ecf20Sopenharmony_ci int ofs_factor = cfi->interleave*cfi->device_type; 1988c2ecf20Sopenharmony_ci __u32 base = 0; 1998c2ecf20Sopenharmony_ci int num_erase_regions = cfi_read_query(map, base + (0x10 + 28)*ofs_factor); 2008c2ecf20Sopenharmony_ci int i; 2018c2ecf20Sopenharmony_ci int addr_unlock1 = 0x555, addr_unlock2 = 0x2AA; 2028c2ecf20Sopenharmony_ci 2038c2ecf20Sopenharmony_ci xip_enable(base, map, cfi); 2048c2ecf20Sopenharmony_ci#ifdef DEBUG_CFI 2058c2ecf20Sopenharmony_ci printk("Number of erase regions: %d\n", num_erase_regions); 2068c2ecf20Sopenharmony_ci#endif 2078c2ecf20Sopenharmony_ci if (!num_erase_regions) 2088c2ecf20Sopenharmony_ci return 0; 2098c2ecf20Sopenharmony_ci 2108c2ecf20Sopenharmony_ci cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL); 2118c2ecf20Sopenharmony_ci if (!cfi->cfiq) 2128c2ecf20Sopenharmony_ci return 0; 2138c2ecf20Sopenharmony_ci 2148c2ecf20Sopenharmony_ci memset(cfi->cfiq,0,sizeof(struct cfi_ident)); 2158c2ecf20Sopenharmony_ci 2168c2ecf20Sopenharmony_ci cfi->cfi_mode = CFI_MODE_CFI; 2178c2ecf20Sopenharmony_ci 2188c2ecf20Sopenharmony_ci cfi->sector_erase_cmd = CMD(0x30); 2198c2ecf20Sopenharmony_ci 2208c2ecf20Sopenharmony_ci /* Read the CFI info structure */ 2218c2ecf20Sopenharmony_ci xip_disable_qry(base, map, cfi); 2228c2ecf20Sopenharmony_ci for (i=0; i<(sizeof(struct cfi_ident) + num_erase_regions * 4); i++) 2238c2ecf20Sopenharmony_ci ((unsigned char *)cfi->cfiq)[i] = cfi_read_query(map,base + (0x10 + i)*ofs_factor); 2248c2ecf20Sopenharmony_ci 2258c2ecf20Sopenharmony_ci /* Do any necessary byteswapping */ 2268c2ecf20Sopenharmony_ci cfi->cfiq->P_ID = le16_to_cpu(cfi->cfiq->P_ID); 2278c2ecf20Sopenharmony_ci 2288c2ecf20Sopenharmony_ci cfi->cfiq->P_ADR = le16_to_cpu(cfi->cfiq->P_ADR); 2298c2ecf20Sopenharmony_ci cfi->cfiq->A_ID = le16_to_cpu(cfi->cfiq->A_ID); 2308c2ecf20Sopenharmony_ci cfi->cfiq->A_ADR = le16_to_cpu(cfi->cfiq->A_ADR); 2318c2ecf20Sopenharmony_ci cfi->cfiq->InterfaceDesc = le16_to_cpu(cfi->cfiq->InterfaceDesc); 2328c2ecf20Sopenharmony_ci cfi->cfiq->MaxBufWriteSize = le16_to_cpu(cfi->cfiq->MaxBufWriteSize); 2338c2ecf20Sopenharmony_ci 2348c2ecf20Sopenharmony_ci#ifdef DEBUG_CFI 2358c2ecf20Sopenharmony_ci /* Dump the information therein */ 2368c2ecf20Sopenharmony_ci print_cfi_ident(cfi->cfiq); 2378c2ecf20Sopenharmony_ci#endif 2388c2ecf20Sopenharmony_ci 2398c2ecf20Sopenharmony_ci for (i=0; i<cfi->cfiq->NumEraseRegions; i++) { 2408c2ecf20Sopenharmony_ci cfi->cfiq->EraseRegionInfo[i] = le32_to_cpu(cfi->cfiq->EraseRegionInfo[i]); 2418c2ecf20Sopenharmony_ci 2428c2ecf20Sopenharmony_ci#ifdef DEBUG_CFI 2438c2ecf20Sopenharmony_ci printk(" Erase Region #%d: BlockSize 0x%4.4X bytes, %d blocks\n", 2448c2ecf20Sopenharmony_ci i, (cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff, 2458c2ecf20Sopenharmony_ci (cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1); 2468c2ecf20Sopenharmony_ci#endif 2478c2ecf20Sopenharmony_ci } 2488c2ecf20Sopenharmony_ci 2498c2ecf20Sopenharmony_ci if (cfi->cfiq->P_ID == P_ID_SST_OLD) { 2508c2ecf20Sopenharmony_ci addr_unlock1 = 0x5555; 2518c2ecf20Sopenharmony_ci addr_unlock2 = 0x2AAA; 2528c2ecf20Sopenharmony_ci } 2538c2ecf20Sopenharmony_ci 2548c2ecf20Sopenharmony_ci /* 2558c2ecf20Sopenharmony_ci * Note we put the device back into Read Mode BEFORE going into Auto 2568c2ecf20Sopenharmony_ci * Select Mode, as some devices support nesting of modes, others 2578c2ecf20Sopenharmony_ci * don't. This way should always work. 2588c2ecf20Sopenharmony_ci * On cmdset 0001 the writes of 0xaa and 0x55 are not needed, and 2598c2ecf20Sopenharmony_ci * so should be treated as nops or illegal (and so put the device 2608c2ecf20Sopenharmony_ci * back into Read Mode, which is a nop in this case). 2618c2ecf20Sopenharmony_ci */ 2628c2ecf20Sopenharmony_ci cfi_send_gen_cmd(0xf0, 0, base, map, cfi, cfi->device_type, NULL); 2638c2ecf20Sopenharmony_ci cfi_send_gen_cmd(0xaa, addr_unlock1, base, map, cfi, cfi->device_type, NULL); 2648c2ecf20Sopenharmony_ci cfi_send_gen_cmd(0x55, addr_unlock2, base, map, cfi, cfi->device_type, NULL); 2658c2ecf20Sopenharmony_ci cfi_send_gen_cmd(0x90, addr_unlock1, base, map, cfi, cfi->device_type, NULL); 2668c2ecf20Sopenharmony_ci cfi->mfr = cfi_read_query16(map, base); 2678c2ecf20Sopenharmony_ci cfi->id = cfi_read_query16(map, base + ofs_factor); 2688c2ecf20Sopenharmony_ci 2698c2ecf20Sopenharmony_ci /* Get AMD/Spansion extended JEDEC ID */ 2708c2ecf20Sopenharmony_ci if (cfi->mfr == CFI_MFR_AMD && (cfi->id & 0xff) == 0x7e) 2718c2ecf20Sopenharmony_ci cfi->id = cfi_read_query(map, base + 0xe * ofs_factor) << 8 | 2728c2ecf20Sopenharmony_ci cfi_read_query(map, base + 0xf * ofs_factor); 2738c2ecf20Sopenharmony_ci 2748c2ecf20Sopenharmony_ci /* Put it back into Read Mode */ 2758c2ecf20Sopenharmony_ci cfi_qry_mode_off(base, map, cfi); 2768c2ecf20Sopenharmony_ci xip_allowed(base, map); 2778c2ecf20Sopenharmony_ci 2788c2ecf20Sopenharmony_ci cfi_early_fixup(cfi, cfi_early_fixup_table); 2798c2ecf20Sopenharmony_ci 2808c2ecf20Sopenharmony_ci printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank. Manufacturer ID %#08x Chip ID %#08x\n", 2818c2ecf20Sopenharmony_ci map->name, cfi->interleave, cfi->device_type*8, base, 2828c2ecf20Sopenharmony_ci map->bankwidth*8, cfi->mfr, cfi->id); 2838c2ecf20Sopenharmony_ci 2848c2ecf20Sopenharmony_ci return 1; 2858c2ecf20Sopenharmony_ci} 2868c2ecf20Sopenharmony_ci 2878c2ecf20Sopenharmony_ci#ifdef DEBUG_CFI 2888c2ecf20Sopenharmony_cistatic char *vendorname(__u16 vendor) 2898c2ecf20Sopenharmony_ci{ 2908c2ecf20Sopenharmony_ci switch (vendor) { 2918c2ecf20Sopenharmony_ci case P_ID_NONE: 2928c2ecf20Sopenharmony_ci return "None"; 2938c2ecf20Sopenharmony_ci 2948c2ecf20Sopenharmony_ci case P_ID_INTEL_EXT: 2958c2ecf20Sopenharmony_ci return "Intel/Sharp Extended"; 2968c2ecf20Sopenharmony_ci 2978c2ecf20Sopenharmony_ci case P_ID_AMD_STD: 2988c2ecf20Sopenharmony_ci return "AMD/Fujitsu Standard"; 2998c2ecf20Sopenharmony_ci 3008c2ecf20Sopenharmony_ci case P_ID_INTEL_STD: 3018c2ecf20Sopenharmony_ci return "Intel/Sharp Standard"; 3028c2ecf20Sopenharmony_ci 3038c2ecf20Sopenharmony_ci case P_ID_AMD_EXT: 3048c2ecf20Sopenharmony_ci return "AMD/Fujitsu Extended"; 3058c2ecf20Sopenharmony_ci 3068c2ecf20Sopenharmony_ci case P_ID_WINBOND: 3078c2ecf20Sopenharmony_ci return "Winbond Standard"; 3088c2ecf20Sopenharmony_ci 3098c2ecf20Sopenharmony_ci case P_ID_ST_ADV: 3108c2ecf20Sopenharmony_ci return "ST Advanced"; 3118c2ecf20Sopenharmony_ci 3128c2ecf20Sopenharmony_ci case P_ID_MITSUBISHI_STD: 3138c2ecf20Sopenharmony_ci return "Mitsubishi Standard"; 3148c2ecf20Sopenharmony_ci 3158c2ecf20Sopenharmony_ci case P_ID_MITSUBISHI_EXT: 3168c2ecf20Sopenharmony_ci return "Mitsubishi Extended"; 3178c2ecf20Sopenharmony_ci 3188c2ecf20Sopenharmony_ci case P_ID_SST_PAGE: 3198c2ecf20Sopenharmony_ci return "SST Page Write"; 3208c2ecf20Sopenharmony_ci 3218c2ecf20Sopenharmony_ci case P_ID_SST_OLD: 3228c2ecf20Sopenharmony_ci return "SST 39VF160x/39VF320x"; 3238c2ecf20Sopenharmony_ci 3248c2ecf20Sopenharmony_ci case P_ID_INTEL_PERFORMANCE: 3258c2ecf20Sopenharmony_ci return "Intel Performance Code"; 3268c2ecf20Sopenharmony_ci 3278c2ecf20Sopenharmony_ci case P_ID_INTEL_DATA: 3288c2ecf20Sopenharmony_ci return "Intel Data"; 3298c2ecf20Sopenharmony_ci 3308c2ecf20Sopenharmony_ci case P_ID_RESERVED: 3318c2ecf20Sopenharmony_ci return "Not Allowed / Reserved for Future Use"; 3328c2ecf20Sopenharmony_ci 3338c2ecf20Sopenharmony_ci default: 3348c2ecf20Sopenharmony_ci return "Unknown"; 3358c2ecf20Sopenharmony_ci } 3368c2ecf20Sopenharmony_ci} 3378c2ecf20Sopenharmony_ci 3388c2ecf20Sopenharmony_ci 3398c2ecf20Sopenharmony_cistatic void print_cfi_ident(struct cfi_ident *cfip) 3408c2ecf20Sopenharmony_ci{ 3418c2ecf20Sopenharmony_ci#if 0 3428c2ecf20Sopenharmony_ci if (cfip->qry[0] != 'Q' || cfip->qry[1] != 'R' || cfip->qry[2] != 'Y') { 3438c2ecf20Sopenharmony_ci printk("Invalid CFI ident structure.\n"); 3448c2ecf20Sopenharmony_ci return; 3458c2ecf20Sopenharmony_ci } 3468c2ecf20Sopenharmony_ci#endif 3478c2ecf20Sopenharmony_ci printk("Primary Vendor Command Set: %4.4X (%s)\n", cfip->P_ID, vendorname(cfip->P_ID)); 3488c2ecf20Sopenharmony_ci if (cfip->P_ADR) 3498c2ecf20Sopenharmony_ci printk("Primary Algorithm Table at %4.4X\n", cfip->P_ADR); 3508c2ecf20Sopenharmony_ci else 3518c2ecf20Sopenharmony_ci printk("No Primary Algorithm Table\n"); 3528c2ecf20Sopenharmony_ci 3538c2ecf20Sopenharmony_ci printk("Alternative Vendor Command Set: %4.4X (%s)\n", cfip->A_ID, vendorname(cfip->A_ID)); 3548c2ecf20Sopenharmony_ci if (cfip->A_ADR) 3558c2ecf20Sopenharmony_ci printk("Alternate Algorithm Table at %4.4X\n", cfip->A_ADR); 3568c2ecf20Sopenharmony_ci else 3578c2ecf20Sopenharmony_ci printk("No Alternate Algorithm Table\n"); 3588c2ecf20Sopenharmony_ci 3598c2ecf20Sopenharmony_ci 3608c2ecf20Sopenharmony_ci printk("Vcc Minimum: %2d.%d V\n", cfip->VccMin >> 4, cfip->VccMin & 0xf); 3618c2ecf20Sopenharmony_ci printk("Vcc Maximum: %2d.%d V\n", cfip->VccMax >> 4, cfip->VccMax & 0xf); 3628c2ecf20Sopenharmony_ci if (cfip->VppMin) { 3638c2ecf20Sopenharmony_ci printk("Vpp Minimum: %2d.%d V\n", cfip->VppMin >> 4, cfip->VppMin & 0xf); 3648c2ecf20Sopenharmony_ci printk("Vpp Maximum: %2d.%d V\n", cfip->VppMax >> 4, cfip->VppMax & 0xf); 3658c2ecf20Sopenharmony_ci } 3668c2ecf20Sopenharmony_ci else 3678c2ecf20Sopenharmony_ci printk("No Vpp line\n"); 3688c2ecf20Sopenharmony_ci 3698c2ecf20Sopenharmony_ci printk("Typical byte/word write timeout: %d µs\n", 1<<cfip->WordWriteTimeoutTyp); 3708c2ecf20Sopenharmony_ci printk("Maximum byte/word write timeout: %d µs\n", (1<<cfip->WordWriteTimeoutMax) * (1<<cfip->WordWriteTimeoutTyp)); 3718c2ecf20Sopenharmony_ci 3728c2ecf20Sopenharmony_ci if (cfip->BufWriteTimeoutTyp || cfip->BufWriteTimeoutMax) { 3738c2ecf20Sopenharmony_ci printk("Typical full buffer write timeout: %d µs\n", 1<<cfip->BufWriteTimeoutTyp); 3748c2ecf20Sopenharmony_ci printk("Maximum full buffer write timeout: %d µs\n", (1<<cfip->BufWriteTimeoutMax) * (1<<cfip->BufWriteTimeoutTyp)); 3758c2ecf20Sopenharmony_ci } 3768c2ecf20Sopenharmony_ci else 3778c2ecf20Sopenharmony_ci printk("Full buffer write not supported\n"); 3788c2ecf20Sopenharmony_ci 3798c2ecf20Sopenharmony_ci printk("Typical block erase timeout: %d ms\n", 1<<cfip->BlockEraseTimeoutTyp); 3808c2ecf20Sopenharmony_ci printk("Maximum block erase timeout: %d ms\n", (1<<cfip->BlockEraseTimeoutMax) * (1<<cfip->BlockEraseTimeoutTyp)); 3818c2ecf20Sopenharmony_ci if (cfip->ChipEraseTimeoutTyp || cfip->ChipEraseTimeoutMax) { 3828c2ecf20Sopenharmony_ci printk("Typical chip erase timeout: %d ms\n", 1<<cfip->ChipEraseTimeoutTyp); 3838c2ecf20Sopenharmony_ci printk("Maximum chip erase timeout: %d ms\n", (1<<cfip->ChipEraseTimeoutMax) * (1<<cfip->ChipEraseTimeoutTyp)); 3848c2ecf20Sopenharmony_ci } 3858c2ecf20Sopenharmony_ci else 3868c2ecf20Sopenharmony_ci printk("Chip erase not supported\n"); 3878c2ecf20Sopenharmony_ci 3888c2ecf20Sopenharmony_ci printk("Device size: 0x%X bytes (%d MiB)\n", 1 << cfip->DevSize, 1<< (cfip->DevSize - 20)); 3898c2ecf20Sopenharmony_ci printk("Flash Device Interface description: 0x%4.4X\n", cfip->InterfaceDesc); 3908c2ecf20Sopenharmony_ci switch(cfip->InterfaceDesc) { 3918c2ecf20Sopenharmony_ci case CFI_INTERFACE_X8_ASYNC: 3928c2ecf20Sopenharmony_ci printk(" - x8-only asynchronous interface\n"); 3938c2ecf20Sopenharmony_ci break; 3948c2ecf20Sopenharmony_ci 3958c2ecf20Sopenharmony_ci case CFI_INTERFACE_X16_ASYNC: 3968c2ecf20Sopenharmony_ci printk(" - x16-only asynchronous interface\n"); 3978c2ecf20Sopenharmony_ci break; 3988c2ecf20Sopenharmony_ci 3998c2ecf20Sopenharmony_ci case CFI_INTERFACE_X8_BY_X16_ASYNC: 4008c2ecf20Sopenharmony_ci printk(" - supports x8 and x16 via BYTE# with asynchronous interface\n"); 4018c2ecf20Sopenharmony_ci break; 4028c2ecf20Sopenharmony_ci 4038c2ecf20Sopenharmony_ci case CFI_INTERFACE_X32_ASYNC: 4048c2ecf20Sopenharmony_ci printk(" - x32-only asynchronous interface\n"); 4058c2ecf20Sopenharmony_ci break; 4068c2ecf20Sopenharmony_ci 4078c2ecf20Sopenharmony_ci case CFI_INTERFACE_X16_BY_X32_ASYNC: 4088c2ecf20Sopenharmony_ci printk(" - supports x16 and x32 via Word# with asynchronous interface\n"); 4098c2ecf20Sopenharmony_ci break; 4108c2ecf20Sopenharmony_ci 4118c2ecf20Sopenharmony_ci case CFI_INTERFACE_NOT_ALLOWED: 4128c2ecf20Sopenharmony_ci printk(" - Not Allowed / Reserved\n"); 4138c2ecf20Sopenharmony_ci break; 4148c2ecf20Sopenharmony_ci 4158c2ecf20Sopenharmony_ci default: 4168c2ecf20Sopenharmony_ci printk(" - Unknown\n"); 4178c2ecf20Sopenharmony_ci break; 4188c2ecf20Sopenharmony_ci } 4198c2ecf20Sopenharmony_ci 4208c2ecf20Sopenharmony_ci printk("Max. bytes in buffer write: 0x%x\n", 1<< cfip->MaxBufWriteSize); 4218c2ecf20Sopenharmony_ci printk("Number of Erase Block Regions: %d\n", cfip->NumEraseRegions); 4228c2ecf20Sopenharmony_ci 4238c2ecf20Sopenharmony_ci} 4248c2ecf20Sopenharmony_ci#endif /* DEBUG_CFI */ 4258c2ecf20Sopenharmony_ci 4268c2ecf20Sopenharmony_cistatic struct chip_probe cfi_chip_probe = { 4278c2ecf20Sopenharmony_ci .name = "CFI", 4288c2ecf20Sopenharmony_ci .probe_chip = cfi_probe_chip 4298c2ecf20Sopenharmony_ci}; 4308c2ecf20Sopenharmony_ci 4318c2ecf20Sopenharmony_cistruct mtd_info *cfi_probe(struct map_info *map) 4328c2ecf20Sopenharmony_ci{ 4338c2ecf20Sopenharmony_ci /* 4348c2ecf20Sopenharmony_ci * Just use the generic probe stuff to call our CFI-specific 4358c2ecf20Sopenharmony_ci * chip_probe routine in all the possible permutations, etc. 4368c2ecf20Sopenharmony_ci */ 4378c2ecf20Sopenharmony_ci return mtd_do_chip_probe(map, &cfi_chip_probe); 4388c2ecf20Sopenharmony_ci} 4398c2ecf20Sopenharmony_ci 4408c2ecf20Sopenharmony_cistatic struct mtd_chip_driver cfi_chipdrv = { 4418c2ecf20Sopenharmony_ci .probe = cfi_probe, 4428c2ecf20Sopenharmony_ci .name = "cfi_probe", 4438c2ecf20Sopenharmony_ci .module = THIS_MODULE 4448c2ecf20Sopenharmony_ci}; 4458c2ecf20Sopenharmony_ci 4468c2ecf20Sopenharmony_cistatic int __init cfi_probe_init(void) 4478c2ecf20Sopenharmony_ci{ 4488c2ecf20Sopenharmony_ci register_mtd_chip_driver(&cfi_chipdrv); 4498c2ecf20Sopenharmony_ci return 0; 4508c2ecf20Sopenharmony_ci} 4518c2ecf20Sopenharmony_ci 4528c2ecf20Sopenharmony_cistatic void __exit cfi_probe_exit(void) 4538c2ecf20Sopenharmony_ci{ 4548c2ecf20Sopenharmony_ci unregister_mtd_chip_driver(&cfi_chipdrv); 4558c2ecf20Sopenharmony_ci} 4568c2ecf20Sopenharmony_ci 4578c2ecf20Sopenharmony_cimodule_init(cfi_probe_init); 4588c2ecf20Sopenharmony_cimodule_exit(cfi_probe_exit); 4598c2ecf20Sopenharmony_ci 4608c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL"); 4618c2ecf20Sopenharmony_ciMODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al."); 4628c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("Probe code for CFI-compliant flash chips"); 463