18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ci/* 48c2ecf20Sopenharmony_ci * Copyright 2016-2019 HabanaLabs, Ltd. 58c2ecf20Sopenharmony_ci * All Rights Reserved. 68c2ecf20Sopenharmony_ci */ 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci#include "goyaP.h" 98c2ecf20Sopenharmony_ci#include "../include/goya/asic_reg/goya_regs.h" 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci/* 128c2ecf20Sopenharmony_ci * goya_set_block_as_protected - set the given block as protected 138c2ecf20Sopenharmony_ci * 148c2ecf20Sopenharmony_ci * @hdev: pointer to hl_device structure 158c2ecf20Sopenharmony_ci * @block: block base address 168c2ecf20Sopenharmony_ci * 178c2ecf20Sopenharmony_ci */ 188c2ecf20Sopenharmony_cistatic void goya_pb_set_block(struct hl_device *hdev, u64 base) 198c2ecf20Sopenharmony_ci{ 208c2ecf20Sopenharmony_ci u32 pb_addr = base - CFG_BASE + PROT_BITS_OFFS; 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ci while (pb_addr & 0xFFF) { 238c2ecf20Sopenharmony_ci WREG32(pb_addr, 0); 248c2ecf20Sopenharmony_ci pb_addr += 4; 258c2ecf20Sopenharmony_ci } 268c2ecf20Sopenharmony_ci} 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_cistatic void goya_init_mme_protection_bits(struct hl_device *hdev) 298c2ecf20Sopenharmony_ci{ 308c2ecf20Sopenharmony_ci u32 pb_addr, mask; 318c2ecf20Sopenharmony_ci u8 word_offset; 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci /* TODO: change to real reg name when Soc Online is updated */ 348c2ecf20Sopenharmony_ci u64 mmMME_SBB_POWER_ECO1 = 0xDFF60, 358c2ecf20Sopenharmony_ci mmMME_SBB_POWER_ECO2 = 0xDFF64; 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmACC_MS_ECC_MEM_0_BASE); 388c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmACC_MS_ECC_MEM_1_BASE); 398c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmACC_MS_ECC_MEM_2_BASE); 408c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmACC_MS_ECC_MEM_3_BASE); 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSBA_ECC_MEM_BASE); 438c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSBB_ECC_MEM_BASE); 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmMME1_RTR_BASE); 468c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmMME1_RD_REGULATOR_BASE); 478c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmMME1_WR_REGULATOR_BASE); 488c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmMME2_RTR_BASE); 498c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmMME2_RD_REGULATOR_BASE); 508c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmMME2_WR_REGULATOR_BASE); 518c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmMME3_RTR_BASE); 528c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmMME3_RD_REGULATOR_BASE); 538c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmMME3_WR_REGULATOR_BASE); 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmMME4_RTR_BASE); 568c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmMME4_RD_REGULATOR_BASE); 578c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmMME4_WR_REGULATOR_BASE); 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmMME5_RTR_BASE); 608c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmMME5_RD_REGULATOR_BASE); 618c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmMME5_WR_REGULATOR_BASE); 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmMME6_RTR_BASE); 648c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmMME6_RD_REGULATOR_BASE); 658c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmMME6_WR_REGULATOR_BASE); 668c2ecf20Sopenharmony_ci 678c2ecf20Sopenharmony_ci pb_addr = (mmMME_DUMMY & ~0xFFF) + PROT_BITS_OFFS; 688c2ecf20Sopenharmony_ci word_offset = ((mmMME_DUMMY & PROT_BITS_OFFS) >> 7) << 2; 698c2ecf20Sopenharmony_ci mask = 1 << ((mmMME_DUMMY & 0x7F) >> 2); 708c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_RESET & 0x7F) >> 2); 718c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_STALL & 0x7F) >> 2); 728c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); 738c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); 748c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_DBGMEM_ADD & 0x7F) >> 2); 758c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_DBGMEM_DATA_WR & 0x7F) >> 2); 768c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_DBGMEM_DATA_RD & 0x7F) >> 2); 778c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_DBGMEM_CTRL & 0x7F) >> 2); 788c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_DBGMEM_RC & 0x7F) >> 2); 798c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_LOG_SHADOW & 0x7F) >> 2); 808c2ecf20Sopenharmony_ci 818c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 828c2ecf20Sopenharmony_ci 838c2ecf20Sopenharmony_ci pb_addr = (mmMME_STORE_MAX_CREDIT & ~0xFFF) + PROT_BITS_OFFS; 848c2ecf20Sopenharmony_ci word_offset = ((mmMME_STORE_MAX_CREDIT & PROT_BITS_OFFS) >> 7) << 2; 858c2ecf20Sopenharmony_ci mask = 1 << ((mmMME_STORE_MAX_CREDIT & 0x7F) >> 2); 868c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_AGU & 0x7F) >> 2); 878c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_SBA & 0x7F) >> 2); 888c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_SBB & 0x7F) >> 2); 898c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_SBC & 0x7F) >> 2); 908c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_WBC & 0x7F) >> 2); 918c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_SBA_CONTROL_DATA & 0x7F) >> 2); 928c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_SBB_CONTROL_DATA & 0x7F) >> 2); 938c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_SBC_CONTROL_DATA & 0x7F) >> 2); 948c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_WBC_CONTROL_DATA & 0x7F) >> 2); 958c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_TE & 0x7F) >> 2); 968c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_TE2DEC & 0x7F) >> 2); 978c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_REI_STATUS & 0x7F) >> 2); 988c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_REI_MASK & 0x7F) >> 2); 998c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_SEI_STATUS & 0x7F) >> 2); 1008c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_SEI_MASK & 0x7F) >> 2); 1018c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_SPI_STATUS & 0x7F) >> 2); 1028c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_SPI_MASK & 0x7F) >> 2); 1038c2ecf20Sopenharmony_ci 1048c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 1058c2ecf20Sopenharmony_ci 1068c2ecf20Sopenharmony_ci pb_addr = (mmMME_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 1078c2ecf20Sopenharmony_ci word_offset = ((mmMME_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 1088c2ecf20Sopenharmony_ci mask = 1 << ((mmMME_QM_GLBL_CFG0 & 0x7F) >> 2); 1098c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_GLBL_CFG1 & 0x7F) >> 2); 1108c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_GLBL_PROT & 0x7F) >> 2); 1118c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_GLBL_ERR_CFG & 0x7F) >> 2); 1128c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 1138c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 1148c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_GLBL_ERR_WDATA & 0x7F) >> 2); 1158c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_GLBL_SECURE_PROPS & 0x7F) >> 2); 1168c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 1178c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_GLBL_STS0 & 0x7F) >> 2); 1188c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_GLBL_STS1 & 0x7F) >> 2); 1198c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_BASE_LO & 0x7F) >> 2); 1208c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_BASE_HI & 0x7F) >> 2); 1218c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_SIZE & 0x7F) >> 2); 1228c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_PI & 0x7F) >> 2); 1238c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_CI & 0x7F) >> 2); 1248c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_CFG0 & 0x7F) >> 2); 1258c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_CFG1 & 0x7F) >> 2); 1268c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_ARUSER & 0x7F) >> 2); 1278c2ecf20Sopenharmony_ci 1288c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 1298c2ecf20Sopenharmony_ci 1308c2ecf20Sopenharmony_ci pb_addr = (mmMME_QM_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 1318c2ecf20Sopenharmony_ci word_offset = ((mmMME_QM_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 1328c2ecf20Sopenharmony_ci mask = 1 << ((mmMME_QM_PQ_PUSH0 & 0x7F) >> 2); 1338c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_PUSH1 & 0x7F) >> 2); 1348c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_PUSH2 & 0x7F) >> 2); 1358c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_PUSH3 & 0x7F) >> 2); 1368c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_STS0 & 0x7F) >> 2); 1378c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_STS1 & 0x7F) >> 2); 1388c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 1398c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 1408c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 1418c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 1428c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_CFG0 & 0x7F) >> 2); 1438c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_CFG1 & 0x7F) >> 2); 1448c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_ARUSER & 0x7F) >> 2); 1458c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_PTR_LO & 0x7F) >> 2); 1468c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_PTR_HI & 0x7F) >> 2); 1478c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_TSIZE & 0x7F) >> 2); 1488c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_CTL & 0x7F) >> 2); 1498c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_PTR_LO_STS & 0x7F) >> 2); 1508c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_PTR_HI_STS & 0x7F) >> 2); 1518c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_TSIZE_STS & 0x7F) >> 2); 1528c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_CTL_STS & 0x7F) >> 2); 1538c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_STS0 & 0x7F) >> 2); 1548c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_STS1 & 0x7F) >> 2); 1558c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 1568c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 1578c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 1588c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 1598c2ecf20Sopenharmony_ci 1608c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 1618c2ecf20Sopenharmony_ci 1628c2ecf20Sopenharmony_ci pb_addr = (mmMME_QM_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 1638c2ecf20Sopenharmony_ci word_offset = ((mmMME_QM_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 1648c2ecf20Sopenharmony_ci mask = 1 << ((mmMME_QM_CQ_IFIFO_CNT & 0x7F) >> 2); 1658c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 1668c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 1678c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 1688c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 1698c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 1708c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 1718c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 1728c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 1738c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 1748c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 1758c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 1768c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 1778c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 1788c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 1798c2ecf20Sopenharmony_ci 1808c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 1818c2ecf20Sopenharmony_ci 1828c2ecf20Sopenharmony_ci pb_addr = (mmMME_QM_CP_STS & ~0xFFF) + PROT_BITS_OFFS; 1838c2ecf20Sopenharmony_ci word_offset = ((mmMME_QM_CP_STS & PROT_BITS_OFFS) >> 7) << 2; 1848c2ecf20Sopenharmony_ci mask = 1 << ((mmMME_QM_CP_STS & 0x7F) >> 2); 1858c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_CURRENT_INST_LO & 0x7F) >> 2); 1868c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_CURRENT_INST_HI & 0x7F) >> 2); 1878c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_BARRIER_CFG & 0x7F) >> 2); 1888c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_DBG_0 & 0x7F) >> 2); 1898c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_BUF_ADDR & 0x7F) >> 2); 1908c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_BUF_RDATA & 0x7F) >> 2); 1918c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_BUF_ADDR & 0x7F) >> 2); 1928c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_BUF_RDATA & 0x7F) >> 2); 1938c2ecf20Sopenharmony_ci 1948c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 1958c2ecf20Sopenharmony_ci 1968c2ecf20Sopenharmony_ci pb_addr = (mmMME_CMDQ_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 1978c2ecf20Sopenharmony_ci word_offset = ((mmMME_CMDQ_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 1988c2ecf20Sopenharmony_ci mask = 1 << ((mmMME_CMDQ_GLBL_CFG0 & 0x7F) >> 2); 1998c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_GLBL_CFG1 & 0x7F) >> 2); 2008c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_GLBL_PROT & 0x7F) >> 2); 2018c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_GLBL_ERR_CFG & 0x7F) >> 2); 2028c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 2038c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 2048c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_GLBL_ERR_WDATA & 0x7F) >> 2); 2058c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_GLBL_SECURE_PROPS & 0x7F) >> 2); 2068c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 2078c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_GLBL_STS0 & 0x7F) >> 2); 2088c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_GLBL_STS1 & 0x7F) >> 2); 2098c2ecf20Sopenharmony_ci 2108c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 2118c2ecf20Sopenharmony_ci 2128c2ecf20Sopenharmony_ci pb_addr = (mmMME_CMDQ_CQ_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 2138c2ecf20Sopenharmony_ci word_offset = ((mmMME_CMDQ_CQ_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 2148c2ecf20Sopenharmony_ci mask = 1 << ((mmMME_CMDQ_CQ_CFG0 & 0x7F) >> 2); 2158c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_CFG1 & 0x7F) >> 2); 2168c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_ARUSER & 0x7F) >> 2); 2178c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_PTR_LO_STS & 0x7F) >> 2); 2188c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_PTR_HI_STS & 0x7F) >> 2); 2198c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_TSIZE_STS & 0x7F) >> 2); 2208c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_CTL_STS & 0x7F) >> 2); 2218c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_STS0 & 0x7F) >> 2); 2228c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_STS1 & 0x7F) >> 2); 2238c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 2248c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 2258c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 2268c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 2278c2ecf20Sopenharmony_ci 2288c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 2298c2ecf20Sopenharmony_ci 2308c2ecf20Sopenharmony_ci pb_addr = (mmMME_CMDQ_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 2318c2ecf20Sopenharmony_ci word_offset = ((mmMME_CMDQ_CQ_IFIFO_CNT & 2328c2ecf20Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 2338c2ecf20Sopenharmony_ci mask = 1 << ((mmMME_CMDQ_CQ_IFIFO_CNT & 0x7F) >> 2); 2348c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 2358c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 2368c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 2378c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 2388c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 2398c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 2408c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 2418c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 2428c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 2438c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 2448c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 2458c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 2468c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 2478c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 2488c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_STS & 0x7F) >> 2); 2498c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_CURRENT_INST_LO & 0x7F) >> 2); 2508c2ecf20Sopenharmony_ci 2518c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 2528c2ecf20Sopenharmony_ci 2538c2ecf20Sopenharmony_ci pb_addr = (mmMME_CMDQ_CP_CURRENT_INST_HI & ~0xFFF) + PROT_BITS_OFFS; 2548c2ecf20Sopenharmony_ci word_offset = ((mmMME_CMDQ_CP_CURRENT_INST_HI & PROT_BITS_OFFS) >> 7) 2558c2ecf20Sopenharmony_ci << 2; 2568c2ecf20Sopenharmony_ci mask = 1 << ((mmMME_CMDQ_CP_CURRENT_INST_HI & 0x7F) >> 2); 2578c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_BARRIER_CFG & 0x7F) >> 2); 2588c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_DBG_0 & 0x7F) >> 2); 2598c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_BUF_ADDR & 0x7F) >> 2); 2608c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_BUF_RDATA & 0x7F) >> 2); 2618c2ecf20Sopenharmony_ci 2628c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 2638c2ecf20Sopenharmony_ci 2648c2ecf20Sopenharmony_ci pb_addr = (mmMME_SBB_POWER_ECO1 & ~0xFFF) + PROT_BITS_OFFS; 2658c2ecf20Sopenharmony_ci word_offset = ((mmMME_SBB_POWER_ECO1 & PROT_BITS_OFFS) >> 7) << 2; 2668c2ecf20Sopenharmony_ci mask = 1 << ((mmMME_SBB_POWER_ECO1 & 0x7F) >> 2); 2678c2ecf20Sopenharmony_ci mask |= 1 << ((mmMME_SBB_POWER_ECO2 & 0x7F) >> 2); 2688c2ecf20Sopenharmony_ci 2698c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 2708c2ecf20Sopenharmony_ci} 2718c2ecf20Sopenharmony_ci 2728c2ecf20Sopenharmony_cistatic void goya_init_dma_protection_bits(struct hl_device *hdev) 2738c2ecf20Sopenharmony_ci{ 2748c2ecf20Sopenharmony_ci u32 pb_addr, mask; 2758c2ecf20Sopenharmony_ci u8 word_offset; 2768c2ecf20Sopenharmony_ci 2778c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmDMA_NRTR_BASE); 2788c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmDMA_RD_REGULATOR_BASE); 2798c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmDMA_WR_REGULATOR_BASE); 2808c2ecf20Sopenharmony_ci 2818c2ecf20Sopenharmony_ci pb_addr = (mmDMA_QM_0_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 2828c2ecf20Sopenharmony_ci word_offset = ((mmDMA_QM_0_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 2838c2ecf20Sopenharmony_ci mask = 1 << ((mmDMA_QM_0_GLBL_CFG0 & 0x7F) >> 2); 2848c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_GLBL_CFG1 & 0x7F) >> 2); 2858c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_GLBL_PROT & 0x7F) >> 2); 2868c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_GLBL_ERR_CFG & 0x7F) >> 2); 2878c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 2888c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 2898c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_GLBL_ERR_WDATA & 0x7F) >> 2); 2908c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_GLBL_SECURE_PROPS & 0x7F) >> 2); 2918c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 2928c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_GLBL_STS0 & 0x7F) >> 2); 2938c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_GLBL_STS1 & 0x7F) >> 2); 2948c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_BASE_LO & 0x7F) >> 2); 2958c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_BASE_HI & 0x7F) >> 2); 2968c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_SIZE & 0x7F) >> 2); 2978c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_PI & 0x7F) >> 2); 2988c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_CI & 0x7F) >> 2); 2998c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_CFG0 & 0x7F) >> 2); 3008c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_CFG1 & 0x7F) >> 2); 3018c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_ARUSER & 0x7F) >> 2); 3028c2ecf20Sopenharmony_ci 3038c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 3048c2ecf20Sopenharmony_ci 3058c2ecf20Sopenharmony_ci pb_addr = (mmDMA_QM_0_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 3068c2ecf20Sopenharmony_ci word_offset = ((mmDMA_QM_0_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 3078c2ecf20Sopenharmony_ci mask = 1 << ((mmDMA_QM_0_PQ_PUSH0 & 0x7F) >> 2); 3088c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_PUSH1 & 0x7F) >> 2); 3098c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_PUSH2 & 0x7F) >> 2); 3108c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_PUSH3 & 0x7F) >> 2); 3118c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_STS0 & 0x7F) >> 2); 3128c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_STS1 & 0x7F) >> 2); 3138c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 3148c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 3158c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 3168c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 3178c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_CFG0 & 0x7F) >> 2); 3188c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_CFG1 & 0x7F) >> 2); 3198c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_ARUSER & 0x7F) >> 2); 3208c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_PTR_LO & 0x7F) >> 2); 3218c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_PTR_HI & 0x7F) >> 2); 3228c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_TSIZE & 0x7F) >> 2); 3238c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_CTL & 0x7F) >> 2); 3248c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_PTR_LO_STS & 0x7F) >> 2); 3258c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_PTR_HI_STS & 0x7F) >> 2); 3268c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_TSIZE_STS & 0x7F) >> 2); 3278c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_CTL_STS & 0x7F) >> 2); 3288c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_STS0 & 0x7F) >> 2); 3298c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_STS1 & 0x7F) >> 2); 3308c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 3318c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 3328c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 3338c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 3348c2ecf20Sopenharmony_ci 3358c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 3368c2ecf20Sopenharmony_ci 3378c2ecf20Sopenharmony_ci pb_addr = (mmDMA_QM_0_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 3388c2ecf20Sopenharmony_ci word_offset = ((mmDMA_QM_0_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 3398c2ecf20Sopenharmony_ci mask = 1 << ((mmDMA_QM_0_CQ_IFIFO_CNT & 0x7F) >> 2); 3408c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 3418c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 3428c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 3438c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 3448c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 3458c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 3468c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 3478c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 3488c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 3498c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 3508c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 3518c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 3528c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 3538c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 3548c2ecf20Sopenharmony_ci 3558c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 3568c2ecf20Sopenharmony_ci 3578c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmDMA_CH_0_BASE); 3588c2ecf20Sopenharmony_ci 3598c2ecf20Sopenharmony_ci pb_addr = (mmDMA_QM_1_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 3608c2ecf20Sopenharmony_ci word_offset = ((mmDMA_QM_1_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 3618c2ecf20Sopenharmony_ci mask = 1 << ((mmDMA_QM_1_GLBL_CFG0 & 0x7F) >> 2); 3628c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_GLBL_CFG1 & 0x7F) >> 2); 3638c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_GLBL_PROT & 0x7F) >> 2); 3648c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_GLBL_ERR_CFG & 0x7F) >> 2); 3658c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 3668c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 3678c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_GLBL_ERR_WDATA & 0x7F) >> 2); 3688c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_GLBL_SECURE_PROPS & 0x7F) >> 2); 3698c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 3708c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_GLBL_STS0 & 0x7F) >> 2); 3718c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_GLBL_STS1 & 0x7F) >> 2); 3728c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_BASE_LO & 0x7F) >> 2); 3738c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_BASE_HI & 0x7F) >> 2); 3748c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_SIZE & 0x7F) >> 2); 3758c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_PI & 0x7F) >> 2); 3768c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_CI & 0x7F) >> 2); 3778c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_CFG0 & 0x7F) >> 2); 3788c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_CFG1 & 0x7F) >> 2); 3798c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_ARUSER & 0x7F) >> 2); 3808c2ecf20Sopenharmony_ci 3818c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 3828c2ecf20Sopenharmony_ci 3838c2ecf20Sopenharmony_ci pb_addr = (mmDMA_QM_1_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 3848c2ecf20Sopenharmony_ci word_offset = ((mmDMA_QM_1_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 3858c2ecf20Sopenharmony_ci mask = 1 << ((mmDMA_QM_1_PQ_PUSH0 & 0x7F) >> 2); 3868c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_PUSH1 & 0x7F) >> 2); 3878c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_PUSH2 & 0x7F) >> 2); 3888c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_PUSH3 & 0x7F) >> 2); 3898c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_STS0 & 0x7F) >> 2); 3908c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_STS1 & 0x7F) >> 2); 3918c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 3928c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 3938c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 3948c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 3958c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_CFG0 & 0x7F) >> 2); 3968c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_CFG1 & 0x7F) >> 2); 3978c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_ARUSER & 0x7F) >> 2); 3988c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_PTR_LO & 0x7F) >> 2); 3998c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_PTR_HI & 0x7F) >> 2); 4008c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_TSIZE & 0x7F) >> 2); 4018c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_CTL & 0x7F) >> 2); 4028c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_PTR_LO_STS & 0x7F) >> 2); 4038c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_PTR_HI_STS & 0x7F) >> 2); 4048c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_TSIZE_STS & 0x7F) >> 2); 4058c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_CTL_STS & 0x7F) >> 2); 4068c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_STS0 & 0x7F) >> 2); 4078c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_STS1 & 0x7F) >> 2); 4088c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 4098c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 4108c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 4118c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 4128c2ecf20Sopenharmony_ci 4138c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 4148c2ecf20Sopenharmony_ci 4158c2ecf20Sopenharmony_ci pb_addr = (mmDMA_QM_1_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 4168c2ecf20Sopenharmony_ci word_offset = ((mmDMA_QM_1_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 4178c2ecf20Sopenharmony_ci mask = 1 << ((mmDMA_QM_1_CQ_IFIFO_CNT & 0x7F) >> 2); 4188c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 4198c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 4208c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 4218c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 4228c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 4238c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 4248c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 4258c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 4268c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 4278c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 4288c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 4298c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 4308c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 4318c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 4328c2ecf20Sopenharmony_ci 4338c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 4348c2ecf20Sopenharmony_ci 4358c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmDMA_CH_1_BASE); 4368c2ecf20Sopenharmony_ci 4378c2ecf20Sopenharmony_ci pb_addr = (mmDMA_QM_2_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 4388c2ecf20Sopenharmony_ci word_offset = ((mmDMA_QM_2_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 4398c2ecf20Sopenharmony_ci mask = 1 << ((mmDMA_QM_2_GLBL_CFG0 & 0x7F) >> 2); 4408c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_GLBL_CFG1 & 0x7F) >> 2); 4418c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_GLBL_PROT & 0x7F) >> 2); 4428c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_GLBL_ERR_CFG & 0x7F) >> 2); 4438c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 4448c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 4458c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_GLBL_ERR_WDATA & 0x7F) >> 2); 4468c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_GLBL_SECURE_PROPS & 0x7F) >> 2); 4478c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 4488c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_GLBL_STS0 & 0x7F) >> 2); 4498c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_GLBL_STS1 & 0x7F) >> 2); 4508c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_BASE_LO & 0x7F) >> 2); 4518c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_BASE_HI & 0x7F) >> 2); 4528c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_SIZE & 0x7F) >> 2); 4538c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_PI & 0x7F) >> 2); 4548c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_CI & 0x7F) >> 2); 4558c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_CFG0 & 0x7F) >> 2); 4568c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_CFG1 & 0x7F) >> 2); 4578c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_ARUSER & 0x7F) >> 2); 4588c2ecf20Sopenharmony_ci 4598c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 4608c2ecf20Sopenharmony_ci 4618c2ecf20Sopenharmony_ci pb_addr = (mmDMA_QM_2_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 4628c2ecf20Sopenharmony_ci word_offset = ((mmDMA_QM_2_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 4638c2ecf20Sopenharmony_ci mask = 1 << ((mmDMA_QM_2_PQ_PUSH0 & 0x7F) >> 2); 4648c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_PUSH1 & 0x7F) >> 2); 4658c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_PUSH2 & 0x7F) >> 2); 4668c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_PUSH3 & 0x7F) >> 2); 4678c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_STS0 & 0x7F) >> 2); 4688c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_STS1 & 0x7F) >> 2); 4698c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 4708c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 4718c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 4728c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 4738c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_CFG0 & 0x7F) >> 2); 4748c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_CFG1 & 0x7F) >> 2); 4758c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_ARUSER & 0x7F) >> 2); 4768c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_PTR_LO & 0x7F) >> 2); 4778c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_PTR_HI & 0x7F) >> 2); 4788c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_TSIZE & 0x7F) >> 2); 4798c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_CTL & 0x7F) >> 2); 4808c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_PTR_LO_STS & 0x7F) >> 2); 4818c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_PTR_HI_STS & 0x7F) >> 2); 4828c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_TSIZE_STS & 0x7F) >> 2); 4838c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_CTL_STS & 0x7F) >> 2); 4848c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_STS0 & 0x7F) >> 2); 4858c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_STS1 & 0x7F) >> 2); 4868c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 4878c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 4888c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 4898c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 4908c2ecf20Sopenharmony_ci 4918c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 4928c2ecf20Sopenharmony_ci 4938c2ecf20Sopenharmony_ci pb_addr = (mmDMA_QM_2_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 4948c2ecf20Sopenharmony_ci word_offset = ((mmDMA_QM_2_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 4958c2ecf20Sopenharmony_ci mask = 1 << ((mmDMA_QM_2_CQ_IFIFO_CNT & 0x7F) >> 2); 4968c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 4978c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 4988c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 4998c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 5008c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 5018c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 5028c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 5038c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 5048c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 5058c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 5068c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 5078c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 5088c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 5098c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 5108c2ecf20Sopenharmony_ci 5118c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 5128c2ecf20Sopenharmony_ci 5138c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmDMA_CH_2_BASE); 5148c2ecf20Sopenharmony_ci 5158c2ecf20Sopenharmony_ci pb_addr = (mmDMA_QM_3_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 5168c2ecf20Sopenharmony_ci word_offset = ((mmDMA_QM_3_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 5178c2ecf20Sopenharmony_ci mask = 1 << ((mmDMA_QM_3_GLBL_CFG0 & 0x7F) >> 2); 5188c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_GLBL_CFG1 & 0x7F) >> 2); 5198c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_GLBL_PROT & 0x7F) >> 2); 5208c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_GLBL_ERR_CFG & 0x7F) >> 2); 5218c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 5228c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 5238c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_GLBL_ERR_WDATA & 0x7F) >> 2); 5248c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_GLBL_SECURE_PROPS & 0x7F) >> 2); 5258c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 5268c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_GLBL_STS0 & 0x7F) >> 2); 5278c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_GLBL_STS1 & 0x7F) >> 2); 5288c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_BASE_LO & 0x7F) >> 2); 5298c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_BASE_HI & 0x7F) >> 2); 5308c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_SIZE & 0x7F) >> 2); 5318c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_PI & 0x7F) >> 2); 5328c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_CI & 0x7F) >> 2); 5338c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_CFG0 & 0x7F) >> 2); 5348c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_CFG1 & 0x7F) >> 2); 5358c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_ARUSER & 0x7F) >> 2); 5368c2ecf20Sopenharmony_ci 5378c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 5388c2ecf20Sopenharmony_ci 5398c2ecf20Sopenharmony_ci pb_addr = (mmDMA_QM_3_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 5408c2ecf20Sopenharmony_ci word_offset = ((mmDMA_QM_3_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 5418c2ecf20Sopenharmony_ci mask = 1 << ((mmDMA_QM_3_PQ_PUSH0 & 0x7F) >> 2); 5428c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_PUSH1 & 0x7F) >> 2); 5438c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_PUSH2 & 0x7F) >> 2); 5448c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_PUSH3 & 0x7F) >> 2); 5458c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_STS0 & 0x7F) >> 2); 5468c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_STS1 & 0x7F) >> 2); 5478c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 5488c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 5498c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 5508c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 5518c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_CFG0 & 0x7F) >> 2); 5528c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_CFG1 & 0x7F) >> 2); 5538c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_ARUSER & 0x7F) >> 2); 5548c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_PTR_LO & 0x7F) >> 2); 5558c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_PTR_HI & 0x7F) >> 2); 5568c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_TSIZE & 0x7F) >> 2); 5578c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_CTL & 0x7F) >> 2); 5588c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_PTR_LO_STS & 0x7F) >> 2); 5598c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_PTR_HI_STS & 0x7F) >> 2); 5608c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_TSIZE_STS & 0x7F) >> 2); 5618c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_CTL_STS & 0x7F) >> 2); 5628c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_STS0 & 0x7F) >> 2); 5638c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_STS1 & 0x7F) >> 2); 5648c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 5658c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 5668c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 5678c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 5688c2ecf20Sopenharmony_ci 5698c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 5708c2ecf20Sopenharmony_ci 5718c2ecf20Sopenharmony_ci pb_addr = (mmDMA_QM_3_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 5728c2ecf20Sopenharmony_ci word_offset = ((mmDMA_QM_3_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 5738c2ecf20Sopenharmony_ci mask = 1 << ((mmDMA_QM_3_CQ_IFIFO_CNT & 0x7F) >> 2); 5748c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 5758c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 5768c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 5778c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 5788c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 5798c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 5808c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 5818c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 5828c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 5838c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 5848c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 5858c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 5868c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 5878c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 5888c2ecf20Sopenharmony_ci 5898c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 5908c2ecf20Sopenharmony_ci 5918c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmDMA_CH_3_BASE); 5928c2ecf20Sopenharmony_ci 5938c2ecf20Sopenharmony_ci pb_addr = (mmDMA_QM_4_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 5948c2ecf20Sopenharmony_ci word_offset = ((mmDMA_QM_4_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 5958c2ecf20Sopenharmony_ci mask = 1 << ((mmDMA_QM_4_GLBL_CFG0 & 0x7F) >> 2); 5968c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_GLBL_CFG1 & 0x7F) >> 2); 5978c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_GLBL_PROT & 0x7F) >> 2); 5988c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_GLBL_ERR_CFG & 0x7F) >> 2); 5998c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 6008c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 6018c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_GLBL_ERR_WDATA & 0x7F) >> 2); 6028c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_GLBL_SECURE_PROPS & 0x7F) >> 2); 6038c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 6048c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_GLBL_STS0 & 0x7F) >> 2); 6058c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_GLBL_STS1 & 0x7F) >> 2); 6068c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_BASE_LO & 0x7F) >> 2); 6078c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_BASE_HI & 0x7F) >> 2); 6088c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_SIZE & 0x7F) >> 2); 6098c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_PI & 0x7F) >> 2); 6108c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_CI & 0x7F) >> 2); 6118c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_CFG0 & 0x7F) >> 2); 6128c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_CFG1 & 0x7F) >> 2); 6138c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_ARUSER & 0x7F) >> 2); 6148c2ecf20Sopenharmony_ci 6158c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 6168c2ecf20Sopenharmony_ci 6178c2ecf20Sopenharmony_ci pb_addr = (mmDMA_QM_4_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 6188c2ecf20Sopenharmony_ci word_offset = ((mmDMA_QM_4_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 6198c2ecf20Sopenharmony_ci mask = 1 << ((mmDMA_QM_4_PQ_PUSH0 & 0x7F) >> 2); 6208c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_PUSH1 & 0x7F) >> 2); 6218c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_PUSH2 & 0x7F) >> 2); 6228c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_PUSH3 & 0x7F) >> 2); 6238c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_STS0 & 0x7F) >> 2); 6248c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_STS1 & 0x7F) >> 2); 6258c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 6268c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 6278c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 6288c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 6298c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_CFG0 & 0x7F) >> 2); 6308c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_CFG1 & 0x7F) >> 2); 6318c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_ARUSER & 0x7F) >> 2); 6328c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_PTR_LO & 0x7F) >> 2); 6338c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_PTR_HI & 0x7F) >> 2); 6348c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_TSIZE & 0x7F) >> 2); 6358c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_CTL & 0x7F) >> 2); 6368c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_PTR_LO_STS & 0x7F) >> 2); 6378c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_PTR_HI_STS & 0x7F) >> 2); 6388c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_TSIZE_STS & 0x7F) >> 2); 6398c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_CTL_STS & 0x7F) >> 2); 6408c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_STS0 & 0x7F) >> 2); 6418c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_STS1 & 0x7F) >> 2); 6428c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 6438c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 6448c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 6458c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 6468c2ecf20Sopenharmony_ci 6478c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 6488c2ecf20Sopenharmony_ci 6498c2ecf20Sopenharmony_ci pb_addr = (mmDMA_QM_4_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 6508c2ecf20Sopenharmony_ci word_offset = ((mmDMA_QM_4_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 6518c2ecf20Sopenharmony_ci mask = 1 << ((mmDMA_QM_4_CQ_IFIFO_CNT & 0x7F) >> 2); 6528c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 6538c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 6548c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 6558c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 6568c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 6578c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 6588c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 6598c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 6608c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 6618c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 6628c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 6638c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 6648c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 6658c2ecf20Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 6668c2ecf20Sopenharmony_ci 6678c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 6688c2ecf20Sopenharmony_ci 6698c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmDMA_CH_4_BASE); 6708c2ecf20Sopenharmony_ci} 6718c2ecf20Sopenharmony_ci 6728c2ecf20Sopenharmony_cistatic void goya_init_tpc_protection_bits(struct hl_device *hdev) 6738c2ecf20Sopenharmony_ci{ 6748c2ecf20Sopenharmony_ci u32 pb_addr, mask; 6758c2ecf20Sopenharmony_ci u8 word_offset; 6768c2ecf20Sopenharmony_ci 6778c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC0_RD_REGULATOR_BASE); 6788c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC0_WR_REGULATOR_BASE); 6798c2ecf20Sopenharmony_ci 6808c2ecf20Sopenharmony_ci pb_addr = (mmTPC0_CFG_SEMAPHORE & ~0xFFF) + PROT_BITS_OFFS; 6818c2ecf20Sopenharmony_ci word_offset = ((mmTPC0_CFG_SEMAPHORE & PROT_BITS_OFFS) >> 7) << 2; 6828c2ecf20Sopenharmony_ci 6838c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC0_CFG_SEMAPHORE & 0x7F) >> 2); 6848c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_VFLAGS & 0x7F) >> 2); 6858c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_SFLAGS & 0x7F) >> 2); 6868c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_STATUS & 0x7F) >> 2); 6878c2ecf20Sopenharmony_ci 6888c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 6898c2ecf20Sopenharmony_ci 6908c2ecf20Sopenharmony_ci pb_addr = (mmTPC0_CFG_CFG_BASE_ADDRESS_HIGH & ~0xFFF) + PROT_BITS_OFFS; 6918c2ecf20Sopenharmony_ci word_offset = ((mmTPC0_CFG_CFG_BASE_ADDRESS_HIGH & 6928c2ecf20Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 6938c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC0_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); 6948c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); 6958c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); 6968c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); 6978c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_TPC_STALL & 0x7F) >> 2); 6988c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_MSS_CONFIG & 0x7F) >> 2); 6998c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); 7008c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_TPC_INTR_MASK & 0x7F) >> 2); 7018c2ecf20Sopenharmony_ci 7028c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 7038c2ecf20Sopenharmony_ci 7048c2ecf20Sopenharmony_ci pb_addr = (mmTPC0_CFG_ARUSER & ~0xFFF) + PROT_BITS_OFFS; 7058c2ecf20Sopenharmony_ci word_offset = ((mmTPC0_CFG_ARUSER & PROT_BITS_OFFS) >> 7) << 2; 7068c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC0_CFG_ARUSER & 0x7F) >> 2); 7078c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_AWUSER & 0x7F) >> 2); 7088c2ecf20Sopenharmony_ci 7098c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 7108c2ecf20Sopenharmony_ci 7118c2ecf20Sopenharmony_ci pb_addr = (mmTPC0_CFG_FUNC_MBIST_CNTRL & ~0xFFF) + PROT_BITS_OFFS; 7128c2ecf20Sopenharmony_ci word_offset = ((mmTPC0_CFG_FUNC_MBIST_CNTRL & 7138c2ecf20Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 7148c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC0_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); 7158c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); 7168c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); 7178c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); 7188c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); 7198c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); 7208c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); 7218c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); 7228c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); 7238c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); 7248c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); 7258c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); 7268c2ecf20Sopenharmony_ci 7278c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 7288c2ecf20Sopenharmony_ci 7298c2ecf20Sopenharmony_ci pb_addr = (mmTPC0_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 7308c2ecf20Sopenharmony_ci word_offset = ((mmTPC0_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 7318c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC0_QM_GLBL_CFG0 & 0x7F) >> 2); 7328c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_GLBL_CFG1 & 0x7F) >> 2); 7338c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_GLBL_PROT & 0x7F) >> 2); 7348c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_GLBL_ERR_CFG & 0x7F) >> 2); 7358c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 7368c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 7378c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_GLBL_ERR_WDATA & 0x7F) >> 2); 7388c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_GLBL_SECURE_PROPS & 0x7F) >> 2); 7398c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 7408c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_GLBL_STS0 & 0x7F) >> 2); 7418c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_GLBL_STS1 & 0x7F) >> 2); 7428c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_BASE_LO & 0x7F) >> 2); 7438c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_BASE_HI & 0x7F) >> 2); 7448c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_SIZE & 0x7F) >> 2); 7458c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_PI & 0x7F) >> 2); 7468c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_CI & 0x7F) >> 2); 7478c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_CFG0 & 0x7F) >> 2); 7488c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_CFG1 & 0x7F) >> 2); 7498c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_ARUSER & 0x7F) >> 2); 7508c2ecf20Sopenharmony_ci 7518c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 7528c2ecf20Sopenharmony_ci 7538c2ecf20Sopenharmony_ci pb_addr = (mmTPC0_QM_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 7548c2ecf20Sopenharmony_ci word_offset = ((mmTPC0_QM_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 7558c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC0_QM_PQ_PUSH0 & 0x7F) >> 2); 7568c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_PUSH1 & 0x7F) >> 2); 7578c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_PUSH2 & 0x7F) >> 2); 7588c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_PUSH3 & 0x7F) >> 2); 7598c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_STS0 & 0x7F) >> 2); 7608c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_STS1 & 0x7F) >> 2); 7618c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 7628c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 7638c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 7648c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 7658c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_CFG0 & 0x7F) >> 2); 7668c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_CFG1 & 0x7F) >> 2); 7678c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_ARUSER & 0x7F) >> 2); 7688c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_PTR_LO & 0x7F) >> 2); 7698c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_PTR_HI & 0x7F) >> 2); 7708c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_TSIZE & 0x7F) >> 2); 7718c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_CTL & 0x7F) >> 2); 7728c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_PTR_LO_STS & 0x7F) >> 2); 7738c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_PTR_HI_STS & 0x7F) >> 2); 7748c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_TSIZE_STS & 0x7F) >> 2); 7758c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_CTL_STS & 0x7F) >> 2); 7768c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_STS0 & 0x7F) >> 2); 7778c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_STS1 & 0x7F) >> 2); 7788c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 7798c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 7808c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 7818c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 7828c2ecf20Sopenharmony_ci 7838c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 7848c2ecf20Sopenharmony_ci 7858c2ecf20Sopenharmony_ci pb_addr = (mmTPC0_QM_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 7868c2ecf20Sopenharmony_ci word_offset = ((mmTPC0_QM_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 7878c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC0_QM_CQ_IFIFO_CNT & 0x7F) >> 2); 7888c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 7898c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 7908c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 7918c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 7928c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 7938c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 7948c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 7958c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 7968c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 7978c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 7988c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 7998c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 8008c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 8018c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 8028c2ecf20Sopenharmony_ci 8038c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 8048c2ecf20Sopenharmony_ci 8058c2ecf20Sopenharmony_ci pb_addr = (mmTPC0_CMDQ_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 8068c2ecf20Sopenharmony_ci word_offset = ((mmTPC0_CMDQ_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 8078c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC0_CMDQ_GLBL_CFG0 & 0x7F) >> 2); 8088c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_GLBL_CFG1 & 0x7F) >> 2); 8098c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_GLBL_PROT & 0x7F) >> 2); 8108c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_GLBL_ERR_CFG & 0x7F) >> 2); 8118c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 8128c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 8138c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_GLBL_ERR_WDATA & 0x7F) >> 2); 8148c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_GLBL_SECURE_PROPS & 0x7F) >> 2); 8158c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 8168c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_GLBL_STS0 & 0x7F) >> 2); 8178c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_GLBL_STS1 & 0x7F) >> 2); 8188c2ecf20Sopenharmony_ci 8198c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 8208c2ecf20Sopenharmony_ci 8218c2ecf20Sopenharmony_ci pb_addr = (mmTPC0_CMDQ_CQ_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 8228c2ecf20Sopenharmony_ci word_offset = ((mmTPC0_CMDQ_CQ_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 8238c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC0_CMDQ_CQ_CFG0 & 0x7F) >> 2); 8248c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_CFG1 & 0x7F) >> 2); 8258c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_ARUSER & 0x7F) >> 2); 8268c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_PTR_LO_STS & 0x7F) >> 2); 8278c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_PTR_HI_STS & 0x7F) >> 2); 8288c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_TSIZE_STS & 0x7F) >> 2); 8298c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_CTL_STS & 0x7F) >> 2); 8308c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_STS0 & 0x7F) >> 2); 8318c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_STS1 & 0x7F) >> 2); 8328c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 8338c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 8348c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 8358c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 8368c2ecf20Sopenharmony_ci 8378c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 8388c2ecf20Sopenharmony_ci 8398c2ecf20Sopenharmony_ci pb_addr = (mmTPC0_CMDQ_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 8408c2ecf20Sopenharmony_ci word_offset = ((mmTPC0_CMDQ_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 8418c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC0_CMDQ_CQ_IFIFO_CNT & 0x7F) >> 2); 8428c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 8438c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 8448c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 8458c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 8468c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 8478c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 8488c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 8498c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 8508c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 8518c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 8528c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 8538c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 8548c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 8558c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 8568c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_STS & 0x7F) >> 2); 8578c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_CURRENT_INST_LO & 0x7F) >> 2); 8588c2ecf20Sopenharmony_ci 8598c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 8608c2ecf20Sopenharmony_ci 8618c2ecf20Sopenharmony_ci pb_addr = (mmTPC0_CMDQ_CP_CURRENT_INST_HI & ~0xFFF) + PROT_BITS_OFFS; 8628c2ecf20Sopenharmony_ci word_offset = ((mmTPC0_CMDQ_CP_CURRENT_INST_HI & PROT_BITS_OFFS) >> 7) 8638c2ecf20Sopenharmony_ci << 2; 8648c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC0_CMDQ_CP_CURRENT_INST_HI & 0x7F) >> 2); 8658c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_BARRIER_CFG & 0x7F) >> 2); 8668c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_DBG_0 & 0x7F) >> 2); 8678c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_BUF_ADDR & 0x7F) >> 2); 8688c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_BUF_RDATA & 0x7F) >> 2); 8698c2ecf20Sopenharmony_ci 8708c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 8718c2ecf20Sopenharmony_ci 8728c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC1_RTR_BASE); 8738c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC1_RD_REGULATOR_BASE); 8748c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC1_WR_REGULATOR_BASE); 8758c2ecf20Sopenharmony_ci 8768c2ecf20Sopenharmony_ci pb_addr = (mmTPC1_CFG_SEMAPHORE & ~0xFFF) + PROT_BITS_OFFS; 8778c2ecf20Sopenharmony_ci word_offset = ((mmTPC1_CFG_SEMAPHORE & PROT_BITS_OFFS) >> 7) << 2; 8788c2ecf20Sopenharmony_ci 8798c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC1_CFG_SEMAPHORE & 0x7F) >> 2); 8808c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_VFLAGS & 0x7F) >> 2); 8818c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_SFLAGS & 0x7F) >> 2); 8828c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_STATUS & 0x7F) >> 2); 8838c2ecf20Sopenharmony_ci 8848c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 8858c2ecf20Sopenharmony_ci 8868c2ecf20Sopenharmony_ci pb_addr = (mmTPC1_CFG_CFG_BASE_ADDRESS_HIGH & ~0xFFF) + PROT_BITS_OFFS; 8878c2ecf20Sopenharmony_ci word_offset = ((mmTPC1_CFG_CFG_BASE_ADDRESS_HIGH & 8888c2ecf20Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 8898c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC1_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); 8908c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); 8918c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); 8928c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); 8938c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_TPC_STALL & 0x7F) >> 2); 8948c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_MSS_CONFIG & 0x7F) >> 2); 8958c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); 8968c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_TPC_INTR_MASK & 0x7F) >> 2); 8978c2ecf20Sopenharmony_ci 8988c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 8998c2ecf20Sopenharmony_ci 9008c2ecf20Sopenharmony_ci pb_addr = (mmTPC1_CFG_ARUSER & ~0xFFF) + PROT_BITS_OFFS; 9018c2ecf20Sopenharmony_ci word_offset = ((mmTPC1_CFG_ARUSER & PROT_BITS_OFFS) >> 7) << 2; 9028c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC1_CFG_ARUSER & 0x7F) >> 2); 9038c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_AWUSER & 0x7F) >> 2); 9048c2ecf20Sopenharmony_ci 9058c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 9068c2ecf20Sopenharmony_ci 9078c2ecf20Sopenharmony_ci pb_addr = (mmTPC1_CFG_FUNC_MBIST_CNTRL & ~0xFFF) + PROT_BITS_OFFS; 9088c2ecf20Sopenharmony_ci word_offset = ((mmTPC1_CFG_FUNC_MBIST_CNTRL & PROT_BITS_OFFS) >> 7) 9098c2ecf20Sopenharmony_ci << 2; 9108c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC1_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); 9118c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); 9128c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); 9138c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); 9148c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); 9158c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); 9168c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); 9178c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); 9188c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); 9198c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); 9208c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); 9218c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); 9228c2ecf20Sopenharmony_ci 9238c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 9248c2ecf20Sopenharmony_ci 9258c2ecf20Sopenharmony_ci pb_addr = (mmTPC1_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 9268c2ecf20Sopenharmony_ci word_offset = ((mmTPC1_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 9278c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC1_QM_GLBL_CFG0 & 0x7F) >> 2); 9288c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_GLBL_CFG1 & 0x7F) >> 2); 9298c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_GLBL_PROT & 0x7F) >> 2); 9308c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_GLBL_ERR_CFG & 0x7F) >> 2); 9318c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 9328c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 9338c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_GLBL_ERR_WDATA & 0x7F) >> 2); 9348c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_GLBL_SECURE_PROPS & 0x7F) >> 2); 9358c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 9368c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_GLBL_STS0 & 0x7F) >> 2); 9378c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_GLBL_STS1 & 0x7F) >> 2); 9388c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_BASE_LO & 0x7F) >> 2); 9398c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_BASE_HI & 0x7F) >> 2); 9408c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_SIZE & 0x7F) >> 2); 9418c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_PI & 0x7F) >> 2); 9428c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_CI & 0x7F) >> 2); 9438c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_CFG0 & 0x7F) >> 2); 9448c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_CFG1 & 0x7F) >> 2); 9458c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_ARUSER & 0x7F) >> 2); 9468c2ecf20Sopenharmony_ci 9478c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 9488c2ecf20Sopenharmony_ci 9498c2ecf20Sopenharmony_ci pb_addr = (mmTPC1_QM_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 9508c2ecf20Sopenharmony_ci word_offset = ((mmTPC1_QM_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 9518c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC1_QM_PQ_PUSH0 & 0x7F) >> 2); 9528c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_PUSH1 & 0x7F) >> 2); 9538c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_PUSH2 & 0x7F) >> 2); 9548c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_PUSH3 & 0x7F) >> 2); 9558c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_STS0 & 0x7F) >> 2); 9568c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_STS1 & 0x7F) >> 2); 9578c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 9588c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 9598c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 9608c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 9618c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_CFG0 & 0x7F) >> 2); 9628c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_CFG1 & 0x7F) >> 2); 9638c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_ARUSER & 0x7F) >> 2); 9648c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_PTR_LO & 0x7F) >> 2); 9658c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_PTR_HI & 0x7F) >> 2); 9668c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_TSIZE & 0x7F) >> 2); 9678c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_CTL & 0x7F) >> 2); 9688c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_PTR_LO_STS & 0x7F) >> 2); 9698c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_PTR_HI_STS & 0x7F) >> 2); 9708c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_TSIZE_STS & 0x7F) >> 2); 9718c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_CTL_STS & 0x7F) >> 2); 9728c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_STS0 & 0x7F) >> 2); 9738c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_STS1 & 0x7F) >> 2); 9748c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 9758c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 9768c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 9778c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 9788c2ecf20Sopenharmony_ci 9798c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 9808c2ecf20Sopenharmony_ci 9818c2ecf20Sopenharmony_ci pb_addr = (mmTPC1_QM_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 9828c2ecf20Sopenharmony_ci word_offset = ((mmTPC1_QM_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 9838c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC1_QM_CQ_IFIFO_CNT & 0x7F) >> 2); 9848c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 9858c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 9868c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 9878c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 9888c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 9898c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 9908c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 9918c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 9928c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 9938c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 9948c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 9958c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 9968c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 9978c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 9988c2ecf20Sopenharmony_ci 9998c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 10008c2ecf20Sopenharmony_ci 10018c2ecf20Sopenharmony_ci pb_addr = (mmTPC1_CMDQ_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 10028c2ecf20Sopenharmony_ci word_offset = ((mmTPC1_CMDQ_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 10038c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC1_CMDQ_GLBL_CFG0 & 0x7F) >> 2); 10048c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_GLBL_CFG1 & 0x7F) >> 2); 10058c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_GLBL_PROT & 0x7F) >> 2); 10068c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_GLBL_ERR_CFG & 0x7F) >> 2); 10078c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 10088c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 10098c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_GLBL_ERR_WDATA & 0x7F) >> 2); 10108c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_GLBL_SECURE_PROPS & 0x7F) >> 2); 10118c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 10128c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_GLBL_STS0 & 0x7F) >> 2); 10138c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_GLBL_STS1 & 0x7F) >> 2); 10148c2ecf20Sopenharmony_ci 10158c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 10168c2ecf20Sopenharmony_ci 10178c2ecf20Sopenharmony_ci pb_addr = (mmTPC1_CMDQ_CQ_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 10188c2ecf20Sopenharmony_ci word_offset = ((mmTPC1_CMDQ_CQ_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 10198c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC1_CMDQ_CQ_CFG0 & 0x7F) >> 2); 10208c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_CFG1 & 0x7F) >> 2); 10218c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_ARUSER & 0x7F) >> 2); 10228c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_PTR_LO_STS & 0x7F) >> 2); 10238c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_PTR_HI_STS & 0x7F) >> 2); 10248c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_TSIZE_STS & 0x7F) >> 2); 10258c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_CTL_STS & 0x7F) >> 2); 10268c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_STS0 & 0x7F) >> 2); 10278c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_STS1 & 0x7F) >> 2); 10288c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 10298c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 10308c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 10318c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 10328c2ecf20Sopenharmony_ci 10338c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 10348c2ecf20Sopenharmony_ci 10358c2ecf20Sopenharmony_ci pb_addr = (mmTPC1_CMDQ_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 10368c2ecf20Sopenharmony_ci word_offset = ((mmTPC1_CMDQ_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 10378c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC1_CMDQ_CQ_IFIFO_CNT & 0x7F) >> 2); 10388c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 10398c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 10408c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 10418c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 10428c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 10438c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 10448c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 10458c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 10468c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 10478c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 10488c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 10498c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 10508c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 10518c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 10528c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_STS & 0x7F) >> 2); 10538c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_CURRENT_INST_LO & 0x7F) >> 2); 10548c2ecf20Sopenharmony_ci 10558c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 10568c2ecf20Sopenharmony_ci 10578c2ecf20Sopenharmony_ci pb_addr = (mmTPC1_CMDQ_CP_CURRENT_INST_HI & ~0xFFF) + PROT_BITS_OFFS; 10588c2ecf20Sopenharmony_ci word_offset = ((mmTPC1_CMDQ_CP_CURRENT_INST_HI & PROT_BITS_OFFS) >> 7) 10598c2ecf20Sopenharmony_ci << 2; 10608c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC1_CMDQ_CP_CURRENT_INST_HI & 0x7F) >> 2); 10618c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_BARRIER_CFG & 0x7F) >> 2); 10628c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_DBG_0 & 0x7F) >> 2); 10638c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_BUF_ADDR & 0x7F) >> 2); 10648c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_BUF_RDATA & 0x7F) >> 2); 10658c2ecf20Sopenharmony_ci 10668c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 10678c2ecf20Sopenharmony_ci 10688c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC2_RTR_BASE); 10698c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC2_RD_REGULATOR_BASE); 10708c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC2_WR_REGULATOR_BASE); 10718c2ecf20Sopenharmony_ci 10728c2ecf20Sopenharmony_ci pb_addr = (mmTPC2_CFG_SEMAPHORE & ~0xFFF) + PROT_BITS_OFFS; 10738c2ecf20Sopenharmony_ci word_offset = ((mmTPC2_CFG_SEMAPHORE & PROT_BITS_OFFS) >> 7) << 2; 10748c2ecf20Sopenharmony_ci 10758c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC2_CFG_SEMAPHORE & 0x7F) >> 2); 10768c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_VFLAGS & 0x7F) >> 2); 10778c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_SFLAGS & 0x7F) >> 2); 10788c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_STATUS & 0x7F) >> 2); 10798c2ecf20Sopenharmony_ci 10808c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 10818c2ecf20Sopenharmony_ci 10828c2ecf20Sopenharmony_ci pb_addr = (mmTPC2_CFG_CFG_BASE_ADDRESS_HIGH & ~0xFFF) + PROT_BITS_OFFS; 10838c2ecf20Sopenharmony_ci word_offset = ((mmTPC2_CFG_CFG_BASE_ADDRESS_HIGH & 10848c2ecf20Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 10858c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC2_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); 10868c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); 10878c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); 10888c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); 10898c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_TPC_STALL & 0x7F) >> 2); 10908c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_MSS_CONFIG & 0x7F) >> 2); 10918c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); 10928c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_TPC_INTR_MASK & 0x7F) >> 2); 10938c2ecf20Sopenharmony_ci 10948c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 10958c2ecf20Sopenharmony_ci 10968c2ecf20Sopenharmony_ci pb_addr = (mmTPC2_CFG_ARUSER & ~0xFFF) + PROT_BITS_OFFS; 10978c2ecf20Sopenharmony_ci word_offset = ((mmTPC2_CFG_ARUSER & PROT_BITS_OFFS) >> 7) << 2; 10988c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC2_CFG_ARUSER & 0x7F) >> 2); 10998c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_AWUSER & 0x7F) >> 2); 11008c2ecf20Sopenharmony_ci 11018c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 11028c2ecf20Sopenharmony_ci 11038c2ecf20Sopenharmony_ci pb_addr = (mmTPC2_CFG_FUNC_MBIST_CNTRL & ~0xFFF) + PROT_BITS_OFFS; 11048c2ecf20Sopenharmony_ci word_offset = ((mmTPC2_CFG_FUNC_MBIST_CNTRL & PROT_BITS_OFFS) >> 7) 11058c2ecf20Sopenharmony_ci << 2; 11068c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC2_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); 11078c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); 11088c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); 11098c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); 11108c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); 11118c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); 11128c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); 11138c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); 11148c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); 11158c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); 11168c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); 11178c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); 11188c2ecf20Sopenharmony_ci 11198c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 11208c2ecf20Sopenharmony_ci 11218c2ecf20Sopenharmony_ci pb_addr = (mmTPC2_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 11228c2ecf20Sopenharmony_ci word_offset = ((mmTPC2_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 11238c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC2_QM_GLBL_CFG0 & 0x7F) >> 2); 11248c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_GLBL_CFG1 & 0x7F) >> 2); 11258c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_GLBL_PROT & 0x7F) >> 2); 11268c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_GLBL_ERR_CFG & 0x7F) >> 2); 11278c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 11288c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 11298c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_GLBL_ERR_WDATA & 0x7F) >> 2); 11308c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_GLBL_SECURE_PROPS & 0x7F) >> 2); 11318c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 11328c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_GLBL_STS0 & 0x7F) >> 2); 11338c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_GLBL_STS1 & 0x7F) >> 2); 11348c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_BASE_LO & 0x7F) >> 2); 11358c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_BASE_HI & 0x7F) >> 2); 11368c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_SIZE & 0x7F) >> 2); 11378c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_PI & 0x7F) >> 2); 11388c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_CI & 0x7F) >> 2); 11398c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_CFG0 & 0x7F) >> 2); 11408c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_CFG1 & 0x7F) >> 2); 11418c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_ARUSER & 0x7F) >> 2); 11428c2ecf20Sopenharmony_ci 11438c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 11448c2ecf20Sopenharmony_ci 11458c2ecf20Sopenharmony_ci pb_addr = (mmTPC2_QM_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 11468c2ecf20Sopenharmony_ci word_offset = ((mmTPC2_QM_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 11478c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC2_QM_PQ_PUSH0 & 0x7F) >> 2); 11488c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_PUSH1 & 0x7F) >> 2); 11498c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_PUSH2 & 0x7F) >> 2); 11508c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_PUSH3 & 0x7F) >> 2); 11518c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_STS0 & 0x7F) >> 2); 11528c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_STS1 & 0x7F) >> 2); 11538c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 11548c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 11558c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 11568c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 11578c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_CFG0 & 0x7F) >> 2); 11588c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_CFG1 & 0x7F) >> 2); 11598c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_ARUSER & 0x7F) >> 2); 11608c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_PTR_LO & 0x7F) >> 2); 11618c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_PTR_HI & 0x7F) >> 2); 11628c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_TSIZE & 0x7F) >> 2); 11638c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_CTL & 0x7F) >> 2); 11648c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_PTR_LO_STS & 0x7F) >> 2); 11658c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_PTR_HI_STS & 0x7F) >> 2); 11668c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_TSIZE_STS & 0x7F) >> 2); 11678c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_CTL_STS & 0x7F) >> 2); 11688c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_STS0 & 0x7F) >> 2); 11698c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_STS1 & 0x7F) >> 2); 11708c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 11718c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 11728c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 11738c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 11748c2ecf20Sopenharmony_ci 11758c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 11768c2ecf20Sopenharmony_ci 11778c2ecf20Sopenharmony_ci pb_addr = (mmTPC2_QM_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 11788c2ecf20Sopenharmony_ci word_offset = ((mmTPC2_QM_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 11798c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC2_QM_CQ_IFIFO_CNT & 0x7F) >> 2); 11808c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 11818c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 11828c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 11838c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 11848c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 11858c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 11868c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 11878c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 11888c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 11898c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 11908c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 11918c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 11928c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 11938c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 11948c2ecf20Sopenharmony_ci 11958c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 11968c2ecf20Sopenharmony_ci 11978c2ecf20Sopenharmony_ci pb_addr = (mmTPC2_CMDQ_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 11988c2ecf20Sopenharmony_ci word_offset = ((mmTPC2_CMDQ_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 11998c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC2_CMDQ_GLBL_CFG0 & 0x7F) >> 2); 12008c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_GLBL_CFG1 & 0x7F) >> 2); 12018c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_GLBL_PROT & 0x7F) >> 2); 12028c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_GLBL_ERR_CFG & 0x7F) >> 2); 12038c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 12048c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 12058c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_GLBL_ERR_WDATA & 0x7F) >> 2); 12068c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_GLBL_SECURE_PROPS & 0x7F) >> 2); 12078c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 12088c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_GLBL_STS0 & 0x7F) >> 2); 12098c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_GLBL_STS1 & 0x7F) >> 2); 12108c2ecf20Sopenharmony_ci 12118c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 12128c2ecf20Sopenharmony_ci 12138c2ecf20Sopenharmony_ci pb_addr = (mmTPC2_CMDQ_CQ_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 12148c2ecf20Sopenharmony_ci word_offset = ((mmTPC2_CMDQ_CQ_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 12158c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC2_CMDQ_CQ_CFG0 & 0x7F) >> 2); 12168c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_CFG1 & 0x7F) >> 2); 12178c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_ARUSER & 0x7F) >> 2); 12188c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_PTR_LO_STS & 0x7F) >> 2); 12198c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_PTR_HI_STS & 0x7F) >> 2); 12208c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_TSIZE_STS & 0x7F) >> 2); 12218c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_CTL_STS & 0x7F) >> 2); 12228c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_STS0 & 0x7F) >> 2); 12238c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_STS1 & 0x7F) >> 2); 12248c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 12258c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 12268c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 12278c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 12288c2ecf20Sopenharmony_ci 12298c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 12308c2ecf20Sopenharmony_ci 12318c2ecf20Sopenharmony_ci pb_addr = (mmTPC2_CMDQ_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 12328c2ecf20Sopenharmony_ci word_offset = ((mmTPC2_CMDQ_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 12338c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC2_CMDQ_CQ_IFIFO_CNT & 0x7F) >> 2); 12348c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 12358c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 12368c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 12378c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 12388c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 12398c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 12408c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 12418c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 12428c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 12438c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 12448c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 12458c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 12468c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 12478c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 12488c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_STS & 0x7F) >> 2); 12498c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_CURRENT_INST_LO & 0x7F) >> 2); 12508c2ecf20Sopenharmony_ci 12518c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 12528c2ecf20Sopenharmony_ci 12538c2ecf20Sopenharmony_ci pb_addr = (mmTPC2_CMDQ_CP_CURRENT_INST_HI & ~0xFFF) + PROT_BITS_OFFS; 12548c2ecf20Sopenharmony_ci word_offset = ((mmTPC2_CMDQ_CP_CURRENT_INST_HI & PROT_BITS_OFFS) >> 7) 12558c2ecf20Sopenharmony_ci << 2; 12568c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC2_CMDQ_CP_CURRENT_INST_HI & 0x7F) >> 2); 12578c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_BARRIER_CFG & 0x7F) >> 2); 12588c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_DBG_0 & 0x7F) >> 2); 12598c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_BUF_ADDR & 0x7F) >> 2); 12608c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_BUF_RDATA & 0x7F) >> 2); 12618c2ecf20Sopenharmony_ci 12628c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 12638c2ecf20Sopenharmony_ci 12648c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC3_RTR_BASE); 12658c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC3_RD_REGULATOR_BASE); 12668c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC3_WR_REGULATOR_BASE); 12678c2ecf20Sopenharmony_ci 12688c2ecf20Sopenharmony_ci pb_addr = (mmTPC3_CFG_SEMAPHORE & ~0xFFF) + PROT_BITS_OFFS; 12698c2ecf20Sopenharmony_ci word_offset = ((mmTPC3_CFG_SEMAPHORE & PROT_BITS_OFFS) >> 7) << 2; 12708c2ecf20Sopenharmony_ci 12718c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC3_CFG_SEMAPHORE & 0x7F) >> 2); 12728c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_VFLAGS & 0x7F) >> 2); 12738c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_SFLAGS & 0x7F) >> 2); 12748c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_STATUS & 0x7F) >> 2); 12758c2ecf20Sopenharmony_ci 12768c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 12778c2ecf20Sopenharmony_ci 12788c2ecf20Sopenharmony_ci pb_addr = (mmTPC3_CFG_CFG_BASE_ADDRESS_HIGH & ~0xFFF) + PROT_BITS_OFFS; 12798c2ecf20Sopenharmony_ci word_offset = ((mmTPC3_CFG_CFG_BASE_ADDRESS_HIGH 12808c2ecf20Sopenharmony_ci & PROT_BITS_OFFS) >> 7) << 2; 12818c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC3_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); 12828c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); 12838c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); 12848c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); 12858c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_TPC_STALL & 0x7F) >> 2); 12868c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_MSS_CONFIG & 0x7F) >> 2); 12878c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); 12888c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_TPC_INTR_MASK & 0x7F) >> 2); 12898c2ecf20Sopenharmony_ci 12908c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 12918c2ecf20Sopenharmony_ci 12928c2ecf20Sopenharmony_ci pb_addr = (mmTPC3_CFG_ARUSER & ~0xFFF) + PROT_BITS_OFFS; 12938c2ecf20Sopenharmony_ci word_offset = ((mmTPC3_CFG_ARUSER & PROT_BITS_OFFS) >> 7) << 2; 12948c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC3_CFG_ARUSER & 0x7F) >> 2); 12958c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_AWUSER & 0x7F) >> 2); 12968c2ecf20Sopenharmony_ci 12978c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 12988c2ecf20Sopenharmony_ci 12998c2ecf20Sopenharmony_ci pb_addr = (mmTPC3_CFG_FUNC_MBIST_CNTRL & ~0xFFF) + PROT_BITS_OFFS; 13008c2ecf20Sopenharmony_ci word_offset = ((mmTPC3_CFG_FUNC_MBIST_CNTRL 13018c2ecf20Sopenharmony_ci & PROT_BITS_OFFS) >> 7) << 2; 13028c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC3_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); 13038c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); 13048c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); 13058c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); 13068c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); 13078c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); 13088c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); 13098c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); 13108c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); 13118c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); 13128c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); 13138c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); 13148c2ecf20Sopenharmony_ci 13158c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 13168c2ecf20Sopenharmony_ci 13178c2ecf20Sopenharmony_ci pb_addr = (mmTPC3_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 13188c2ecf20Sopenharmony_ci word_offset = ((mmTPC3_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 13198c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC3_QM_GLBL_CFG0 & 0x7F) >> 2); 13208c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_GLBL_CFG1 & 0x7F) >> 2); 13218c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_GLBL_PROT & 0x7F) >> 2); 13228c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_GLBL_ERR_CFG & 0x7F) >> 2); 13238c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 13248c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 13258c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_GLBL_ERR_WDATA & 0x7F) >> 2); 13268c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_GLBL_SECURE_PROPS & 0x7F) >> 2); 13278c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 13288c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_GLBL_STS0 & 0x7F) >> 2); 13298c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_GLBL_STS1 & 0x7F) >> 2); 13308c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_BASE_LO & 0x7F) >> 2); 13318c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_BASE_HI & 0x7F) >> 2); 13328c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_SIZE & 0x7F) >> 2); 13338c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_PI & 0x7F) >> 2); 13348c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_CI & 0x7F) >> 2); 13358c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_CFG0 & 0x7F) >> 2); 13368c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_CFG1 & 0x7F) >> 2); 13378c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_ARUSER & 0x7F) >> 2); 13388c2ecf20Sopenharmony_ci 13398c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 13408c2ecf20Sopenharmony_ci 13418c2ecf20Sopenharmony_ci pb_addr = (mmTPC3_QM_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 13428c2ecf20Sopenharmony_ci word_offset = ((mmTPC3_QM_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 13438c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC3_QM_PQ_PUSH0 & 0x7F) >> 2); 13448c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_PUSH1 & 0x7F) >> 2); 13458c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_PUSH2 & 0x7F) >> 2); 13468c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_PUSH3 & 0x7F) >> 2); 13478c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_STS0 & 0x7F) >> 2); 13488c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_STS1 & 0x7F) >> 2); 13498c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 13508c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 13518c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 13528c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 13538c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_CFG0 & 0x7F) >> 2); 13548c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_CFG1 & 0x7F) >> 2); 13558c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_ARUSER & 0x7F) >> 2); 13568c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_PTR_LO & 0x7F) >> 2); 13578c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_PTR_HI & 0x7F) >> 2); 13588c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_TSIZE & 0x7F) >> 2); 13598c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_CTL & 0x7F) >> 2); 13608c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_PTR_LO_STS & 0x7F) >> 2); 13618c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_PTR_HI_STS & 0x7F) >> 2); 13628c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_TSIZE_STS & 0x7F) >> 2); 13638c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_CTL_STS & 0x7F) >> 2); 13648c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_STS0 & 0x7F) >> 2); 13658c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_STS1 & 0x7F) >> 2); 13668c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 13678c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 13688c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 13698c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 13708c2ecf20Sopenharmony_ci 13718c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 13728c2ecf20Sopenharmony_ci 13738c2ecf20Sopenharmony_ci pb_addr = (mmTPC3_QM_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 13748c2ecf20Sopenharmony_ci word_offset = ((mmTPC3_QM_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 13758c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC3_QM_CQ_IFIFO_CNT & 0x7F) >> 2); 13768c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 13778c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 13788c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 13798c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 13808c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 13818c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 13828c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 13838c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 13848c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 13858c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 13868c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 13878c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 13888c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 13898c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 13908c2ecf20Sopenharmony_ci 13918c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 13928c2ecf20Sopenharmony_ci 13938c2ecf20Sopenharmony_ci pb_addr = (mmTPC3_CMDQ_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 13948c2ecf20Sopenharmony_ci word_offset = ((mmTPC3_CMDQ_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 13958c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC3_CMDQ_GLBL_CFG0 & 0x7F) >> 2); 13968c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_GLBL_CFG1 & 0x7F) >> 2); 13978c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_GLBL_PROT & 0x7F) >> 2); 13988c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_GLBL_ERR_CFG & 0x7F) >> 2); 13998c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 14008c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 14018c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_GLBL_ERR_WDATA & 0x7F) >> 2); 14028c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_GLBL_SECURE_PROPS & 0x7F) >> 2); 14038c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 14048c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_GLBL_STS0 & 0x7F) >> 2); 14058c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_GLBL_STS1 & 0x7F) >> 2); 14068c2ecf20Sopenharmony_ci 14078c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 14088c2ecf20Sopenharmony_ci 14098c2ecf20Sopenharmony_ci pb_addr = (mmTPC3_CMDQ_CQ_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 14108c2ecf20Sopenharmony_ci word_offset = ((mmTPC3_CMDQ_CQ_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 14118c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC3_CMDQ_CQ_CFG0 & 0x7F) >> 2); 14128c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_CFG1 & 0x7F) >> 2); 14138c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_ARUSER & 0x7F) >> 2); 14148c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_PTR_LO_STS & 0x7F) >> 2); 14158c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_PTR_HI_STS & 0x7F) >> 2); 14168c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_TSIZE_STS & 0x7F) >> 2); 14178c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_CTL_STS & 0x7F) >> 2); 14188c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_STS0 & 0x7F) >> 2); 14198c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_STS1 & 0x7F) >> 2); 14208c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 14218c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 14228c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 14238c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 14248c2ecf20Sopenharmony_ci 14258c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 14268c2ecf20Sopenharmony_ci 14278c2ecf20Sopenharmony_ci pb_addr = (mmTPC3_CMDQ_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 14288c2ecf20Sopenharmony_ci word_offset = ((mmTPC3_CMDQ_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 14298c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC3_CMDQ_CQ_IFIFO_CNT & 0x7F) >> 2); 14308c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 14318c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 14328c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 14338c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 14348c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 14358c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 14368c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 14378c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 14388c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 14398c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 14408c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 14418c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 14428c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 14438c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 14448c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_STS & 0x7F) >> 2); 14458c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_CURRENT_INST_LO & 0x7F) >> 2); 14468c2ecf20Sopenharmony_ci 14478c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 14488c2ecf20Sopenharmony_ci 14498c2ecf20Sopenharmony_ci pb_addr = (mmTPC3_CMDQ_CP_CURRENT_INST_HI & ~0xFFF) + PROT_BITS_OFFS; 14508c2ecf20Sopenharmony_ci word_offset = ((mmTPC3_CMDQ_CP_CURRENT_INST_HI & PROT_BITS_OFFS) >> 7) 14518c2ecf20Sopenharmony_ci << 2; 14528c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC3_CMDQ_CP_CURRENT_INST_HI & 0x7F) >> 2); 14538c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_BARRIER_CFG & 0x7F) >> 2); 14548c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_DBG_0 & 0x7F) >> 2); 14558c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_BUF_ADDR & 0x7F) >> 2); 14568c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_BUF_RDATA & 0x7F) >> 2); 14578c2ecf20Sopenharmony_ci 14588c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 14598c2ecf20Sopenharmony_ci 14608c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC4_RTR_BASE); 14618c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC4_RD_REGULATOR_BASE); 14628c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC4_WR_REGULATOR_BASE); 14638c2ecf20Sopenharmony_ci 14648c2ecf20Sopenharmony_ci pb_addr = (mmTPC4_CFG_SEMAPHORE & ~0xFFF) + PROT_BITS_OFFS; 14658c2ecf20Sopenharmony_ci word_offset = ((mmTPC4_CFG_SEMAPHORE & PROT_BITS_OFFS) >> 7) << 2; 14668c2ecf20Sopenharmony_ci 14678c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC4_CFG_SEMAPHORE & 0x7F) >> 2); 14688c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_VFLAGS & 0x7F) >> 2); 14698c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_SFLAGS & 0x7F) >> 2); 14708c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_STATUS & 0x7F) >> 2); 14718c2ecf20Sopenharmony_ci 14728c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 14738c2ecf20Sopenharmony_ci 14748c2ecf20Sopenharmony_ci pb_addr = (mmTPC4_CFG_CFG_BASE_ADDRESS_HIGH & ~0xFFF) + PROT_BITS_OFFS; 14758c2ecf20Sopenharmony_ci word_offset = ((mmTPC4_CFG_CFG_BASE_ADDRESS_HIGH & 14768c2ecf20Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 14778c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC4_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); 14788c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); 14798c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); 14808c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); 14818c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_TPC_STALL & 0x7F) >> 2); 14828c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_MSS_CONFIG & 0x7F) >> 2); 14838c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); 14848c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_TPC_INTR_MASK & 0x7F) >> 2); 14858c2ecf20Sopenharmony_ci 14868c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 14878c2ecf20Sopenharmony_ci 14888c2ecf20Sopenharmony_ci pb_addr = (mmTPC4_CFG_ARUSER & ~0xFFF) + PROT_BITS_OFFS; 14898c2ecf20Sopenharmony_ci word_offset = ((mmTPC4_CFG_ARUSER & PROT_BITS_OFFS) >> 7) << 2; 14908c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC4_CFG_ARUSER & 0x7F) >> 2); 14918c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_AWUSER & 0x7F) >> 2); 14928c2ecf20Sopenharmony_ci 14938c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 14948c2ecf20Sopenharmony_ci 14958c2ecf20Sopenharmony_ci pb_addr = (mmTPC4_CFG_FUNC_MBIST_CNTRL & ~0xFFF) + PROT_BITS_OFFS; 14968c2ecf20Sopenharmony_ci word_offset = ((mmTPC4_CFG_FUNC_MBIST_CNTRL & 14978c2ecf20Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 14988c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC4_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); 14998c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); 15008c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); 15018c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); 15028c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); 15038c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); 15048c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); 15058c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); 15068c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); 15078c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); 15088c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); 15098c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); 15108c2ecf20Sopenharmony_ci 15118c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 15128c2ecf20Sopenharmony_ci 15138c2ecf20Sopenharmony_ci pb_addr = (mmTPC4_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 15148c2ecf20Sopenharmony_ci word_offset = ((mmTPC4_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 15158c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC4_QM_GLBL_CFG0 & 0x7F) >> 2); 15168c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_GLBL_CFG1 & 0x7F) >> 2); 15178c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_GLBL_PROT & 0x7F) >> 2); 15188c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_GLBL_ERR_CFG & 0x7F) >> 2); 15198c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 15208c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 15218c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_GLBL_ERR_WDATA & 0x7F) >> 2); 15228c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_GLBL_SECURE_PROPS & 0x7F) >> 2); 15238c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 15248c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_GLBL_STS0 & 0x7F) >> 2); 15258c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_GLBL_STS1 & 0x7F) >> 2); 15268c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_BASE_LO & 0x7F) >> 2); 15278c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_BASE_HI & 0x7F) >> 2); 15288c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_SIZE & 0x7F) >> 2); 15298c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_PI & 0x7F) >> 2); 15308c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_CI & 0x7F) >> 2); 15318c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_CFG0 & 0x7F) >> 2); 15328c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_CFG1 & 0x7F) >> 2); 15338c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_ARUSER & 0x7F) >> 2); 15348c2ecf20Sopenharmony_ci 15358c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 15368c2ecf20Sopenharmony_ci 15378c2ecf20Sopenharmony_ci pb_addr = (mmTPC4_QM_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 15388c2ecf20Sopenharmony_ci word_offset = ((mmTPC4_QM_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 15398c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC4_QM_PQ_PUSH0 & 0x7F) >> 2); 15408c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_PUSH1 & 0x7F) >> 2); 15418c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_PUSH2 & 0x7F) >> 2); 15428c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_PUSH3 & 0x7F) >> 2); 15438c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_STS0 & 0x7F) >> 2); 15448c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_STS1 & 0x7F) >> 2); 15458c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 15468c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 15478c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 15488c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 15498c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_CFG0 & 0x7F) >> 2); 15508c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_CFG1 & 0x7F) >> 2); 15518c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_ARUSER & 0x7F) >> 2); 15528c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_PTR_LO & 0x7F) >> 2); 15538c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_PTR_HI & 0x7F) >> 2); 15548c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_TSIZE & 0x7F) >> 2); 15558c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_CTL & 0x7F) >> 2); 15568c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_PTR_LO_STS & 0x7F) >> 2); 15578c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_PTR_HI_STS & 0x7F) >> 2); 15588c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_TSIZE_STS & 0x7F) >> 2); 15598c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_CTL_STS & 0x7F) >> 2); 15608c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_STS0 & 0x7F) >> 2); 15618c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_STS1 & 0x7F) >> 2); 15628c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 15638c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 15648c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 15658c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 15668c2ecf20Sopenharmony_ci 15678c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 15688c2ecf20Sopenharmony_ci 15698c2ecf20Sopenharmony_ci pb_addr = (mmTPC4_QM_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 15708c2ecf20Sopenharmony_ci word_offset = ((mmTPC4_QM_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 15718c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC4_QM_CQ_IFIFO_CNT & 0x7F) >> 2); 15728c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 15738c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 15748c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 15758c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 15768c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 15778c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 15788c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 15798c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 15808c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 15818c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 15828c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 15838c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 15848c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 15858c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 15868c2ecf20Sopenharmony_ci 15878c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 15888c2ecf20Sopenharmony_ci 15898c2ecf20Sopenharmony_ci pb_addr = (mmTPC4_CMDQ_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 15908c2ecf20Sopenharmony_ci word_offset = ((mmTPC4_CMDQ_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 15918c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC4_CMDQ_GLBL_CFG0 & 0x7F) >> 2); 15928c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_GLBL_CFG1 & 0x7F) >> 2); 15938c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_GLBL_PROT & 0x7F) >> 2); 15948c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_GLBL_ERR_CFG & 0x7F) >> 2); 15958c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 15968c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 15978c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_GLBL_ERR_WDATA & 0x7F) >> 2); 15988c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_GLBL_SECURE_PROPS & 0x7F) >> 2); 15998c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 16008c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_GLBL_STS0 & 0x7F) >> 2); 16018c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_GLBL_STS1 & 0x7F) >> 2); 16028c2ecf20Sopenharmony_ci 16038c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 16048c2ecf20Sopenharmony_ci 16058c2ecf20Sopenharmony_ci pb_addr = (mmTPC4_CMDQ_CQ_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 16068c2ecf20Sopenharmony_ci word_offset = ((mmTPC4_CMDQ_CQ_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 16078c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC4_CMDQ_CQ_CFG0 & 0x7F) >> 2); 16088c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_CFG1 & 0x7F) >> 2); 16098c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_ARUSER & 0x7F) >> 2); 16108c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_PTR_LO_STS & 0x7F) >> 2); 16118c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_PTR_HI_STS & 0x7F) >> 2); 16128c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_TSIZE_STS & 0x7F) >> 2); 16138c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_CTL_STS & 0x7F) >> 2); 16148c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_STS0 & 0x7F) >> 2); 16158c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_STS1 & 0x7F) >> 2); 16168c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 16178c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 16188c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 16198c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 16208c2ecf20Sopenharmony_ci 16218c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 16228c2ecf20Sopenharmony_ci 16238c2ecf20Sopenharmony_ci pb_addr = (mmTPC4_CMDQ_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 16248c2ecf20Sopenharmony_ci word_offset = ((mmTPC4_CMDQ_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 16258c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC4_CMDQ_CQ_IFIFO_CNT & 0x7F) >> 2); 16268c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 16278c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 16288c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 16298c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 16308c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 16318c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 16328c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 16338c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 16348c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 16358c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 16368c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 16378c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 16388c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 16398c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 16408c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_STS & 0x7F) >> 2); 16418c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_CURRENT_INST_LO & 0x7F) >> 2); 16428c2ecf20Sopenharmony_ci 16438c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 16448c2ecf20Sopenharmony_ci 16458c2ecf20Sopenharmony_ci pb_addr = (mmTPC4_CMDQ_CP_CURRENT_INST_HI & ~0xFFF) + PROT_BITS_OFFS; 16468c2ecf20Sopenharmony_ci word_offset = ((mmTPC4_CMDQ_CP_CURRENT_INST_HI & PROT_BITS_OFFS) >> 7) 16478c2ecf20Sopenharmony_ci << 2; 16488c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC4_CMDQ_CP_CURRENT_INST_HI & 0x7F) >> 2); 16498c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_BARRIER_CFG & 0x7F) >> 2); 16508c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_DBG_0 & 0x7F) >> 2); 16518c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_BUF_ADDR & 0x7F) >> 2); 16528c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_BUF_RDATA & 0x7F) >> 2); 16538c2ecf20Sopenharmony_ci 16548c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 16558c2ecf20Sopenharmony_ci 16568c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC5_RTR_BASE); 16578c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC5_RD_REGULATOR_BASE); 16588c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC5_WR_REGULATOR_BASE); 16598c2ecf20Sopenharmony_ci 16608c2ecf20Sopenharmony_ci pb_addr = (mmTPC5_CFG_SEMAPHORE & ~0xFFF) + PROT_BITS_OFFS; 16618c2ecf20Sopenharmony_ci word_offset = ((mmTPC5_CFG_SEMAPHORE & PROT_BITS_OFFS) >> 7) << 2; 16628c2ecf20Sopenharmony_ci 16638c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC5_CFG_SEMAPHORE & 0x7F) >> 2); 16648c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_VFLAGS & 0x7F) >> 2); 16658c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_SFLAGS & 0x7F) >> 2); 16668c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_STATUS & 0x7F) >> 2); 16678c2ecf20Sopenharmony_ci 16688c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 16698c2ecf20Sopenharmony_ci 16708c2ecf20Sopenharmony_ci pb_addr = (mmTPC5_CFG_CFG_BASE_ADDRESS_HIGH & ~0xFFF) + PROT_BITS_OFFS; 16718c2ecf20Sopenharmony_ci word_offset = ((mmTPC5_CFG_CFG_BASE_ADDRESS_HIGH & 16728c2ecf20Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 16738c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC5_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); 16748c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); 16758c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); 16768c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); 16778c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_TPC_STALL & 0x7F) >> 2); 16788c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_MSS_CONFIG & 0x7F) >> 2); 16798c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); 16808c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_TPC_INTR_MASK & 0x7F) >> 2); 16818c2ecf20Sopenharmony_ci 16828c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 16838c2ecf20Sopenharmony_ci 16848c2ecf20Sopenharmony_ci pb_addr = (mmTPC5_CFG_ARUSER & ~0xFFF) + PROT_BITS_OFFS; 16858c2ecf20Sopenharmony_ci word_offset = ((mmTPC5_CFG_ARUSER & PROT_BITS_OFFS) >> 7) << 2; 16868c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC5_CFG_ARUSER & 0x7F) >> 2); 16878c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_AWUSER & 0x7F) >> 2); 16888c2ecf20Sopenharmony_ci 16898c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 16908c2ecf20Sopenharmony_ci 16918c2ecf20Sopenharmony_ci pb_addr = (mmTPC5_CFG_FUNC_MBIST_CNTRL & ~0xFFF) + PROT_BITS_OFFS; 16928c2ecf20Sopenharmony_ci word_offset = ((mmTPC5_CFG_FUNC_MBIST_CNTRL & 16938c2ecf20Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 16948c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC5_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); 16958c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); 16968c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); 16978c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); 16988c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); 16998c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); 17008c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); 17018c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); 17028c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); 17038c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); 17048c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); 17058c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); 17068c2ecf20Sopenharmony_ci 17078c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 17088c2ecf20Sopenharmony_ci 17098c2ecf20Sopenharmony_ci pb_addr = (mmTPC5_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 17108c2ecf20Sopenharmony_ci word_offset = ((mmTPC5_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 17118c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC5_QM_GLBL_CFG0 & 0x7F) >> 2); 17128c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_GLBL_CFG1 & 0x7F) >> 2); 17138c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_GLBL_PROT & 0x7F) >> 2); 17148c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_GLBL_ERR_CFG & 0x7F) >> 2); 17158c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 17168c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 17178c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_GLBL_ERR_WDATA & 0x7F) >> 2); 17188c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_GLBL_SECURE_PROPS & 0x7F) >> 2); 17198c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 17208c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_GLBL_STS0 & 0x7F) >> 2); 17218c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_GLBL_STS1 & 0x7F) >> 2); 17228c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_BASE_LO & 0x7F) >> 2); 17238c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_BASE_HI & 0x7F) >> 2); 17248c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_SIZE & 0x7F) >> 2); 17258c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_PI & 0x7F) >> 2); 17268c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_CI & 0x7F) >> 2); 17278c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_CFG0 & 0x7F) >> 2); 17288c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_CFG1 & 0x7F) >> 2); 17298c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_ARUSER & 0x7F) >> 2); 17308c2ecf20Sopenharmony_ci 17318c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 17328c2ecf20Sopenharmony_ci 17338c2ecf20Sopenharmony_ci pb_addr = (mmTPC5_QM_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 17348c2ecf20Sopenharmony_ci word_offset = ((mmTPC5_QM_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 17358c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC5_QM_PQ_PUSH0 & 0x7F) >> 2); 17368c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_PUSH1 & 0x7F) >> 2); 17378c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_PUSH2 & 0x7F) >> 2); 17388c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_PUSH3 & 0x7F) >> 2); 17398c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_STS0 & 0x7F) >> 2); 17408c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_STS1 & 0x7F) >> 2); 17418c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 17428c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 17438c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 17448c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 17458c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_CFG0 & 0x7F) >> 2); 17468c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_CFG1 & 0x7F) >> 2); 17478c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_ARUSER & 0x7F) >> 2); 17488c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_PTR_LO & 0x7F) >> 2); 17498c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_PTR_HI & 0x7F) >> 2); 17508c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_TSIZE & 0x7F) >> 2); 17518c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_CTL & 0x7F) >> 2); 17528c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_PTR_LO_STS & 0x7F) >> 2); 17538c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_PTR_HI_STS & 0x7F) >> 2); 17548c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_TSIZE_STS & 0x7F) >> 2); 17558c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_CTL_STS & 0x7F) >> 2); 17568c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_STS0 & 0x7F) >> 2); 17578c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_STS1 & 0x7F) >> 2); 17588c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 17598c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 17608c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 17618c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 17628c2ecf20Sopenharmony_ci 17638c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 17648c2ecf20Sopenharmony_ci 17658c2ecf20Sopenharmony_ci pb_addr = (mmTPC5_QM_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 17668c2ecf20Sopenharmony_ci word_offset = ((mmTPC5_QM_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 17678c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC5_QM_CQ_IFIFO_CNT & 0x7F) >> 2); 17688c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 17698c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 17708c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 17718c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 17728c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 17738c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 17748c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 17758c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 17768c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 17778c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 17788c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 17798c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 17808c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 17818c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 17828c2ecf20Sopenharmony_ci 17838c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 17848c2ecf20Sopenharmony_ci 17858c2ecf20Sopenharmony_ci pb_addr = (mmTPC5_CMDQ_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 17868c2ecf20Sopenharmony_ci word_offset = ((mmTPC5_CMDQ_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 17878c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC5_CMDQ_GLBL_CFG0 & 0x7F) >> 2); 17888c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_GLBL_CFG1 & 0x7F) >> 2); 17898c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_GLBL_PROT & 0x7F) >> 2); 17908c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_GLBL_ERR_CFG & 0x7F) >> 2); 17918c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 17928c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 17938c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_GLBL_ERR_WDATA & 0x7F) >> 2); 17948c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_GLBL_SECURE_PROPS & 0x7F) >> 2); 17958c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 17968c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_GLBL_STS0 & 0x7F) >> 2); 17978c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_GLBL_STS1 & 0x7F) >> 2); 17988c2ecf20Sopenharmony_ci 17998c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 18008c2ecf20Sopenharmony_ci 18018c2ecf20Sopenharmony_ci pb_addr = (mmTPC5_CMDQ_CQ_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 18028c2ecf20Sopenharmony_ci word_offset = ((mmTPC5_CMDQ_CQ_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 18038c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC5_CMDQ_CQ_CFG0 & 0x7F) >> 2); 18048c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_CFG1 & 0x7F) >> 2); 18058c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_ARUSER & 0x7F) >> 2); 18068c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_PTR_LO_STS & 0x7F) >> 2); 18078c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_PTR_HI_STS & 0x7F) >> 2); 18088c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_TSIZE_STS & 0x7F) >> 2); 18098c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_CTL_STS & 0x7F) >> 2); 18108c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_STS0 & 0x7F) >> 2); 18118c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_STS1 & 0x7F) >> 2); 18128c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 18138c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 18148c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 18158c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 18168c2ecf20Sopenharmony_ci 18178c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 18188c2ecf20Sopenharmony_ci 18198c2ecf20Sopenharmony_ci pb_addr = (mmTPC5_CMDQ_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 18208c2ecf20Sopenharmony_ci word_offset = ((mmTPC5_CMDQ_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 18218c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC5_CMDQ_CQ_IFIFO_CNT & 0x7F) >> 2); 18228c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 18238c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 18248c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 18258c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 18268c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 18278c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 18288c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 18298c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 18308c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 18318c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 18328c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 18338c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 18348c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 18358c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 18368c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_STS & 0x7F) >> 2); 18378c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_CURRENT_INST_LO & 0x7F) >> 2); 18388c2ecf20Sopenharmony_ci 18398c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 18408c2ecf20Sopenharmony_ci 18418c2ecf20Sopenharmony_ci pb_addr = (mmTPC5_CMDQ_CP_CURRENT_INST_HI & ~0xFFF) + PROT_BITS_OFFS; 18428c2ecf20Sopenharmony_ci word_offset = ((mmTPC5_CMDQ_CP_CURRENT_INST_HI & PROT_BITS_OFFS) >> 7) 18438c2ecf20Sopenharmony_ci << 2; 18448c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC5_CMDQ_CP_CURRENT_INST_HI & 0x7F) >> 2); 18458c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_BARRIER_CFG & 0x7F) >> 2); 18468c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_DBG_0 & 0x7F) >> 2); 18478c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_BUF_ADDR & 0x7F) >> 2); 18488c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_BUF_RDATA & 0x7F) >> 2); 18498c2ecf20Sopenharmony_ci 18508c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 18518c2ecf20Sopenharmony_ci 18528c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC6_RTR_BASE); 18538c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC6_RD_REGULATOR_BASE); 18548c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC6_WR_REGULATOR_BASE); 18558c2ecf20Sopenharmony_ci 18568c2ecf20Sopenharmony_ci pb_addr = (mmTPC6_CFG_SEMAPHORE & ~0xFFF) + PROT_BITS_OFFS; 18578c2ecf20Sopenharmony_ci word_offset = ((mmTPC6_CFG_SEMAPHORE & PROT_BITS_OFFS) >> 7) << 2; 18588c2ecf20Sopenharmony_ci 18598c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC6_CFG_SEMAPHORE & 0x7F) >> 2); 18608c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_VFLAGS & 0x7F) >> 2); 18618c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_SFLAGS & 0x7F) >> 2); 18628c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_STATUS & 0x7F) >> 2); 18638c2ecf20Sopenharmony_ci 18648c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 18658c2ecf20Sopenharmony_ci 18668c2ecf20Sopenharmony_ci pb_addr = (mmTPC6_CFG_CFG_BASE_ADDRESS_HIGH & ~0xFFF) + PROT_BITS_OFFS; 18678c2ecf20Sopenharmony_ci word_offset = ((mmTPC6_CFG_CFG_BASE_ADDRESS_HIGH & 18688c2ecf20Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 18698c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC6_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); 18708c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); 18718c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); 18728c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); 18738c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_TPC_STALL & 0x7F) >> 2); 18748c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_MSS_CONFIG & 0x7F) >> 2); 18758c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); 18768c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_TPC_INTR_MASK & 0x7F) >> 2); 18778c2ecf20Sopenharmony_ci 18788c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 18798c2ecf20Sopenharmony_ci 18808c2ecf20Sopenharmony_ci pb_addr = (mmTPC6_CFG_ARUSER & ~0xFFF) + PROT_BITS_OFFS; 18818c2ecf20Sopenharmony_ci word_offset = ((mmTPC6_CFG_ARUSER & PROT_BITS_OFFS) >> 7) << 2; 18828c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC6_CFG_ARUSER & 0x7F) >> 2); 18838c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_AWUSER & 0x7F) >> 2); 18848c2ecf20Sopenharmony_ci 18858c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 18868c2ecf20Sopenharmony_ci 18878c2ecf20Sopenharmony_ci pb_addr = (mmTPC6_CFG_FUNC_MBIST_CNTRL & ~0xFFF) + PROT_BITS_OFFS; 18888c2ecf20Sopenharmony_ci word_offset = ((mmTPC6_CFG_FUNC_MBIST_CNTRL & 18898c2ecf20Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 18908c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC6_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); 18918c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); 18928c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); 18938c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); 18948c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); 18958c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); 18968c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); 18978c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); 18988c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); 18998c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); 19008c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); 19018c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); 19028c2ecf20Sopenharmony_ci 19038c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 19048c2ecf20Sopenharmony_ci 19058c2ecf20Sopenharmony_ci pb_addr = (mmTPC6_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 19068c2ecf20Sopenharmony_ci word_offset = ((mmTPC6_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 19078c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC6_QM_GLBL_CFG0 & 0x7F) >> 2); 19088c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_GLBL_CFG1 & 0x7F) >> 2); 19098c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_GLBL_PROT & 0x7F) >> 2); 19108c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_GLBL_ERR_CFG & 0x7F) >> 2); 19118c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 19128c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 19138c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_GLBL_ERR_WDATA & 0x7F) >> 2); 19148c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_GLBL_SECURE_PROPS & 0x7F) >> 2); 19158c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 19168c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_GLBL_STS0 & 0x7F) >> 2); 19178c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_GLBL_STS1 & 0x7F) >> 2); 19188c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_BASE_LO & 0x7F) >> 2); 19198c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_BASE_HI & 0x7F) >> 2); 19208c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_SIZE & 0x7F) >> 2); 19218c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_PI & 0x7F) >> 2); 19228c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_CI & 0x7F) >> 2); 19238c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_CFG0 & 0x7F) >> 2); 19248c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_CFG1 & 0x7F) >> 2); 19258c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_ARUSER & 0x7F) >> 2); 19268c2ecf20Sopenharmony_ci 19278c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 19288c2ecf20Sopenharmony_ci 19298c2ecf20Sopenharmony_ci pb_addr = (mmTPC6_QM_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 19308c2ecf20Sopenharmony_ci word_offset = ((mmTPC6_QM_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 19318c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC6_QM_PQ_PUSH0 & 0x7F) >> 2); 19328c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_PUSH1 & 0x7F) >> 2); 19338c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_PUSH2 & 0x7F) >> 2); 19348c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_PUSH3 & 0x7F) >> 2); 19358c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_STS0 & 0x7F) >> 2); 19368c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_STS1 & 0x7F) >> 2); 19378c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 19388c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 19398c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 19408c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 19418c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_CFG0 & 0x7F) >> 2); 19428c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_CFG1 & 0x7F) >> 2); 19438c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_ARUSER & 0x7F) >> 2); 19448c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_PTR_LO & 0x7F) >> 2); 19458c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_PTR_HI & 0x7F) >> 2); 19468c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_TSIZE & 0x7F) >> 2); 19478c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_CTL & 0x7F) >> 2); 19488c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_PTR_LO_STS & 0x7F) >> 2); 19498c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_PTR_HI_STS & 0x7F) >> 2); 19508c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_TSIZE_STS & 0x7F) >> 2); 19518c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_CTL_STS & 0x7F) >> 2); 19528c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_STS0 & 0x7F) >> 2); 19538c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_STS1 & 0x7F) >> 2); 19548c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 19558c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 19568c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 19578c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 19588c2ecf20Sopenharmony_ci 19598c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 19608c2ecf20Sopenharmony_ci 19618c2ecf20Sopenharmony_ci pb_addr = (mmTPC6_QM_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 19628c2ecf20Sopenharmony_ci word_offset = ((mmTPC6_QM_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 19638c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC6_QM_CQ_IFIFO_CNT & 0x7F) >> 2); 19648c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 19658c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 19668c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 19678c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 19688c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 19698c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 19708c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 19718c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 19728c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 19738c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 19748c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 19758c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 19768c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 19778c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 19788c2ecf20Sopenharmony_ci 19798c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 19808c2ecf20Sopenharmony_ci 19818c2ecf20Sopenharmony_ci pb_addr = (mmTPC6_CMDQ_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 19828c2ecf20Sopenharmony_ci word_offset = ((mmTPC6_CMDQ_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 19838c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC6_CMDQ_GLBL_CFG0 & 0x7F) >> 2); 19848c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_GLBL_CFG1 & 0x7F) >> 2); 19858c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_GLBL_PROT & 0x7F) >> 2); 19868c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_GLBL_ERR_CFG & 0x7F) >> 2); 19878c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 19888c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 19898c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_GLBL_ERR_WDATA & 0x7F) >> 2); 19908c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_GLBL_SECURE_PROPS & 0x7F) >> 2); 19918c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 19928c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_GLBL_STS0 & 0x7F) >> 2); 19938c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_GLBL_STS1 & 0x7F) >> 2); 19948c2ecf20Sopenharmony_ci 19958c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 19968c2ecf20Sopenharmony_ci 19978c2ecf20Sopenharmony_ci pb_addr = (mmTPC6_CMDQ_CQ_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 19988c2ecf20Sopenharmony_ci word_offset = ((mmTPC6_CMDQ_CQ_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 19998c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC6_CMDQ_CQ_CFG0 & 0x7F) >> 2); 20008c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_CFG1 & 0x7F) >> 2); 20018c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_ARUSER & 0x7F) >> 2); 20028c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_PTR_LO_STS & 0x7F) >> 2); 20038c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_PTR_HI_STS & 0x7F) >> 2); 20048c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_TSIZE_STS & 0x7F) >> 2); 20058c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_CTL_STS & 0x7F) >> 2); 20068c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_STS0 & 0x7F) >> 2); 20078c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_STS1 & 0x7F) >> 2); 20088c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 20098c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 20108c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 20118c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 20128c2ecf20Sopenharmony_ci 20138c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 20148c2ecf20Sopenharmony_ci 20158c2ecf20Sopenharmony_ci pb_addr = (mmTPC6_CMDQ_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 20168c2ecf20Sopenharmony_ci word_offset = ((mmTPC6_CMDQ_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 20178c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC6_CMDQ_CQ_IFIFO_CNT & 0x7F) >> 2); 20188c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 20198c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 20208c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 20218c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 20228c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 20238c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 20248c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 20258c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 20268c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 20278c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 20288c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 20298c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 20308c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 20318c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 20328c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_STS & 0x7F) >> 2); 20338c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_CURRENT_INST_LO & 0x7F) >> 2); 20348c2ecf20Sopenharmony_ci 20358c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 20368c2ecf20Sopenharmony_ci 20378c2ecf20Sopenharmony_ci pb_addr = (mmTPC6_CMDQ_CP_CURRENT_INST_HI & ~0xFFF) + PROT_BITS_OFFS; 20388c2ecf20Sopenharmony_ci word_offset = ((mmTPC6_CMDQ_CP_CURRENT_INST_HI & PROT_BITS_OFFS) >> 7) 20398c2ecf20Sopenharmony_ci << 2; 20408c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC6_CMDQ_CP_CURRENT_INST_HI & 0x7F) >> 2); 20418c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_BARRIER_CFG & 0x7F) >> 2); 20428c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_DBG_0 & 0x7F) >> 2); 20438c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_BUF_ADDR & 0x7F) >> 2); 20448c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_BUF_RDATA & 0x7F) >> 2); 20458c2ecf20Sopenharmony_ci 20468c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 20478c2ecf20Sopenharmony_ci 20488c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC7_NRTR_BASE); 20498c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC7_RD_REGULATOR_BASE); 20508c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC7_WR_REGULATOR_BASE); 20518c2ecf20Sopenharmony_ci 20528c2ecf20Sopenharmony_ci pb_addr = (mmTPC7_CFG_SEMAPHORE & ~0xFFF) + PROT_BITS_OFFS; 20538c2ecf20Sopenharmony_ci word_offset = ((mmTPC7_CFG_SEMAPHORE & PROT_BITS_OFFS) >> 7) << 2; 20548c2ecf20Sopenharmony_ci 20558c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC7_CFG_SEMAPHORE & 0x7F) >> 2); 20568c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_VFLAGS & 0x7F) >> 2); 20578c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_SFLAGS & 0x7F) >> 2); 20588c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_STATUS & 0x7F) >> 2); 20598c2ecf20Sopenharmony_ci 20608c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 20618c2ecf20Sopenharmony_ci 20628c2ecf20Sopenharmony_ci pb_addr = (mmTPC7_CFG_CFG_BASE_ADDRESS_HIGH & ~0xFFF) + PROT_BITS_OFFS; 20638c2ecf20Sopenharmony_ci word_offset = ((mmTPC7_CFG_CFG_BASE_ADDRESS_HIGH & 20648c2ecf20Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 20658c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC7_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); 20668c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); 20678c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); 20688c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); 20698c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_TPC_STALL & 0x7F) >> 2); 20708c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_MSS_CONFIG & 0x7F) >> 2); 20718c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); 20728c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_TPC_INTR_MASK & 0x7F) >> 2); 20738c2ecf20Sopenharmony_ci 20748c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 20758c2ecf20Sopenharmony_ci 20768c2ecf20Sopenharmony_ci pb_addr = (mmTPC7_CFG_ARUSER & ~0xFFF) + PROT_BITS_OFFS; 20778c2ecf20Sopenharmony_ci word_offset = ((mmTPC7_CFG_ARUSER & PROT_BITS_OFFS) >> 7) << 2; 20788c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC7_CFG_ARUSER & 0x7F) >> 2); 20798c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_AWUSER & 0x7F) >> 2); 20808c2ecf20Sopenharmony_ci 20818c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 20828c2ecf20Sopenharmony_ci 20838c2ecf20Sopenharmony_ci pb_addr = (mmTPC7_CFG_FUNC_MBIST_CNTRL & ~0xFFF) + PROT_BITS_OFFS; 20848c2ecf20Sopenharmony_ci word_offset = ((mmTPC7_CFG_FUNC_MBIST_CNTRL & 20858c2ecf20Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 20868c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC7_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); 20878c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); 20888c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); 20898c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); 20908c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); 20918c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); 20928c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); 20938c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); 20948c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); 20958c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); 20968c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); 20978c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); 20988c2ecf20Sopenharmony_ci 20998c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 21008c2ecf20Sopenharmony_ci 21018c2ecf20Sopenharmony_ci pb_addr = (mmTPC7_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 21028c2ecf20Sopenharmony_ci word_offset = ((mmTPC7_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 21038c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC7_QM_GLBL_CFG0 & 0x7F) >> 2); 21048c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_GLBL_CFG1 & 0x7F) >> 2); 21058c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_GLBL_PROT & 0x7F) >> 2); 21068c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_GLBL_ERR_CFG & 0x7F) >> 2); 21078c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 21088c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 21098c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_GLBL_ERR_WDATA & 0x7F) >> 2); 21108c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_GLBL_SECURE_PROPS & 0x7F) >> 2); 21118c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 21128c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_GLBL_STS0 & 0x7F) >> 2); 21138c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_GLBL_STS1 & 0x7F) >> 2); 21148c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_BASE_LO & 0x7F) >> 2); 21158c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_BASE_HI & 0x7F) >> 2); 21168c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_SIZE & 0x7F) >> 2); 21178c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_PI & 0x7F) >> 2); 21188c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_CI & 0x7F) >> 2); 21198c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_CFG0 & 0x7F) >> 2); 21208c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_CFG1 & 0x7F) >> 2); 21218c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_ARUSER & 0x7F) >> 2); 21228c2ecf20Sopenharmony_ci 21238c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 21248c2ecf20Sopenharmony_ci 21258c2ecf20Sopenharmony_ci pb_addr = (mmTPC7_QM_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 21268c2ecf20Sopenharmony_ci word_offset = ((mmTPC7_QM_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 21278c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC7_QM_PQ_PUSH0 & 0x7F) >> 2); 21288c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_PUSH1 & 0x7F) >> 2); 21298c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_PUSH2 & 0x7F) >> 2); 21308c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_PUSH3 & 0x7F) >> 2); 21318c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_STS0 & 0x7F) >> 2); 21328c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_STS1 & 0x7F) >> 2); 21338c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 21348c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 21358c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 21368c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 21378c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_CFG0 & 0x7F) >> 2); 21388c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_CFG1 & 0x7F) >> 2); 21398c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_ARUSER & 0x7F) >> 2); 21408c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_PTR_LO & 0x7F) >> 2); 21418c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_PTR_HI & 0x7F) >> 2); 21428c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_TSIZE & 0x7F) >> 2); 21438c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_CTL & 0x7F) >> 2); 21448c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_PTR_LO_STS & 0x7F) >> 2); 21458c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_PTR_HI_STS & 0x7F) >> 2); 21468c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_TSIZE_STS & 0x7F) >> 2); 21478c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_CTL_STS & 0x7F) >> 2); 21488c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_STS0 & 0x7F) >> 2); 21498c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_STS1 & 0x7F) >> 2); 21508c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 21518c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 21528c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 21538c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 21548c2ecf20Sopenharmony_ci 21558c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 21568c2ecf20Sopenharmony_ci 21578c2ecf20Sopenharmony_ci pb_addr = (mmTPC7_QM_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 21588c2ecf20Sopenharmony_ci word_offset = ((mmTPC7_QM_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 21598c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC7_QM_CQ_IFIFO_CNT & 0x7F) >> 2); 21608c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 21618c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 21628c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 21638c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 21648c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 21658c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 21668c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 21678c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 21688c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 21698c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 21708c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 21718c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 21728c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 21738c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 21748c2ecf20Sopenharmony_ci 21758c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 21768c2ecf20Sopenharmony_ci 21778c2ecf20Sopenharmony_ci pb_addr = (mmTPC7_CMDQ_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 21788c2ecf20Sopenharmony_ci word_offset = ((mmTPC7_CMDQ_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 21798c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC7_CMDQ_GLBL_CFG0 & 0x7F) >> 2); 21808c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_GLBL_CFG1 & 0x7F) >> 2); 21818c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_GLBL_PROT & 0x7F) >> 2); 21828c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_GLBL_ERR_CFG & 0x7F) >> 2); 21838c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 21848c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 21858c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_GLBL_ERR_WDATA & 0x7F) >> 2); 21868c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_GLBL_SECURE_PROPS & 0x7F) >> 2); 21878c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 21888c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_GLBL_STS0 & 0x7F) >> 2); 21898c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_GLBL_STS1 & 0x7F) >> 2); 21908c2ecf20Sopenharmony_ci 21918c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 21928c2ecf20Sopenharmony_ci 21938c2ecf20Sopenharmony_ci pb_addr = (mmTPC7_CMDQ_CQ_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 21948c2ecf20Sopenharmony_ci word_offset = ((mmTPC7_CMDQ_CQ_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 21958c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC7_CMDQ_CQ_CFG0 & 0x7F) >> 2); 21968c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_CFG1 & 0x7F) >> 2); 21978c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_ARUSER & 0x7F) >> 2); 21988c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_PTR_LO_STS & 0x7F) >> 2); 21998c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_PTR_HI_STS & 0x7F) >> 2); 22008c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_TSIZE_STS & 0x7F) >> 2); 22018c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_CTL_STS & 0x7F) >> 2); 22028c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_STS0 & 0x7F) >> 2); 22038c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_STS1 & 0x7F) >> 2); 22048c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 22058c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 22068c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 22078c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 22088c2ecf20Sopenharmony_ci 22098c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 22108c2ecf20Sopenharmony_ci 22118c2ecf20Sopenharmony_ci pb_addr = (mmTPC7_CMDQ_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 22128c2ecf20Sopenharmony_ci word_offset = ((mmTPC7_CMDQ_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 22138c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC7_CMDQ_CQ_IFIFO_CNT & 0x7F) >> 2); 22148c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 22158c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 22168c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 22178c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 22188c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 22198c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 22208c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 22218c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 22228c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 22238c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 22248c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 22258c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 22268c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 22278c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 22288c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_STS & 0x7F) >> 2); 22298c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_CURRENT_INST_LO & 0x7F) >> 2); 22308c2ecf20Sopenharmony_ci 22318c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 22328c2ecf20Sopenharmony_ci 22338c2ecf20Sopenharmony_ci pb_addr = (mmTPC7_CMDQ_CP_CURRENT_INST_HI & ~0xFFF) + PROT_BITS_OFFS; 22348c2ecf20Sopenharmony_ci word_offset = ((mmTPC7_CMDQ_CP_CURRENT_INST_HI & PROT_BITS_OFFS) >> 7) 22358c2ecf20Sopenharmony_ci << 2; 22368c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC7_CMDQ_CP_CURRENT_INST_HI & 0x7F) >> 2); 22378c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_BARRIER_CFG & 0x7F) >> 2); 22388c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_DBG_0 & 0x7F) >> 2); 22398c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_BUF_ADDR & 0x7F) >> 2); 22408c2ecf20Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_BUF_RDATA & 0x7F) >> 2); 22418c2ecf20Sopenharmony_ci 22428c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 22438c2ecf20Sopenharmony_ci} 22448c2ecf20Sopenharmony_ci 22458c2ecf20Sopenharmony_ci/* 22468c2ecf20Sopenharmony_ci * goya_init_protection_bits - Initialize protection bits for specific registers 22478c2ecf20Sopenharmony_ci * 22488c2ecf20Sopenharmony_ci * @hdev: pointer to hl_device structure 22498c2ecf20Sopenharmony_ci * 22508c2ecf20Sopenharmony_ci * All protection bits are 1 by default, means not protected. Need to set to 0 22518c2ecf20Sopenharmony_ci * each bit that belongs to a protected register. 22528c2ecf20Sopenharmony_ci * 22538c2ecf20Sopenharmony_ci */ 22548c2ecf20Sopenharmony_cistatic void goya_init_protection_bits(struct hl_device *hdev) 22558c2ecf20Sopenharmony_ci{ 22568c2ecf20Sopenharmony_ci /* 22578c2ecf20Sopenharmony_ci * In each 4K block of registers, the last 128 bytes are protection 22588c2ecf20Sopenharmony_ci * bits - total of 1024 bits, one for each register. Each bit is related 22598c2ecf20Sopenharmony_ci * to a specific register, by the order of the registers. 22608c2ecf20Sopenharmony_ci * So in order to calculate the bit that is related to a given register, 22618c2ecf20Sopenharmony_ci * we need to calculate its word offset and then the exact bit inside 22628c2ecf20Sopenharmony_ci * the word (which is 4 bytes). 22638c2ecf20Sopenharmony_ci * 22648c2ecf20Sopenharmony_ci * Register address: 22658c2ecf20Sopenharmony_ci * 22668c2ecf20Sopenharmony_ci * 31 12 11 7 6 2 1 0 22678c2ecf20Sopenharmony_ci * ----------------------------------------------------------------- 22688c2ecf20Sopenharmony_ci * | Don't | word | bit location | 0 | 22698c2ecf20Sopenharmony_ci * | care | offset | inside word | | 22708c2ecf20Sopenharmony_ci * ----------------------------------------------------------------- 22718c2ecf20Sopenharmony_ci * 22728c2ecf20Sopenharmony_ci * Bits 7-11 represents the word offset inside the 128 bytes. 22738c2ecf20Sopenharmony_ci * Bits 2-6 represents the bit location inside the word. 22748c2ecf20Sopenharmony_ci */ 22758c2ecf20Sopenharmony_ci u32 pb_addr, mask; 22768c2ecf20Sopenharmony_ci u8 word_offset; 22778c2ecf20Sopenharmony_ci 22788c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmPCI_NRTR_BASE); 22798c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmPCI_RD_REGULATOR_BASE); 22808c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmPCI_WR_REGULATOR_BASE); 22818c2ecf20Sopenharmony_ci 22828c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y0_X0_BANK_BASE); 22838c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y0_X0_RTR_BASE); 22848c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y0_X1_BANK_BASE); 22858c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y0_X1_RTR_BASE); 22868c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y0_X2_BANK_BASE); 22878c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y0_X2_RTR_BASE); 22888c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y0_X3_BANK_BASE); 22898c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y0_X3_RTR_BASE); 22908c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y0_X4_BANK_BASE); 22918c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y0_X4_RTR_BASE); 22928c2ecf20Sopenharmony_ci 22938c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y1_X0_BANK_BASE); 22948c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y1_X0_RTR_BASE); 22958c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y1_X1_BANK_BASE); 22968c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y1_X1_RTR_BASE); 22978c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y1_X2_BANK_BASE); 22988c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y1_X2_RTR_BASE); 22998c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y1_X3_BANK_BASE); 23008c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y1_X3_RTR_BASE); 23018c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y1_X4_BANK_BASE); 23028c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y1_X4_RTR_BASE); 23038c2ecf20Sopenharmony_ci 23048c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y2_X0_BANK_BASE); 23058c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y2_X0_RTR_BASE); 23068c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y2_X1_BANK_BASE); 23078c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y2_X1_RTR_BASE); 23088c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y2_X2_BANK_BASE); 23098c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y2_X2_RTR_BASE); 23108c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y2_X3_BANK_BASE); 23118c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y2_X3_RTR_BASE); 23128c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y2_X4_BANK_BASE); 23138c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y2_X4_RTR_BASE); 23148c2ecf20Sopenharmony_ci 23158c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y3_X0_BANK_BASE); 23168c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y3_X0_RTR_BASE); 23178c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y3_X1_BANK_BASE); 23188c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y3_X1_RTR_BASE); 23198c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y3_X2_BANK_BASE); 23208c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y3_X2_RTR_BASE); 23218c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y3_X3_BANK_BASE); 23228c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y3_X3_RTR_BASE); 23238c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y3_X4_BANK_BASE); 23248c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y3_X4_RTR_BASE); 23258c2ecf20Sopenharmony_ci 23268c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y4_X0_BANK_BASE); 23278c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y4_X0_RTR_BASE); 23288c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y4_X1_BANK_BASE); 23298c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y4_X1_RTR_BASE); 23308c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y4_X2_BANK_BASE); 23318c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y4_X2_RTR_BASE); 23328c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y4_X3_BANK_BASE); 23338c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y4_X3_RTR_BASE); 23348c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y4_X4_BANK_BASE); 23358c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y4_X4_RTR_BASE); 23368c2ecf20Sopenharmony_ci 23378c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y5_X0_BANK_BASE); 23388c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y5_X0_RTR_BASE); 23398c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y5_X1_BANK_BASE); 23408c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y5_X1_RTR_BASE); 23418c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y5_X2_BANK_BASE); 23428c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y5_X2_RTR_BASE); 23438c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y5_X3_BANK_BASE); 23448c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y5_X3_RTR_BASE); 23458c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y5_X4_BANK_BASE); 23468c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y5_X4_RTR_BASE); 23478c2ecf20Sopenharmony_ci 23488c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmPCIE_WRAP_BASE); 23498c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmPCIE_CORE_BASE); 23508c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmPCIE_DB_CFG_BASE); 23518c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmPCIE_DB_CMD_BASE); 23528c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmPCIE_AUX_BASE); 23538c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmPCIE_DB_RSV_BASE); 23548c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmPCIE_PHY_BASE); 23558c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC0_NRTR_BASE); 23568c2ecf20Sopenharmony_ci goya_pb_set_block(hdev, mmTPC_PLL_BASE); 23578c2ecf20Sopenharmony_ci 23588c2ecf20Sopenharmony_ci pb_addr = (mmTPC_PLL_CLK_RLX_0 & ~0xFFF) + PROT_BITS_OFFS; 23598c2ecf20Sopenharmony_ci word_offset = ((mmTPC_PLL_CLK_RLX_0 & PROT_BITS_OFFS) >> 7) << 2; 23608c2ecf20Sopenharmony_ci mask = 1 << ((mmTPC_PLL_CLK_RLX_0 & 0x7C) >> 2); 23618c2ecf20Sopenharmony_ci 23628c2ecf20Sopenharmony_ci WREG32(pb_addr + word_offset, mask); 23638c2ecf20Sopenharmony_ci 23648c2ecf20Sopenharmony_ci goya_init_mme_protection_bits(hdev); 23658c2ecf20Sopenharmony_ci 23668c2ecf20Sopenharmony_ci goya_init_dma_protection_bits(hdev); 23678c2ecf20Sopenharmony_ci 23688c2ecf20Sopenharmony_ci goya_init_tpc_protection_bits(hdev); 23698c2ecf20Sopenharmony_ci} 23708c2ecf20Sopenharmony_ci 23718c2ecf20Sopenharmony_ci/* 23728c2ecf20Sopenharmony_ci * goya_init_security - Initialize security model 23738c2ecf20Sopenharmony_ci * 23748c2ecf20Sopenharmony_ci * @hdev: pointer to hl_device structure 23758c2ecf20Sopenharmony_ci * 23768c2ecf20Sopenharmony_ci * Initialize the security model of the device 23778c2ecf20Sopenharmony_ci * That includes range registers and protection bit per register 23788c2ecf20Sopenharmony_ci * 23798c2ecf20Sopenharmony_ci */ 23808c2ecf20Sopenharmony_civoid goya_init_security(struct hl_device *hdev) 23818c2ecf20Sopenharmony_ci{ 23828c2ecf20Sopenharmony_ci struct goya_device *goya = hdev->asic_specific; 23838c2ecf20Sopenharmony_ci 23848c2ecf20Sopenharmony_ci u32 dram_addr_lo = lower_32_bits(DRAM_PHYS_BASE); 23858c2ecf20Sopenharmony_ci u32 dram_addr_hi = upper_32_bits(DRAM_PHYS_BASE); 23868c2ecf20Sopenharmony_ci 23878c2ecf20Sopenharmony_ci u32 lbw_rng0_base = 0xFC440000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 23888c2ecf20Sopenharmony_ci u32 lbw_rng0_mask = 0xFFFF0000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 23898c2ecf20Sopenharmony_ci 23908c2ecf20Sopenharmony_ci u32 lbw_rng1_base = 0xFC480000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 23918c2ecf20Sopenharmony_ci u32 lbw_rng1_mask = 0xFFF80000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 23928c2ecf20Sopenharmony_ci 23938c2ecf20Sopenharmony_ci u32 lbw_rng2_base = 0xFC600000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 23948c2ecf20Sopenharmony_ci u32 lbw_rng2_mask = 0xFFE00000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 23958c2ecf20Sopenharmony_ci 23968c2ecf20Sopenharmony_ci u32 lbw_rng3_base = 0xFC800000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 23978c2ecf20Sopenharmony_ci u32 lbw_rng3_mask = 0xFFF00000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 23988c2ecf20Sopenharmony_ci 23998c2ecf20Sopenharmony_ci u32 lbw_rng4_base = 0xFCC02000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 24008c2ecf20Sopenharmony_ci u32 lbw_rng4_mask = 0xFFFFF000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 24018c2ecf20Sopenharmony_ci 24028c2ecf20Sopenharmony_ci u32 lbw_rng5_base = 0xFCC40000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 24038c2ecf20Sopenharmony_ci u32 lbw_rng5_mask = 0xFFFF8000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 24048c2ecf20Sopenharmony_ci 24058c2ecf20Sopenharmony_ci u32 lbw_rng6_base = 0xFCC48000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 24068c2ecf20Sopenharmony_ci u32 lbw_rng6_mask = 0xFFFFF000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 24078c2ecf20Sopenharmony_ci 24088c2ecf20Sopenharmony_ci u32 lbw_rng7_base = 0xFCC4A000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 24098c2ecf20Sopenharmony_ci u32 lbw_rng7_mask = 0xFFFFE000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 24108c2ecf20Sopenharmony_ci 24118c2ecf20Sopenharmony_ci u32 lbw_rng8_base = 0xFCC4C000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 24128c2ecf20Sopenharmony_ci u32 lbw_rng8_mask = 0xFFFFC000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 24138c2ecf20Sopenharmony_ci 24148c2ecf20Sopenharmony_ci u32 lbw_rng9_base = 0xFCC50000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 24158c2ecf20Sopenharmony_ci u32 lbw_rng9_mask = 0xFFFF0000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 24168c2ecf20Sopenharmony_ci 24178c2ecf20Sopenharmony_ci u32 lbw_rng10_base = 0xFCC60000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 24188c2ecf20Sopenharmony_ci u32 lbw_rng10_mask = 0xFFFE0000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 24198c2ecf20Sopenharmony_ci 24208c2ecf20Sopenharmony_ci u32 lbw_rng11_base = 0xFCE02000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 24218c2ecf20Sopenharmony_ci u32 lbw_rng11_mask = 0xFFFFE000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 24228c2ecf20Sopenharmony_ci 24238c2ecf20Sopenharmony_ci u32 lbw_rng12_base = 0xFE484000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 24248c2ecf20Sopenharmony_ci u32 lbw_rng12_mask = 0xFFFFF000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 24258c2ecf20Sopenharmony_ci 24268c2ecf20Sopenharmony_ci u32 lbw_rng13_base = 0xFEC43000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 24278c2ecf20Sopenharmony_ci u32 lbw_rng13_mask = 0xFFFFF000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 24288c2ecf20Sopenharmony_ci 24298c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_HIT_BLOCK, 0xFFFF); 24308c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_HBW_RANGE_HIT_BLOCK, 0xFF); 24318c2ecf20Sopenharmony_ci 24328c2ecf20Sopenharmony_ci if (!(goya->hw_cap_initialized & HW_CAP_MMU)) { 24338c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_HBW_RANGE_HIT_BLOCK, 0xFE); 24348c2ecf20Sopenharmony_ci 24358c2ecf20Sopenharmony_ci /* Protect HOST */ 24368c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_HBW_RANGE_BASE_31_0_0, 0); 24378c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_HBW_RANGE_BASE_49_32_0, 0); 24388c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_HBW_RANGE_MASK_31_0_0, 0); 24398c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_HBW_RANGE_MASK_49_32_0, 0xFFF80); 24408c2ecf20Sopenharmony_ci } 24418c2ecf20Sopenharmony_ci 24428c2ecf20Sopenharmony_ci /* 24438c2ecf20Sopenharmony_ci * Protect DDR @ 24448c2ecf20Sopenharmony_ci * DRAM_VIRT_BASE : DRAM_VIRT_BASE + DRAM_VIRT_END 24458c2ecf20Sopenharmony_ci * The mask protects the first 512MB 24468c2ecf20Sopenharmony_ci */ 24478c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_HBW_RANGE_BASE_31_0_1, dram_addr_lo); 24488c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_HBW_RANGE_BASE_49_32_1, dram_addr_hi); 24498c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_HBW_RANGE_MASK_31_0_1, 0xE0000000); 24508c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_HBW_RANGE_MASK_49_32_1, 0x3FFFF); 24518c2ecf20Sopenharmony_ci 24528c2ecf20Sopenharmony_ci /* Protect registers */ 24538c2ecf20Sopenharmony_ci 24548c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_0, lbw_rng0_base); 24558c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_0, lbw_rng0_mask); 24568c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_1, lbw_rng1_base); 24578c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_1, lbw_rng1_mask); 24588c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_2, lbw_rng2_base); 24598c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_2, lbw_rng2_mask); 24608c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_3, lbw_rng3_base); 24618c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_3, lbw_rng3_mask); 24628c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_4, lbw_rng4_base); 24638c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_4, lbw_rng4_mask); 24648c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_5, lbw_rng5_base); 24658c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_5, lbw_rng5_mask); 24668c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_6, lbw_rng6_base); 24678c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_6, lbw_rng6_mask); 24688c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_7, lbw_rng7_base); 24698c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_7, lbw_rng7_mask); 24708c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_8, lbw_rng8_base); 24718c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_8, lbw_rng8_mask); 24728c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_9, lbw_rng9_base); 24738c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_9, lbw_rng9_mask); 24748c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_10, lbw_rng10_base); 24758c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_10, lbw_rng10_mask); 24768c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_11, lbw_rng11_base); 24778c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_11, lbw_rng11_mask); 24788c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_12, lbw_rng12_base); 24798c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_12, lbw_rng12_mask); 24808c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_13, lbw_rng13_base); 24818c2ecf20Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_13, lbw_rng13_mask); 24828c2ecf20Sopenharmony_ci 24838c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_HIT, 0xFFFF); 24848c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_HIT, 0xFFFF); 24858c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_HIT, 0xFFFF); 24868c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_HIT, 0xFFFF); 24878c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_HIT, 0xFFFF); 24888c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_HIT, 0xFFFF); 24898c2ecf20Sopenharmony_ci 24908c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_HBW_RANGE_HIT, 0xFE); 24918c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_HBW_RANGE_HIT, 0xFE); 24928c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_HBW_RANGE_HIT, 0xFE); 24938c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_HBW_RANGE_HIT, 0xFE); 24948c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_HBW_RANGE_HIT, 0xFE); 24958c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_HBW_RANGE_HIT, 0xFE); 24968c2ecf20Sopenharmony_ci 24978c2ecf20Sopenharmony_ci /* Protect HOST */ 24988c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_HBW_RANGE_BASE_L_0, 0); 24998c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_HBW_RANGE_BASE_H_0, 0); 25008c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_HBW_RANGE_MASK_L_0, 0); 25018c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 25028c2ecf20Sopenharmony_ci 25038c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_HBW_RANGE_BASE_L_0, 0); 25048c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_HBW_RANGE_BASE_H_0, 0); 25058c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_HBW_RANGE_MASK_L_0, 0); 25068c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 25078c2ecf20Sopenharmony_ci 25088c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_HBW_RANGE_BASE_L_0, 0); 25098c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_HBW_RANGE_BASE_H_0, 0); 25108c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_HBW_RANGE_MASK_L_0, 0); 25118c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 25128c2ecf20Sopenharmony_ci 25138c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_HBW_RANGE_BASE_L_0, 0); 25148c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_HBW_RANGE_BASE_H_0, 0); 25158c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_HBW_RANGE_MASK_L_0, 0); 25168c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 25178c2ecf20Sopenharmony_ci 25188c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_HBW_RANGE_BASE_L_0, 0); 25198c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_HBW_RANGE_BASE_H_0, 0); 25208c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_HBW_RANGE_MASK_L_0, 0); 25218c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 25228c2ecf20Sopenharmony_ci 25238c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_HBW_RANGE_BASE_L_0, 0); 25248c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_HBW_RANGE_BASE_H_0, 0); 25258c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_HBW_RANGE_MASK_L_0, 0); 25268c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 25278c2ecf20Sopenharmony_ci 25288c2ecf20Sopenharmony_ci /* 25298c2ecf20Sopenharmony_ci * Protect DDR @ 25308c2ecf20Sopenharmony_ci * DRAM_VIRT_BASE : DRAM_VIRT_BASE + DRAM_VIRT_END 25318c2ecf20Sopenharmony_ci * The mask protects the first 512MB 25328c2ecf20Sopenharmony_ci */ 25338c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 25348c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 25358c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 25368c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 25378c2ecf20Sopenharmony_ci 25388c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 25398c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 25408c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 25418c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 25428c2ecf20Sopenharmony_ci 25438c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 25448c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 25458c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 25468c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 25478c2ecf20Sopenharmony_ci 25488c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 25498c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 25508c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 25518c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 25528c2ecf20Sopenharmony_ci 25538c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 25548c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 25558c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 25568c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 25578c2ecf20Sopenharmony_ci 25588c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 25598c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 25608c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 25618c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 25628c2ecf20Sopenharmony_ci 25638c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 25648c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 25658c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 25668c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 25678c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 25688c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 25698c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 25708c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 25718c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 25728c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 25738c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 25748c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 25758c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 25768c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 25778c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 25788c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 25798c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 25808c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 25818c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 25828c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 25838c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 25848c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 25858c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 25868c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 25878c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 25888c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 25898c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 25908c2ecf20Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 25918c2ecf20Sopenharmony_ci 25928c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 25938c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 25948c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 25958c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 25968c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 25978c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 25988c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 25998c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 26008c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 26018c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 26028c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 26038c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 26048c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 26058c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 26068c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 26078c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 26088c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 26098c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 26108c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 26118c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 26128c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 26138c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 26148c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 26158c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 26168c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 26178c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 26188c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 26198c2ecf20Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 26208c2ecf20Sopenharmony_ci 26218c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 26228c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 26238c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 26248c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 26258c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 26268c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 26278c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 26288c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 26298c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 26308c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 26318c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 26328c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 26338c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 26348c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 26358c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 26368c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 26378c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 26388c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 26398c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 26408c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 26418c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 26428c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 26438c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 26448c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 26458c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 26468c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 26478c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 26488c2ecf20Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 26498c2ecf20Sopenharmony_ci 26508c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 26518c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 26528c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 26538c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 26548c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 26558c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 26568c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 26578c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 26588c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 26598c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 26608c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 26618c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 26628c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 26638c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 26648c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 26658c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 26668c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 26678c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 26688c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 26698c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 26708c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 26718c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 26728c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 26738c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 26748c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 26758c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 26768c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 26778c2ecf20Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 26788c2ecf20Sopenharmony_ci 26798c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 26808c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 26818c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 26828c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 26838c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 26848c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 26858c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 26868c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 26878c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 26888c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 26898c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 26908c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 26918c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 26928c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 26938c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 26948c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 26958c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 26968c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 26978c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 26988c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 26998c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 27008c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 27018c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 27028c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 27038c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 27048c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 27058c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 27068c2ecf20Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 27078c2ecf20Sopenharmony_ci 27088c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 27098c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 27108c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 27118c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 27128c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 27138c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 27148c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 27158c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 27168c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 27178c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 27188c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 27198c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 27208c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 27218c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 27228c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 27238c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 27248c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 27258c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 27268c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 27278c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 27288c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 27298c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 27308c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 27318c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 27328c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 27338c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 27348c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 27358c2ecf20Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 27368c2ecf20Sopenharmony_ci 27378c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_HIT, 0xFFFF); 27388c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_HBW_RANGE_HIT, 0xFE); 27398c2ecf20Sopenharmony_ci 27408c2ecf20Sopenharmony_ci /* Protect HOST */ 27418c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_HBW_RANGE_BASE_L_0, 0); 27428c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_HBW_RANGE_BASE_H_0, 0); 27438c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_HBW_RANGE_MASK_L_0, 0); 27448c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_HBW_RANGE_MASK_H_0, 0xFFF80); 27458c2ecf20Sopenharmony_ci 27468c2ecf20Sopenharmony_ci /* 27478c2ecf20Sopenharmony_ci * Protect DDR @ 27488c2ecf20Sopenharmony_ci * DRAM_VIRT_BASE : DRAM_VIRT_BASE + DRAM_VIRT_END 27498c2ecf20Sopenharmony_ci * The mask protects the first 512MB 27508c2ecf20Sopenharmony_ci */ 27518c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 27528c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 27538c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_HBW_RANGE_MASK_L_1, 0xE0000000); 27548c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 27558c2ecf20Sopenharmony_ci 27568c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_0, lbw_rng0_base); 27578c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 27588c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_1, lbw_rng1_base); 27598c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 27608c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_2, lbw_rng2_base); 27618c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 27628c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_3, lbw_rng3_base); 27638c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 27648c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_4, lbw_rng4_base); 27658c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 27668c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_5, lbw_rng5_base); 27678c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 27688c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_6, lbw_rng6_base); 27698c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 27708c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_7, lbw_rng7_base); 27718c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 27728c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_8, lbw_rng8_base); 27738c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 27748c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_9, lbw_rng9_base); 27758c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 27768c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_10, lbw_rng10_base); 27778c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 27788c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_11, lbw_rng11_base); 27798c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 27808c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_12, lbw_rng12_base); 27818c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 27828c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_13, lbw_rng13_base); 27838c2ecf20Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 27848c2ecf20Sopenharmony_ci 27858c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_HIT, 0xFFFF); 27868c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_HBW_RANGE_HIT, 0xFE); 27878c2ecf20Sopenharmony_ci 27888c2ecf20Sopenharmony_ci /* Protect HOST */ 27898c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_HBW_RANGE_BASE_L_0, 0); 27908c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_HBW_RANGE_BASE_H_0, 0); 27918c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_HBW_RANGE_MASK_L_0, 0); 27928c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 27938c2ecf20Sopenharmony_ci 27948c2ecf20Sopenharmony_ci /* 27958c2ecf20Sopenharmony_ci * Protect DDR @ 27968c2ecf20Sopenharmony_ci * DRAM_VIRT_BASE : DRAM_VIRT_BASE + DRAM_VIRT_END 27978c2ecf20Sopenharmony_ci * The mask protects the first 512MB 27988c2ecf20Sopenharmony_ci */ 27998c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 28008c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 28018c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 28028c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 28038c2ecf20Sopenharmony_ci 28048c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 28058c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 28068c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 28078c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 28088c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 28098c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 28108c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 28118c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 28128c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 28138c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 28148c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 28158c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 28168c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 28178c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 28188c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 28198c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 28208c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 28218c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 28228c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 28238c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 28248c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 28258c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 28268c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 28278c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 28288c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 28298c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 28308c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 28318c2ecf20Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 28328c2ecf20Sopenharmony_ci 28338c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_HIT, 0xFFFF); 28348c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_HBW_RANGE_HIT, 0xFE); 28358c2ecf20Sopenharmony_ci 28368c2ecf20Sopenharmony_ci /* Protect HOST */ 28378c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_HBW_RANGE_BASE_L_0, 0); 28388c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_HBW_RANGE_BASE_H_0, 0); 28398c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_HBW_RANGE_MASK_L_0, 0); 28408c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 28418c2ecf20Sopenharmony_ci 28428c2ecf20Sopenharmony_ci /* 28438c2ecf20Sopenharmony_ci * Protect DDR @ 28448c2ecf20Sopenharmony_ci * DRAM_VIRT_BASE : DRAM_VIRT_BASE + DRAM_VIRT_END 28458c2ecf20Sopenharmony_ci * The mask protects the first 512MB 28468c2ecf20Sopenharmony_ci */ 28478c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 28488c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 28498c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 28508c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 28518c2ecf20Sopenharmony_ci 28528c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 28538c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 28548c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 28558c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 28568c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 28578c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 28588c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 28598c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 28608c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 28618c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 28628c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 28638c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 28648c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 28658c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 28668c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 28678c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 28688c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 28698c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 28708c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 28718c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 28728c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 28738c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 28748c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 28758c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 28768c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 28778c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 28788c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 28798c2ecf20Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 28808c2ecf20Sopenharmony_ci 28818c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_HIT, 0xFFFF); 28828c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_HBW_RANGE_HIT, 0xFE); 28838c2ecf20Sopenharmony_ci 28848c2ecf20Sopenharmony_ci /* Protect HOST */ 28858c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_HBW_RANGE_BASE_L_0, 0); 28868c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_HBW_RANGE_BASE_H_0, 0); 28878c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_HBW_RANGE_MASK_L_0, 0); 28888c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 28898c2ecf20Sopenharmony_ci 28908c2ecf20Sopenharmony_ci /* 28918c2ecf20Sopenharmony_ci * Protect DDR @ 28928c2ecf20Sopenharmony_ci * DRAM_VIRT_BASE : DRAM_VIRT_BASE + DRAM_VIRT_END 28938c2ecf20Sopenharmony_ci * The mask protects the first 512MB 28948c2ecf20Sopenharmony_ci */ 28958c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 28968c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 28978c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 28988c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 28998c2ecf20Sopenharmony_ci 29008c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 29018c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 29028c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 29038c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 29048c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 29058c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 29068c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 29078c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 29088c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 29098c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 29108c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 29118c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 29128c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 29138c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 29148c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 29158c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 29168c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 29178c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 29188c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 29198c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 29208c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 29218c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 29228c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 29238c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 29248c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 29258c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 29268c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 29278c2ecf20Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 29288c2ecf20Sopenharmony_ci 29298c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_HIT, 0xFFFF); 29308c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_HBW_RANGE_HIT, 0xFE); 29318c2ecf20Sopenharmony_ci 29328c2ecf20Sopenharmony_ci /* Protect HOST */ 29338c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_HBW_RANGE_BASE_L_0, 0); 29348c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_HBW_RANGE_BASE_H_0, 0); 29358c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_HBW_RANGE_MASK_L_0, 0); 29368c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 29378c2ecf20Sopenharmony_ci 29388c2ecf20Sopenharmony_ci /* 29398c2ecf20Sopenharmony_ci * Protect DDR @ 29408c2ecf20Sopenharmony_ci * DRAM_VIRT_BASE : DRAM_VIRT_BASE + DRAM_VIRT_END 29418c2ecf20Sopenharmony_ci * The mask protects the first 512MB 29428c2ecf20Sopenharmony_ci */ 29438c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 29448c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 29458c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 29468c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 29478c2ecf20Sopenharmony_ci 29488c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 29498c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 29508c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 29518c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 29528c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 29538c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 29548c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 29558c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 29568c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 29578c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 29588c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 29598c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 29608c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 29618c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 29628c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 29638c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 29648c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 29658c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 29668c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 29678c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 29688c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 29698c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 29708c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 29718c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 29728c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 29738c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 29748c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 29758c2ecf20Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 29768c2ecf20Sopenharmony_ci 29778c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_HIT, 0xFFFF); 29788c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_HBW_RANGE_HIT, 0xFE); 29798c2ecf20Sopenharmony_ci 29808c2ecf20Sopenharmony_ci /* Protect HOST */ 29818c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_HBW_RANGE_BASE_L_0, 0); 29828c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_HBW_RANGE_BASE_H_0, 0); 29838c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_HBW_RANGE_MASK_L_0, 0); 29848c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 29858c2ecf20Sopenharmony_ci 29868c2ecf20Sopenharmony_ci /* 29878c2ecf20Sopenharmony_ci * Protect DDR @ 29888c2ecf20Sopenharmony_ci * DRAM_VIRT_BASE : DRAM_VIRT_BASE + DRAM_VIRT_END 29898c2ecf20Sopenharmony_ci * The mask protects the first 512MB 29908c2ecf20Sopenharmony_ci */ 29918c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 29928c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 29938c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 29948c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 29958c2ecf20Sopenharmony_ci 29968c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 29978c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 29988c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 29998c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 30008c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 30018c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 30028c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 30038c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 30048c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 30058c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 30068c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 30078c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 30088c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 30098c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 30108c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 30118c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 30128c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 30138c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 30148c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 30158c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 30168c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 30178c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 30188c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 30198c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 30208c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 30218c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 30228c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 30238c2ecf20Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 30248c2ecf20Sopenharmony_ci 30258c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_HIT, 0xFFFF); 30268c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_HBW_RANGE_HIT, 0xFE); 30278c2ecf20Sopenharmony_ci 30288c2ecf20Sopenharmony_ci /* Protect HOST */ 30298c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_HBW_RANGE_BASE_L_0, 0); 30308c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_HBW_RANGE_BASE_H_0, 0); 30318c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_HBW_RANGE_MASK_L_0, 0); 30328c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 30338c2ecf20Sopenharmony_ci 30348c2ecf20Sopenharmony_ci /* 30358c2ecf20Sopenharmony_ci * Protect DDR @ 30368c2ecf20Sopenharmony_ci * DRAM_VIRT_BASE : DRAM_VIRT_BASE + DRAM_VIRT_END 30378c2ecf20Sopenharmony_ci * The mask protects the first 512MB 30388c2ecf20Sopenharmony_ci */ 30398c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 30408c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 30418c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 30428c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 30438c2ecf20Sopenharmony_ci 30448c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 30458c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 30468c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 30478c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 30488c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 30498c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 30508c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 30518c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 30528c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 30538c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 30548c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 30558c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 30568c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 30578c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 30588c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 30598c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 30608c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 30618c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 30628c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 30638c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 30648c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 30658c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 30668c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 30678c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 30688c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 30698c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 30708c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 30718c2ecf20Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 30728c2ecf20Sopenharmony_ci 30738c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_HIT, 0xFFFF); 30748c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_HBW_RANGE_HIT, 0xFE); 30758c2ecf20Sopenharmony_ci 30768c2ecf20Sopenharmony_ci /* Protect HOST */ 30778c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_HBW_RANGE_BASE_L_0, 0); 30788c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_HBW_RANGE_BASE_H_0, 0); 30798c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_HBW_RANGE_MASK_L_0, 0); 30808c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_HBW_RANGE_MASK_H_0, 0xFFF80); 30818c2ecf20Sopenharmony_ci 30828c2ecf20Sopenharmony_ci /* 30838c2ecf20Sopenharmony_ci * Protect DDR @ 30848c2ecf20Sopenharmony_ci * DRAM_VIRT_BASE : DRAM_VIRT_BASE + DRAM_VIRT_END 30858c2ecf20Sopenharmony_ci * The mask protects the first 512MB 30868c2ecf20Sopenharmony_ci */ 30878c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 30888c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 30898c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_HBW_RANGE_MASK_L_1, 0xE0000000); 30908c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 30918c2ecf20Sopenharmony_ci 30928c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_0, lbw_rng0_base); 30938c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 30948c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_1, lbw_rng1_base); 30958c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 30968c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_2, lbw_rng2_base); 30978c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 30988c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_3, lbw_rng3_base); 30998c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 31008c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_4, lbw_rng4_base); 31018c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 31028c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_5, lbw_rng5_base); 31038c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 31048c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_6, lbw_rng6_base); 31058c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 31068c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_7, lbw_rng7_base); 31078c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 31088c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_8, lbw_rng8_base); 31098c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 31108c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_9, lbw_rng9_base); 31118c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 31128c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_10, lbw_rng10_base); 31138c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 31148c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_11, lbw_rng11_base); 31158c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 31168c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_12, lbw_rng12_base); 31178c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 31188c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_13, lbw_rng13_base); 31198c2ecf20Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 31208c2ecf20Sopenharmony_ci 31218c2ecf20Sopenharmony_ci goya_init_protection_bits(hdev); 31228c2ecf20Sopenharmony_ci} 3123