18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */
28c2ecf20Sopenharmony_ci/* Driver for Realtek PCI-Express card reader
38c2ecf20Sopenharmony_ci *
48c2ecf20Sopenharmony_ci * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
58c2ecf20Sopenharmony_ci *
68c2ecf20Sopenharmony_ci * Author:
78c2ecf20Sopenharmony_ci *   Wei WANG <wei_wang@realsil.com.cn>
88c2ecf20Sopenharmony_ci */
98c2ecf20Sopenharmony_ci
108c2ecf20Sopenharmony_ci#ifndef __RTSX_PCR_H
118c2ecf20Sopenharmony_ci#define __RTSX_PCR_H
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ci#include <linux/rtsx_pci.h>
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_ci#define MIN_DIV_N_PCR		80
168c2ecf20Sopenharmony_ci#define MAX_DIV_N_PCR		208
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ci#define RTS522A_PM_CTRL3		0xFF7E
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ci#define RTS524A_PME_FORCE_CTL		0xFF78
218c2ecf20Sopenharmony_ci#define REG_EFUSE_BYPASS		0x08
228c2ecf20Sopenharmony_ci#define REG_EFUSE_POR			0x04
238c2ecf20Sopenharmony_ci#define REG_EFUSE_POWER_MASK		0x03
248c2ecf20Sopenharmony_ci#define REG_EFUSE_POWERON		0x03
258c2ecf20Sopenharmony_ci#define REG_EFUSE_POWEROFF		0x00
268c2ecf20Sopenharmony_ci#define RTS5250_CLK_CFG3		0xFF79
278c2ecf20Sopenharmony_ci#define RTS525A_CFG_MEM_PD		0xF0
288c2ecf20Sopenharmony_ci#define RTS524A_PM_CTRL3		0xFF7E
298c2ecf20Sopenharmony_ci#define RTS525A_BIOS_CFG		0xFF2D
308c2ecf20Sopenharmony_ci#define RTS525A_LOAD_BIOS_FLAG	0x01
318c2ecf20Sopenharmony_ci#define RTS525A_CLEAR_BIOS_FLAG	0x00
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_ci#define RTS525A_EFUSE_CTL		0xFC32
348c2ecf20Sopenharmony_ci#define REG_EFUSE_ENABLE		0x80
358c2ecf20Sopenharmony_ci#define REG_EFUSE_MODE			0x40
368c2ecf20Sopenharmony_ci#define RTS525A_EFUSE_ADD		0xFC33
378c2ecf20Sopenharmony_ci#define REG_EFUSE_ADD_MASK		0x3F
388c2ecf20Sopenharmony_ci#define RTS525A_EFUSE_DATA		0xFC35
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_ci#define LTR_ACTIVE_LATENCY_DEF		0x883C
418c2ecf20Sopenharmony_ci#define LTR_IDLE_LATENCY_DEF		0x892C
428c2ecf20Sopenharmony_ci#define LTR_L1OFF_LATENCY_DEF		0x9003
438c2ecf20Sopenharmony_ci#define L1_SNOOZE_DELAY_DEF		1
448c2ecf20Sopenharmony_ci#define LTR_L1OFF_SSPWRGATE_5249_DEF		0xAF
458c2ecf20Sopenharmony_ci#define LTR_L1OFF_SSPWRGATE_5250_DEF		0xFF
468c2ecf20Sopenharmony_ci#define LTR_L1OFF_SNOOZE_SSPWRGATE_5249_DEF	0xAC
478c2ecf20Sopenharmony_ci#define LTR_L1OFF_SNOOZE_SSPWRGATE_5250_DEF	0xF8
488c2ecf20Sopenharmony_ci#define CMD_TIMEOUT_DEF		100
498c2ecf20Sopenharmony_ci#define MASK_8_BIT_DEF		0xFF
508c2ecf20Sopenharmony_ci
518c2ecf20Sopenharmony_ci#define SSC_CLOCK_STABLE_WAIT	130
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_ci#define RTS524A_OCP_THD_800	0x04
548c2ecf20Sopenharmony_ci#define RTS525A_OCP_THD_800	0x05
558c2ecf20Sopenharmony_ci#define RTS522A_OCP_THD_800	0x06
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_ci
588c2ecf20Sopenharmony_ciint __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val);
598c2ecf20Sopenharmony_ciint __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val);
608c2ecf20Sopenharmony_ci
618c2ecf20Sopenharmony_civoid rts5209_init_params(struct rtsx_pcr *pcr);
628c2ecf20Sopenharmony_civoid rts5229_init_params(struct rtsx_pcr *pcr);
638c2ecf20Sopenharmony_civoid rtl8411_init_params(struct rtsx_pcr *pcr);
648c2ecf20Sopenharmony_civoid rtl8402_init_params(struct rtsx_pcr *pcr);
658c2ecf20Sopenharmony_civoid rts5227_init_params(struct rtsx_pcr *pcr);
668c2ecf20Sopenharmony_civoid rts522a_init_params(struct rtsx_pcr *pcr);
678c2ecf20Sopenharmony_civoid rts5249_init_params(struct rtsx_pcr *pcr);
688c2ecf20Sopenharmony_civoid rts524a_init_params(struct rtsx_pcr *pcr);
698c2ecf20Sopenharmony_civoid rts525a_init_params(struct rtsx_pcr *pcr);
708c2ecf20Sopenharmony_civoid rtl8411b_init_params(struct rtsx_pcr *pcr);
718c2ecf20Sopenharmony_civoid rts5260_init_params(struct rtsx_pcr *pcr);
728c2ecf20Sopenharmony_civoid rts5261_init_params(struct rtsx_pcr *pcr);
738c2ecf20Sopenharmony_civoid rts5228_init_params(struct rtsx_pcr *pcr);
748c2ecf20Sopenharmony_ci
758c2ecf20Sopenharmony_cistatic inline u8 map_sd_drive(int idx)
768c2ecf20Sopenharmony_ci{
778c2ecf20Sopenharmony_ci	u8 sd_drive[4] = {
788c2ecf20Sopenharmony_ci		0x01,	/* Type D */
798c2ecf20Sopenharmony_ci		0x02,	/* Type C */
808c2ecf20Sopenharmony_ci		0x05,	/* Type A */
818c2ecf20Sopenharmony_ci		0x03	/* Type B */
828c2ecf20Sopenharmony_ci	};
838c2ecf20Sopenharmony_ci
848c2ecf20Sopenharmony_ci	return sd_drive[idx];
858c2ecf20Sopenharmony_ci}
868c2ecf20Sopenharmony_ci
878c2ecf20Sopenharmony_ci#define rtsx_vendor_setting_valid(reg)		(!((reg) & 0x1000000))
888c2ecf20Sopenharmony_ci#define rts5209_vendor_setting1_valid(reg)	(!((reg) & 0x80))
898c2ecf20Sopenharmony_ci#define rts5209_vendor_setting2_valid(reg)	((reg) & 0x80)
908c2ecf20Sopenharmony_ci
918c2ecf20Sopenharmony_ci#define rtsx_check_mmc_support(reg)		((reg) & 0x10)
928c2ecf20Sopenharmony_ci#define rtsx_reg_to_rtd3(reg)				((reg) & 0x02)
938c2ecf20Sopenharmony_ci#define rtsx_reg_to_aspm(reg)			(((reg) >> 28) & 0x03)
948c2ecf20Sopenharmony_ci#define rtsx_reg_to_sd30_drive_sel_1v8(reg)	(((reg) >> 26) & 0x03)
958c2ecf20Sopenharmony_ci#define rtsx_reg_to_sd30_drive_sel_3v3(reg)	(((reg) >> 5) & 0x03)
968c2ecf20Sopenharmony_ci#define rtsx_reg_to_card_drive_sel(reg)		((((reg) >> 25) & 0x01) << 6)
978c2ecf20Sopenharmony_ci#define rtsx_reg_check_reverse_socket(reg)	((reg) & 0x4000)
988c2ecf20Sopenharmony_ci#define rts5209_reg_to_aspm(reg)		(((reg) >> 5) & 0x03)
998c2ecf20Sopenharmony_ci#define rts5209_reg_check_ms_pmos(reg)		(!((reg) & 0x08))
1008c2ecf20Sopenharmony_ci#define rts5209_reg_to_sd30_drive_sel_1v8(reg)	(((reg) >> 3) & 0x07)
1018c2ecf20Sopenharmony_ci#define rts5209_reg_to_sd30_drive_sel_3v3(reg)	((reg) & 0x07)
1028c2ecf20Sopenharmony_ci#define rts5209_reg_to_card_drive_sel(reg)	((reg) >> 8)
1038c2ecf20Sopenharmony_ci#define rtl8411_reg_to_sd30_drive_sel_3v3(reg)	(((reg) >> 5) & 0x07)
1048c2ecf20Sopenharmony_ci#define rtl8411b_reg_to_sd30_drive_sel_3v3(reg)	((reg) & 0x03)
1058c2ecf20Sopenharmony_ci
1068c2ecf20Sopenharmony_ci#define set_pull_ctrl_tables(pcr, __device)				\
1078c2ecf20Sopenharmony_cido {									\
1088c2ecf20Sopenharmony_ci	pcr->sd_pull_ctl_enable_tbl  = __device##_sd_pull_ctl_enable_tbl;  \
1098c2ecf20Sopenharmony_ci	pcr->sd_pull_ctl_disable_tbl = __device##_sd_pull_ctl_disable_tbl; \
1108c2ecf20Sopenharmony_ci	pcr->ms_pull_ctl_enable_tbl  = __device##_ms_pull_ctl_enable_tbl;  \
1118c2ecf20Sopenharmony_ci	pcr->ms_pull_ctl_disable_tbl = __device##_ms_pull_ctl_disable_tbl; \
1128c2ecf20Sopenharmony_ci} while (0)
1138c2ecf20Sopenharmony_ci
1148c2ecf20Sopenharmony_ci/* generic operations */
1158c2ecf20Sopenharmony_ciint rtsx_gops_pm_reset(struct rtsx_pcr *pcr);
1168c2ecf20Sopenharmony_ciint rtsx_set_ltr_latency(struct rtsx_pcr *pcr, u32 latency);
1178c2ecf20Sopenharmony_ciint rtsx_set_l1off_sub(struct rtsx_pcr *pcr, u8 val);
1188c2ecf20Sopenharmony_civoid rtsx_pci_init_ocp(struct rtsx_pcr *pcr);
1198c2ecf20Sopenharmony_civoid rtsx_pci_disable_ocp(struct rtsx_pcr *pcr);
1208c2ecf20Sopenharmony_civoid rtsx_pci_enable_ocp(struct rtsx_pcr *pcr);
1218c2ecf20Sopenharmony_ciint rtsx_pci_get_ocpstat(struct rtsx_pcr *pcr, u8 *val);
1228c2ecf20Sopenharmony_civoid rtsx_pci_clear_ocpstat(struct rtsx_pcr *pcr);
1238c2ecf20Sopenharmony_civoid rtsx_pci_enable_oobs_polling(struct rtsx_pcr *pcr);
1248c2ecf20Sopenharmony_civoid rtsx_pci_disable_oobs_polling(struct rtsx_pcr *pcr);
1258c2ecf20Sopenharmony_ciint rtsx_sd_power_off_card3v3(struct rtsx_pcr *pcr);
1268c2ecf20Sopenharmony_ciint rtsx_ms_power_off_card3v3(struct rtsx_pcr *pcr);
1278c2ecf20Sopenharmony_ci
1288c2ecf20Sopenharmony_ci#endif
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