1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * twl_core.c - driver for TWL4030/TWL5030/TWL60X0/TPS659x0 PM 4 * and audio CODEC devices 5 * 6 * Copyright (C) 2005-2006 Texas Instruments, Inc. 7 * 8 * Modifications to defer interrupt handling to a kernel thread: 9 * Copyright (C) 2006 MontaVista Software, Inc. 10 * 11 * Based on tlv320aic23.c: 12 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com> 13 * 14 * Code cleanup and modifications to IRQ handler. 15 * by syed khasim <x0khasim@ti.com> 16 */ 17 18#include <linux/init.h> 19#include <linux/mutex.h> 20#include <linux/platform_device.h> 21#include <linux/regmap.h> 22#include <linux/clk.h> 23#include <linux/err.h> 24#include <linux/device.h> 25#include <linux/of.h> 26#include <linux/of_irq.h> 27#include <linux/of_platform.h> 28#include <linux/irq.h> 29#include <linux/irqdomain.h> 30 31#include <linux/regulator/machine.h> 32 33#include <linux/i2c.h> 34#include <linux/mfd/twl.h> 35 36/* Register descriptions for audio */ 37#include <linux/mfd/twl4030-audio.h> 38 39#include "twl-core.h" 40 41/* 42 * The TWL4030 "Triton 2" is one of a family of a multi-function "Power 43 * Management and System Companion Device" chips originally designed for 44 * use in OMAP2 and OMAP 3 based systems. Its control interfaces use I2C, 45 * often at around 3 Mbit/sec, including for interrupt handling. 46 * 47 * This driver core provides genirq support for the interrupts emitted, 48 * by the various modules, and exports register access primitives. 49 * 50 * FIXME this driver currently requires use of the first interrupt line 51 * (and associated registers). 52 */ 53 54#define DRIVER_NAME "twl" 55 56/* Triton Core internal information (BEGIN) */ 57 58/* Base Address defns for twl4030_map[] */ 59 60/* subchip/slave 0 - USB ID */ 61#define TWL4030_BASEADD_USB 0x0000 62 63/* subchip/slave 1 - AUD ID */ 64#define TWL4030_BASEADD_AUDIO_VOICE 0x0000 65#define TWL4030_BASEADD_GPIO 0x0098 66#define TWL4030_BASEADD_INTBR 0x0085 67#define TWL4030_BASEADD_PIH 0x0080 68#define TWL4030_BASEADD_TEST 0x004C 69 70/* subchip/slave 2 - AUX ID */ 71#define TWL4030_BASEADD_INTERRUPTS 0x00B9 72#define TWL4030_BASEADD_LED 0x00EE 73#define TWL4030_BASEADD_MADC 0x0000 74#define TWL4030_BASEADD_MAIN_CHARGE 0x0074 75#define TWL4030_BASEADD_PRECHARGE 0x00AA 76#define TWL4030_BASEADD_PWM 0x00F8 77#define TWL4030_BASEADD_KEYPAD 0x00D2 78 79#define TWL5031_BASEADD_ACCESSORY 0x0074 /* Replaces Main Charge */ 80#define TWL5031_BASEADD_INTERRUPTS 0x00B9 /* Different than TWL4030's 81 one */ 82 83/* subchip/slave 3 - POWER ID */ 84#define TWL4030_BASEADD_BACKUP 0x0014 85#define TWL4030_BASEADD_INT 0x002E 86#define TWL4030_BASEADD_PM_MASTER 0x0036 87 88#define TWL4030_BASEADD_PM_RECEIVER 0x005B 89#define TWL4030_DCDC_GLOBAL_CFG 0x06 90#define SMARTREFLEX_ENABLE BIT(3) 91 92#define TWL4030_BASEADD_RTC 0x001C 93#define TWL4030_BASEADD_SECURED_REG 0x0000 94 95/* Triton Core internal information (END) */ 96 97 98/* subchip/slave 0 0x48 - POWER */ 99#define TWL6030_BASEADD_RTC 0x0000 100#define TWL6030_BASEADD_SECURED_REG 0x0017 101#define TWL6030_BASEADD_PM_MASTER 0x001F 102#define TWL6030_BASEADD_PM_SLAVE_MISC 0x0030 /* PM_RECEIVER */ 103#define TWL6030_BASEADD_PM_MISC 0x00E2 104#define TWL6030_BASEADD_PM_PUPD 0x00F0 105 106/* subchip/slave 1 0x49 - FEATURE */ 107#define TWL6030_BASEADD_USB 0x0000 108#define TWL6030_BASEADD_GPADC_CTRL 0x002E 109#define TWL6030_BASEADD_AUX 0x0090 110#define TWL6030_BASEADD_PWM 0x00BA 111#define TWL6030_BASEADD_GASGAUGE 0x00C0 112#define TWL6030_BASEADD_PIH 0x00D0 113#define TWL6030_BASEADD_CHARGER 0x00E0 114#define TWL6032_BASEADD_CHARGER 0x00DA 115#define TWL6030_BASEADD_LED 0x00F4 116 117/* subchip/slave 2 0x4A - DFT */ 118#define TWL6030_BASEADD_DIEID 0x00C0 119 120/* subchip/slave 3 0x4B - AUDIO */ 121#define TWL6030_BASEADD_AUDIO 0x0000 122#define TWL6030_BASEADD_RSV 0x0000 123#define TWL6030_BASEADD_ZERO 0x0000 124 125/* Few power values */ 126#define R_CFG_BOOT 0x05 127 128/* some fields in R_CFG_BOOT */ 129#define HFCLK_FREQ_19p2_MHZ (1 << 0) 130#define HFCLK_FREQ_26_MHZ (2 << 0) 131#define HFCLK_FREQ_38p4_MHZ (3 << 0) 132#define HIGH_PERF_SQ (1 << 3) 133#define CK32K_LOWPWR_EN (1 << 7) 134 135/*----------------------------------------------------------------------*/ 136 137/* Structure for each TWL4030/TWL6030 Slave */ 138struct twl_client { 139 struct i2c_client *client; 140 struct regmap *regmap; 141}; 142 143/* mapping the module id to slave id and base address */ 144struct twl_mapping { 145 unsigned char sid; /* Slave ID */ 146 unsigned char base; /* base address */ 147}; 148 149struct twl_private { 150 bool ready; /* The core driver is ready to be used */ 151 u32 twl_idcode; /* TWL IDCODE Register value */ 152 unsigned int twl_id; 153 154 struct twl_mapping *twl_map; 155 struct twl_client *twl_modules; 156}; 157 158static struct twl_private *twl_priv; 159 160static struct twl_mapping twl4030_map[] = { 161 /* 162 * NOTE: don't change this table without updating the 163 * <linux/mfd/twl.h> defines for TWL4030_MODULE_* 164 * so they continue to match the order in this table. 165 */ 166 167 /* Common IPs */ 168 { 0, TWL4030_BASEADD_USB }, 169 { 1, TWL4030_BASEADD_PIH }, 170 { 2, TWL4030_BASEADD_MAIN_CHARGE }, 171 { 3, TWL4030_BASEADD_PM_MASTER }, 172 { 3, TWL4030_BASEADD_PM_RECEIVER }, 173 174 { 3, TWL4030_BASEADD_RTC }, 175 { 2, TWL4030_BASEADD_PWM }, 176 { 2, TWL4030_BASEADD_LED }, 177 { 3, TWL4030_BASEADD_SECURED_REG }, 178 179 /* TWL4030 specific IPs */ 180 { 1, TWL4030_BASEADD_AUDIO_VOICE }, 181 { 1, TWL4030_BASEADD_GPIO }, 182 { 1, TWL4030_BASEADD_INTBR }, 183 { 1, TWL4030_BASEADD_TEST }, 184 { 2, TWL4030_BASEADD_KEYPAD }, 185 186 { 2, TWL4030_BASEADD_MADC }, 187 { 2, TWL4030_BASEADD_INTERRUPTS }, 188 { 2, TWL4030_BASEADD_PRECHARGE }, 189 { 3, TWL4030_BASEADD_BACKUP }, 190 { 3, TWL4030_BASEADD_INT }, 191 192 { 2, TWL5031_BASEADD_ACCESSORY }, 193 { 2, TWL5031_BASEADD_INTERRUPTS }, 194}; 195 196static const struct reg_default twl4030_49_defaults[] = { 197 /* Audio Registers */ 198 { 0x01, 0x00}, /* CODEC_MODE */ 199 { 0x02, 0x00}, /* OPTION */ 200 /* 0x03 Unused */ 201 { 0x04, 0x00}, /* MICBIAS_CTL */ 202 { 0x05, 0x00}, /* ANAMICL */ 203 { 0x06, 0x00}, /* ANAMICR */ 204 { 0x07, 0x00}, /* AVADC_CTL */ 205 { 0x08, 0x00}, /* ADCMICSEL */ 206 { 0x09, 0x00}, /* DIGMIXING */ 207 { 0x0a, 0x0f}, /* ATXL1PGA */ 208 { 0x0b, 0x0f}, /* ATXR1PGA */ 209 { 0x0c, 0x0f}, /* AVTXL2PGA */ 210 { 0x0d, 0x0f}, /* AVTXR2PGA */ 211 { 0x0e, 0x00}, /* AUDIO_IF */ 212 { 0x0f, 0x00}, /* VOICE_IF */ 213 { 0x10, 0x3f}, /* ARXR1PGA */ 214 { 0x11, 0x3f}, /* ARXL1PGA */ 215 { 0x12, 0x3f}, /* ARXR2PGA */ 216 { 0x13, 0x3f}, /* ARXL2PGA */ 217 { 0x14, 0x25}, /* VRXPGA */ 218 { 0x15, 0x00}, /* VSTPGA */ 219 { 0x16, 0x00}, /* VRX2ARXPGA */ 220 { 0x17, 0x00}, /* AVDAC_CTL */ 221 { 0x18, 0x00}, /* ARX2VTXPGA */ 222 { 0x19, 0x32}, /* ARXL1_APGA_CTL*/ 223 { 0x1a, 0x32}, /* ARXR1_APGA_CTL*/ 224 { 0x1b, 0x32}, /* ARXL2_APGA_CTL*/ 225 { 0x1c, 0x32}, /* ARXR2_APGA_CTL*/ 226 { 0x1d, 0x00}, /* ATX2ARXPGA */ 227 { 0x1e, 0x00}, /* BT_IF */ 228 { 0x1f, 0x55}, /* BTPGA */ 229 { 0x20, 0x00}, /* BTSTPGA */ 230 { 0x21, 0x00}, /* EAR_CTL */ 231 { 0x22, 0x00}, /* HS_SEL */ 232 { 0x23, 0x00}, /* HS_GAIN_SET */ 233 { 0x24, 0x00}, /* HS_POPN_SET */ 234 { 0x25, 0x00}, /* PREDL_CTL */ 235 { 0x26, 0x00}, /* PREDR_CTL */ 236 { 0x27, 0x00}, /* PRECKL_CTL */ 237 { 0x28, 0x00}, /* PRECKR_CTL */ 238 { 0x29, 0x00}, /* HFL_CTL */ 239 { 0x2a, 0x00}, /* HFR_CTL */ 240 { 0x2b, 0x05}, /* ALC_CTL */ 241 { 0x2c, 0x00}, /* ALC_SET1 */ 242 { 0x2d, 0x00}, /* ALC_SET2 */ 243 { 0x2e, 0x00}, /* BOOST_CTL */ 244 { 0x2f, 0x00}, /* SOFTVOL_CTL */ 245 { 0x30, 0x13}, /* DTMF_FREQSEL */ 246 { 0x31, 0x00}, /* DTMF_TONEXT1H */ 247 { 0x32, 0x00}, /* DTMF_TONEXT1L */ 248 { 0x33, 0x00}, /* DTMF_TONEXT2H */ 249 { 0x34, 0x00}, /* DTMF_TONEXT2L */ 250 { 0x35, 0x79}, /* DTMF_TONOFF */ 251 { 0x36, 0x11}, /* DTMF_WANONOFF */ 252 { 0x37, 0x00}, /* I2S_RX_SCRAMBLE_H */ 253 { 0x38, 0x00}, /* I2S_RX_SCRAMBLE_M */ 254 { 0x39, 0x00}, /* I2S_RX_SCRAMBLE_L */ 255 { 0x3a, 0x06}, /* APLL_CTL */ 256 { 0x3b, 0x00}, /* DTMF_CTL */ 257 { 0x3c, 0x44}, /* DTMF_PGA_CTL2 (0x3C) */ 258 { 0x3d, 0x69}, /* DTMF_PGA_CTL1 (0x3D) */ 259 { 0x3e, 0x00}, /* MISC_SET_1 */ 260 { 0x3f, 0x00}, /* PCMBTMUX */ 261 /* 0x40 - 0x42 Unused */ 262 { 0x43, 0x00}, /* RX_PATH_SEL */ 263 { 0x44, 0x32}, /* VDL_APGA_CTL */ 264 { 0x45, 0x00}, /* VIBRA_CTL */ 265 { 0x46, 0x00}, /* VIBRA_SET */ 266 { 0x47, 0x00}, /* VIBRA_PWM_SET */ 267 { 0x48, 0x00}, /* ANAMIC_GAIN */ 268 { 0x49, 0x00}, /* MISC_SET_2 */ 269 /* End of Audio Registers */ 270}; 271 272static bool twl4030_49_nop_reg(struct device *dev, unsigned int reg) 273{ 274 switch (reg) { 275 case 0x00: 276 case 0x03: 277 case 0x40: 278 case 0x41: 279 case 0x42: 280 return false; 281 default: 282 return true; 283 } 284} 285 286static const struct regmap_range twl4030_49_volatile_ranges[] = { 287 regmap_reg_range(TWL4030_BASEADD_TEST, 0xff), 288}; 289 290static const struct regmap_access_table twl4030_49_volatile_table = { 291 .yes_ranges = twl4030_49_volatile_ranges, 292 .n_yes_ranges = ARRAY_SIZE(twl4030_49_volatile_ranges), 293}; 294 295static const struct regmap_config twl4030_regmap_config[4] = { 296 { 297 /* Address 0x48 */ 298 .reg_bits = 8, 299 .val_bits = 8, 300 .max_register = 0xff, 301 }, 302 { 303 /* Address 0x49 */ 304 .reg_bits = 8, 305 .val_bits = 8, 306 .max_register = 0xff, 307 308 .readable_reg = twl4030_49_nop_reg, 309 .writeable_reg = twl4030_49_nop_reg, 310 311 .volatile_table = &twl4030_49_volatile_table, 312 313 .reg_defaults = twl4030_49_defaults, 314 .num_reg_defaults = ARRAY_SIZE(twl4030_49_defaults), 315 .cache_type = REGCACHE_RBTREE, 316 }, 317 { 318 /* Address 0x4a */ 319 .reg_bits = 8, 320 .val_bits = 8, 321 .max_register = 0xff, 322 }, 323 { 324 /* Address 0x4b */ 325 .reg_bits = 8, 326 .val_bits = 8, 327 .max_register = 0xff, 328 }, 329}; 330 331static struct twl_mapping twl6030_map[] = { 332 /* 333 * NOTE: don't change this table without updating the 334 * <linux/mfd/twl.h> defines for TWL4030_MODULE_* 335 * so they continue to match the order in this table. 336 */ 337 338 /* Common IPs */ 339 { 1, TWL6030_BASEADD_USB }, 340 { 1, TWL6030_BASEADD_PIH }, 341 { 1, TWL6030_BASEADD_CHARGER }, 342 { 0, TWL6030_BASEADD_PM_MASTER }, 343 { 0, TWL6030_BASEADD_PM_SLAVE_MISC }, 344 345 { 0, TWL6030_BASEADD_RTC }, 346 { 1, TWL6030_BASEADD_PWM }, 347 { 1, TWL6030_BASEADD_LED }, 348 { 0, TWL6030_BASEADD_SECURED_REG }, 349 350 /* TWL6030 specific IPs */ 351 { 0, TWL6030_BASEADD_ZERO }, 352 { 1, TWL6030_BASEADD_ZERO }, 353 { 2, TWL6030_BASEADD_ZERO }, 354 { 1, TWL6030_BASEADD_GPADC_CTRL }, 355 { 1, TWL6030_BASEADD_GASGAUGE }, 356}; 357 358static const struct regmap_config twl6030_regmap_config[3] = { 359 { 360 /* Address 0x48 */ 361 .reg_bits = 8, 362 .val_bits = 8, 363 .max_register = 0xff, 364 }, 365 { 366 /* Address 0x49 */ 367 .reg_bits = 8, 368 .val_bits = 8, 369 .max_register = 0xff, 370 }, 371 { 372 /* Address 0x4a */ 373 .reg_bits = 8, 374 .val_bits = 8, 375 .max_register = 0xff, 376 }, 377}; 378 379/*----------------------------------------------------------------------*/ 380 381static inline int twl_get_num_slaves(void) 382{ 383 if (twl_class_is_4030()) 384 return 4; /* TWL4030 class have four slave address */ 385 else 386 return 3; /* TWL6030 class have three slave address */ 387} 388 389static inline int twl_get_last_module(void) 390{ 391 if (twl_class_is_4030()) 392 return TWL4030_MODULE_LAST; 393 else 394 return TWL6030_MODULE_LAST; 395} 396 397/* Exported Functions */ 398 399unsigned int twl_rev(void) 400{ 401 return twl_priv ? twl_priv->twl_id : 0; 402} 403EXPORT_SYMBOL(twl_rev); 404 405/** 406 * twl_get_regmap - Get the regmap associated with the given module 407 * @mod_no: module number 408 * 409 * Returns the regmap pointer or NULL in case of failure. 410 */ 411static struct regmap *twl_get_regmap(u8 mod_no) 412{ 413 int sid; 414 struct twl_client *twl; 415 416 if (unlikely(!twl_priv || !twl_priv->ready)) { 417 pr_err("%s: not initialized\n", DRIVER_NAME); 418 return NULL; 419 } 420 if (unlikely(mod_no >= twl_get_last_module())) { 421 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no); 422 return NULL; 423 } 424 425 sid = twl_priv->twl_map[mod_no].sid; 426 twl = &twl_priv->twl_modules[sid]; 427 428 return twl->regmap; 429} 430 431/** 432 * twl_i2c_write - Writes a n bit register in TWL4030/TWL5030/TWL60X0 433 * @mod_no: module number 434 * @value: an array of num_bytes+1 containing data to write 435 * @reg: register address (just offset will do) 436 * @num_bytes: number of bytes to transfer 437 * 438 * Returns 0 on success or else a negative error code. 439 */ 440int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes) 441{ 442 struct regmap *regmap = twl_get_regmap(mod_no); 443 int ret; 444 445 if (!regmap) 446 return -EPERM; 447 448 ret = regmap_bulk_write(regmap, twl_priv->twl_map[mod_no].base + reg, 449 value, num_bytes); 450 451 if (ret) 452 pr_err("%s: Write failed (mod %d, reg 0x%02x count %d)\n", 453 DRIVER_NAME, mod_no, reg, num_bytes); 454 455 return ret; 456} 457EXPORT_SYMBOL(twl_i2c_write); 458 459/** 460 * twl_i2c_read - Reads a n bit register in TWL4030/TWL5030/TWL60X0 461 * @mod_no: module number 462 * @value: an array of num_bytes containing data to be read 463 * @reg: register address (just offset will do) 464 * @num_bytes: number of bytes to transfer 465 * 466 * Returns 0 on success or else a negative error code. 467 */ 468int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes) 469{ 470 struct regmap *regmap = twl_get_regmap(mod_no); 471 int ret; 472 473 if (!regmap) 474 return -EPERM; 475 476 ret = regmap_bulk_read(regmap, twl_priv->twl_map[mod_no].base + reg, 477 value, num_bytes); 478 479 if (ret) 480 pr_err("%s: Read failed (mod %d, reg 0x%02x count %d)\n", 481 DRIVER_NAME, mod_no, reg, num_bytes); 482 483 return ret; 484} 485EXPORT_SYMBOL(twl_i2c_read); 486 487/** 488 * twl_regcache_bypass - Configure the regcache bypass for the regmap associated 489 * with the module 490 * @mod_no: module number 491 * @enable: Regcache bypass state 492 * 493 * Returns 0 else failure. 494 */ 495int twl_set_regcache_bypass(u8 mod_no, bool enable) 496{ 497 struct regmap *regmap = twl_get_regmap(mod_no); 498 499 if (!regmap) 500 return -EPERM; 501 502 regcache_cache_bypass(regmap, enable); 503 504 return 0; 505} 506EXPORT_SYMBOL(twl_set_regcache_bypass); 507 508/*----------------------------------------------------------------------*/ 509 510/** 511 * twl_read_idcode_register - API to read the IDCODE register. 512 * 513 * Unlocks the IDCODE register and read the 32 bit value. 514 */ 515static int twl_read_idcode_register(void) 516{ 517 int err; 518 519 err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, TWL_EEPROM_R_UNLOCK, 520 REG_UNLOCK_TEST_REG); 521 if (err) { 522 pr_err("TWL4030 Unable to unlock IDCODE registers -%d\n", err); 523 goto fail; 524 } 525 526 err = twl_i2c_read(TWL4030_MODULE_INTBR, (u8 *)(&twl_priv->twl_idcode), 527 REG_IDCODE_7_0, 4); 528 if (err) { 529 pr_err("TWL4030: unable to read IDCODE -%d\n", err); 530 goto fail; 531 } 532 533 err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, 0x0, REG_UNLOCK_TEST_REG); 534 if (err) 535 pr_err("TWL4030 Unable to relock IDCODE registers -%d\n", err); 536fail: 537 return err; 538} 539 540/** 541 * twl_get_type - API to get TWL Si type. 542 * 543 * Api to get the TWL Si type from IDCODE value. 544 */ 545int twl_get_type(void) 546{ 547 return TWL_SIL_TYPE(twl_priv->twl_idcode); 548} 549EXPORT_SYMBOL_GPL(twl_get_type); 550 551/** 552 * twl_get_version - API to get TWL Si version. 553 * 554 * Api to get the TWL Si version from IDCODE value. 555 */ 556int twl_get_version(void) 557{ 558 return TWL_SIL_REV(twl_priv->twl_idcode); 559} 560EXPORT_SYMBOL_GPL(twl_get_version); 561 562/** 563 * twl_get_hfclk_rate - API to get TWL external HFCLK clock rate. 564 * 565 * Api to get the TWL HFCLK rate based on BOOT_CFG register. 566 */ 567int twl_get_hfclk_rate(void) 568{ 569 u8 ctrl; 570 int rate; 571 572 twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &ctrl, R_CFG_BOOT); 573 574 switch (ctrl & 0x3) { 575 case HFCLK_FREQ_19p2_MHZ: 576 rate = 19200000; 577 break; 578 case HFCLK_FREQ_26_MHZ: 579 rate = 26000000; 580 break; 581 case HFCLK_FREQ_38p4_MHZ: 582 rate = 38400000; 583 break; 584 default: 585 pr_err("TWL4030: HFCLK is not configured\n"); 586 rate = -EINVAL; 587 break; 588 } 589 590 return rate; 591} 592EXPORT_SYMBOL_GPL(twl_get_hfclk_rate); 593 594static struct device * 595add_numbered_child(unsigned mod_no, const char *name, int num, 596 void *pdata, unsigned pdata_len, 597 bool can_wakeup, int irq0, int irq1) 598{ 599 struct platform_device *pdev; 600 struct twl_client *twl; 601 int status, sid; 602 603 if (unlikely(mod_no >= twl_get_last_module())) { 604 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no); 605 return ERR_PTR(-EPERM); 606 } 607 sid = twl_priv->twl_map[mod_no].sid; 608 twl = &twl_priv->twl_modules[sid]; 609 610 pdev = platform_device_alloc(name, num); 611 if (!pdev) 612 return ERR_PTR(-ENOMEM); 613 614 pdev->dev.parent = &twl->client->dev; 615 616 if (pdata) { 617 status = platform_device_add_data(pdev, pdata, pdata_len); 618 if (status < 0) { 619 dev_dbg(&pdev->dev, "can't add platform_data\n"); 620 goto put_device; 621 } 622 } 623 624 if (irq0) { 625 struct resource r[2] = { 626 { .start = irq0, .flags = IORESOURCE_IRQ, }, 627 { .start = irq1, .flags = IORESOURCE_IRQ, }, 628 }; 629 630 status = platform_device_add_resources(pdev, r, irq1 ? 2 : 1); 631 if (status < 0) { 632 dev_dbg(&pdev->dev, "can't add irqs\n"); 633 goto put_device; 634 } 635 } 636 637 status = platform_device_add(pdev); 638 if (status) 639 goto put_device; 640 641 device_init_wakeup(&pdev->dev, can_wakeup); 642 643 return &pdev->dev; 644 645put_device: 646 platform_device_put(pdev); 647 dev_err(&twl->client->dev, "failed to add device %s\n", name); 648 return ERR_PTR(status); 649} 650 651static inline struct device *add_child(unsigned mod_no, const char *name, 652 void *pdata, unsigned pdata_len, 653 bool can_wakeup, int irq0, int irq1) 654{ 655 return add_numbered_child(mod_no, name, -1, pdata, pdata_len, 656 can_wakeup, irq0, irq1); 657} 658 659static struct device * 660add_regulator_linked(int num, struct regulator_init_data *pdata, 661 struct regulator_consumer_supply *consumers, 662 unsigned num_consumers, unsigned long features) 663{ 664 struct twl_regulator_driver_data drv_data; 665 666 /* regulator framework demands init_data ... */ 667 if (!pdata) 668 return NULL; 669 670 if (consumers) { 671 pdata->consumer_supplies = consumers; 672 pdata->num_consumer_supplies = num_consumers; 673 } 674 675 if (pdata->driver_data) { 676 /* If we have existing drv_data, just add the flags */ 677 struct twl_regulator_driver_data *tmp; 678 tmp = pdata->driver_data; 679 tmp->features |= features; 680 } else { 681 /* add new driver data struct, used only during init */ 682 drv_data.features = features; 683 drv_data.set_voltage = NULL; 684 drv_data.get_voltage = NULL; 685 drv_data.data = NULL; 686 pdata->driver_data = &drv_data; 687 } 688 689 /* NOTE: we currently ignore regulator IRQs, e.g. for short circuits */ 690 return add_numbered_child(TWL_MODULE_PM_MASTER, "twl_reg", num, 691 pdata, sizeof(*pdata), false, 0, 0); 692} 693 694static struct device * 695add_regulator(int num, struct regulator_init_data *pdata, 696 unsigned long features) 697{ 698 return add_regulator_linked(num, pdata, NULL, 0, features); 699} 700 701/* 702 * NOTE: We know the first 8 IRQs after pdata->base_irq are 703 * for the PIH, and the next are for the PWR_INT SIH, since 704 * that's how twl_init_irq() sets things up. 705 */ 706 707static int 708add_children(struct twl4030_platform_data *pdata, unsigned irq_base, 709 unsigned long features) 710{ 711 struct device *child; 712 713 if (IS_ENABLED(CONFIG_GPIO_TWL4030) && pdata->gpio) { 714 child = add_child(TWL4030_MODULE_GPIO, "twl4030_gpio", 715 pdata->gpio, sizeof(*pdata->gpio), 716 false, irq_base + GPIO_INTR_OFFSET, 0); 717 if (IS_ERR(child)) 718 return PTR_ERR(child); 719 } 720 721 if (IS_ENABLED(CONFIG_KEYBOARD_TWL4030) && pdata->keypad) { 722 child = add_child(TWL4030_MODULE_KEYPAD, "twl4030_keypad", 723 pdata->keypad, sizeof(*pdata->keypad), 724 true, irq_base + KEYPAD_INTR_OFFSET, 0); 725 if (IS_ERR(child)) 726 return PTR_ERR(child); 727 } 728 729 if (IS_ENABLED(CONFIG_TWL4030_MADC) && pdata->madc && 730 twl_class_is_4030()) { 731 child = add_child(TWL4030_MODULE_MADC, "twl4030_madc", 732 pdata->madc, sizeof(*pdata->madc), 733 true, irq_base + MADC_INTR_OFFSET, 0); 734 if (IS_ERR(child)) 735 return PTR_ERR(child); 736 } 737 738 if (IS_ENABLED(CONFIG_RTC_DRV_TWL4030)) { 739 /* 740 * REVISIT platform_data here currently might expose the 741 * "msecure" line ... but for now we just expect board 742 * setup to tell the chip "it's always ok to SET_TIME". 743 * Eventually, Linux might become more aware of such 744 * HW security concerns, and "least privilege". 745 */ 746 child = add_child(TWL_MODULE_RTC, "twl_rtc", NULL, 0, 747 true, irq_base + RTC_INTR_OFFSET, 0); 748 if (IS_ERR(child)) 749 return PTR_ERR(child); 750 } 751 752 if (IS_ENABLED(CONFIG_PWM_TWL)) { 753 child = add_child(TWL_MODULE_PWM, "twl-pwm", NULL, 0, 754 false, 0, 0); 755 if (IS_ERR(child)) 756 return PTR_ERR(child); 757 } 758 759 if (IS_ENABLED(CONFIG_PWM_TWL_LED)) { 760 child = add_child(TWL_MODULE_LED, "twl-pwmled", NULL, 0, 761 false, 0, 0); 762 if (IS_ERR(child)) 763 return PTR_ERR(child); 764 } 765 766 if (IS_ENABLED(CONFIG_TWL4030_USB) && pdata->usb && 767 twl_class_is_4030()) { 768 769 static struct regulator_consumer_supply usb1v5 = { 770 .supply = "usb1v5", 771 }; 772 static struct regulator_consumer_supply usb1v8 = { 773 .supply = "usb1v8", 774 }; 775 static struct regulator_consumer_supply usb3v1 = { 776 .supply = "usb3v1", 777 }; 778 779 /* First add the regulators so that they can be used by transceiver */ 780 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030)) { 781 /* this is a template that gets copied */ 782 struct regulator_init_data usb_fixed = { 783 .constraints.valid_modes_mask = 784 REGULATOR_MODE_NORMAL 785 | REGULATOR_MODE_STANDBY, 786 .constraints.valid_ops_mask = 787 REGULATOR_CHANGE_MODE 788 | REGULATOR_CHANGE_STATUS, 789 }; 790 791 child = add_regulator_linked(TWL4030_REG_VUSB1V5, 792 &usb_fixed, &usb1v5, 1, 793 features); 794 if (IS_ERR(child)) 795 return PTR_ERR(child); 796 797 child = add_regulator_linked(TWL4030_REG_VUSB1V8, 798 &usb_fixed, &usb1v8, 1, 799 features); 800 if (IS_ERR(child)) 801 return PTR_ERR(child); 802 803 child = add_regulator_linked(TWL4030_REG_VUSB3V1, 804 &usb_fixed, &usb3v1, 1, 805 features); 806 if (IS_ERR(child)) 807 return PTR_ERR(child); 808 809 } 810 811 child = add_child(TWL_MODULE_USB, "twl4030_usb", 812 pdata->usb, sizeof(*pdata->usb), true, 813 /* irq0 = USB_PRES, irq1 = USB */ 814 irq_base + USB_PRES_INTR_OFFSET, 815 irq_base + USB_INTR_OFFSET); 816 817 if (IS_ERR(child)) 818 return PTR_ERR(child); 819 820 /* we need to connect regulators to this transceiver */ 821 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && child) { 822 usb1v5.dev_name = dev_name(child); 823 usb1v8.dev_name = dev_name(child); 824 usb3v1.dev_name = dev_name(child); 825 } 826 } 827 828 if (IS_ENABLED(CONFIG_TWL4030_WATCHDOG) && twl_class_is_4030()) { 829 child = add_child(TWL_MODULE_PM_RECEIVER, "twl4030_wdt", NULL, 830 0, false, 0, 0); 831 if (IS_ERR(child)) 832 return PTR_ERR(child); 833 } 834 835 if (IS_ENABLED(CONFIG_INPUT_TWL4030_PWRBUTTON) && twl_class_is_4030()) { 836 child = add_child(TWL_MODULE_PM_MASTER, "twl4030_pwrbutton", 837 NULL, 0, true, irq_base + 8 + 0, 0); 838 if (IS_ERR(child)) 839 return PTR_ERR(child); 840 } 841 842 if (IS_ENABLED(CONFIG_MFD_TWL4030_AUDIO) && pdata->audio && 843 twl_class_is_4030()) { 844 child = add_child(TWL4030_MODULE_AUDIO_VOICE, "twl4030-audio", 845 pdata->audio, sizeof(*pdata->audio), 846 false, 0, 0); 847 if (IS_ERR(child)) 848 return PTR_ERR(child); 849 } 850 851 /* twl4030 regulators */ 852 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && twl_class_is_4030()) { 853 child = add_regulator(TWL4030_REG_VPLL1, pdata->vpll1, 854 features); 855 if (IS_ERR(child)) 856 return PTR_ERR(child); 857 858 child = add_regulator(TWL4030_REG_VIO, pdata->vio, 859 features); 860 if (IS_ERR(child)) 861 return PTR_ERR(child); 862 863 child = add_regulator(TWL4030_REG_VDD1, pdata->vdd1, 864 features); 865 if (IS_ERR(child)) 866 return PTR_ERR(child); 867 868 child = add_regulator(TWL4030_REG_VDD2, pdata->vdd2, 869 features); 870 if (IS_ERR(child)) 871 return PTR_ERR(child); 872 873 child = add_regulator(TWL4030_REG_VMMC1, pdata->vmmc1, 874 features); 875 if (IS_ERR(child)) 876 return PTR_ERR(child); 877 878 child = add_regulator(TWL4030_REG_VDAC, pdata->vdac, 879 features); 880 if (IS_ERR(child)) 881 return PTR_ERR(child); 882 883 child = add_regulator((features & TWL4030_VAUX2) 884 ? TWL4030_REG_VAUX2_4030 885 : TWL4030_REG_VAUX2, 886 pdata->vaux2, features); 887 if (IS_ERR(child)) 888 return PTR_ERR(child); 889 890 child = add_regulator(TWL4030_REG_VINTANA1, pdata->vintana1, 891 features); 892 if (IS_ERR(child)) 893 return PTR_ERR(child); 894 895 child = add_regulator(TWL4030_REG_VINTANA2, pdata->vintana2, 896 features); 897 if (IS_ERR(child)) 898 return PTR_ERR(child); 899 900 child = add_regulator(TWL4030_REG_VINTDIG, pdata->vintdig, 901 features); 902 if (IS_ERR(child)) 903 return PTR_ERR(child); 904 } 905 906 /* maybe add LDOs that are omitted on cost-reduced parts */ 907 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && !(features & TPS_SUBSET) 908 && twl_class_is_4030()) { 909 child = add_regulator(TWL4030_REG_VPLL2, pdata->vpll2, 910 features); 911 if (IS_ERR(child)) 912 return PTR_ERR(child); 913 914 child = add_regulator(TWL4030_REG_VMMC2, pdata->vmmc2, 915 features); 916 if (IS_ERR(child)) 917 return PTR_ERR(child); 918 919 child = add_regulator(TWL4030_REG_VSIM, pdata->vsim, 920 features); 921 if (IS_ERR(child)) 922 return PTR_ERR(child); 923 924 child = add_regulator(TWL4030_REG_VAUX1, pdata->vaux1, 925 features); 926 if (IS_ERR(child)) 927 return PTR_ERR(child); 928 929 child = add_regulator(TWL4030_REG_VAUX3, pdata->vaux3, 930 features); 931 if (IS_ERR(child)) 932 return PTR_ERR(child); 933 934 child = add_regulator(TWL4030_REG_VAUX4, pdata->vaux4, 935 features); 936 if (IS_ERR(child)) 937 return PTR_ERR(child); 938 } 939 940 if (IS_ENABLED(CONFIG_CHARGER_TWL4030) && pdata->bci && 941 !(features & (TPS_SUBSET | TWL5031))) { 942 child = add_child(TWL_MODULE_MAIN_CHARGE, "twl4030_bci", 943 pdata->bci, sizeof(*pdata->bci), false, 944 /* irq0 = CHG_PRES, irq1 = BCI */ 945 irq_base + BCI_PRES_INTR_OFFSET, 946 irq_base + BCI_INTR_OFFSET); 947 if (IS_ERR(child)) 948 return PTR_ERR(child); 949 } 950 951 if (IS_ENABLED(CONFIG_TWL4030_POWER) && pdata->power) { 952 child = add_child(TWL_MODULE_PM_MASTER, "twl4030_power", 953 pdata->power, sizeof(*pdata->power), false, 954 0, 0); 955 if (IS_ERR(child)) 956 return PTR_ERR(child); 957 } 958 959 return 0; 960} 961 962/*----------------------------------------------------------------------*/ 963 964/* 965 * These three functions initialize the on-chip clock framework, 966 * letting it generate the right frequencies for USB, MADC, and 967 * other purposes. 968 */ 969static inline int protect_pm_master(void) 970{ 971 int e = 0; 972 973 e = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0, 974 TWL4030_PM_MASTER_PROTECT_KEY); 975 return e; 976} 977 978static inline int unprotect_pm_master(void) 979{ 980 int e = 0; 981 982 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1, 983 TWL4030_PM_MASTER_PROTECT_KEY); 984 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2, 985 TWL4030_PM_MASTER_PROTECT_KEY); 986 987 return e; 988} 989 990static void clocks_init(struct device *dev, 991 struct twl4030_clock_init_data *clock) 992{ 993 int e = 0; 994 struct clk *osc; 995 u32 rate; 996 u8 ctrl = HFCLK_FREQ_26_MHZ; 997 998 osc = clk_get(dev, "fck"); 999 if (IS_ERR(osc)) { 1000 printk(KERN_WARNING "Skipping twl internal clock init and " 1001 "using bootloader value (unknown osc rate)\n"); 1002 return; 1003 } 1004 1005 rate = clk_get_rate(osc); 1006 clk_put(osc); 1007 1008 switch (rate) { 1009 case 19200000: 1010 ctrl = HFCLK_FREQ_19p2_MHZ; 1011 break; 1012 case 26000000: 1013 ctrl = HFCLK_FREQ_26_MHZ; 1014 break; 1015 case 38400000: 1016 ctrl = HFCLK_FREQ_38p4_MHZ; 1017 break; 1018 } 1019 1020 ctrl |= HIGH_PERF_SQ; 1021 if (clock && clock->ck32k_lowpwr_enable) 1022 ctrl |= CK32K_LOWPWR_EN; 1023 1024 e |= unprotect_pm_master(); 1025 /* effect->MADC+USB ck en */ 1026 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, R_CFG_BOOT); 1027 e |= protect_pm_master(); 1028 1029 if (e < 0) 1030 pr_err("%s: clock init err [%d]\n", DRIVER_NAME, e); 1031} 1032 1033/*----------------------------------------------------------------------*/ 1034 1035 1036static int twl_remove(struct i2c_client *client) 1037{ 1038 unsigned i, num_slaves; 1039 int status; 1040 1041 if (twl_class_is_4030()) 1042 status = twl4030_exit_irq(); 1043 else 1044 status = twl6030_exit_irq(); 1045 1046 if (status < 0) 1047 return status; 1048 1049 num_slaves = twl_get_num_slaves(); 1050 for (i = 0; i < num_slaves; i++) { 1051 struct twl_client *twl = &twl_priv->twl_modules[i]; 1052 1053 if (twl->client && twl->client != client) 1054 i2c_unregister_device(twl->client); 1055 twl->client = NULL; 1056 } 1057 twl_priv->ready = false; 1058 return 0; 1059} 1060 1061static struct of_dev_auxdata twl_auxdata_lookup[] = { 1062 OF_DEV_AUXDATA("ti,twl4030-gpio", 0, "twl4030-gpio", NULL), 1063 { /* sentinel */ }, 1064}; 1065 1066/* NOTE: This driver only handles a single twl4030/tps659x0 chip */ 1067static int 1068twl_probe(struct i2c_client *client, const struct i2c_device_id *id) 1069{ 1070 struct twl4030_platform_data *pdata = dev_get_platdata(&client->dev); 1071 struct device_node *node = client->dev.of_node; 1072 struct platform_device *pdev; 1073 const struct regmap_config *twl_regmap_config; 1074 int irq_base = 0; 1075 int status; 1076 unsigned i, num_slaves; 1077 1078 if (!node && !pdata) { 1079 dev_err(&client->dev, "no platform data\n"); 1080 return -EINVAL; 1081 } 1082 1083 if (twl_priv) { 1084 dev_dbg(&client->dev, "only one instance of %s allowed\n", 1085 DRIVER_NAME); 1086 return -EBUSY; 1087 } 1088 1089 pdev = platform_device_alloc(DRIVER_NAME, -1); 1090 if (!pdev) { 1091 dev_err(&client->dev, "can't alloc pdev\n"); 1092 return -ENOMEM; 1093 } 1094 1095 status = platform_device_add(pdev); 1096 if (status) { 1097 platform_device_put(pdev); 1098 return status; 1099 } 1100 1101 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) { 1102 dev_dbg(&client->dev, "can't talk I2C?\n"); 1103 status = -EIO; 1104 goto free; 1105 } 1106 1107 twl_priv = devm_kzalloc(&client->dev, sizeof(struct twl_private), 1108 GFP_KERNEL); 1109 if (!twl_priv) { 1110 status = -ENOMEM; 1111 goto free; 1112 } 1113 1114 if ((id->driver_data) & TWL6030_CLASS) { 1115 twl_priv->twl_id = TWL6030_CLASS_ID; 1116 twl_priv->twl_map = &twl6030_map[0]; 1117 /* The charger base address is different in twl6032 */ 1118 if ((id->driver_data) & TWL6032_SUBCLASS) 1119 twl_priv->twl_map[TWL_MODULE_MAIN_CHARGE].base = 1120 TWL6032_BASEADD_CHARGER; 1121 twl_regmap_config = twl6030_regmap_config; 1122 } else { 1123 twl_priv->twl_id = TWL4030_CLASS_ID; 1124 twl_priv->twl_map = &twl4030_map[0]; 1125 twl_regmap_config = twl4030_regmap_config; 1126 } 1127 1128 num_slaves = twl_get_num_slaves(); 1129 twl_priv->twl_modules = devm_kcalloc(&client->dev, 1130 num_slaves, 1131 sizeof(struct twl_client), 1132 GFP_KERNEL); 1133 if (!twl_priv->twl_modules) { 1134 status = -ENOMEM; 1135 goto free; 1136 } 1137 1138 for (i = 0; i < num_slaves; i++) { 1139 struct twl_client *twl = &twl_priv->twl_modules[i]; 1140 1141 if (i == 0) { 1142 twl->client = client; 1143 } else { 1144 twl->client = i2c_new_dummy_device(client->adapter, 1145 client->addr + i); 1146 if (IS_ERR(twl->client)) { 1147 dev_err(&client->dev, 1148 "can't attach client %d\n", i); 1149 status = PTR_ERR(twl->client); 1150 goto fail; 1151 } 1152 } 1153 1154 twl->regmap = devm_regmap_init_i2c(twl->client, 1155 &twl_regmap_config[i]); 1156 if (IS_ERR(twl->regmap)) { 1157 status = PTR_ERR(twl->regmap); 1158 dev_err(&client->dev, 1159 "Failed to allocate regmap %d, err: %d\n", i, 1160 status); 1161 goto fail; 1162 } 1163 } 1164 1165 twl_priv->ready = true; 1166 1167 /* setup clock framework */ 1168 clocks_init(&client->dev, pdata ? pdata->clock : NULL); 1169 1170 /* read TWL IDCODE Register */ 1171 if (twl_class_is_4030()) { 1172 status = twl_read_idcode_register(); 1173 WARN(status < 0, "Error: reading twl_idcode register value\n"); 1174 } 1175 1176 /* Maybe init the T2 Interrupt subsystem */ 1177 if (client->irq) { 1178 if (twl_class_is_4030()) { 1179 twl4030_init_chip_irq(id->name); 1180 irq_base = twl4030_init_irq(&client->dev, client->irq); 1181 } else { 1182 irq_base = twl6030_init_irq(&client->dev, client->irq); 1183 } 1184 1185 if (irq_base < 0) { 1186 status = irq_base; 1187 goto fail; 1188 } 1189 } 1190 1191 /* 1192 * Disable TWL4030/TWL5030 I2C Pull-up on I2C1 and I2C4(SR) interface. 1193 * Program I2C_SCL_CTRL_PU(bit 0)=0, I2C_SDA_CTRL_PU (bit 2)=0, 1194 * SR_I2C_SCL_CTRL_PU(bit 4)=0 and SR_I2C_SDA_CTRL_PU(bit 6)=0. 1195 * 1196 * Also, always enable SmartReflex bit as that's needed for omaps to 1197 * to do anything over I2C4 for voltage scaling even if SmartReflex 1198 * is disabled. Without the SmartReflex bit omap sys_clkreq idle 1199 * signal will never trigger for retention idle. 1200 */ 1201 if (twl_class_is_4030()) { 1202 u8 temp; 1203 1204 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &temp, REG_GPPUPDCTR1); 1205 temp &= ~(SR_I2C_SDA_CTRL_PU | SR_I2C_SCL_CTRL_PU | \ 1206 I2C_SDA_CTRL_PU | I2C_SCL_CTRL_PU); 1207 twl_i2c_write_u8(TWL4030_MODULE_INTBR, temp, REG_GPPUPDCTR1); 1208 1209 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &temp, 1210 TWL4030_DCDC_GLOBAL_CFG); 1211 temp |= SMARTREFLEX_ENABLE; 1212 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, temp, 1213 TWL4030_DCDC_GLOBAL_CFG); 1214 } 1215 1216 if (node) { 1217 if (pdata) 1218 twl_auxdata_lookup[0].platform_data = pdata->gpio; 1219 status = of_platform_populate(node, NULL, twl_auxdata_lookup, 1220 &client->dev); 1221 } else { 1222 status = add_children(pdata, irq_base, id->driver_data); 1223 } 1224 1225fail: 1226 if (status < 0) 1227 twl_remove(client); 1228free: 1229 if (status < 0) 1230 platform_device_unregister(pdev); 1231 1232 return status; 1233} 1234 1235static int __maybe_unused twl_suspend(struct device *dev) 1236{ 1237 struct i2c_client *client = to_i2c_client(dev); 1238 1239 if (client->irq) 1240 disable_irq(client->irq); 1241 1242 return 0; 1243} 1244 1245static int __maybe_unused twl_resume(struct device *dev) 1246{ 1247 struct i2c_client *client = to_i2c_client(dev); 1248 1249 if (client->irq) 1250 enable_irq(client->irq); 1251 1252 return 0; 1253} 1254 1255static SIMPLE_DEV_PM_OPS(twl_dev_pm_ops, twl_suspend, twl_resume); 1256 1257static const struct i2c_device_id twl_ids[] = { 1258 { "twl4030", TWL4030_VAUX2 }, /* "Triton 2" */ 1259 { "twl5030", 0 }, /* T2 updated */ 1260 { "twl5031", TWL5031 }, /* TWL5030 updated */ 1261 { "tps65950", 0 }, /* catalog version of twl5030 */ 1262 { "tps65930", TPS_SUBSET }, /* fewer LDOs and DACs; no charger */ 1263 { "tps65920", TPS_SUBSET }, /* fewer LDOs; no codec or charger */ 1264 { "tps65921", TPS_SUBSET }, /* fewer LDOs; no codec, no LED 1265 and vibrator. Charger in USB module*/ 1266 { "twl6030", TWL6030_CLASS }, /* "Phoenix power chip" */ 1267 { "twl6032", TWL6030_CLASS | TWL6032_SUBCLASS }, /* "Phoenix lite" */ 1268 { /* end of list */ }, 1269}; 1270 1271/* One Client Driver , 4 Clients */ 1272static struct i2c_driver twl_driver = { 1273 .driver.name = DRIVER_NAME, 1274 .driver.pm = &twl_dev_pm_ops, 1275 .id_table = twl_ids, 1276 .probe = twl_probe, 1277 .remove = twl_remove, 1278}; 1279builtin_i2c_driver(twl_driver); 1280