18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Core driver for STw4810/STw4811
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Copyright (C) 2013 ST-Ericsson SA
68c2ecf20Sopenharmony_ci * Written on behalf of Linaro for ST-Ericsson
78c2ecf20Sopenharmony_ci *
88c2ecf20Sopenharmony_ci * Author: Linus Walleij <linus.walleij@linaro.org>
98c2ecf20Sopenharmony_ci */
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci#include <linux/err.h>
128c2ecf20Sopenharmony_ci#include <linux/i2c.h>
138c2ecf20Sopenharmony_ci#include <linux/init.h>
148c2ecf20Sopenharmony_ci#include <linux/mfd/core.h>
158c2ecf20Sopenharmony_ci#include <linux/mfd/stw481x.h>
168c2ecf20Sopenharmony_ci#include <linux/module.h>
178c2ecf20Sopenharmony_ci#include <linux/regmap.h>
188c2ecf20Sopenharmony_ci#include <linux/spinlock.h>
198c2ecf20Sopenharmony_ci#include <linux/slab.h>
208c2ecf20Sopenharmony_ci
218c2ecf20Sopenharmony_ci/*
228c2ecf20Sopenharmony_ci * This driver can only access the non-USB portions of STw4811, the register
238c2ecf20Sopenharmony_ci * range 0x00-0x10 dealing with USB is bound to the two special I2C pins used
248c2ecf20Sopenharmony_ci * for USB control.
258c2ecf20Sopenharmony_ci */
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci/* Registers inside the power control address space */
288c2ecf20Sopenharmony_ci#define STW_PC_VCORE_SEL	0x05U
298c2ecf20Sopenharmony_ci#define STW_PC_VAUX_SEL		0x06U
308c2ecf20Sopenharmony_ci#define STW_PC_VPLL_SEL		0x07U
318c2ecf20Sopenharmony_ci
328c2ecf20Sopenharmony_ci/**
338c2ecf20Sopenharmony_ci * stw481x_get_pctl_reg() - get a power control register
348c2ecf20Sopenharmony_ci * @stw481x: handle to the stw481x chip
358c2ecf20Sopenharmony_ci * @reg: power control register to fetch
368c2ecf20Sopenharmony_ci *
378c2ecf20Sopenharmony_ci * The power control registers is a set of one-time-programmable registers
388c2ecf20Sopenharmony_ci * in its own register space, accessed by writing addess bits to these
398c2ecf20Sopenharmony_ci * two registers: bits 7,6,5 of PCTL_REG_LO corresponds to the 3 LSBs of
408c2ecf20Sopenharmony_ci * the address and bits 8,9 of PCTL_REG_HI corresponds to the 2 MSBs of
418c2ecf20Sopenharmony_ci * the address, forming an address space of 5 bits, i.e. 32 registers
428c2ecf20Sopenharmony_ci * 0x00 ... 0x1f can be obtained.
438c2ecf20Sopenharmony_ci */
448c2ecf20Sopenharmony_cistatic int stw481x_get_pctl_reg(struct stw481x *stw481x, u8 reg)
458c2ecf20Sopenharmony_ci{
468c2ecf20Sopenharmony_ci	u8 msb = (reg >> 3) & 0x03;
478c2ecf20Sopenharmony_ci	u8 lsb = (reg << 5) & 0xe0;
488c2ecf20Sopenharmony_ci	unsigned int val;
498c2ecf20Sopenharmony_ci	u8 vrfy;
508c2ecf20Sopenharmony_ci	int ret;
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_ci	ret = regmap_write(stw481x->map, STW_PCTL_REG_HI, msb);
538c2ecf20Sopenharmony_ci	if (ret)
548c2ecf20Sopenharmony_ci		return ret;
558c2ecf20Sopenharmony_ci	ret = regmap_write(stw481x->map, STW_PCTL_REG_LO, lsb);
568c2ecf20Sopenharmony_ci	if (ret)
578c2ecf20Sopenharmony_ci		return ret;
588c2ecf20Sopenharmony_ci	ret = regmap_read(stw481x->map, STW_PCTL_REG_HI, &val);
598c2ecf20Sopenharmony_ci	if (ret)
608c2ecf20Sopenharmony_ci		return ret;
618c2ecf20Sopenharmony_ci	vrfy = (val & 0x03) << 3;
628c2ecf20Sopenharmony_ci	ret = regmap_read(stw481x->map, STW_PCTL_REG_LO, &val);
638c2ecf20Sopenharmony_ci	if (ret)
648c2ecf20Sopenharmony_ci		return ret;
658c2ecf20Sopenharmony_ci	vrfy |= ((val >> 5) & 0x07);
668c2ecf20Sopenharmony_ci	if (vrfy != reg)
678c2ecf20Sopenharmony_ci		return -EIO;
688c2ecf20Sopenharmony_ci	return (val >> 1) & 0x0f;
698c2ecf20Sopenharmony_ci}
708c2ecf20Sopenharmony_ci
718c2ecf20Sopenharmony_cistatic int stw481x_startup(struct stw481x *stw481x)
728c2ecf20Sopenharmony_ci{
738c2ecf20Sopenharmony_ci	/* Voltages multiplied by 100 */
748c2ecf20Sopenharmony_ci	static const u8 vcore_val[] = {
758c2ecf20Sopenharmony_ci		100, 105, 110, 115, 120, 122, 124, 126, 128,
768c2ecf20Sopenharmony_ci		130, 132, 134, 136, 138, 140, 145
778c2ecf20Sopenharmony_ci	};
788c2ecf20Sopenharmony_ci	static const u8 vpll_val[] = { 105, 120, 130, 180 };
798c2ecf20Sopenharmony_ci	static const u8 vaux_val[] = { 15, 18, 25, 28 };
808c2ecf20Sopenharmony_ci	u8 vcore;
818c2ecf20Sopenharmony_ci	u8 vcore_slp;
828c2ecf20Sopenharmony_ci	u8 vpll;
838c2ecf20Sopenharmony_ci	u8 vaux;
848c2ecf20Sopenharmony_ci	bool vaux_en;
858c2ecf20Sopenharmony_ci	bool it_warn;
868c2ecf20Sopenharmony_ci	int ret;
878c2ecf20Sopenharmony_ci	unsigned int val;
888c2ecf20Sopenharmony_ci
898c2ecf20Sopenharmony_ci	ret = regmap_read(stw481x->map, STW_CONF1, &val);
908c2ecf20Sopenharmony_ci	if (ret)
918c2ecf20Sopenharmony_ci		return ret;
928c2ecf20Sopenharmony_ci	vaux_en = !!(val & STW_CONF1_PDN_VAUX);
938c2ecf20Sopenharmony_ci	it_warn = !!(val & STW_CONF1_IT_WARN);
948c2ecf20Sopenharmony_ci
958c2ecf20Sopenharmony_ci	dev_info(&stw481x->client->dev, "voltages %s\n",
968c2ecf20Sopenharmony_ci		(val & STW_CONF1_V_MONITORING) ? "OK" : "LOW");
978c2ecf20Sopenharmony_ci	dev_info(&stw481x->client->dev, "MMC level shifter %s\n",
988c2ecf20Sopenharmony_ci		(val & STW_CONF1_MMC_LS_STATUS) ? "high impedance" : "ON");
998c2ecf20Sopenharmony_ci	dev_info(&stw481x->client->dev, "VMMC: %s\n",
1008c2ecf20Sopenharmony_ci		(val & STW_CONF1_PDN_VMMC) ? "ON" : "disabled");
1018c2ecf20Sopenharmony_ci
1028c2ecf20Sopenharmony_ci	dev_info(&stw481x->client->dev, "STw481x power control registers:\n");
1038c2ecf20Sopenharmony_ci
1048c2ecf20Sopenharmony_ci	ret = stw481x_get_pctl_reg(stw481x, STW_PC_VCORE_SEL);
1058c2ecf20Sopenharmony_ci	if (ret < 0)
1068c2ecf20Sopenharmony_ci		return ret;
1078c2ecf20Sopenharmony_ci	vcore = ret & 0x0f;
1088c2ecf20Sopenharmony_ci
1098c2ecf20Sopenharmony_ci	ret = stw481x_get_pctl_reg(stw481x, STW_PC_VAUX_SEL);
1108c2ecf20Sopenharmony_ci	if (ret < 0)
1118c2ecf20Sopenharmony_ci		return ret;
1128c2ecf20Sopenharmony_ci	vaux = (ret >> 2) & 3;
1138c2ecf20Sopenharmony_ci	vpll = (ret >> 4) & 1; /* Save bit 4 */
1148c2ecf20Sopenharmony_ci
1158c2ecf20Sopenharmony_ci	ret = stw481x_get_pctl_reg(stw481x, STW_PC_VPLL_SEL);
1168c2ecf20Sopenharmony_ci	if (ret < 0)
1178c2ecf20Sopenharmony_ci		return ret;
1188c2ecf20Sopenharmony_ci	vpll |= (ret >> 1) & 2;
1198c2ecf20Sopenharmony_ci
1208c2ecf20Sopenharmony_ci	dev_info(&stw481x->client->dev, "VCORE: %u.%uV %s\n",
1218c2ecf20Sopenharmony_ci		vcore_val[vcore] / 100, vcore_val[vcore] % 100,
1228c2ecf20Sopenharmony_ci		(ret & 4) ? "ON" : "OFF");
1238c2ecf20Sopenharmony_ci
1248c2ecf20Sopenharmony_ci	dev_info(&stw481x->client->dev, "VPLL:  %u.%uV %s\n",
1258c2ecf20Sopenharmony_ci		vpll_val[vpll] / 100, vpll_val[vpll] % 100,
1268c2ecf20Sopenharmony_ci		(ret & 0x10) ? "ON" : "OFF");
1278c2ecf20Sopenharmony_ci
1288c2ecf20Sopenharmony_ci	dev_info(&stw481x->client->dev, "VAUX:  %u.%uV %s\n",
1298c2ecf20Sopenharmony_ci		vaux_val[vaux] / 10, vaux_val[vaux] % 10,
1308c2ecf20Sopenharmony_ci		vaux_en ? "ON" : "OFF");
1318c2ecf20Sopenharmony_ci
1328c2ecf20Sopenharmony_ci	ret = regmap_read(stw481x->map, STW_CONF2, &val);
1338c2ecf20Sopenharmony_ci	if (ret)
1348c2ecf20Sopenharmony_ci		return ret;
1358c2ecf20Sopenharmony_ci
1368c2ecf20Sopenharmony_ci	dev_info(&stw481x->client->dev, "TWARN: %s threshold, %s\n",
1378c2ecf20Sopenharmony_ci		it_warn ? "below" : "above",
1388c2ecf20Sopenharmony_ci		(val & STW_CONF2_MASK_TWARN) ?
1398c2ecf20Sopenharmony_ci		 "enabled" : "mask through VDDOK");
1408c2ecf20Sopenharmony_ci	dev_info(&stw481x->client->dev, "VMMC: %s\n",
1418c2ecf20Sopenharmony_ci		(val & STW_CONF2_VMMC_EXT) ? "internal" : "external");
1428c2ecf20Sopenharmony_ci	dev_info(&stw481x->client->dev, "IT WAKE UP: %s\n",
1438c2ecf20Sopenharmony_ci		(val & STW_CONF2_MASK_IT_WAKE_UP) ? "enabled" : "masked");
1448c2ecf20Sopenharmony_ci	dev_info(&stw481x->client->dev, "GPO1: %s\n",
1458c2ecf20Sopenharmony_ci		(val & STW_CONF2_GPO1) ? "low" : "high impedance");
1468c2ecf20Sopenharmony_ci	dev_info(&stw481x->client->dev, "GPO2: %s\n",
1478c2ecf20Sopenharmony_ci		(val & STW_CONF2_GPO2) ? "low" : "high impedance");
1488c2ecf20Sopenharmony_ci
1498c2ecf20Sopenharmony_ci	ret = regmap_read(stw481x->map, STW_VCORE_SLEEP, &val);
1508c2ecf20Sopenharmony_ci	if (ret)
1518c2ecf20Sopenharmony_ci		return ret;
1528c2ecf20Sopenharmony_ci	vcore_slp = val & 0x0f;
1538c2ecf20Sopenharmony_ci	dev_info(&stw481x->client->dev, "VCORE SLEEP: %u.%uV\n",
1548c2ecf20Sopenharmony_ci		vcore_val[vcore_slp] / 100, vcore_val[vcore_slp] % 100);
1558c2ecf20Sopenharmony_ci
1568c2ecf20Sopenharmony_ci	return 0;
1578c2ecf20Sopenharmony_ci}
1588c2ecf20Sopenharmony_ci
1598c2ecf20Sopenharmony_ci/*
1608c2ecf20Sopenharmony_ci * MFD cells - we have one cell which is selected operation
1618c2ecf20Sopenharmony_ci * mode, and we always have a GPIO cell.
1628c2ecf20Sopenharmony_ci */
1638c2ecf20Sopenharmony_cistatic struct mfd_cell stw481x_cells[] = {
1648c2ecf20Sopenharmony_ci	{
1658c2ecf20Sopenharmony_ci		.of_compatible = "st,stw481x-vmmc",
1668c2ecf20Sopenharmony_ci		.name = "stw481x-vmmc-regulator",
1678c2ecf20Sopenharmony_ci		.id = -1,
1688c2ecf20Sopenharmony_ci	},
1698c2ecf20Sopenharmony_ci};
1708c2ecf20Sopenharmony_ci
1718c2ecf20Sopenharmony_cistatic const struct regmap_config stw481x_regmap_config = {
1728c2ecf20Sopenharmony_ci	.reg_bits = 8,
1738c2ecf20Sopenharmony_ci	.val_bits = 8,
1748c2ecf20Sopenharmony_ci};
1758c2ecf20Sopenharmony_ci
1768c2ecf20Sopenharmony_cistatic int stw481x_probe(struct i2c_client *client,
1778c2ecf20Sopenharmony_ci			 const struct i2c_device_id *id)
1788c2ecf20Sopenharmony_ci{
1798c2ecf20Sopenharmony_ci	struct stw481x			*stw481x;
1808c2ecf20Sopenharmony_ci	int ret;
1818c2ecf20Sopenharmony_ci	int i;
1828c2ecf20Sopenharmony_ci
1838c2ecf20Sopenharmony_ci	stw481x = devm_kzalloc(&client->dev, sizeof(*stw481x), GFP_KERNEL);
1848c2ecf20Sopenharmony_ci	if (!stw481x)
1858c2ecf20Sopenharmony_ci		return -ENOMEM;
1868c2ecf20Sopenharmony_ci
1878c2ecf20Sopenharmony_ci	i2c_set_clientdata(client, stw481x);
1888c2ecf20Sopenharmony_ci	stw481x->client = client;
1898c2ecf20Sopenharmony_ci	stw481x->map = devm_regmap_init_i2c(client, &stw481x_regmap_config);
1908c2ecf20Sopenharmony_ci	if (IS_ERR(stw481x->map)) {
1918c2ecf20Sopenharmony_ci		ret = PTR_ERR(stw481x->map);
1928c2ecf20Sopenharmony_ci		dev_err(&client->dev, "Failed to allocate register map: %d\n",
1938c2ecf20Sopenharmony_ci			ret);
1948c2ecf20Sopenharmony_ci		return ret;
1958c2ecf20Sopenharmony_ci	}
1968c2ecf20Sopenharmony_ci
1978c2ecf20Sopenharmony_ci	ret = stw481x_startup(stw481x);
1988c2ecf20Sopenharmony_ci	if (ret) {
1998c2ecf20Sopenharmony_ci		dev_err(&client->dev, "chip initialization failed\n");
2008c2ecf20Sopenharmony_ci		return ret;
2018c2ecf20Sopenharmony_ci	}
2028c2ecf20Sopenharmony_ci
2038c2ecf20Sopenharmony_ci	/* Set up and register the platform devices. */
2048c2ecf20Sopenharmony_ci	for (i = 0; i < ARRAY_SIZE(stw481x_cells); i++) {
2058c2ecf20Sopenharmony_ci		/* One state holder for all drivers, this is simple */
2068c2ecf20Sopenharmony_ci		stw481x_cells[i].platform_data = stw481x;
2078c2ecf20Sopenharmony_ci		stw481x_cells[i].pdata_size = sizeof(*stw481x);
2088c2ecf20Sopenharmony_ci	}
2098c2ecf20Sopenharmony_ci
2108c2ecf20Sopenharmony_ci	ret = devm_mfd_add_devices(&client->dev, 0, stw481x_cells,
2118c2ecf20Sopenharmony_ci				   ARRAY_SIZE(stw481x_cells), NULL, 0, NULL);
2128c2ecf20Sopenharmony_ci	if (ret)
2138c2ecf20Sopenharmony_ci		return ret;
2148c2ecf20Sopenharmony_ci
2158c2ecf20Sopenharmony_ci	dev_info(&client->dev, "initialized STw481x device\n");
2168c2ecf20Sopenharmony_ci
2178c2ecf20Sopenharmony_ci	return ret;
2188c2ecf20Sopenharmony_ci}
2198c2ecf20Sopenharmony_ci
2208c2ecf20Sopenharmony_ci/*
2218c2ecf20Sopenharmony_ci * This ID table is completely unused, as this is a pure
2228c2ecf20Sopenharmony_ci * device-tree probed driver, but it has to be here due to
2238c2ecf20Sopenharmony_ci * the structure of the I2C core.
2248c2ecf20Sopenharmony_ci */
2258c2ecf20Sopenharmony_cistatic const struct i2c_device_id stw481x_id[] = {
2268c2ecf20Sopenharmony_ci	{ "stw481x", 0 },
2278c2ecf20Sopenharmony_ci	{ },
2288c2ecf20Sopenharmony_ci};
2298c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(i2c, stw481x_id);
2308c2ecf20Sopenharmony_ci
2318c2ecf20Sopenharmony_cistatic const struct of_device_id stw481x_match[] = {
2328c2ecf20Sopenharmony_ci	{ .compatible = "st,stw4810", },
2338c2ecf20Sopenharmony_ci	{ .compatible = "st,stw4811", },
2348c2ecf20Sopenharmony_ci	{ },
2358c2ecf20Sopenharmony_ci};
2368c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(of, stw481x_match);
2378c2ecf20Sopenharmony_ci
2388c2ecf20Sopenharmony_cistatic struct i2c_driver stw481x_driver = {
2398c2ecf20Sopenharmony_ci	.driver = {
2408c2ecf20Sopenharmony_ci		.name	= "stw481x",
2418c2ecf20Sopenharmony_ci		.of_match_table = stw481x_match,
2428c2ecf20Sopenharmony_ci	},
2438c2ecf20Sopenharmony_ci	.probe		= stw481x_probe,
2448c2ecf20Sopenharmony_ci	.id_table	= stw481x_id,
2458c2ecf20Sopenharmony_ci};
2468c2ecf20Sopenharmony_ci
2478c2ecf20Sopenharmony_cimodule_i2c_driver(stw481x_driver);
2488c2ecf20Sopenharmony_ci
2498c2ecf20Sopenharmony_ciMODULE_AUTHOR("Linus Walleij");
2508c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("STw481x PMIC driver");
2518c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL v2");
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