18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Lochnagar I2C bus interface
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Copyright (c) 2012-2018 Cirrus Logic, Inc. and
68c2ecf20Sopenharmony_ci *                         Cirrus Logic International Semiconductor Ltd.
78c2ecf20Sopenharmony_ci *
88c2ecf20Sopenharmony_ci * Author: Charles Keepax <ckeepax@opensource.cirrus.com>
98c2ecf20Sopenharmony_ci */
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci#include <linux/delay.h>
128c2ecf20Sopenharmony_ci#include <linux/device.h>
138c2ecf20Sopenharmony_ci#include <linux/err.h>
148c2ecf20Sopenharmony_ci#include <linux/gpio/consumer.h>
158c2ecf20Sopenharmony_ci#include <linux/i2c.h>
168c2ecf20Sopenharmony_ci#include <linux/lockdep.h>
178c2ecf20Sopenharmony_ci#include <linux/mfd/core.h>
188c2ecf20Sopenharmony_ci#include <linux/mutex.h>
198c2ecf20Sopenharmony_ci#include <linux/of.h>
208c2ecf20Sopenharmony_ci#include <linux/of_platform.h>
218c2ecf20Sopenharmony_ci#include <linux/regmap.h>
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ci#include <linux/mfd/lochnagar.h>
248c2ecf20Sopenharmony_ci#include <linux/mfd/lochnagar1_regs.h>
258c2ecf20Sopenharmony_ci#include <linux/mfd/lochnagar2_regs.h>
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci#define LOCHNAGAR_BOOT_RETRIES		10
288c2ecf20Sopenharmony_ci#define LOCHNAGAR_BOOT_DELAY_MS		350
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_ci#define LOCHNAGAR_CONFIG_POLL_US	10000
318c2ecf20Sopenharmony_ci
328c2ecf20Sopenharmony_cistatic bool lochnagar1_readable_register(struct device *dev, unsigned int reg)
338c2ecf20Sopenharmony_ci{
348c2ecf20Sopenharmony_ci	switch (reg) {
358c2ecf20Sopenharmony_ci	case LOCHNAGAR_SOFTWARE_RESET:
368c2ecf20Sopenharmony_ci	case LOCHNAGAR_FIRMWARE_ID1...LOCHNAGAR_FIRMWARE_ID2:
378c2ecf20Sopenharmony_ci	case LOCHNAGAR1_CDC_AIF1_SEL...LOCHNAGAR1_CDC_AIF3_SEL:
388c2ecf20Sopenharmony_ci	case LOCHNAGAR1_CDC_MCLK1_SEL...LOCHNAGAR1_CDC_MCLK2_SEL:
398c2ecf20Sopenharmony_ci	case LOCHNAGAR1_CDC_AIF_CTRL1...LOCHNAGAR1_CDC_AIF_CTRL2:
408c2ecf20Sopenharmony_ci	case LOCHNAGAR1_EXT_AIF_CTRL:
418c2ecf20Sopenharmony_ci	case LOCHNAGAR1_DSP_AIF1_SEL...LOCHNAGAR1_DSP_AIF2_SEL:
428c2ecf20Sopenharmony_ci	case LOCHNAGAR1_DSP_CLKIN_SEL:
438c2ecf20Sopenharmony_ci	case LOCHNAGAR1_DSP_AIF:
448c2ecf20Sopenharmony_ci	case LOCHNAGAR1_GF_AIF1...LOCHNAGAR1_GF_AIF2:
458c2ecf20Sopenharmony_ci	case LOCHNAGAR1_PSIA_AIF:
468c2ecf20Sopenharmony_ci	case LOCHNAGAR1_PSIA1_SEL...LOCHNAGAR1_PSIA2_SEL:
478c2ecf20Sopenharmony_ci	case LOCHNAGAR1_SPDIF_AIF_SEL:
488c2ecf20Sopenharmony_ci	case LOCHNAGAR1_GF_AIF3_SEL...LOCHNAGAR1_GF_AIF4_SEL:
498c2ecf20Sopenharmony_ci	case LOCHNAGAR1_GF_CLKOUT1_SEL:
508c2ecf20Sopenharmony_ci	case LOCHNAGAR1_GF_AIF1_SEL...LOCHNAGAR1_GF_AIF2_SEL:
518c2ecf20Sopenharmony_ci	case LOCHNAGAR1_GF_GPIO2...LOCHNAGAR1_GF_GPIO7:
528c2ecf20Sopenharmony_ci	case LOCHNAGAR1_RST:
538c2ecf20Sopenharmony_ci	case LOCHNAGAR1_LED1...LOCHNAGAR1_LED2:
548c2ecf20Sopenharmony_ci	case LOCHNAGAR1_I2C_CTRL:
558c2ecf20Sopenharmony_ci		return true;
568c2ecf20Sopenharmony_ci	default:
578c2ecf20Sopenharmony_ci		return false;
588c2ecf20Sopenharmony_ci	}
598c2ecf20Sopenharmony_ci}
608c2ecf20Sopenharmony_ci
618c2ecf20Sopenharmony_cistatic const struct regmap_config lochnagar1_i2c_regmap = {
628c2ecf20Sopenharmony_ci	.reg_bits = 8,
638c2ecf20Sopenharmony_ci	.val_bits = 8,
648c2ecf20Sopenharmony_ci	.reg_format_endian = REGMAP_ENDIAN_BIG,
658c2ecf20Sopenharmony_ci	.val_format_endian = REGMAP_ENDIAN_BIG,
668c2ecf20Sopenharmony_ci
678c2ecf20Sopenharmony_ci	.max_register = 0x50,
688c2ecf20Sopenharmony_ci	.readable_reg = lochnagar1_readable_register,
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_ci	.use_single_read = true,
718c2ecf20Sopenharmony_ci	.use_single_write = true,
728c2ecf20Sopenharmony_ci
738c2ecf20Sopenharmony_ci	.cache_type = REGCACHE_RBTREE,
748c2ecf20Sopenharmony_ci};
758c2ecf20Sopenharmony_ci
768c2ecf20Sopenharmony_cistatic const struct reg_sequence lochnagar1_patch[] = {
778c2ecf20Sopenharmony_ci	{ 0x40, 0x0083 },
788c2ecf20Sopenharmony_ci	{ 0x47, 0x0018 },
798c2ecf20Sopenharmony_ci	{ 0x50, 0x0000 },
808c2ecf20Sopenharmony_ci};
818c2ecf20Sopenharmony_ci
828c2ecf20Sopenharmony_cistatic bool lochnagar2_readable_register(struct device *dev, unsigned int reg)
838c2ecf20Sopenharmony_ci{
848c2ecf20Sopenharmony_ci	switch (reg) {
858c2ecf20Sopenharmony_ci	case LOCHNAGAR_SOFTWARE_RESET:
868c2ecf20Sopenharmony_ci	case LOCHNAGAR_FIRMWARE_ID1...LOCHNAGAR_FIRMWARE_ID2:
878c2ecf20Sopenharmony_ci	case LOCHNAGAR2_CDC_AIF1_CTRL...LOCHNAGAR2_CDC_AIF3_CTRL:
888c2ecf20Sopenharmony_ci	case LOCHNAGAR2_DSP_AIF1_CTRL...LOCHNAGAR2_DSP_AIF2_CTRL:
898c2ecf20Sopenharmony_ci	case LOCHNAGAR2_PSIA1_CTRL...LOCHNAGAR2_PSIA2_CTRL:
908c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GF_AIF3_CTRL...LOCHNAGAR2_GF_AIF4_CTRL:
918c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GF_AIF1_CTRL...LOCHNAGAR2_GF_AIF2_CTRL:
928c2ecf20Sopenharmony_ci	case LOCHNAGAR2_SPDIF_AIF_CTRL:
938c2ecf20Sopenharmony_ci	case LOCHNAGAR2_USB_AIF1_CTRL...LOCHNAGAR2_USB_AIF2_CTRL:
948c2ecf20Sopenharmony_ci	case LOCHNAGAR2_ADAT_AIF_CTRL:
958c2ecf20Sopenharmony_ci	case LOCHNAGAR2_CDC_MCLK1_CTRL...LOCHNAGAR2_CDC_MCLK2_CTRL:
968c2ecf20Sopenharmony_ci	case LOCHNAGAR2_DSP_CLKIN_CTRL:
978c2ecf20Sopenharmony_ci	case LOCHNAGAR2_PSIA1_MCLK_CTRL...LOCHNAGAR2_PSIA2_MCLK_CTRL:
988c2ecf20Sopenharmony_ci	case LOCHNAGAR2_SPDIF_MCLK_CTRL:
998c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GF_CLKOUT1_CTRL...LOCHNAGAR2_GF_CLKOUT2_CTRL:
1008c2ecf20Sopenharmony_ci	case LOCHNAGAR2_ADAT_MCLK_CTRL:
1018c2ecf20Sopenharmony_ci	case LOCHNAGAR2_SOUNDCARD_MCLK_CTRL:
1028c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_FPGA_GPIO1...LOCHNAGAR2_GPIO_FPGA_GPIO6:
1038c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_CDC_GPIO1...LOCHNAGAR2_GPIO_CDC_GPIO8:
1048c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_DSP_GPIO1...LOCHNAGAR2_GPIO_DSP_GPIO6:
1058c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_GF_GPIO2...LOCHNAGAR2_GPIO_GF_GPIO7:
1068c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_CDC_AIF1_BCLK...LOCHNAGAR2_GPIO_CDC_AIF3_TXDAT:
1078c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_DSP_AIF1_BCLK...LOCHNAGAR2_GPIO_DSP_AIF2_TXDAT:
1088c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_PSIA1_BCLK...LOCHNAGAR2_GPIO_PSIA2_TXDAT:
1098c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_GF_AIF3_BCLK...LOCHNAGAR2_GPIO_GF_AIF4_TXDAT:
1108c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_GF_AIF1_BCLK...LOCHNAGAR2_GPIO_GF_AIF2_TXDAT:
1118c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_DSP_UART1_RX...LOCHNAGAR2_GPIO_DSP_UART2_TX:
1128c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_GF_UART2_RX...LOCHNAGAR2_GPIO_GF_UART2_TX:
1138c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_USB_UART_RX:
1148c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_CDC_PDMCLK1...LOCHNAGAR2_GPIO_CDC_PDMDAT2:
1158c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_CDC_DMICCLK1...LOCHNAGAR2_GPIO_CDC_DMICDAT4:
1168c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_DSP_DMICCLK1...LOCHNAGAR2_GPIO_DSP_DMICDAT2:
1178c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_I2C2_SCL...LOCHNAGAR2_GPIO_I2C4_SDA:
1188c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_DSP_STANDBY:
1198c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_CDC_MCLK1...LOCHNAGAR2_GPIO_CDC_MCLK2:
1208c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_DSP_CLKIN:
1218c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_PSIA1_MCLK...LOCHNAGAR2_GPIO_PSIA2_MCLK:
1228c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_GF_GPIO1...LOCHNAGAR2_GPIO_GF_GPIO5:
1238c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_DSP_GPIO20:
1248c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_CHANNEL1...LOCHNAGAR2_GPIO_CHANNEL16:
1258c2ecf20Sopenharmony_ci	case LOCHNAGAR2_MINICARD_RESETS:
1268c2ecf20Sopenharmony_ci	case LOCHNAGAR2_ANALOGUE_PATH_CTRL1...LOCHNAGAR2_ANALOGUE_PATH_CTRL2:
1278c2ecf20Sopenharmony_ci	case LOCHNAGAR2_COMMS_CTRL4:
1288c2ecf20Sopenharmony_ci	case LOCHNAGAR2_SPDIF_CTRL:
1298c2ecf20Sopenharmony_ci	case LOCHNAGAR2_IMON_CTRL1...LOCHNAGAR2_IMON_CTRL4:
1308c2ecf20Sopenharmony_ci	case LOCHNAGAR2_IMON_DATA1...LOCHNAGAR2_IMON_DATA2:
1318c2ecf20Sopenharmony_ci	case LOCHNAGAR2_POWER_CTRL:
1328c2ecf20Sopenharmony_ci	case LOCHNAGAR2_MICVDD_CTRL1:
1338c2ecf20Sopenharmony_ci	case LOCHNAGAR2_MICVDD_CTRL2:
1348c2ecf20Sopenharmony_ci	case LOCHNAGAR2_VDDCORE_CDC_CTRL1:
1358c2ecf20Sopenharmony_ci	case LOCHNAGAR2_VDDCORE_CDC_CTRL2:
1368c2ecf20Sopenharmony_ci	case LOCHNAGAR2_SOUNDCARD_AIF_CTRL:
1378c2ecf20Sopenharmony_ci		return true;
1388c2ecf20Sopenharmony_ci	default:
1398c2ecf20Sopenharmony_ci		return false;
1408c2ecf20Sopenharmony_ci	}
1418c2ecf20Sopenharmony_ci}
1428c2ecf20Sopenharmony_ci
1438c2ecf20Sopenharmony_cistatic bool lochnagar2_volatile_register(struct device *dev, unsigned int reg)
1448c2ecf20Sopenharmony_ci{
1458c2ecf20Sopenharmony_ci	switch (reg) {
1468c2ecf20Sopenharmony_ci	case LOCHNAGAR2_GPIO_CHANNEL1...LOCHNAGAR2_GPIO_CHANNEL16:
1478c2ecf20Sopenharmony_ci	case LOCHNAGAR2_ANALOGUE_PATH_CTRL1:
1488c2ecf20Sopenharmony_ci	case LOCHNAGAR2_IMON_CTRL3...LOCHNAGAR2_IMON_CTRL4:
1498c2ecf20Sopenharmony_ci	case LOCHNAGAR2_IMON_DATA1...LOCHNAGAR2_IMON_DATA2:
1508c2ecf20Sopenharmony_ci		return true;
1518c2ecf20Sopenharmony_ci	default:
1528c2ecf20Sopenharmony_ci		return false;
1538c2ecf20Sopenharmony_ci	}
1548c2ecf20Sopenharmony_ci}
1558c2ecf20Sopenharmony_ci
1568c2ecf20Sopenharmony_cistatic const struct regmap_config lochnagar2_i2c_regmap = {
1578c2ecf20Sopenharmony_ci	.reg_bits = 16,
1588c2ecf20Sopenharmony_ci	.val_bits = 16,
1598c2ecf20Sopenharmony_ci	.reg_format_endian = REGMAP_ENDIAN_BIG,
1608c2ecf20Sopenharmony_ci	.val_format_endian = REGMAP_ENDIAN_BIG,
1618c2ecf20Sopenharmony_ci
1628c2ecf20Sopenharmony_ci	.max_register = 0x1F1F,
1638c2ecf20Sopenharmony_ci	.readable_reg = lochnagar2_readable_register,
1648c2ecf20Sopenharmony_ci	.volatile_reg = lochnagar2_volatile_register,
1658c2ecf20Sopenharmony_ci
1668c2ecf20Sopenharmony_ci	.cache_type = REGCACHE_RBTREE,
1678c2ecf20Sopenharmony_ci};
1688c2ecf20Sopenharmony_ci
1698c2ecf20Sopenharmony_cistatic const struct reg_sequence lochnagar2_patch[] = {
1708c2ecf20Sopenharmony_ci	{ 0x00EE, 0x0000 },
1718c2ecf20Sopenharmony_ci};
1728c2ecf20Sopenharmony_ci
1738c2ecf20Sopenharmony_cistruct lochnagar_config {
1748c2ecf20Sopenharmony_ci	int id;
1758c2ecf20Sopenharmony_ci	const char * const name;
1768c2ecf20Sopenharmony_ci	enum lochnagar_type type;
1778c2ecf20Sopenharmony_ci	const struct regmap_config *regmap;
1788c2ecf20Sopenharmony_ci	const struct reg_sequence *patch;
1798c2ecf20Sopenharmony_ci	int npatch;
1808c2ecf20Sopenharmony_ci};
1818c2ecf20Sopenharmony_ci
1828c2ecf20Sopenharmony_cistatic struct lochnagar_config lochnagar_configs[] = {
1838c2ecf20Sopenharmony_ci	{
1848c2ecf20Sopenharmony_ci		.id = 0x50,
1858c2ecf20Sopenharmony_ci		.name = "lochnagar1",
1868c2ecf20Sopenharmony_ci		.type = LOCHNAGAR1,
1878c2ecf20Sopenharmony_ci		.regmap = &lochnagar1_i2c_regmap,
1888c2ecf20Sopenharmony_ci		.patch = lochnagar1_patch,
1898c2ecf20Sopenharmony_ci		.npatch = ARRAY_SIZE(lochnagar1_patch),
1908c2ecf20Sopenharmony_ci	},
1918c2ecf20Sopenharmony_ci	{
1928c2ecf20Sopenharmony_ci		.id = 0xCB58,
1938c2ecf20Sopenharmony_ci		.name = "lochnagar2",
1948c2ecf20Sopenharmony_ci		.type = LOCHNAGAR2,
1958c2ecf20Sopenharmony_ci		.regmap = &lochnagar2_i2c_regmap,
1968c2ecf20Sopenharmony_ci		.patch = lochnagar2_patch,
1978c2ecf20Sopenharmony_ci		.npatch = ARRAY_SIZE(lochnagar2_patch),
1988c2ecf20Sopenharmony_ci	},
1998c2ecf20Sopenharmony_ci};
2008c2ecf20Sopenharmony_ci
2018c2ecf20Sopenharmony_cistatic const struct of_device_id lochnagar_of_match[] = {
2028c2ecf20Sopenharmony_ci	{ .compatible = "cirrus,lochnagar1", .data = &lochnagar_configs[0] },
2038c2ecf20Sopenharmony_ci	{ .compatible = "cirrus,lochnagar2", .data = &lochnagar_configs[1] },
2048c2ecf20Sopenharmony_ci	{},
2058c2ecf20Sopenharmony_ci};
2068c2ecf20Sopenharmony_ci
2078c2ecf20Sopenharmony_cistatic int lochnagar_wait_for_boot(struct regmap *regmap, unsigned int *id)
2088c2ecf20Sopenharmony_ci{
2098c2ecf20Sopenharmony_ci	int i, ret;
2108c2ecf20Sopenharmony_ci
2118c2ecf20Sopenharmony_ci	for (i = 0; i < LOCHNAGAR_BOOT_RETRIES; ++i) {
2128c2ecf20Sopenharmony_ci		msleep(LOCHNAGAR_BOOT_DELAY_MS);
2138c2ecf20Sopenharmony_ci
2148c2ecf20Sopenharmony_ci		/* The reset register will return the device ID when read */
2158c2ecf20Sopenharmony_ci		ret = regmap_read(regmap, LOCHNAGAR_SOFTWARE_RESET, id);
2168c2ecf20Sopenharmony_ci		if (!ret)
2178c2ecf20Sopenharmony_ci			return ret;
2188c2ecf20Sopenharmony_ci	}
2198c2ecf20Sopenharmony_ci
2208c2ecf20Sopenharmony_ci	return -ETIMEDOUT;
2218c2ecf20Sopenharmony_ci}
2228c2ecf20Sopenharmony_ci
2238c2ecf20Sopenharmony_ci/**
2248c2ecf20Sopenharmony_ci * lochnagar_update_config - Synchronise the boards analogue configuration to
2258c2ecf20Sopenharmony_ci *                           the hardware.
2268c2ecf20Sopenharmony_ci *
2278c2ecf20Sopenharmony_ci * @lochnagar: A pointer to the primary core data structure.
2288c2ecf20Sopenharmony_ci *
2298c2ecf20Sopenharmony_ci * Return: Zero on success or an appropriate negative error code on failure.
2308c2ecf20Sopenharmony_ci */
2318c2ecf20Sopenharmony_ciint lochnagar_update_config(struct lochnagar *lochnagar)
2328c2ecf20Sopenharmony_ci{
2338c2ecf20Sopenharmony_ci	struct regmap *regmap = lochnagar->regmap;
2348c2ecf20Sopenharmony_ci	unsigned int done = LOCHNAGAR2_ANALOGUE_PATH_UPDATE_STS_MASK;
2358c2ecf20Sopenharmony_ci	int timeout_ms = LOCHNAGAR_BOOT_DELAY_MS * LOCHNAGAR_BOOT_RETRIES;
2368c2ecf20Sopenharmony_ci	unsigned int val = 0;
2378c2ecf20Sopenharmony_ci	int ret;
2388c2ecf20Sopenharmony_ci
2398c2ecf20Sopenharmony_ci	lockdep_assert_held(&lochnagar->analogue_config_lock);
2408c2ecf20Sopenharmony_ci
2418c2ecf20Sopenharmony_ci	if (lochnagar->type != LOCHNAGAR2)
2428c2ecf20Sopenharmony_ci		return 0;
2438c2ecf20Sopenharmony_ci
2448c2ecf20Sopenharmony_ci	/*
2458c2ecf20Sopenharmony_ci	 * Toggle the ANALOGUE_PATH_UPDATE bit and wait for the device to
2468c2ecf20Sopenharmony_ci	 * acknowledge that any outstanding changes to the analogue
2478c2ecf20Sopenharmony_ci	 * configuration have been applied.
2488c2ecf20Sopenharmony_ci	 */
2498c2ecf20Sopenharmony_ci	ret = regmap_write(regmap, LOCHNAGAR2_ANALOGUE_PATH_CTRL1, 0);
2508c2ecf20Sopenharmony_ci	if (ret < 0)
2518c2ecf20Sopenharmony_ci		return ret;
2528c2ecf20Sopenharmony_ci
2538c2ecf20Sopenharmony_ci	ret = regmap_write(regmap, LOCHNAGAR2_ANALOGUE_PATH_CTRL1,
2548c2ecf20Sopenharmony_ci			   LOCHNAGAR2_ANALOGUE_PATH_UPDATE_MASK);
2558c2ecf20Sopenharmony_ci	if (ret < 0)
2568c2ecf20Sopenharmony_ci		return ret;
2578c2ecf20Sopenharmony_ci
2588c2ecf20Sopenharmony_ci	ret = regmap_read_poll_timeout(regmap,
2598c2ecf20Sopenharmony_ci				       LOCHNAGAR2_ANALOGUE_PATH_CTRL1, val,
2608c2ecf20Sopenharmony_ci				       (val & done), LOCHNAGAR_CONFIG_POLL_US,
2618c2ecf20Sopenharmony_ci				       timeout_ms * 1000);
2628c2ecf20Sopenharmony_ci	if (ret < 0)
2638c2ecf20Sopenharmony_ci		return ret;
2648c2ecf20Sopenharmony_ci
2658c2ecf20Sopenharmony_ci	return 0;
2668c2ecf20Sopenharmony_ci}
2678c2ecf20Sopenharmony_ciEXPORT_SYMBOL_GPL(lochnagar_update_config);
2688c2ecf20Sopenharmony_ci
2698c2ecf20Sopenharmony_cistatic int lochnagar_i2c_probe(struct i2c_client *i2c)
2708c2ecf20Sopenharmony_ci{
2718c2ecf20Sopenharmony_ci	struct device *dev = &i2c->dev;
2728c2ecf20Sopenharmony_ci	const struct lochnagar_config *config = NULL;
2738c2ecf20Sopenharmony_ci	const struct of_device_id *of_id;
2748c2ecf20Sopenharmony_ci	struct lochnagar *lochnagar;
2758c2ecf20Sopenharmony_ci	struct gpio_desc *reset, *present;
2768c2ecf20Sopenharmony_ci	unsigned int val;
2778c2ecf20Sopenharmony_ci	unsigned int firmwareid;
2788c2ecf20Sopenharmony_ci	unsigned int devid, rev;
2798c2ecf20Sopenharmony_ci	int ret;
2808c2ecf20Sopenharmony_ci
2818c2ecf20Sopenharmony_ci	lochnagar = devm_kzalloc(dev, sizeof(*lochnagar), GFP_KERNEL);
2828c2ecf20Sopenharmony_ci	if (!lochnagar)
2838c2ecf20Sopenharmony_ci		return -ENOMEM;
2848c2ecf20Sopenharmony_ci
2858c2ecf20Sopenharmony_ci	of_id = of_match_device(lochnagar_of_match, dev);
2868c2ecf20Sopenharmony_ci	if (!of_id)
2878c2ecf20Sopenharmony_ci		return -EINVAL;
2888c2ecf20Sopenharmony_ci
2898c2ecf20Sopenharmony_ci	config = of_id->data;
2908c2ecf20Sopenharmony_ci
2918c2ecf20Sopenharmony_ci	lochnagar->dev = dev;
2928c2ecf20Sopenharmony_ci	mutex_init(&lochnagar->analogue_config_lock);
2938c2ecf20Sopenharmony_ci
2948c2ecf20Sopenharmony_ci	dev_set_drvdata(dev, lochnagar);
2958c2ecf20Sopenharmony_ci
2968c2ecf20Sopenharmony_ci	reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
2978c2ecf20Sopenharmony_ci	if (IS_ERR(reset)) {
2988c2ecf20Sopenharmony_ci		ret = PTR_ERR(reset);
2998c2ecf20Sopenharmony_ci		dev_err(dev, "Failed to get reset GPIO: %d\n", ret);
3008c2ecf20Sopenharmony_ci		return ret;
3018c2ecf20Sopenharmony_ci	}
3028c2ecf20Sopenharmony_ci
3038c2ecf20Sopenharmony_ci	present = devm_gpiod_get_optional(dev, "present", GPIOD_OUT_HIGH);
3048c2ecf20Sopenharmony_ci	if (IS_ERR(present)) {
3058c2ecf20Sopenharmony_ci		ret = PTR_ERR(present);
3068c2ecf20Sopenharmony_ci		dev_err(dev, "Failed to get present GPIO: %d\n", ret);
3078c2ecf20Sopenharmony_ci		return ret;
3088c2ecf20Sopenharmony_ci	}
3098c2ecf20Sopenharmony_ci
3108c2ecf20Sopenharmony_ci	/* Leave the Lochnagar in reset for a reasonable amount of time */
3118c2ecf20Sopenharmony_ci	msleep(20);
3128c2ecf20Sopenharmony_ci
3138c2ecf20Sopenharmony_ci	/* Bring Lochnagar out of reset */
3148c2ecf20Sopenharmony_ci	gpiod_set_value_cansleep(reset, 1);
3158c2ecf20Sopenharmony_ci
3168c2ecf20Sopenharmony_ci	/* Identify Lochnagar */
3178c2ecf20Sopenharmony_ci	lochnagar->type = config->type;
3188c2ecf20Sopenharmony_ci
3198c2ecf20Sopenharmony_ci	lochnagar->regmap = devm_regmap_init_i2c(i2c, config->regmap);
3208c2ecf20Sopenharmony_ci	if (IS_ERR(lochnagar->regmap)) {
3218c2ecf20Sopenharmony_ci		ret = PTR_ERR(lochnagar->regmap);
3228c2ecf20Sopenharmony_ci		dev_err(dev, "Failed to allocate register map: %d\n", ret);
3238c2ecf20Sopenharmony_ci		return ret;
3248c2ecf20Sopenharmony_ci	}
3258c2ecf20Sopenharmony_ci
3268c2ecf20Sopenharmony_ci	/* Wait for Lochnagar to boot */
3278c2ecf20Sopenharmony_ci	ret = lochnagar_wait_for_boot(lochnagar->regmap, &val);
3288c2ecf20Sopenharmony_ci	if (ret < 0) {
3298c2ecf20Sopenharmony_ci		dev_err(dev, "Failed to read device ID: %d\n", ret);
3308c2ecf20Sopenharmony_ci		return ret;
3318c2ecf20Sopenharmony_ci	}
3328c2ecf20Sopenharmony_ci
3338c2ecf20Sopenharmony_ci	devid = val & LOCHNAGAR_DEVICE_ID_MASK;
3348c2ecf20Sopenharmony_ci	rev = val & LOCHNAGAR_REV_ID_MASK;
3358c2ecf20Sopenharmony_ci
3368c2ecf20Sopenharmony_ci	if (devid != config->id) {
3378c2ecf20Sopenharmony_ci		dev_err(dev,
3388c2ecf20Sopenharmony_ci			"ID does not match %s (expected 0x%x got 0x%x)\n",
3398c2ecf20Sopenharmony_ci			config->name, config->id, devid);
3408c2ecf20Sopenharmony_ci		return -ENODEV;
3418c2ecf20Sopenharmony_ci	}
3428c2ecf20Sopenharmony_ci
3438c2ecf20Sopenharmony_ci	/* Identify firmware */
3448c2ecf20Sopenharmony_ci	ret = regmap_read(lochnagar->regmap, LOCHNAGAR_FIRMWARE_ID1, &val);
3458c2ecf20Sopenharmony_ci	if (ret < 0) {
3468c2ecf20Sopenharmony_ci		dev_err(dev, "Failed to read firmware id 1: %d\n", ret);
3478c2ecf20Sopenharmony_ci		return ret;
3488c2ecf20Sopenharmony_ci	}
3498c2ecf20Sopenharmony_ci
3508c2ecf20Sopenharmony_ci	firmwareid = val;
3518c2ecf20Sopenharmony_ci
3528c2ecf20Sopenharmony_ci	ret = regmap_read(lochnagar->regmap, LOCHNAGAR_FIRMWARE_ID2, &val);
3538c2ecf20Sopenharmony_ci	if (ret < 0) {
3548c2ecf20Sopenharmony_ci		dev_err(dev, "Failed to read firmware id 2: %d\n", ret);
3558c2ecf20Sopenharmony_ci		return ret;
3568c2ecf20Sopenharmony_ci	}
3578c2ecf20Sopenharmony_ci
3588c2ecf20Sopenharmony_ci	firmwareid |= (val << config->regmap->val_bits);
3598c2ecf20Sopenharmony_ci
3608c2ecf20Sopenharmony_ci	dev_info(dev, "Found %s (0x%x) revision %u firmware 0x%.6x\n",
3618c2ecf20Sopenharmony_ci		 config->name, devid, rev + 1, firmwareid);
3628c2ecf20Sopenharmony_ci
3638c2ecf20Sopenharmony_ci	ret = regmap_register_patch(lochnagar->regmap, config->patch,
3648c2ecf20Sopenharmony_ci				    config->npatch);
3658c2ecf20Sopenharmony_ci	if (ret < 0) {
3668c2ecf20Sopenharmony_ci		dev_err(dev, "Failed to register patch: %d\n", ret);
3678c2ecf20Sopenharmony_ci		return ret;
3688c2ecf20Sopenharmony_ci	}
3698c2ecf20Sopenharmony_ci
3708c2ecf20Sopenharmony_ci	ret = devm_of_platform_populate(dev);
3718c2ecf20Sopenharmony_ci	if (ret < 0) {
3728c2ecf20Sopenharmony_ci		dev_err(dev, "Failed to populate child nodes: %d\n", ret);
3738c2ecf20Sopenharmony_ci		return ret;
3748c2ecf20Sopenharmony_ci	}
3758c2ecf20Sopenharmony_ci
3768c2ecf20Sopenharmony_ci	return ret;
3778c2ecf20Sopenharmony_ci}
3788c2ecf20Sopenharmony_ci
3798c2ecf20Sopenharmony_cistatic struct i2c_driver lochnagar_i2c_driver = {
3808c2ecf20Sopenharmony_ci	.driver = {
3818c2ecf20Sopenharmony_ci		.name = "lochnagar",
3828c2ecf20Sopenharmony_ci		.of_match_table = of_match_ptr(lochnagar_of_match),
3838c2ecf20Sopenharmony_ci		.suppress_bind_attrs = true,
3848c2ecf20Sopenharmony_ci	},
3858c2ecf20Sopenharmony_ci	.probe_new = lochnagar_i2c_probe,
3868c2ecf20Sopenharmony_ci};
3878c2ecf20Sopenharmony_ci
3888c2ecf20Sopenharmony_cistatic int __init lochnagar_i2c_init(void)
3898c2ecf20Sopenharmony_ci{
3908c2ecf20Sopenharmony_ci	int ret;
3918c2ecf20Sopenharmony_ci
3928c2ecf20Sopenharmony_ci	ret = i2c_add_driver(&lochnagar_i2c_driver);
3938c2ecf20Sopenharmony_ci	if (ret)
3948c2ecf20Sopenharmony_ci		pr_err("Failed to register Lochnagar driver: %d\n", ret);
3958c2ecf20Sopenharmony_ci
3968c2ecf20Sopenharmony_ci	return ret;
3978c2ecf20Sopenharmony_ci}
3988c2ecf20Sopenharmony_cisubsys_initcall(lochnagar_i2c_init);
399