1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Intel MAX 10 Board Management Controller chip
4 *
5 * Copyright (C) 2018-2020 Intel Corporation. All rights reserved.
6 */
7#include <linux/bitfield.h>
8#include <linux/init.h>
9#include <linux/mfd/core.h>
10#include <linux/mfd/intel-m10-bmc.h>
11#include <linux/module.h>
12#include <linux/mutex.h>
13#include <linux/regmap.h>
14#include <linux/spi/spi.h>
15
16enum m10bmc_type {
17	M10_N3000,
18};
19
20static struct mfd_cell m10bmc_pacn3000_subdevs[] = {
21	{ .name = "n3000bmc-hwmon" },
22	{ .name = "n3000bmc-retimer" },
23	{ .name = "n3000bmc-secure" },
24};
25
26static struct regmap_config intel_m10bmc_regmap_config = {
27	.reg_bits = 32,
28	.val_bits = 32,
29	.reg_stride = 4,
30	.max_register = M10BMC_MEM_END,
31};
32
33static ssize_t bmc_version_show(struct device *dev,
34				struct device_attribute *attr, char *buf)
35{
36	struct intel_m10bmc *ddata = dev_get_drvdata(dev);
37	unsigned int val;
38	int ret;
39
40	ret = m10bmc_sys_read(ddata, M10BMC_BUILD_VER, &val);
41	if (ret)
42		return ret;
43
44	return sprintf(buf, "0x%x\n", val);
45}
46static DEVICE_ATTR_RO(bmc_version);
47
48static ssize_t bmcfw_version_show(struct device *dev,
49				  struct device_attribute *attr, char *buf)
50{
51	struct intel_m10bmc *ddata = dev_get_drvdata(dev);
52	unsigned int val;
53	int ret;
54
55	ret = m10bmc_sys_read(ddata, NIOS2_FW_VERSION, &val);
56	if (ret)
57		return ret;
58
59	return sprintf(buf, "0x%x\n", val);
60}
61static DEVICE_ATTR_RO(bmcfw_version);
62
63static struct attribute *m10bmc_attrs[] = {
64	&dev_attr_bmc_version.attr,
65	&dev_attr_bmcfw_version.attr,
66	NULL,
67};
68ATTRIBUTE_GROUPS(m10bmc);
69
70static int check_m10bmc_version(struct intel_m10bmc *ddata)
71{
72	unsigned int v;
73	int ret;
74
75	/*
76	 * This check is to filter out the very old legacy BMC versions,
77	 * M10BMC_LEGACY_SYS_BASE is the offset to this old block of mmio
78	 * registers. In the old BMC chips, the BMC version info is stored
79	 * in this old version register (M10BMC_LEGACY_SYS_BASE +
80	 * M10BMC_BUILD_VER), so its read out value would have not been
81	 * LEGACY_INVALID (0xffffffff). But in new BMC chips that the
82	 * driver supports, the value of this register should be
83	 * LEGACY_INVALID.
84	 */
85	ret = m10bmc_raw_read(ddata,
86			      M10BMC_LEGACY_SYS_BASE + M10BMC_BUILD_VER, &v);
87	if (ret)
88		return -ENODEV;
89
90	if (v != M10BMC_VER_LEGACY_INVALID) {
91		dev_err(ddata->dev, "bad version M10BMC detected\n");
92		return -ENODEV;
93	}
94
95	return 0;
96}
97
98static int intel_m10_bmc_spi_probe(struct spi_device *spi)
99{
100	const struct spi_device_id *id = spi_get_device_id(spi);
101	struct device *dev = &spi->dev;
102	struct mfd_cell *cells;
103	struct intel_m10bmc *ddata;
104	int ret, n_cell;
105
106	ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL);
107	if (!ddata)
108		return -ENOMEM;
109
110	ddata->dev = dev;
111
112	ddata->regmap =
113		devm_regmap_init_spi_avmm(spi, &intel_m10bmc_regmap_config);
114	if (IS_ERR(ddata->regmap)) {
115		ret = PTR_ERR(ddata->regmap);
116		dev_err(dev, "Failed to allocate regmap: %d\n", ret);
117		return ret;
118	}
119
120	spi_set_drvdata(spi, ddata);
121
122	ret = check_m10bmc_version(ddata);
123	if (ret) {
124		dev_err(dev, "Failed to identify m10bmc hardware\n");
125		return ret;
126	}
127
128	switch (id->driver_data) {
129	case M10_N3000:
130		cells = m10bmc_pacn3000_subdevs;
131		n_cell = ARRAY_SIZE(m10bmc_pacn3000_subdevs);
132		break;
133	default:
134		return -ENODEV;
135	}
136
137	ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, cells, n_cell,
138				   NULL, 0, NULL);
139	if (ret)
140		dev_err(dev, "Failed to register sub-devices: %d\n", ret);
141
142	return ret;
143}
144
145static const struct spi_device_id m10bmc_spi_id[] = {
146	{ "m10-n3000", M10_N3000 },
147	{ }
148};
149MODULE_DEVICE_TABLE(spi, m10bmc_spi_id);
150
151static struct spi_driver intel_m10bmc_spi_driver = {
152	.driver = {
153		.name = "intel-m10-bmc",
154		.dev_groups = m10bmc_groups,
155	},
156	.probe = intel_m10_bmc_spi_probe,
157	.id_table = m10bmc_spi_id,
158};
159module_spi_driver(intel_m10bmc_spi_driver);
160
161MODULE_DESCRIPTION("Intel MAX 10 BMC Device Driver");
162MODULE_AUTHOR("Intel Corporation");
163MODULE_LICENSE("GPL v2");
164MODULE_ALIAS("spi:intel-m10-bmc");
165