18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Core driver for ams AS3722 PMICs 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (C) 2013 AMS AG 68c2ecf20Sopenharmony_ci * Copyright (c) 2013, NVIDIA Corporation. All rights reserved. 78c2ecf20Sopenharmony_ci * 88c2ecf20Sopenharmony_ci * Author: Florian Lobmaier <florian.lobmaier@ams.com> 98c2ecf20Sopenharmony_ci * Author: Laxman Dewangan <ldewangan@nvidia.com> 108c2ecf20Sopenharmony_ci */ 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ci#include <linux/err.h> 138c2ecf20Sopenharmony_ci#include <linux/i2c.h> 148c2ecf20Sopenharmony_ci#include <linux/interrupt.h> 158c2ecf20Sopenharmony_ci#include <linux/irq.h> 168c2ecf20Sopenharmony_ci#include <linux/kernel.h> 178c2ecf20Sopenharmony_ci#include <linux/module.h> 188c2ecf20Sopenharmony_ci#include <linux/mfd/core.h> 198c2ecf20Sopenharmony_ci#include <linux/mfd/as3722.h> 208c2ecf20Sopenharmony_ci#include <linux/of.h> 218c2ecf20Sopenharmony_ci#include <linux/regmap.h> 228c2ecf20Sopenharmony_ci#include <linux/slab.h> 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci#define AS3722_DEVICE_ID 0x0C 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_cistatic const struct resource as3722_rtc_resource[] = { 278c2ecf20Sopenharmony_ci { 288c2ecf20Sopenharmony_ci .name = "as3722-rtc-alarm", 298c2ecf20Sopenharmony_ci .start = AS3722_IRQ_RTC_ALARM, 308c2ecf20Sopenharmony_ci .end = AS3722_IRQ_RTC_ALARM, 318c2ecf20Sopenharmony_ci .flags = IORESOURCE_IRQ, 328c2ecf20Sopenharmony_ci }, 338c2ecf20Sopenharmony_ci}; 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_cistatic const struct resource as3722_adc_resource[] = { 368c2ecf20Sopenharmony_ci { 378c2ecf20Sopenharmony_ci .name = "as3722-adc", 388c2ecf20Sopenharmony_ci .start = AS3722_IRQ_ADC, 398c2ecf20Sopenharmony_ci .end = AS3722_IRQ_ADC, 408c2ecf20Sopenharmony_ci .flags = IORESOURCE_IRQ, 418c2ecf20Sopenharmony_ci }, 428c2ecf20Sopenharmony_ci}; 438c2ecf20Sopenharmony_ci 448c2ecf20Sopenharmony_cistatic const struct mfd_cell as3722_devs[] = { 458c2ecf20Sopenharmony_ci { 468c2ecf20Sopenharmony_ci .name = "as3722-pinctrl", 478c2ecf20Sopenharmony_ci }, 488c2ecf20Sopenharmony_ci { 498c2ecf20Sopenharmony_ci .name = "as3722-regulator", 508c2ecf20Sopenharmony_ci }, 518c2ecf20Sopenharmony_ci { 528c2ecf20Sopenharmony_ci .name = "as3722-rtc", 538c2ecf20Sopenharmony_ci .num_resources = ARRAY_SIZE(as3722_rtc_resource), 548c2ecf20Sopenharmony_ci .resources = as3722_rtc_resource, 558c2ecf20Sopenharmony_ci }, 568c2ecf20Sopenharmony_ci { 578c2ecf20Sopenharmony_ci .name = "as3722-adc", 588c2ecf20Sopenharmony_ci .num_resources = ARRAY_SIZE(as3722_adc_resource), 598c2ecf20Sopenharmony_ci .resources = as3722_adc_resource, 608c2ecf20Sopenharmony_ci }, 618c2ecf20Sopenharmony_ci { 628c2ecf20Sopenharmony_ci .name = "as3722-power-off", 638c2ecf20Sopenharmony_ci }, 648c2ecf20Sopenharmony_ci { 658c2ecf20Sopenharmony_ci .name = "as3722-wdt", 668c2ecf20Sopenharmony_ci }, 678c2ecf20Sopenharmony_ci}; 688c2ecf20Sopenharmony_ci 698c2ecf20Sopenharmony_cistatic const struct regmap_irq as3722_irqs[] = { 708c2ecf20Sopenharmony_ci /* INT1 IRQs */ 718c2ecf20Sopenharmony_ci [AS3722_IRQ_LID] = { 728c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK1_LID, 738c2ecf20Sopenharmony_ci }, 748c2ecf20Sopenharmony_ci [AS3722_IRQ_ACOK] = { 758c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK1_ACOK, 768c2ecf20Sopenharmony_ci }, 778c2ecf20Sopenharmony_ci [AS3722_IRQ_ENABLE1] = { 788c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK1_ENABLE1, 798c2ecf20Sopenharmony_ci }, 808c2ecf20Sopenharmony_ci [AS3722_IRQ_OCCUR_ALARM_SD0] = { 818c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK1_OCURR_ALARM_SD0, 828c2ecf20Sopenharmony_ci }, 838c2ecf20Sopenharmony_ci [AS3722_IRQ_ONKEY_LONG_PRESS] = { 848c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK1_ONKEY_LONG, 858c2ecf20Sopenharmony_ci }, 868c2ecf20Sopenharmony_ci [AS3722_IRQ_ONKEY] = { 878c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK1_ONKEY, 888c2ecf20Sopenharmony_ci }, 898c2ecf20Sopenharmony_ci [AS3722_IRQ_OVTMP] = { 908c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK1_OVTMP, 918c2ecf20Sopenharmony_ci }, 928c2ecf20Sopenharmony_ci [AS3722_IRQ_LOWBAT] = { 938c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK1_LOWBAT, 948c2ecf20Sopenharmony_ci }, 958c2ecf20Sopenharmony_ci 968c2ecf20Sopenharmony_ci /* INT2 IRQs */ 978c2ecf20Sopenharmony_ci [AS3722_IRQ_SD0_LV] = { 988c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK2_SD0_LV, 998c2ecf20Sopenharmony_ci .reg_offset = 1, 1008c2ecf20Sopenharmony_ci }, 1018c2ecf20Sopenharmony_ci [AS3722_IRQ_SD1_LV] = { 1028c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK2_SD1_LV, 1038c2ecf20Sopenharmony_ci .reg_offset = 1, 1048c2ecf20Sopenharmony_ci }, 1058c2ecf20Sopenharmony_ci [AS3722_IRQ_SD2_LV] = { 1068c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK2_SD2345_LV, 1078c2ecf20Sopenharmony_ci .reg_offset = 1, 1088c2ecf20Sopenharmony_ci }, 1098c2ecf20Sopenharmony_ci [AS3722_IRQ_PWM1_OV_PROT] = { 1108c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK2_PWM1_OV_PROT, 1118c2ecf20Sopenharmony_ci .reg_offset = 1, 1128c2ecf20Sopenharmony_ci }, 1138c2ecf20Sopenharmony_ci [AS3722_IRQ_PWM2_OV_PROT] = { 1148c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK2_PWM2_OV_PROT, 1158c2ecf20Sopenharmony_ci .reg_offset = 1, 1168c2ecf20Sopenharmony_ci }, 1178c2ecf20Sopenharmony_ci [AS3722_IRQ_ENABLE2] = { 1188c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK2_ENABLE2, 1198c2ecf20Sopenharmony_ci .reg_offset = 1, 1208c2ecf20Sopenharmony_ci }, 1218c2ecf20Sopenharmony_ci [AS3722_IRQ_SD6_LV] = { 1228c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK2_SD6_LV, 1238c2ecf20Sopenharmony_ci .reg_offset = 1, 1248c2ecf20Sopenharmony_ci }, 1258c2ecf20Sopenharmony_ci [AS3722_IRQ_RTC_REP] = { 1268c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK2_RTC_REP, 1278c2ecf20Sopenharmony_ci .reg_offset = 1, 1288c2ecf20Sopenharmony_ci }, 1298c2ecf20Sopenharmony_ci 1308c2ecf20Sopenharmony_ci /* INT3 IRQs */ 1318c2ecf20Sopenharmony_ci [AS3722_IRQ_RTC_ALARM] = { 1328c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK3_RTC_ALARM, 1338c2ecf20Sopenharmony_ci .reg_offset = 2, 1348c2ecf20Sopenharmony_ci }, 1358c2ecf20Sopenharmony_ci [AS3722_IRQ_GPIO1] = { 1368c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK3_GPIO1, 1378c2ecf20Sopenharmony_ci .reg_offset = 2, 1388c2ecf20Sopenharmony_ci }, 1398c2ecf20Sopenharmony_ci [AS3722_IRQ_GPIO2] = { 1408c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK3_GPIO2, 1418c2ecf20Sopenharmony_ci .reg_offset = 2, 1428c2ecf20Sopenharmony_ci }, 1438c2ecf20Sopenharmony_ci [AS3722_IRQ_GPIO3] = { 1448c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK3_GPIO3, 1458c2ecf20Sopenharmony_ci .reg_offset = 2, 1468c2ecf20Sopenharmony_ci }, 1478c2ecf20Sopenharmony_ci [AS3722_IRQ_GPIO4] = { 1488c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK3_GPIO4, 1498c2ecf20Sopenharmony_ci .reg_offset = 2, 1508c2ecf20Sopenharmony_ci }, 1518c2ecf20Sopenharmony_ci [AS3722_IRQ_GPIO5] = { 1528c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK3_GPIO5, 1538c2ecf20Sopenharmony_ci .reg_offset = 2, 1548c2ecf20Sopenharmony_ci }, 1558c2ecf20Sopenharmony_ci [AS3722_IRQ_WATCHDOG] = { 1568c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK3_WATCHDOG, 1578c2ecf20Sopenharmony_ci .reg_offset = 2, 1588c2ecf20Sopenharmony_ci }, 1598c2ecf20Sopenharmony_ci [AS3722_IRQ_ENABLE3] = { 1608c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK3_ENABLE3, 1618c2ecf20Sopenharmony_ci .reg_offset = 2, 1628c2ecf20Sopenharmony_ci }, 1638c2ecf20Sopenharmony_ci 1648c2ecf20Sopenharmony_ci /* INT4 IRQs */ 1658c2ecf20Sopenharmony_ci [AS3722_IRQ_TEMP_SD0_SHUTDOWN] = { 1668c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK4_TEMP_SD0_SHUTDOWN, 1678c2ecf20Sopenharmony_ci .reg_offset = 3, 1688c2ecf20Sopenharmony_ci }, 1698c2ecf20Sopenharmony_ci [AS3722_IRQ_TEMP_SD1_SHUTDOWN] = { 1708c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK4_TEMP_SD1_SHUTDOWN, 1718c2ecf20Sopenharmony_ci .reg_offset = 3, 1728c2ecf20Sopenharmony_ci }, 1738c2ecf20Sopenharmony_ci [AS3722_IRQ_TEMP_SD2_SHUTDOWN] = { 1748c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK4_TEMP_SD6_SHUTDOWN, 1758c2ecf20Sopenharmony_ci .reg_offset = 3, 1768c2ecf20Sopenharmony_ci }, 1778c2ecf20Sopenharmony_ci [AS3722_IRQ_TEMP_SD0_ALARM] = { 1788c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK4_TEMP_SD0_ALARM, 1798c2ecf20Sopenharmony_ci .reg_offset = 3, 1808c2ecf20Sopenharmony_ci }, 1818c2ecf20Sopenharmony_ci [AS3722_IRQ_TEMP_SD1_ALARM] = { 1828c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK4_TEMP_SD1_ALARM, 1838c2ecf20Sopenharmony_ci .reg_offset = 3, 1848c2ecf20Sopenharmony_ci }, 1858c2ecf20Sopenharmony_ci [AS3722_IRQ_TEMP_SD6_ALARM] = { 1868c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK4_TEMP_SD6_ALARM, 1878c2ecf20Sopenharmony_ci .reg_offset = 3, 1888c2ecf20Sopenharmony_ci }, 1898c2ecf20Sopenharmony_ci [AS3722_IRQ_OCCUR_ALARM_SD6] = { 1908c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK4_OCCUR_ALARM_SD6, 1918c2ecf20Sopenharmony_ci .reg_offset = 3, 1928c2ecf20Sopenharmony_ci }, 1938c2ecf20Sopenharmony_ci [AS3722_IRQ_ADC] = { 1948c2ecf20Sopenharmony_ci .mask = AS3722_INTERRUPT_MASK4_ADC, 1958c2ecf20Sopenharmony_ci .reg_offset = 3, 1968c2ecf20Sopenharmony_ci }, 1978c2ecf20Sopenharmony_ci}; 1988c2ecf20Sopenharmony_ci 1998c2ecf20Sopenharmony_cistatic const struct regmap_irq_chip as3722_irq_chip = { 2008c2ecf20Sopenharmony_ci .name = "as3722", 2018c2ecf20Sopenharmony_ci .irqs = as3722_irqs, 2028c2ecf20Sopenharmony_ci .num_irqs = ARRAY_SIZE(as3722_irqs), 2038c2ecf20Sopenharmony_ci .num_regs = 4, 2048c2ecf20Sopenharmony_ci .status_base = AS3722_INTERRUPT_STATUS1_REG, 2058c2ecf20Sopenharmony_ci .mask_base = AS3722_INTERRUPT_MASK1_REG, 2068c2ecf20Sopenharmony_ci}; 2078c2ecf20Sopenharmony_ci 2088c2ecf20Sopenharmony_cistatic int as3722_check_device_id(struct as3722 *as3722) 2098c2ecf20Sopenharmony_ci{ 2108c2ecf20Sopenharmony_ci u32 val; 2118c2ecf20Sopenharmony_ci int ret; 2128c2ecf20Sopenharmony_ci 2138c2ecf20Sopenharmony_ci /* Check that this is actually a AS3722 */ 2148c2ecf20Sopenharmony_ci ret = as3722_read(as3722, AS3722_ASIC_ID1_REG, &val); 2158c2ecf20Sopenharmony_ci if (ret < 0) { 2168c2ecf20Sopenharmony_ci dev_err(as3722->dev, "ASIC_ID1 read failed: %d\n", ret); 2178c2ecf20Sopenharmony_ci return ret; 2188c2ecf20Sopenharmony_ci } 2198c2ecf20Sopenharmony_ci 2208c2ecf20Sopenharmony_ci if (val != AS3722_DEVICE_ID) { 2218c2ecf20Sopenharmony_ci dev_err(as3722->dev, "Device is not AS3722, ID is 0x%x\n", val); 2228c2ecf20Sopenharmony_ci return -ENODEV; 2238c2ecf20Sopenharmony_ci } 2248c2ecf20Sopenharmony_ci 2258c2ecf20Sopenharmony_ci ret = as3722_read(as3722, AS3722_ASIC_ID2_REG, &val); 2268c2ecf20Sopenharmony_ci if (ret < 0) { 2278c2ecf20Sopenharmony_ci dev_err(as3722->dev, "ASIC_ID2 read failed: %d\n", ret); 2288c2ecf20Sopenharmony_ci return ret; 2298c2ecf20Sopenharmony_ci } 2308c2ecf20Sopenharmony_ci 2318c2ecf20Sopenharmony_ci dev_info(as3722->dev, "AS3722 with revision 0x%x found\n", val); 2328c2ecf20Sopenharmony_ci return 0; 2338c2ecf20Sopenharmony_ci} 2348c2ecf20Sopenharmony_ci 2358c2ecf20Sopenharmony_cistatic int as3722_configure_pullups(struct as3722 *as3722) 2368c2ecf20Sopenharmony_ci{ 2378c2ecf20Sopenharmony_ci int ret; 2388c2ecf20Sopenharmony_ci u32 val = 0; 2398c2ecf20Sopenharmony_ci 2408c2ecf20Sopenharmony_ci if (as3722->en_intern_int_pullup) 2418c2ecf20Sopenharmony_ci val |= AS3722_INT_PULL_UP; 2428c2ecf20Sopenharmony_ci if (as3722->en_intern_i2c_pullup) 2438c2ecf20Sopenharmony_ci val |= AS3722_I2C_PULL_UP; 2448c2ecf20Sopenharmony_ci 2458c2ecf20Sopenharmony_ci ret = as3722_update_bits(as3722, AS3722_IOVOLTAGE_REG, 2468c2ecf20Sopenharmony_ci AS3722_INT_PULL_UP | AS3722_I2C_PULL_UP, val); 2478c2ecf20Sopenharmony_ci if (ret < 0) 2488c2ecf20Sopenharmony_ci dev_err(as3722->dev, "IOVOLTAGE_REG update failed: %d\n", ret); 2498c2ecf20Sopenharmony_ci return ret; 2508c2ecf20Sopenharmony_ci} 2518c2ecf20Sopenharmony_ci 2528c2ecf20Sopenharmony_cistatic const struct regmap_range as3722_readable_ranges[] = { 2538c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_SD0_VOLTAGE_REG, AS3722_SD6_VOLTAGE_REG), 2548c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_GPIO0_CONTROL_REG, AS3722_LDO7_VOLTAGE_REG), 2558c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_LDO9_VOLTAGE_REG, AS3722_REG_SEQU_MOD3_REG), 2568c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_SD_PHSW_CTRL_REG, AS3722_PWM_CONTROL_H_REG), 2578c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_WATCHDOG_TIMER_REG, AS3722_WATCHDOG_TIMER_REG), 2588c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_WATCHDOG_SOFTWARE_SIGNAL_REG, 2598c2ecf20Sopenharmony_ci AS3722_BATTERY_VOLTAGE_MONITOR2_REG), 2608c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_SD_CONTROL_REG, AS3722_PWM_VCONTROL4_REG), 2618c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_BB_CHARGER_REG, AS3722_SRAM_REG), 2628c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_RTC_ACCESS_REG, AS3722_RTC_ACCESS_REG), 2638c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_RTC_STATUS_REG, AS3722_TEMP_STATUS_REG), 2648c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_ADC0_CONTROL_REG, AS3722_ADC_CONFIGURATION_REG), 2658c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_ASIC_ID1_REG, AS3722_ASIC_ID2_REG), 2668c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_LOCK_REG, AS3722_LOCK_REG), 2678c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_FUSE7_REG, AS3722_FUSE7_REG), 2688c2ecf20Sopenharmony_ci}; 2698c2ecf20Sopenharmony_ci 2708c2ecf20Sopenharmony_cistatic const struct regmap_access_table as3722_readable_table = { 2718c2ecf20Sopenharmony_ci .yes_ranges = as3722_readable_ranges, 2728c2ecf20Sopenharmony_ci .n_yes_ranges = ARRAY_SIZE(as3722_readable_ranges), 2738c2ecf20Sopenharmony_ci}; 2748c2ecf20Sopenharmony_ci 2758c2ecf20Sopenharmony_cistatic const struct regmap_range as3722_writable_ranges[] = { 2768c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_SD0_VOLTAGE_REG, AS3722_SD6_VOLTAGE_REG), 2778c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_GPIO0_CONTROL_REG, AS3722_LDO7_VOLTAGE_REG), 2788c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_LDO9_VOLTAGE_REG, AS3722_GPIO_SIGNAL_OUT_REG), 2798c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_REG_SEQU_MOD1_REG, AS3722_REG_SEQU_MOD3_REG), 2808c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_SD_PHSW_CTRL_REG, AS3722_PWM_CONTROL_H_REG), 2818c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_WATCHDOG_TIMER_REG, AS3722_WATCHDOG_TIMER_REG), 2828c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_WATCHDOG_SOFTWARE_SIGNAL_REG, 2838c2ecf20Sopenharmony_ci AS3722_BATTERY_VOLTAGE_MONITOR2_REG), 2848c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_SD_CONTROL_REG, AS3722_PWM_VCONTROL4_REG), 2858c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_BB_CHARGER_REG, AS3722_SRAM_REG), 2868c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_INTERRUPT_MASK1_REG, AS3722_TEMP_STATUS_REG), 2878c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_ADC0_CONTROL_REG, AS3722_ADC1_CONTROL_REG), 2888c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_ADC1_THRESHOLD_HI_MSB_REG, 2898c2ecf20Sopenharmony_ci AS3722_ADC_CONFIGURATION_REG), 2908c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_LOCK_REG, AS3722_LOCK_REG), 2918c2ecf20Sopenharmony_ci}; 2928c2ecf20Sopenharmony_ci 2938c2ecf20Sopenharmony_cistatic const struct regmap_access_table as3722_writable_table = { 2948c2ecf20Sopenharmony_ci .yes_ranges = as3722_writable_ranges, 2958c2ecf20Sopenharmony_ci .n_yes_ranges = ARRAY_SIZE(as3722_writable_ranges), 2968c2ecf20Sopenharmony_ci}; 2978c2ecf20Sopenharmony_ci 2988c2ecf20Sopenharmony_cistatic const struct regmap_range as3722_cacheable_ranges[] = { 2998c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_SD0_VOLTAGE_REG, AS3722_LDO11_VOLTAGE_REG), 3008c2ecf20Sopenharmony_ci regmap_reg_range(AS3722_SD_CONTROL_REG, AS3722_LDOCONTROL1_REG), 3018c2ecf20Sopenharmony_ci}; 3028c2ecf20Sopenharmony_ci 3038c2ecf20Sopenharmony_cistatic const struct regmap_access_table as3722_volatile_table = { 3048c2ecf20Sopenharmony_ci .no_ranges = as3722_cacheable_ranges, 3058c2ecf20Sopenharmony_ci .n_no_ranges = ARRAY_SIZE(as3722_cacheable_ranges), 3068c2ecf20Sopenharmony_ci}; 3078c2ecf20Sopenharmony_ci 3088c2ecf20Sopenharmony_cistatic const struct regmap_config as3722_regmap_config = { 3098c2ecf20Sopenharmony_ci .reg_bits = 8, 3108c2ecf20Sopenharmony_ci .val_bits = 8, 3118c2ecf20Sopenharmony_ci .max_register = AS3722_MAX_REGISTER, 3128c2ecf20Sopenharmony_ci .cache_type = REGCACHE_RBTREE, 3138c2ecf20Sopenharmony_ci .rd_table = &as3722_readable_table, 3148c2ecf20Sopenharmony_ci .wr_table = &as3722_writable_table, 3158c2ecf20Sopenharmony_ci .volatile_table = &as3722_volatile_table, 3168c2ecf20Sopenharmony_ci}; 3178c2ecf20Sopenharmony_ci 3188c2ecf20Sopenharmony_cistatic int as3722_i2c_of_probe(struct i2c_client *i2c, 3198c2ecf20Sopenharmony_ci struct as3722 *as3722) 3208c2ecf20Sopenharmony_ci{ 3218c2ecf20Sopenharmony_ci struct device_node *np = i2c->dev.of_node; 3228c2ecf20Sopenharmony_ci struct irq_data *irq_data; 3238c2ecf20Sopenharmony_ci 3248c2ecf20Sopenharmony_ci if (!np) { 3258c2ecf20Sopenharmony_ci dev_err(&i2c->dev, "Device Tree not found\n"); 3268c2ecf20Sopenharmony_ci return -EINVAL; 3278c2ecf20Sopenharmony_ci } 3288c2ecf20Sopenharmony_ci 3298c2ecf20Sopenharmony_ci irq_data = irq_get_irq_data(i2c->irq); 3308c2ecf20Sopenharmony_ci if (!irq_data) { 3318c2ecf20Sopenharmony_ci dev_err(&i2c->dev, "Invalid IRQ: %d\n", i2c->irq); 3328c2ecf20Sopenharmony_ci return -EINVAL; 3338c2ecf20Sopenharmony_ci } 3348c2ecf20Sopenharmony_ci 3358c2ecf20Sopenharmony_ci as3722->en_intern_int_pullup = of_property_read_bool(np, 3368c2ecf20Sopenharmony_ci "ams,enable-internal-int-pullup"); 3378c2ecf20Sopenharmony_ci as3722->en_intern_i2c_pullup = of_property_read_bool(np, 3388c2ecf20Sopenharmony_ci "ams,enable-internal-i2c-pullup"); 3398c2ecf20Sopenharmony_ci as3722->en_ac_ok_pwr_on = of_property_read_bool(np, 3408c2ecf20Sopenharmony_ci "ams,enable-ac-ok-power-on"); 3418c2ecf20Sopenharmony_ci as3722->irq_flags = irqd_get_trigger_type(irq_data); 3428c2ecf20Sopenharmony_ci dev_dbg(&i2c->dev, "IRQ flags are 0x%08lx\n", as3722->irq_flags); 3438c2ecf20Sopenharmony_ci return 0; 3448c2ecf20Sopenharmony_ci} 3458c2ecf20Sopenharmony_ci 3468c2ecf20Sopenharmony_cistatic int as3722_i2c_probe(struct i2c_client *i2c, 3478c2ecf20Sopenharmony_ci const struct i2c_device_id *id) 3488c2ecf20Sopenharmony_ci{ 3498c2ecf20Sopenharmony_ci struct as3722 *as3722; 3508c2ecf20Sopenharmony_ci unsigned long irq_flags; 3518c2ecf20Sopenharmony_ci int ret; 3528c2ecf20Sopenharmony_ci u8 val = 0; 3538c2ecf20Sopenharmony_ci 3548c2ecf20Sopenharmony_ci as3722 = devm_kzalloc(&i2c->dev, sizeof(struct as3722), GFP_KERNEL); 3558c2ecf20Sopenharmony_ci if (!as3722) 3568c2ecf20Sopenharmony_ci return -ENOMEM; 3578c2ecf20Sopenharmony_ci 3588c2ecf20Sopenharmony_ci as3722->dev = &i2c->dev; 3598c2ecf20Sopenharmony_ci as3722->chip_irq = i2c->irq; 3608c2ecf20Sopenharmony_ci i2c_set_clientdata(i2c, as3722); 3618c2ecf20Sopenharmony_ci 3628c2ecf20Sopenharmony_ci ret = as3722_i2c_of_probe(i2c, as3722); 3638c2ecf20Sopenharmony_ci if (ret < 0) 3648c2ecf20Sopenharmony_ci return ret; 3658c2ecf20Sopenharmony_ci 3668c2ecf20Sopenharmony_ci as3722->regmap = devm_regmap_init_i2c(i2c, &as3722_regmap_config); 3678c2ecf20Sopenharmony_ci if (IS_ERR(as3722->regmap)) { 3688c2ecf20Sopenharmony_ci ret = PTR_ERR(as3722->regmap); 3698c2ecf20Sopenharmony_ci dev_err(&i2c->dev, "regmap init failed: %d\n", ret); 3708c2ecf20Sopenharmony_ci return ret; 3718c2ecf20Sopenharmony_ci } 3728c2ecf20Sopenharmony_ci 3738c2ecf20Sopenharmony_ci ret = as3722_check_device_id(as3722); 3748c2ecf20Sopenharmony_ci if (ret < 0) 3758c2ecf20Sopenharmony_ci return ret; 3768c2ecf20Sopenharmony_ci 3778c2ecf20Sopenharmony_ci irq_flags = as3722->irq_flags | IRQF_ONESHOT; 3788c2ecf20Sopenharmony_ci ret = devm_regmap_add_irq_chip(as3722->dev, as3722->regmap, 3798c2ecf20Sopenharmony_ci as3722->chip_irq, 3808c2ecf20Sopenharmony_ci irq_flags, -1, &as3722_irq_chip, 3818c2ecf20Sopenharmony_ci &as3722->irq_data); 3828c2ecf20Sopenharmony_ci if (ret < 0) { 3838c2ecf20Sopenharmony_ci dev_err(as3722->dev, "Failed to add regmap irq: %d\n", ret); 3848c2ecf20Sopenharmony_ci return ret; 3858c2ecf20Sopenharmony_ci } 3868c2ecf20Sopenharmony_ci 3878c2ecf20Sopenharmony_ci ret = as3722_configure_pullups(as3722); 3888c2ecf20Sopenharmony_ci if (ret < 0) 3898c2ecf20Sopenharmony_ci return ret; 3908c2ecf20Sopenharmony_ci 3918c2ecf20Sopenharmony_ci if (as3722->en_ac_ok_pwr_on) 3928c2ecf20Sopenharmony_ci val = AS3722_CTRL_SEQU1_AC_OK_PWR_ON; 3938c2ecf20Sopenharmony_ci ret = as3722_update_bits(as3722, AS3722_CTRL_SEQU1_REG, 3948c2ecf20Sopenharmony_ci AS3722_CTRL_SEQU1_AC_OK_PWR_ON, val); 3958c2ecf20Sopenharmony_ci if (ret < 0) { 3968c2ecf20Sopenharmony_ci dev_err(as3722->dev, "CTRLsequ1 update failed: %d\n", ret); 3978c2ecf20Sopenharmony_ci return ret; 3988c2ecf20Sopenharmony_ci } 3998c2ecf20Sopenharmony_ci 4008c2ecf20Sopenharmony_ci ret = devm_mfd_add_devices(&i2c->dev, -1, as3722_devs, 4018c2ecf20Sopenharmony_ci ARRAY_SIZE(as3722_devs), NULL, 0, 4028c2ecf20Sopenharmony_ci regmap_irq_get_domain(as3722->irq_data)); 4038c2ecf20Sopenharmony_ci if (ret) { 4048c2ecf20Sopenharmony_ci dev_err(as3722->dev, "Failed to add MFD devices: %d\n", ret); 4058c2ecf20Sopenharmony_ci return ret; 4068c2ecf20Sopenharmony_ci } 4078c2ecf20Sopenharmony_ci 4088c2ecf20Sopenharmony_ci device_init_wakeup(as3722->dev, true); 4098c2ecf20Sopenharmony_ci 4108c2ecf20Sopenharmony_ci dev_dbg(as3722->dev, "AS3722 core driver initialized successfully\n"); 4118c2ecf20Sopenharmony_ci return 0; 4128c2ecf20Sopenharmony_ci} 4138c2ecf20Sopenharmony_ci 4148c2ecf20Sopenharmony_cistatic int __maybe_unused as3722_i2c_suspend(struct device *dev) 4158c2ecf20Sopenharmony_ci{ 4168c2ecf20Sopenharmony_ci struct as3722 *as3722 = dev_get_drvdata(dev); 4178c2ecf20Sopenharmony_ci 4188c2ecf20Sopenharmony_ci if (device_may_wakeup(dev)) 4198c2ecf20Sopenharmony_ci enable_irq_wake(as3722->chip_irq); 4208c2ecf20Sopenharmony_ci disable_irq(as3722->chip_irq); 4218c2ecf20Sopenharmony_ci 4228c2ecf20Sopenharmony_ci return 0; 4238c2ecf20Sopenharmony_ci} 4248c2ecf20Sopenharmony_ci 4258c2ecf20Sopenharmony_cistatic int __maybe_unused as3722_i2c_resume(struct device *dev) 4268c2ecf20Sopenharmony_ci{ 4278c2ecf20Sopenharmony_ci struct as3722 *as3722 = dev_get_drvdata(dev); 4288c2ecf20Sopenharmony_ci 4298c2ecf20Sopenharmony_ci enable_irq(as3722->chip_irq); 4308c2ecf20Sopenharmony_ci 4318c2ecf20Sopenharmony_ci if (device_may_wakeup(dev)) 4328c2ecf20Sopenharmony_ci disable_irq_wake(as3722->chip_irq); 4338c2ecf20Sopenharmony_ci 4348c2ecf20Sopenharmony_ci return 0; 4358c2ecf20Sopenharmony_ci} 4368c2ecf20Sopenharmony_ci 4378c2ecf20Sopenharmony_cistatic const struct of_device_id as3722_of_match[] = { 4388c2ecf20Sopenharmony_ci { .compatible = "ams,as3722", }, 4398c2ecf20Sopenharmony_ci {}, 4408c2ecf20Sopenharmony_ci}; 4418c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(of, as3722_of_match); 4428c2ecf20Sopenharmony_ci 4438c2ecf20Sopenharmony_cistatic const struct i2c_device_id as3722_i2c_id[] = { 4448c2ecf20Sopenharmony_ci { "as3722", 0 }, 4458c2ecf20Sopenharmony_ci {}, 4468c2ecf20Sopenharmony_ci}; 4478c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(i2c, as3722_i2c_id); 4488c2ecf20Sopenharmony_ci 4498c2ecf20Sopenharmony_cistatic const struct dev_pm_ops as3722_pm_ops = { 4508c2ecf20Sopenharmony_ci SET_SYSTEM_SLEEP_PM_OPS(as3722_i2c_suspend, as3722_i2c_resume) 4518c2ecf20Sopenharmony_ci}; 4528c2ecf20Sopenharmony_ci 4538c2ecf20Sopenharmony_cistatic struct i2c_driver as3722_i2c_driver = { 4548c2ecf20Sopenharmony_ci .driver = { 4558c2ecf20Sopenharmony_ci .name = "as3722", 4568c2ecf20Sopenharmony_ci .of_match_table = as3722_of_match, 4578c2ecf20Sopenharmony_ci .pm = &as3722_pm_ops, 4588c2ecf20Sopenharmony_ci }, 4598c2ecf20Sopenharmony_ci .probe = as3722_i2c_probe, 4608c2ecf20Sopenharmony_ci .id_table = as3722_i2c_id, 4618c2ecf20Sopenharmony_ci}; 4628c2ecf20Sopenharmony_ci 4638c2ecf20Sopenharmony_cimodule_i2c_driver(as3722_i2c_driver); 4648c2ecf20Sopenharmony_ci 4658c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("I2C support for AS3722 PMICs"); 4668c2ecf20Sopenharmony_ciMODULE_AUTHOR("Florian Lobmaier <florian.lobmaier@ams.com>"); 4678c2ecf20Sopenharmony_ciMODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>"); 4688c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL"); 469