18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only
28c2ecf20Sopenharmony_ci#
38c2ecf20Sopenharmony_ci# Memory devices
48c2ecf20Sopenharmony_ci#
58c2ecf20Sopenharmony_ci
68c2ecf20Sopenharmony_cimenuconfig MEMORY
78c2ecf20Sopenharmony_ci	bool "Memory Controller drivers"
88c2ecf20Sopenharmony_ci	help
98c2ecf20Sopenharmony_ci	  This option allows to enable specific memory controller drivers,
108c2ecf20Sopenharmony_ci	  useful mostly on embedded systems.  These could be controllers
118c2ecf20Sopenharmony_ci	  for DRAM (SDR, DDR), ROM, SRAM and others.  The drivers features
128c2ecf20Sopenharmony_ci	  vary from memory tuning and frequency scaling to enabling
138c2ecf20Sopenharmony_ci	  access to attached peripherals through memory bus.
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_ciif MEMORY
168c2ecf20Sopenharmony_ci
178c2ecf20Sopenharmony_ciconfig DDR
188c2ecf20Sopenharmony_ci	bool
198c2ecf20Sopenharmony_ci	help
208c2ecf20Sopenharmony_ci	  Data from JEDEC specs for DDR SDRAM memories,
218c2ecf20Sopenharmony_ci	  particularly the AC timing parameters and addressing
228c2ecf20Sopenharmony_ci	  information. This data is useful for drivers handling
238c2ecf20Sopenharmony_ci	  DDR SDRAM controllers.
248c2ecf20Sopenharmony_ci
258c2ecf20Sopenharmony_ciconfig ARM_PL172_MPMC
268c2ecf20Sopenharmony_ci	tristate "ARM PL172 MPMC driver"
278c2ecf20Sopenharmony_ci	depends on ARM_AMBA && OF
288c2ecf20Sopenharmony_ci	help
298c2ecf20Sopenharmony_ci	  This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
308c2ecf20Sopenharmony_ci	  If you have an embedded system with an AMBA bus and a PL172
318c2ecf20Sopenharmony_ci	  controller, say Y or M here.
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_ciconfig ATMEL_SDRAMC
348c2ecf20Sopenharmony_ci	bool "Atmel (Multi-port DDR-)SDRAM Controller"
358c2ecf20Sopenharmony_ci	default y if ARCH_AT91
368c2ecf20Sopenharmony_ci	depends on ARCH_AT91 || COMPILE_TEST
378c2ecf20Sopenharmony_ci	depends on OF
388c2ecf20Sopenharmony_ci	help
398c2ecf20Sopenharmony_ci	  This driver is for Atmel SDRAM Controller or Atmel Multi-port
408c2ecf20Sopenharmony_ci	  DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
418c2ecf20Sopenharmony_ci	  Starting with the at91sam9g45, this controller supports SDR, DDR and
428c2ecf20Sopenharmony_ci	  LP-DDR memories.
438c2ecf20Sopenharmony_ci
448c2ecf20Sopenharmony_ciconfig ATMEL_EBI
458c2ecf20Sopenharmony_ci	bool "Atmel EBI driver"
468c2ecf20Sopenharmony_ci	default y if ARCH_AT91
478c2ecf20Sopenharmony_ci	depends on ARCH_AT91 || COMPILE_TEST
488c2ecf20Sopenharmony_ci	depends on OF
498c2ecf20Sopenharmony_ci	select MFD_SYSCON
508c2ecf20Sopenharmony_ci	select MFD_ATMEL_SMC
518c2ecf20Sopenharmony_ci	help
528c2ecf20Sopenharmony_ci	  Driver for Atmel EBI controller.
538c2ecf20Sopenharmony_ci	  Used to configure the EBI (external bus interface) when the device-
548c2ecf20Sopenharmony_ci	  tree is used. This bus supports NANDs, external ethernet controller,
558c2ecf20Sopenharmony_ci	  SRAMs, ATA devices, etc.
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_ciconfig BRCMSTB_DPFE
588c2ecf20Sopenharmony_ci	bool "Broadcom STB DPFE driver" if COMPILE_TEST
598c2ecf20Sopenharmony_ci	default y if ARCH_BRCMSTB
608c2ecf20Sopenharmony_ci	depends on ARCH_BRCMSTB || COMPILE_TEST
618c2ecf20Sopenharmony_ci	help
628c2ecf20Sopenharmony_ci	  This driver provides access to the DPFE interface of Broadcom
638c2ecf20Sopenharmony_ci	  STB SoCs. The firmware running on the DCPU inside the DDR PHY can
648c2ecf20Sopenharmony_ci	  provide current information about the system's RAM, for instance
658c2ecf20Sopenharmony_ci	  the DRAM refresh rate. This can be used as an indirect indicator
668c2ecf20Sopenharmony_ci	  for the DRAM's temperature. Slower refresh rate means cooler RAM,
678c2ecf20Sopenharmony_ci	  higher refresh rate means hotter RAM.
688c2ecf20Sopenharmony_ci
698c2ecf20Sopenharmony_ciconfig BT1_L2_CTL
708c2ecf20Sopenharmony_ci	bool "Baikal-T1 CM2 L2-RAM Cache Control Block"
718c2ecf20Sopenharmony_ci	depends on MIPS_BAIKAL_T1 || COMPILE_TEST
728c2ecf20Sopenharmony_ci	select MFD_SYSCON
738c2ecf20Sopenharmony_ci	help
748c2ecf20Sopenharmony_ci	  Baikal-T1 CPU is based on the MIPS P5600 Warrior IP-core. The CPU
758c2ecf20Sopenharmony_ci	  resides Coherency Manager v2 with embedded 1MB L2-cache. It's
768c2ecf20Sopenharmony_ci	  possible to tune the L2 cache performance up by setting the data,
778c2ecf20Sopenharmony_ci	  tags and way-select latencies of RAM access. This driver provides a
788c2ecf20Sopenharmony_ci	  dt properties-based and sysfs interface for it.
798c2ecf20Sopenharmony_ci
808c2ecf20Sopenharmony_ciconfig TI_AEMIF
818c2ecf20Sopenharmony_ci	tristate "Texas Instruments AEMIF driver"
828c2ecf20Sopenharmony_ci	depends on ARCH_DAVINCI || ARCH_KEYSTONE || COMPILE_TEST
838c2ecf20Sopenharmony_ci	depends on OF
848c2ecf20Sopenharmony_ci	help
858c2ecf20Sopenharmony_ci	  This driver is for the AEMIF module available in Texas Instruments
868c2ecf20Sopenharmony_ci	  SoCs. AEMIF stands for Asynchronous External Memory Interface and
878c2ecf20Sopenharmony_ci	  is intended to provide a glue-less interface to a variety of
888c2ecf20Sopenharmony_ci	  asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
898c2ecf20Sopenharmony_ci	  of 256M bytes of any of these memories can be accessed at a given
908c2ecf20Sopenharmony_ci	  time via four chip selects with 64M byte access per chip select.
918c2ecf20Sopenharmony_ci
928c2ecf20Sopenharmony_ciconfig TI_EMIF
938c2ecf20Sopenharmony_ci	tristate "Texas Instruments EMIF driver"
948c2ecf20Sopenharmony_ci	depends on ARCH_OMAP2PLUS || COMPILE_TEST
958c2ecf20Sopenharmony_ci	select DDR
968c2ecf20Sopenharmony_ci	help
978c2ecf20Sopenharmony_ci	  This driver is for the EMIF module available in Texas Instruments
988c2ecf20Sopenharmony_ci	  SoCs. EMIF is an SDRAM controller that, based on its revision,
998c2ecf20Sopenharmony_ci	  supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
1008c2ecf20Sopenharmony_ci	  This driver takes care of only LPDDR2 memories presently. The
1018c2ecf20Sopenharmony_ci	  functions of the driver includes re-configuring AC timing
1028c2ecf20Sopenharmony_ci	  parameters and other settings during frequency, voltage and
1038c2ecf20Sopenharmony_ci	  temperature changes
1048c2ecf20Sopenharmony_ci
1058c2ecf20Sopenharmony_ciconfig OMAP_GPMC
1068c2ecf20Sopenharmony_ci	bool "Texas Instruments OMAP SoC GPMC driver" if COMPILE_TEST
1078c2ecf20Sopenharmony_ci	depends on OF_ADDRESS
1088c2ecf20Sopenharmony_ci	select GPIOLIB
1098c2ecf20Sopenharmony_ci	help
1108c2ecf20Sopenharmony_ci	  This driver is for the General Purpose Memory Controller (GPMC)
1118c2ecf20Sopenharmony_ci	  present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
1128c2ecf20Sopenharmony_ci	  interfacing to a variety of asynchronous as well as synchronous
1138c2ecf20Sopenharmony_ci	  memory drives like NOR, NAND, OneNAND, SRAM.
1148c2ecf20Sopenharmony_ci
1158c2ecf20Sopenharmony_ciconfig OMAP_GPMC_DEBUG
1168c2ecf20Sopenharmony_ci	bool "Enable GPMC debug output and skip reset of GPMC during init"
1178c2ecf20Sopenharmony_ci	depends on OMAP_GPMC
1188c2ecf20Sopenharmony_ci	help
1198c2ecf20Sopenharmony_ci	  Enables verbose debugging mostly to decode the bootloader provided
1208c2ecf20Sopenharmony_ci	  timings. To preserve the bootloader provided timings, the reset
1218c2ecf20Sopenharmony_ci	  of GPMC is skipped during init. Enable this during development to
1228c2ecf20Sopenharmony_ci	  configure devices connected to the GPMC bus.
1238c2ecf20Sopenharmony_ci
1248c2ecf20Sopenharmony_ci	  NOTE: In addition to matching the register setup with the bootloader
1258c2ecf20Sopenharmony_ci	  you also need to match the GPMC FCLK frequency used by the
1268c2ecf20Sopenharmony_ci	  bootloader or else the GPMC timings won't be identical with the
1278c2ecf20Sopenharmony_ci	  bootloader timings.
1288c2ecf20Sopenharmony_ci
1298c2ecf20Sopenharmony_ciconfig TI_EMIF_SRAM
1308c2ecf20Sopenharmony_ci	tristate "Texas Instruments EMIF SRAM driver"
1318c2ecf20Sopenharmony_ci	depends on SOC_AM33XX || SOC_AM43XX || (ARM && CPU_V7 && COMPILE_TEST)
1328c2ecf20Sopenharmony_ci	depends on SRAM
1338c2ecf20Sopenharmony_ci	help
1348c2ecf20Sopenharmony_ci	  This driver is for the EMIF module available on Texas Instruments
1358c2ecf20Sopenharmony_ci	  AM33XX and AM43XX SoCs and is required for PM. Certain parts of
1368c2ecf20Sopenharmony_ci	  the EMIF PM code must run from on-chip SRAM late in the suspend
1378c2ecf20Sopenharmony_ci	  sequence so this driver provides several relocatable PM functions
1388c2ecf20Sopenharmony_ci	  for the SoC PM code to use.
1398c2ecf20Sopenharmony_ci
1408c2ecf20Sopenharmony_ciconfig MVEBU_DEVBUS
1418c2ecf20Sopenharmony_ci	bool "Marvell EBU Device Bus Controller"
1428c2ecf20Sopenharmony_ci	default y if PLAT_ORION
1438c2ecf20Sopenharmony_ci	depends on PLAT_ORION || COMPILE_TEST
1448c2ecf20Sopenharmony_ci	depends on OF
1458c2ecf20Sopenharmony_ci	help
1468c2ecf20Sopenharmony_ci	  This driver is for the Device Bus controller available in some
1478c2ecf20Sopenharmony_ci	  Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
1488c2ecf20Sopenharmony_ci	  Armada 370 and Armada XP. This controller allows to handle flash
1498c2ecf20Sopenharmony_ci	  devices such as NOR, NAND, SRAM, and FPGA.
1508c2ecf20Sopenharmony_ci
1518c2ecf20Sopenharmony_ciconfig FSL_CORENET_CF
1528c2ecf20Sopenharmony_ci	tristate "Freescale CoreNet Error Reporting"
1538c2ecf20Sopenharmony_ci	depends on FSL_SOC_BOOKE || COMPILE_TEST
1548c2ecf20Sopenharmony_ci	help
1558c2ecf20Sopenharmony_ci	  Say Y for reporting of errors from the Freescale CoreNet
1568c2ecf20Sopenharmony_ci	  Coherency Fabric.  Errors reported include accesses to
1578c2ecf20Sopenharmony_ci	  physical addresses that mapped by no local access window
1588c2ecf20Sopenharmony_ci	  (LAW) or an invalid LAW, as well as bad cache state that
1598c2ecf20Sopenharmony_ci	  represents a coherency violation.
1608c2ecf20Sopenharmony_ci
1618c2ecf20Sopenharmony_ciconfig FSL_IFC
1628c2ecf20Sopenharmony_ci	bool "Freescale IFC driver" if COMPILE_TEST
1638c2ecf20Sopenharmony_ci	depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST
1648c2ecf20Sopenharmony_ci	depends on HAS_IOMEM
1658c2ecf20Sopenharmony_ci
1668c2ecf20Sopenharmony_ciconfig JZ4780_NEMC
1678c2ecf20Sopenharmony_ci	bool "Ingenic JZ4780 SoC NEMC driver"
1688c2ecf20Sopenharmony_ci	depends on MIPS || COMPILE_TEST
1698c2ecf20Sopenharmony_ci	depends on HAS_IOMEM && OF
1708c2ecf20Sopenharmony_ci	help
1718c2ecf20Sopenharmony_ci	  This driver is for the NAND/External Memory Controller (NEMC) in
1728c2ecf20Sopenharmony_ci	  the Ingenic JZ4780. This controller is used to handle external
1738c2ecf20Sopenharmony_ci	  memory devices such as NAND and SRAM.
1748c2ecf20Sopenharmony_ci
1758c2ecf20Sopenharmony_ciconfig MTK_SMI
1768c2ecf20Sopenharmony_ci	bool "Mediatek SoC Memory Controller driver" if COMPILE_TEST
1778c2ecf20Sopenharmony_ci	depends on ARCH_MEDIATEK || COMPILE_TEST
1788c2ecf20Sopenharmony_ci	help
1798c2ecf20Sopenharmony_ci	  This driver is for the Memory Controller module in MediaTek SoCs,
1808c2ecf20Sopenharmony_ci	  mainly help enable/disable iommu and control the power domain and
1818c2ecf20Sopenharmony_ci	  clocks for each local arbiter.
1828c2ecf20Sopenharmony_ci
1838c2ecf20Sopenharmony_ciconfig DA8XX_DDRCTL
1848c2ecf20Sopenharmony_ci	bool "Texas Instruments da8xx DDR2/mDDR driver"
1858c2ecf20Sopenharmony_ci	depends on ARCH_DAVINCI_DA8XX || COMPILE_TEST
1868c2ecf20Sopenharmony_ci	help
1878c2ecf20Sopenharmony_ci	  This driver is for the DDR2/mDDR Memory Controller present on
1888c2ecf20Sopenharmony_ci	  Texas Instruments da8xx SoCs. It's used to tweak various memory
1898c2ecf20Sopenharmony_ci	  controller configuration options.
1908c2ecf20Sopenharmony_ci
1918c2ecf20Sopenharmony_ciconfig PL353_SMC
1928c2ecf20Sopenharmony_ci	tristate "ARM PL35X Static Memory Controller(SMC) driver"
1938c2ecf20Sopenharmony_ci	default y if ARM
1948c2ecf20Sopenharmony_ci	depends on ARM
1958c2ecf20Sopenharmony_ci	depends on ARM_AMBA || COMPILE_TEST
1968c2ecf20Sopenharmony_ci	help
1978c2ecf20Sopenharmony_ci	  This driver is for the ARM PL351/PL353 Static Memory
1988c2ecf20Sopenharmony_ci	  Controller(SMC) module.
1998c2ecf20Sopenharmony_ci
2008c2ecf20Sopenharmony_ciconfig RENESAS_RPCIF
2018c2ecf20Sopenharmony_ci	tristate "Renesas RPC-IF driver"
2028c2ecf20Sopenharmony_ci	depends on ARCH_RENESAS || COMPILE_TEST
2038c2ecf20Sopenharmony_ci	select REGMAP_MMIO
2048c2ecf20Sopenharmony_ci	help
2058c2ecf20Sopenharmony_ci	  This supports Renesas R-Car Gen3 RPC-IF which provides either SPI
2068c2ecf20Sopenharmony_ci	  host or HyperFlash. You'll have to select individual components
2078c2ecf20Sopenharmony_ci	  under the corresponding menu.
2088c2ecf20Sopenharmony_ci
2098c2ecf20Sopenharmony_ciconfig STM32_FMC2_EBI
2108c2ecf20Sopenharmony_ci	tristate "Support for FMC2 External Bus Interface on STM32MP SoCs"
2118c2ecf20Sopenharmony_ci	depends on MACH_STM32MP157 || COMPILE_TEST
2128c2ecf20Sopenharmony_ci	select MFD_SYSCON
2138c2ecf20Sopenharmony_ci	help
2148c2ecf20Sopenharmony_ci	  Select this option to enable the STM32 FMC2 External Bus Interface
2158c2ecf20Sopenharmony_ci	  controller. This driver configures the transactions with external
2168c2ecf20Sopenharmony_ci	  devices (like SRAM, ethernet adapters, FPGAs, LCD displays, ...) on
2178c2ecf20Sopenharmony_ci	  SOCs containing the FMC2 External Bus Interface.
2188c2ecf20Sopenharmony_ci
2198c2ecf20Sopenharmony_cisource "drivers/memory/samsung/Kconfig"
2208c2ecf20Sopenharmony_cisource "drivers/memory/tegra/Kconfig"
2218c2ecf20Sopenharmony_ci
2228c2ecf20Sopenharmony_ciendif
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