18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * STK1160 driver
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Copyright (C) 2012 Ezequiel Garcia
68c2ecf20Sopenharmony_ci * <elezegarcia--a.t--gmail.com>
78c2ecf20Sopenharmony_ci *
88c2ecf20Sopenharmony_ci * Based on Easycap driver by R.M. Thomas
98c2ecf20Sopenharmony_ci *	Copyright (C) 2010 R.M. Thomas
108c2ecf20Sopenharmony_ci *	<rmthomas--a.t--sciolus.org>
118c2ecf20Sopenharmony_ci */
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ci/* GPIO Control */
148c2ecf20Sopenharmony_ci#define STK1160_GCTRL			0x000
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ci/* Remote Wakeup Control */
178c2ecf20Sopenharmony_ci#define STK1160_RMCTL			0x00c
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ci/* Power-on Strapping Data */
208c2ecf20Sopenharmony_ci#define STK1160_POSVA			0x010
218c2ecf20Sopenharmony_ci#define STK1160_POSV_L			0x010
228c2ecf20Sopenharmony_ci#define STK1160_POSV_M			0x011
238c2ecf20Sopenharmony_ci#define STK1160_POSV_H			0x012
248c2ecf20Sopenharmony_ci#define  STK1160_POSV_L_ACDOUT		BIT(3)
258c2ecf20Sopenharmony_ci#define  STK1160_POSV_L_ACSYNC		BIT(2)
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci/*
288c2ecf20Sopenharmony_ci * Decoder Control Register:
298c2ecf20Sopenharmony_ci * This byte controls capture start/stop
308c2ecf20Sopenharmony_ci * with bit #7 (0x?? OR 0x80 to activate).
318c2ecf20Sopenharmony_ci */
328c2ecf20Sopenharmony_ci#define STK1160_DCTRL			0x100
338c2ecf20Sopenharmony_ci
348c2ecf20Sopenharmony_ci/*
358c2ecf20Sopenharmony_ci * Decimation Control Register:
368c2ecf20Sopenharmony_ci * Byte 104: Horizontal Decimation Line Unit Count
378c2ecf20Sopenharmony_ci * Byte 105: Vertical Decimation Line Unit Count
388c2ecf20Sopenharmony_ci * Byte 106: Decimation Control
398c2ecf20Sopenharmony_ci * Bit 0 - Horizontal Decimation Control
408c2ecf20Sopenharmony_ci *   0 Horizontal decimation is disabled.
418c2ecf20Sopenharmony_ci *   1 Horizontal decimation is enabled.
428c2ecf20Sopenharmony_ci * Bit 1 - Decimates Half or More Column
438c2ecf20Sopenharmony_ci *   0 Decimates less than half from original column,
448c2ecf20Sopenharmony_ci *     send count unit (0x105) before each unit skipped.
458c2ecf20Sopenharmony_ci *   1 Decimates half or more from original column,
468c2ecf20Sopenharmony_ci *     skip count unit (0x105) before each unit sent.
478c2ecf20Sopenharmony_ci * Bit 2 - Vertical Decimation Control
488c2ecf20Sopenharmony_ci *   0 Vertical decimation is disabled.
498c2ecf20Sopenharmony_ci *   1 Vertical decimation is enabled.
508c2ecf20Sopenharmony_ci * Bit 3 - Vertical Greater or Equal to Half
518c2ecf20Sopenharmony_ci *   0 Decimates less than half from original row,
528c2ecf20Sopenharmony_ci *     send count unit (0x105) before each unit skipped.
538c2ecf20Sopenharmony_ci *   1 Decimates half or more from original row,
548c2ecf20Sopenharmony_ci *     skip count unit (0x105) before each unit sent.
558c2ecf20Sopenharmony_ci * Bit 4 - Decimation Unit
568c2ecf20Sopenharmony_ci *  0 Decimation will work with 2 rows or columns per unit.
578c2ecf20Sopenharmony_ci *  1 Decimation will work with 4 rows or columns per unit.
588c2ecf20Sopenharmony_ci */
598c2ecf20Sopenharmony_ci#define STK1160_DMCTRL_H_UNITS		0x104
608c2ecf20Sopenharmony_ci#define STK1160_DMCTRL_V_UNITS		0x105
618c2ecf20Sopenharmony_ci#define STK1160_DMCTRL			0x106
628c2ecf20Sopenharmony_ci#define  STK1160_H_DEC_EN		BIT(0)
638c2ecf20Sopenharmony_ci#define  STK1160_H_DEC_MODE		BIT(1)
648c2ecf20Sopenharmony_ci#define  STK1160_V_DEC_EN		BIT(2)
658c2ecf20Sopenharmony_ci#define  STK1160_V_DEC_MODE		BIT(3)
668c2ecf20Sopenharmony_ci#define  STK1160_DEC_UNIT_SIZE		BIT(4)
678c2ecf20Sopenharmony_ci
688c2ecf20Sopenharmony_ci/* Capture Frame Start Position */
698c2ecf20Sopenharmony_ci#define STK116_CFSPO			0x110
708c2ecf20Sopenharmony_ci#define STK116_CFSPO_STX_L		0x110
718c2ecf20Sopenharmony_ci#define STK116_CFSPO_STX_H		0x111
728c2ecf20Sopenharmony_ci#define STK116_CFSPO_STY_L		0x112
738c2ecf20Sopenharmony_ci#define STK116_CFSPO_STY_H		0x113
748c2ecf20Sopenharmony_ci
758c2ecf20Sopenharmony_ci/* Capture Frame End Position */
768c2ecf20Sopenharmony_ci#define STK116_CFEPO			0x114
778c2ecf20Sopenharmony_ci#define STK116_CFEPO_ENX_L		0x114
788c2ecf20Sopenharmony_ci#define STK116_CFEPO_ENX_H		0x115
798c2ecf20Sopenharmony_ci#define STK116_CFEPO_ENY_L		0x116
808c2ecf20Sopenharmony_ci#define STK116_CFEPO_ENY_H		0x117
818c2ecf20Sopenharmony_ci
828c2ecf20Sopenharmony_ci/* Serial Interface Control  */
838c2ecf20Sopenharmony_ci#define STK1160_SICTL			0x200
848c2ecf20Sopenharmony_ci#define STK1160_SICTL_CD		0x202
858c2ecf20Sopenharmony_ci#define STK1160_SICTL_SDA		0x203
868c2ecf20Sopenharmony_ci
878c2ecf20Sopenharmony_ci/* Serial Bus Write */
888c2ecf20Sopenharmony_ci#define STK1160_SBUSW			0x204
898c2ecf20Sopenharmony_ci#define STK1160_SBUSW_WA		0x204
908c2ecf20Sopenharmony_ci#define STK1160_SBUSW_WD		0x205
918c2ecf20Sopenharmony_ci
928c2ecf20Sopenharmony_ci/* Serial Bus Read */
938c2ecf20Sopenharmony_ci#define STK1160_SBUSR			0x208
948c2ecf20Sopenharmony_ci#define STK1160_SBUSR_RA		0x208
958c2ecf20Sopenharmony_ci#define STK1160_SBUSR_RD		0x209
968c2ecf20Sopenharmony_ci
978c2ecf20Sopenharmony_ci/* Alternate Serial Interface Control */
988c2ecf20Sopenharmony_ci#define STK1160_ASIC			0x2fc
998c2ecf20Sopenharmony_ci
1008c2ecf20Sopenharmony_ci/* PLL Select Options */
1018c2ecf20Sopenharmony_ci#define STK1160_PLLSO			0x018
1028c2ecf20Sopenharmony_ci
1038c2ecf20Sopenharmony_ci/* PLL Frequency Divider */
1048c2ecf20Sopenharmony_ci#define STK1160_PLLFD			0x01c
1058c2ecf20Sopenharmony_ci
1068c2ecf20Sopenharmony_ci/* Timing Generator */
1078c2ecf20Sopenharmony_ci#define STK1160_TIGEN			0x300
1088c2ecf20Sopenharmony_ci
1098c2ecf20Sopenharmony_ci/* Timing Control Parameter */
1108c2ecf20Sopenharmony_ci#define STK1160_TICTL			0x350
1118c2ecf20Sopenharmony_ci
1128c2ecf20Sopenharmony_ci/* AC97 Audio Control */
1138c2ecf20Sopenharmony_ci#define STK1160_AC97CTL_0		0x500
1148c2ecf20Sopenharmony_ci#define STK1160_AC97CTL_1		0x504
1158c2ecf20Sopenharmony_ci#define  STK1160_AC97CTL_0_CR		BIT(1)
1168c2ecf20Sopenharmony_ci#define  STK1160_AC97CTL_0_CW		BIT(2)
1178c2ecf20Sopenharmony_ci
1188c2ecf20Sopenharmony_ci/* Use [0:6] bits of register 0x504 to set codec command address */
1198c2ecf20Sopenharmony_ci#define STK1160_AC97_ADDR		0x504
1208c2ecf20Sopenharmony_ci/* Use [16:31] bits of register 0x500 to set codec command data */
1218c2ecf20Sopenharmony_ci#define STK1160_AC97_CMD		0x502
1228c2ecf20Sopenharmony_ci
1238c2ecf20Sopenharmony_ci/* Audio I2S Interface */
1248c2ecf20Sopenharmony_ci#define STK1160_I2SCTL			0x50c
1258c2ecf20Sopenharmony_ci
1268c2ecf20Sopenharmony_ci/* EEPROM Interface */
1278c2ecf20Sopenharmony_ci#define STK1160_EEPROM_SZ		0x5f0
128